Hello.
I tried seabios on an emulator (not qemu) and
faced the PCI memory regions overlap.
After some debugging I came to the conclusion
that seabios simply forgets to align the base
addresses, and as the result, when the device
aligns the address down by clearing the "dont
care" bits, it can overlap the previous region.
I fixed the problem with the attached simple patch.
Still it is hard to believe such a bug can exist, so
I wonder if I am missing something. Any suggestions
to where should I dig to narrow the problem further?
Or can it be that seabios actually has the bug like
that and no one have noticed? :)
diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c
index 7896600..0b4e55d 100644
--- a/src/fw/pciinit.c
+++ b/src/fw/pciinit.c
@@ -895,8 +895,10 @@ static void pci_region_map_entries(struct pci_bus *busses, struct pci_region *r)
struct hlist_node *n;
struct pci_region_entry *entry;
hlist_for_each_entry_safe(entry, n, &r->list, node) {
- u64 addr = r->base;
- r->base += entry->size;
+ u64 addr = r->base & ~(entry->size - 1);
+ if (addr < r->base)
+ addr += entry->size;
+ r->base = addr + entry->size;
if (entry->bar == -1)
// Update bus base address if entry is a bridge region
busses[entry->dev->secondary_bus].r[entry->type].base = addr;
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