On 03/22/2018 06:57 AM, Paul Menzel wrote:
Dear Kevin,
On 03/21/18 15:38, Kevin O'Connor wrote:
On Mon, Mar 19, 2018 at 12:23:10PM -0400, Stephen Douthit wrote:
On 03/19/2018 12:00 PM, Stefan Berger wrote:
Wait for the tpmRegValidSts flag on the TPM_LOC_STATE_x register to
be set; we espect the locAssigned flag to not be set.
s/espect/expect/ and in the subject line s/CRQ/CRB
Just retested the v2 series on my board so:
Tested-by: Stephen Douthit <steph...@silicom-usa.com>
Thanks. I committed this series.
Does this resolve the pause at startup for non-TPM users?
I booted the latest master branch this morning on the ASRock E350M1,
and a possible delay wasn’t noticeable by me. But looking at the log,
there is still one time-out messages. Maybe I’ll have time to measure
it next week.
```
BS: BS_PAYLOAD_LOAD times (us): entry 0 run 32666 exit 0
Jumping to boot code at 000fec22(c7d77000)
CPU0: stack: c7eef000 - c7ef0000, lowest used address c7eef6ac, stack
used: 2388 bytes
SeaBIOS (version rel-1.11.0-28-g4922d6c)
BUILD: gcc: (coreboot toolchain v1.50 October 15th, 2017) 6.3.0
binutils: (GNU Binutils) 2.29.1
Found coreboot cbmem console @ c7fde000
Found mainboard ASROCK E350M1
Relocating init from 0x000e1e40 to 0xc7cf3300 (size 52320)
Found CBFS header at 0xffc00238
multiboot: eax=c7eea9a0, ebx=c7eea954
Found 24 PCI devices (max PCI bus is 03)
Copying SMBIOS entry point from 0xc7d40000 to 0x000f6620
Copying ACPI RSDP from 0xc7d51000 to 0x000f65f0
Copying MPTABLE from 0xc7d75000/c7d75010 to 0x000f63f0
Copying PIR from 0xc7d76000 to 0x000f63c0
Using pmtimer, ioport 0x808
WARNING - Timeout at wait_reg8:81!
The timeout to wait for the register change is 30ms. We yield() while
waiting, so we don't block everything entirely... Is the error message
misleading and we should print out that a device was not detected or
print out if it is detected instead?
Stefan
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