date:20181018

[PATCH 1/3] drm/ttm: Provide struct ttm_global for referencing TTM global state

2018-10-18 Thread Thomas Zimmermann

The new struct ttm_global provides drivers with TTM's global memory and
BO in a unified way. Initialization and release is handled internally.

The functionality provided by struct ttm_global is currently re-implemented
by a dozen individual DRM drivers using struct drm_global. The implementation
of struct ttm_global is also built on top of drm_global, so it can co-exists
with the existing drivers. Once all TTM-based drivers have been converted to
struct ttm_global, the implementation of struct drm_global can be made
private to TTM.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/ttm/Makefile |  2 +-
 drivers/gpu/drm/ttm/ttm_global.c | 98 
 include/drm/drm_global.h |  8 +++
 include/drm/ttm/ttm_global.h | 79 +
 4 files changed, 186 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/ttm/ttm_global.c
 create mode 100644 include/drm/ttm/ttm_global.h

diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile
index 01fc670ce7a2..b7272b26e9f3 100644
--- a/drivers/gpu/drm/ttm/Makefile
+++ b/drivers/gpu/drm/ttm/Makefile
@@ -5,7 +5,7 @@
 ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \
ttm_bo_util.o ttm_bo_vm.o ttm_module.o \
ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o \
-   ttm_page_alloc_dma.o
+   ttm_page_alloc_dma.o ttm_global.o
 ttm-$(CONFIG_AGP) += ttm_agp_backend.o
 
 obj-$(CONFIG_DRM_TTM) += ttm.o
diff --git a/drivers/gpu/drm/ttm/ttm_global.c b/drivers/gpu/drm/ttm/ttm_global.c
new file mode 100644
index ..ca9da0a46147
--- /dev/null
+++ b/drivers/gpu/drm/ttm/ttm_global.c
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+/**
+ *
+ * Copyright 2008-2009 VMware, Inc., Palo Alto, CA., USA
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ **/
+
+#include 
+#include 
+#include 
+#include 
+
+static int ttm_global_init_mem(struct drm_global_reference *ref)
+{
+   BUG_ON(!ref->object);
+   return ttm_mem_global_init(ref->object);
+}
+
+static void ttm_global_release_mem(struct drm_global_reference *ref)
+{
+   BUG_ON(!ref->object);
+   ttm_mem_global_release(ref->object);
+}
+
+static int ttm_global_init_bo(struct drm_global_reference *ref)
+{
+   struct ttm_global *glob =
+   container_of(ref, struct ttm_global, bo_ref);
+   BUG_ON(!ref->object);
+   BUG_ON(!glob->mem_ref.object);
+   return ttm_bo_global_init(ref->object, glob->mem_ref.object);
+}
+
+static void ttm_global_release_bo(struct drm_global_reference *ref)
+{
+   BUG_ON(!ref->object);
+   ttm_bo_global_release(ref->object);
+}
+
+int ttm_global_init(struct ttm_global *glob)
+{
+   int ret;
+
+   glob->mem_ref.global_type = DRM_GLOBAL_TTM_MEM;
+   glob->mem_ref.size = sizeof(struct ttm_mem_global);
+   glob->bo_ref.object = NULL;
+   glob->mem_ref.init = _global_init_mem;
+   glob->mem_ref.release = _global_release_mem;
+   ret = drm_global_item_ref(>mem_ref);
+   if (ret)
+   return ret;
+
+   glob->bo_ref.global_type = DRM_GLOBAL_TTM_BO;
+   glob->bo_ref.size = sizeof(struct ttm_bo_global);
+   glob->bo_ref.object = NULL;
+   glob->bo_ref.init = _global_init_bo;
+   glob->bo_ref.release = _global_release_bo;
+   ret = drm_global_item_ref(>bo_ref);
+   if (ret)
+   goto err_drm_global_item_unref_mem;
+
+   return 0;
+
+err_drm_global_item_unref_mem:
+   drm_global_item_unref(>mem_ref);
+   return ret;
+}
+
+EXPORT_SYMBOL(ttm_global_init);
+
+void ttm_global_release(struct ttm_global *glob)
+{
+   drm_global_item_unref(>bo_ref);
+   drm_global_item_unref(>mem_ref);
+}
+

[PATCH 2/3] drm/amdgpu: Replace TTM initialization/release with ttm_global

2018-10-18 Thread Thomas Zimmermann

Unified initialization and relesae of the global TTM state is provided
by struct ttm_global and its interfaces.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 63 ++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h |  4 +-
 2 files changed, 7 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3a6802846698..70b0e8c77bb4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -65,33 +65,6 @@ static void amdgpu_ttm_debugfs_fini(struct amdgpu_device 
*adev);
  * Global memory.
  */
 
-/**
- * amdgpu_ttm_mem_global_init - Initialize and acquire reference to
- * memory object
- *
- * @ref: Object for initialization.
- *
- * This is called by drm_global_item_ref() when an object is being
- * initialized.
- */
-static int amdgpu_ttm_mem_global_init(struct drm_global_reference *ref)
-{
-   return ttm_mem_global_init(ref->object);
-}
-
-/**
- * amdgpu_ttm_mem_global_release - Drop reference to a memory object
- *
- * @ref: Object being removed
- *
- * This is called by drm_global_item_unref() when an object is being
- * released.
- */
-static void amdgpu_ttm_mem_global_release(struct drm_global_reference *ref)
-{
-   ttm_mem_global_release(ref->object);
-}
-
 /**
  * amdgpu_ttm_global_init - Initialize global TTM memory reference structures.
  *
@@ -102,35 +75,15 @@ static void amdgpu_ttm_mem_global_release(struct 
drm_global_reference *ref)
  */
 static int amdgpu_ttm_global_init(struct amdgpu_device *adev)
 {
-   struct drm_global_reference *global_ref;
int r;
 
/* ensure reference is false in case init fails */
adev->mman.mem_global_referenced = false;
 
-   global_ref = >mman.mem_global_ref;
-   global_ref->global_type = DRM_GLOBAL_TTM_MEM;
-   global_ref->size = sizeof(struct ttm_mem_global);
-   global_ref->init = _ttm_mem_global_init;
-   global_ref->release = _ttm_mem_global_release;
-   r = drm_global_item_ref(global_ref);
+   r = ttm_global_init(>mman.glob);
if (r) {
-   DRM_ERROR("Failed setting up TTM memory accounting "
- "subsystem.\n");
-   goto error_mem;
-   }
-
-   adev->mman.bo_global_ref.mem_glob =
-   adev->mman.mem_global_ref.object;
-   global_ref = >mman.bo_global_ref.ref;
-   global_ref->global_type = DRM_GLOBAL_TTM_BO;
-   global_ref->size = sizeof(struct ttm_bo_global);
-   global_ref->init = _bo_global_ref_init;
-   global_ref->release = _bo_global_ref_release;
-   r = drm_global_item_ref(global_ref);
-   if (r) {
-   DRM_ERROR("Failed setting up TTM BO subsystem.\n");
-   goto error_bo;
+   DRM_ERROR("Failed setting up TTM subsystem.\n");
+   return r;
}
 
mutex_init(>mman.gtt_window_lock);
@@ -138,19 +91,13 @@ static int amdgpu_ttm_global_init(struct amdgpu_device 
*adev)
adev->mman.mem_global_referenced = true;
 
return 0;
-
-error_bo:
-   drm_global_item_unref(>mman.mem_global_ref);
-error_mem:
-   return r;
 }
 
 static void amdgpu_ttm_global_fini(struct amdgpu_device *adev)
 {
if (adev->mman.mem_global_referenced) {
mutex_destroy(>mman.gtt_window_lock);
-   drm_global_item_unref(>mman.bo_global_ref.ref);
-   drm_global_item_unref(>mman.mem_global_ref);
+   ttm_global_release(>mman.glob);
adev->mman.mem_global_referenced = false;
}
 }
@@ -1765,7 +1712,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
}
/* No others user of address space so set it to 0 */
r = ttm_bo_device_init(>mman.bdev,
-  adev->mman.bo_global_ref.ref.object,
+  ttm_global_get_bo_global(>mman.glob),
   _bo_driver,
   adev->ddev->anon_inode->i_mapping,
   DRM_FILE_PAGE_OFFSET,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
index fe8f276e9811..c3a7fe3ead3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
@@ -26,6 +26,7 @@
 
 #include "amdgpu.h"
 #include 
+#include 
 
 #define AMDGPU_PL_GDS  (TTM_PL_PRIV + 0)
 #define AMDGPU_PL_GWS  (TTM_PL_PRIV + 1)
@@ -39,8 +40,7 @@
 #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS2
 
 struct amdgpu_mman {
-   struct ttm_bo_global_refbo_global_ref;
-   struct drm_global_reference mem_global_ref;
+   struct ttm_global   glob;
struct ttm_bo_devicebdev;
boolmem_global_referenced;
boolinitialized;
-- 
2.19.1

___
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[PATCH 3/3] drm/radeon: Replace TTM initialization/release with ttm_global

2018-10-18 Thread Thomas Zimmermann

Unified initialization and release of the global TTM state is provided
by struct ttm_global and its interfaces.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/radeon/radeon.h |  4 +--
 drivers/gpu/drm/radeon/radeon_ttm.c | 40 -
 2 files changed, 7 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 1a6f6edb3515..554c0421b779 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -73,6 +73,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -448,8 +449,7 @@ struct radeon_surface_reg {
  * TTM.
  */
 struct radeon_mman {
-   struct ttm_bo_global_refbo_global_ref;
-   struct drm_global_reference mem_global_ref;
+   struct ttm_global   glob;
struct ttm_bo_devicebdev;
boolmem_global_referenced;
boolinitialized;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c 
b/drivers/gpu/drm/radeon/radeon_ttm.c
index dac4ec5a120b..363860e82892 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -64,45 +64,16 @@ static struct radeon_device *radeon_get_rdev(struct 
ttm_bo_device *bdev)
 /*
  * Global memory.
  */
-static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
-{
-   return ttm_mem_global_init(ref->object);
-}
-
-static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
-{
-   ttm_mem_global_release(ref->object);
-}
 
 static int radeon_ttm_global_init(struct radeon_device *rdev)
 {
-   struct drm_global_reference *global_ref;
int r;
 
rdev->mman.mem_global_referenced = false;
-   global_ref = >mman.mem_global_ref;
-   global_ref->global_type = DRM_GLOBAL_TTM_MEM;
-   global_ref->size = sizeof(struct ttm_mem_global);
-   global_ref->init = _ttm_mem_global_init;
-   global_ref->release = _ttm_mem_global_release;
-   r = drm_global_item_ref(global_ref);
-   if (r != 0) {
-   DRM_ERROR("Failed setting up TTM memory accounting "
- "subsystem.\n");
-   return r;
-   }
 
-   rdev->mman.bo_global_ref.mem_glob =
-   rdev->mman.mem_global_ref.object;
-   global_ref = >mman.bo_global_ref.ref;
-   global_ref->global_type = DRM_GLOBAL_TTM_BO;
-   global_ref->size = sizeof(struct ttm_bo_global);
-   global_ref->init = _bo_global_ref_init;
-   global_ref->release = _bo_global_ref_release;
-   r = drm_global_item_ref(global_ref);
-   if (r != 0) {
-   DRM_ERROR("Failed setting up TTM BO subsystem.\n");
-   drm_global_item_unref(>mman.mem_global_ref);
+   r = ttm_global_init(>mman.glob);
+   if (r) {
+   DRM_ERROR("Failed setting up TTM subsystem.\n");
return r;
}
 
@@ -113,8 +84,7 @@ static int radeon_ttm_global_init(struct radeon_device *rdev)
 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 {
if (rdev->mman.mem_global_referenced) {
-   drm_global_item_unref(>mman.bo_global_ref.ref);
-   drm_global_item_unref(>mman.mem_global_ref);
+   ttm_global_release(>mman.glob);
rdev->mman.mem_global_referenced = false;
}
 }
@@ -853,7 +823,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
}
/* No others user of address space so set it to 0 */
r = ttm_bo_device_init(>mman.bdev,
-  rdev->mman.bo_global_ref.ref.object,
+  ttm_global_get_bo_global(>mman.glob),
   _bo_driver,
   rdev->ddev->anon_inode->i_mapping,
   DRM_FILE_PAGE_OFFSET,
-- 
2.19.1

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[PATCH 0/3] Provide struct ttm_global for TTM global state

2018-10-18 Thread Thomas Zimmermann

TTM provides global memory and a global BO that is shared by all
TTM-based drivers. The data structures are provided by struct drm_global
and its helpers. All TTM-based DRM drivers copy the initialization and
clean-up code for the global TTM state from each other; leading to code
duplication.

The new structure struct ttm_global and its helpers provide a unified
implementation. Drivers only have to initialize it and forward the
contained BO global object to ttm_bo_device_init().

The amdgpu and radeon drivers are converted to struct ttm_global as
part of this patch set. All other TTM-based drivers share exactly the
same code patterns and can be converted in the same way.

Future directions: I already have patches for converting the remaining
TTM drivers to struct ttm_global. These patches can be merged after
the structure has become available in upstream. struct ttm_global is
implemented on top of struct drm_global. The latter actually maintains
TTM state instead of DRM state. Once all drivers have been converted,
the code for struct drm_global can be merged into struct ttm_global.

(Resending this patch set, as I forgot to CC the mailing lists as first.)

Thomas Zimmermann (3):
  drm/ttm: Provide struct ttm_global for referencing TTM global state
  drm/amdgpu: Replace TTM initialization/release with ttm_global
  drm/radeon: Replace TTM initialization/release with ttm_global

 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 63 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h |  4 +-
 drivers/gpu/drm/radeon/radeon.h |  4 +-
 drivers/gpu/drm/radeon/radeon_ttm.c | 40 ++
 drivers/gpu/drm/ttm/Makefile|  2 +-
 drivers/gpu/drm/ttm/ttm_global.c| 98 +
 include/drm/drm_global.h|  8 ++
 include/drm/ttm/ttm_global.h| 79 
 8 files changed, 200 insertions(+), 98 deletions(-)
 create mode 100644 drivers/gpu/drm/ttm/ttm_global.c
 create mode 100644 include/drm/ttm/ttm_global.h

--
2.19.1

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Re: [PATCH] powerplay: Respect units on max dcfclk watermark

2018-10-18 Thread Wentland, Harry

On 2018-10-18 11:30 a.m., David Francis wrote:
> In a refactor, the watermark clock inputs to
> powerplay from DC were changed from units of 10kHz to
> kHz clocks.
> 
> One division by 100 was not converted into a division
> by 1000.
> 
> Signed-off-by: David Francis 

Reviewed-by: Harry Wentland 

Harry

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c
> index 4714b5b59825..99a33c33a32c 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu_helper.c
> @@ -718,7 +718,7 @@ int smu_set_watermarks_for_clocks_ranges(void *wt_table,
>   table->WatermarkRow[1][i].MaxClock =
>   cpu_to_le16((uint16_t)
>   
> (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_max_dcfclk_clk_in_khz) /
> - 100);
> + 1000);
>   table->WatermarkRow[1][i].MinUclk =
>   cpu_to_le16((uint16_t)
>   
> (wm_with_clock_ranges->wm_dmif_clocks_ranges[i].wm_min_mem_clk_in_khz) /
> 
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Re: [PATCH v2] drm: Get ref on CRTC commit object when waiting for flip_done

2018-10-18 Thread Wentland, Harry

On 2018-10-16 11:48 a.m., Alex Deucher wrote:
> On Tue, Oct 16, 2018 at 11:00 AM Li, Sun peng (Leo)  
> wrote:
>>
>>
>>
>> On 2018-10-16 08:33 AM, Daniel Vetter wrote:
>>> On Mon, Oct 15, 2018 at 09:46:40AM -0400, sunpeng...@amd.com wrote:
 From: Leo Li 

 This fixes a general protection fault, caused by accessing the contents
 of a flip_done completion object that has already been freed. It occurs
 due to the preemption of a non-blocking commit worker thread W by
 another commit thread X. X continues to clear its atomic state at the
 end, destroying the CRTC commit object that W still needs. Switching
 back to W and accessing the commit objects then leads to bad results.

 Worker W becomes preemptable when waiting for flip_done to complete. At
 this point, a frequently occurring commit thread X can take over. Here's
 an example where W is a worker thread that flips on both CRTCs, and X
 does a legacy cursor update on both CRTCs:

  ...
   1. W does flip work
   2. W runs commit_hw_done()
   3. W waits for flip_done on CRTC 1
   4. > flip_done for CRTC 1 completes
   5. W finishes waiting for CRTC 1
   6. W waits for flip_done on CRTC 2

   7. > Preempted by X
   8. > flip_done for CRTC 2 completes
   9. X atomic_check: hw_done and flip_done are complete on all CRTCs
  10. X updates cursor on both CRTCs
  11. X destroys atomic state
  12. X done

  13. > Switch back to W
  14. W waits for flip_done on CRTC 2
  15. W raises general protection fault

 The error looks like so:

  general protection fault:  [#1] PREEMPT SMP PTI
  **snip**
  Call Trace:
   lock_acquire+0xa2/0x1b0
   _raw_spin_lock_irq+0x39/0x70
   wait_for_completion_timeout+0x31/0x130
   drm_atomic_helper_wait_for_flip_done+0x64/0x90 [drm_kms_helper]
   amdgpu_dm_atomic_commit_tail+0xcae/0xdd0 [amdgpu]
   commit_tail+0x3d/0x70 [drm_kms_helper]
   process_one_work+0x212/0x650
   worker_thread+0x49/0x420
   kthread+0xfb/0x130
   ret_from_fork+0x3a/0x50
  Modules linked in: x86_pkg_temp_thermal amdgpu(O) chash(O)
  gpu_sched(O) drm_kms_helper(O) syscopyarea sysfillrect sysimgblt
  fb_sys_fops ttm(O) drm(O)

 Note that i915 has this issue masked, since hw_done is signaled after
 waiting for flip_done. Doing so will block the cursor update from
 happening until hw_done is signaled, preventing the cursor commit from
 destroying the state.

 v2: The reference on the commit object needs to be obtained before
  hw_done() is signaled, since that's the point where another commit
  is allowed to modify the state. Assuming that the
  new_crtc_state->commit object still exists within flip_done() is
  incorrect.

  Fix by getting a reference in setup_commit(), and releasing it
  during default_clear().

 Signed-off-by: Leo Li 
 ---

 Sending again, this time to the correct mailing list :)

 Leo
>>>
>>> Reviewed-by: Daniel Vetter 
>>> Cc: sta...@vger.kernel.org
>>>
>>> I think it'd be really good if you could get intel-gfx-ci to test this
>>> patch. Simply submit it to intel-...@lists.freedesktop.org. I'll leave
>>> applying to one of the amd drm-misc committers, once it's passed CI.
> 
> Leo, do you or Harry have drm-misc commit access yet?  If not, you should.
> 

I believe I do and will push the patch. Leo's getting the ball rolling to get 
access (fdo account, etc).

Harry

> Alex
> 
>>>
>>> Cheers, Daniel
>>
>> Thanks for the rb!
>>
>> On the topic of CI, is it possible to write a test (maybe one already
>> exists) for this issue? I've attempted to do one here:
>>
>> https://patchwork.freedesktop.org/patch/256319/
>>
>> The problem is finding a surefire way to trigger the sequence, I'm not
>> sure how that can be done. If you have any ideas, I would love to hear them.
>>
>> Leo
>>
>>>

   drivers/gpu/drm/drm_atomic.c|  5 +
   drivers/gpu/drm/drm_atomic_helper.c | 12 
   include/drm/drm_atomic.h| 11 +++
   3 files changed, 24 insertions(+), 4 deletions(-)

 diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
 index 3eb061e..12ae917 100644
 --- a/drivers/gpu/drm/drm_atomic.c
 +++ b/drivers/gpu/drm/drm_atomic.c
 @@ -174,6 +174,11 @@ void drm_atomic_state_default_clear(struct 
 drm_atomic_state *state)
  state->crtcs[i].state = NULL;
  state->crtcs[i].old_state = NULL;
  state->crtcs[i].new_state = NULL;
 +
 +if (state->crtcs[i].commit) {
 +drm_crtc_commit_put(state->crtcs[i].commit);
 +

[PATCH] drm/radeon: fix a missing-check bug

2018-10-18 Thread Wenwen Wang

In radeon_read_bios(), the bios rom is firstly mapped to the IO memory
region 'bios' through pci_map_rom(). Then the first two bytes of 'bios' are
copied to 'val1' and 'val2' respectively through readb(). After that,
'val1' and 'val2' are checked to see whether they have expected values,
i.e., 0x55 and 0xaa, respectively. If yes, the whole data in 'bios' is then
copied to 'rdev->bios' through memcpy_fromio(). Obviously, the first two
bytes in 'bios' are copied twice. More importantly, no check is enforced on
the first two bytes of 'rdev->bios' after memcpy_fromio(). Given that the
IO memory region can also be accessed by the device, it is possible that a
malicious device can race to modify these two bytes between the two copies
and thus after memcpy_fromio(), the first two bytes in 'rdev->bios' can
have unexpected values.  This can cause undefined behavior of the kernel
and introduce potential security risk, if the device can be controlled by
attackers.

This patch rewrites the first two bytes of 'rdev->bios' after
memcpy_fromio() with expected values. Through this way, the above issue can
be avoided.

Signed-off-by: Wenwen Wang 
---
 drivers/gpu/drm/radeon/radeon_bios.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_bios.c 
b/drivers/gpu/drm/radeon/radeon_bios.c
index 04c0ed4..f336719 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -98,6 +98,8 @@ static bool radeon_read_bios(struct radeon_device *rdev)
return false;
}
memcpy_fromio(rdev->bios, bios, size);
+   rdev->bios[0] = val1;
+   rdev->bios[1] = val2;
pci_unmap_rom(rdev->pdev, bios);
return true;
 }
-- 
2.7.4

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[PATCH] drm/radeon: fix a missing-check bug

2018-10-18 Thread Wenwen Wang

In igp_read_bios_from_vram(), the start of vram is firstly remapped to the
IO memory region 'bios' through ioremap(). Then the size and values of
'bios' are checked. For example, 'bios[0]' is compared against 0x55 and
'bios[1]' is compared against 0xaa. If no error happens during this
checking process, the whole data in 'bios' is then copied to 'rdev->bios'
through memcpy_fromio().  The problem here is that the checks are performed
on 'bios' directly. Given that the IO memory region can also be accessed by
the device, it is possible that a malicious device race to modify 'bios[0]'
and/or 'bios[1]' after the checks but before memcpy_fromio(). This can
cause undefined behavior of the kernel and potentially introduce security
risk, especially when the device can be controlled by attackers.

This patch avoids the above issue by rewriting the first two bytes of
'rdev->bios' after memcpy_fromio() with expected values.

Signed-off-by: Wenwen Wang 
---
 drivers/gpu/drm/radeon/radeon_bios.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/radeon/radeon_bios.c 
b/drivers/gpu/drm/radeon/radeon_bios.c
index 04c0ed4..d8304fa 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -69,6 +69,8 @@ static bool igp_read_bios_from_vram(struct radeon_device 
*rdev)
return false;
}
memcpy_fromio(rdev->bios, bios, size);
+   rdev->bios[0] = 0x55;
+   rdev->bios[1] = 0xaa;
iounmap(bios);
return true;
 }
-- 
2.7.4

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Re: [PATCH 2/3] drm/amdgpu: increase the size of HQD EOP buffers

2018-10-18 Thread Marek Olšák

On Tue, Oct 9, 2018 at 12:17 PM Alex Deucher  wrote:

> On Fri, Oct 5, 2018 at 5:01 PM Marek Olšák  wrote:
> >
> > From: Marek Olšák 
> >
> > Signed-off-by: Marek Olšák 
> > ---
> >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
> >  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
>
> Any reason not to bump the size for gfx7 as well?
>

No, I just don't know if gfx7 supports the same size.

Marek
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[PATCH 1/3] drm/amdkfd: Simplify kfd2kgd interface

2018-10-18 Thread Lin, Amber

After amdkfd module is merged into amdgpu, KFD can call amdgpu directly
and no longer needs to use the function pointer. Replace those function
pointers with functions if they are not ASIC dependent.

Signed-off-by: Amber Lin 
---
 drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c   |  3 +-
 drivers/gpu/drm/amd/amdkfd/kfd_chardev.c   | 21 ++---
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c  |  5 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_device.c|  7 +++--
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  | 15 +-
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c   |  3 +-
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c|  5 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_pasid.c |  5 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_process.c   | 34 --
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c  | 10 +++
 10 files changed, 59 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c 
b/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c
index 5d2475d..177d1e5 100644
--- a/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c
+++ b/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c
@@ -23,6 +23,7 @@
 #include "kfd_priv.h"
 #include "kfd_events.h"
 #include "cik_int.h"
+#include "amdgpu_amdkfd.h"
 
 static bool cik_event_interrupt_isr(struct kfd_dev *dev,
const uint32_t *ih_ring_entry,
@@ -107,7 +108,7 @@ static void cik_event_interrupt_wq(struct kfd_dev *dev,
kfd_process_vm_fault(dev->dqm, pasid);
 
memset(, 0, sizeof(info));
-   dev->kfd2kgd->get_vm_fault_info(dev->kgd, );
+   amdgpu_amdkfd_gpuvm_get_vm_fault_info(dev->kgd, );
if (!info.page_addr && !info.status)
return;
 
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 14d5b5f..85e833d 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -37,6 +37,7 @@
 #include "kfd_priv.h"
 #include "kfd_device_queue_manager.h"
 #include "kfd_dbgmgr.h"
+#include "amdgpu_amdkfd.h"
 
 static long kfd_ioctl(struct file *, unsigned int, unsigned long);
 static int kfd_open(struct inode *, struct file *);
@@ -834,8 +835,7 @@ static int kfd_ioctl_get_clock_counters(struct file *filep,
dev = kfd_device_by_id(args->gpu_id);
if (dev)
/* Reading GPU clock counter from KGD */
-   args->gpu_clock_counter =
-   dev->kfd2kgd->get_gpu_clock_counter(dev->kgd);
+   args->gpu_clock_counter = get_gpu_clock_counter(dev->kgd);
else
/* Node without GPU resource */
args->gpu_clock_counter = 0;
@@ -1042,7 +1042,7 @@ static int kfd_ioctl_create_event(struct file *filp, 
struct kfd_process *p,
}
mutex_unlock(>mutex);
 
-   err = kfd->kfd2kgd->map_gtt_bo_to_kernel(kfd->kgd,
+   err = amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel(kfd->kgd,
mem, _addr, );
if (err) {
pr_err("Failed to map event page to kernel\n");
@@ -1240,7 +1240,7 @@ bool kfd_dev_is_large_bar(struct kfd_dev *dev)
if (dev->device_info->needs_iommu_device)
return false;
 
-   dev->kfd2kgd->get_local_mem_info(dev->kgd, _info);
+   get_local_mem_info(dev->kgd, _info);
if (mem_info.local_mem_size_private == 0 &&
mem_info.local_mem_size_public > 0)
return true;
@@ -1281,7 +1281,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file 
*filep,
goto err_unlock;
}
 
-   err = dev->kfd2kgd->alloc_memory_of_gpu(
+   err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
dev->kgd, args->va_addr, args->size,
pdd->vm, (struct kgd_mem **) , ,
flags);
@@ -1303,7 +1303,7 @@ static int kfd_ioctl_alloc_memory_of_gpu(struct file 
*filep,
return 0;
 
 err_free:
-   dev->kfd2kgd->free_memory_of_gpu(dev->kgd, (struct kgd_mem *)mem);
+   amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->kgd, (struct kgd_mem *)mem);
 err_unlock:
mutex_unlock(>mutex);
return err;
@@ -1338,7 +1338,8 @@ static int kfd_ioctl_free_memory_of_gpu(struct file 
*filep,
goto err_unlock;
}
 
-   ret = dev->kfd2kgd->free_memory_of_gpu(dev->kgd, (struct kgd_mem *)mem);
+   ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->kgd,
+   (struct kgd_mem *)mem);
 
/* If freeing the buffer failed, leave the handle in place for
 * clean-up during process tear-down.
@@ -1418,7 +1419,7 @@ static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
err = PTR_ERR(peer_pdd);
goto

[PATCH 2/3] drm/amdgpu: Remove unused function pointers

2018-10-18 Thread Lin, Amber

Remove unused function pointers in kfd2kgd structure.

Signed-off-by: Amber Lin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c |  25 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c |  25 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c |  24 -
 drivers/gpu/drm/amd/include/kgd_kfd_interface.h   | 115 --
 4 files changed, 189 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
index 244d983..72a357d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
@@ -173,13 +173,6 @@ static int get_tile_config(struct kgd_dev *kgd,
 }
 
 static const struct kfd2kgd_calls kfd2kgd = {
-   .init_gtt_mem_allocation = alloc_gtt_mem,
-   .free_gtt_mem = free_gtt_mem,
-   .get_local_mem_info = get_local_mem_info,
-   .get_gpu_clock_counter = get_gpu_clock_counter,
-   .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
-   .alloc_pasid = amdgpu_pasid_alloc,
-   .free_pasid = amdgpu_pasid_free,
.program_sh_mem_settings = kgd_program_sh_mem_settings,
.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
.init_interrupts = kgd_init_interrupts,
@@ -200,28 +193,10 @@ static const struct kfd2kgd_calls kfd2kgd = {
.get_fw_version = get_fw_version,
.set_scratch_backing_va = set_scratch_backing_va,
.get_tile_config = get_tile_config,
-   .get_cu_info = get_cu_info,
-   .get_vram_usage = amdgpu_amdkfd_get_vram_usage,
-   .create_process_vm = amdgpu_amdkfd_gpuvm_create_process_vm,
-   .acquire_process_vm = amdgpu_amdkfd_gpuvm_acquire_process_vm,
-   .destroy_process_vm = amdgpu_amdkfd_gpuvm_destroy_process_vm,
-   .release_process_vm = amdgpu_amdkfd_gpuvm_release_process_vm,
-   .get_process_page_dir = amdgpu_amdkfd_gpuvm_get_process_page_dir,
.set_vm_context_page_table_base = set_vm_context_page_table_base,
-   .alloc_memory_of_gpu = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu,
-   .free_memory_of_gpu = amdgpu_amdkfd_gpuvm_free_memory_of_gpu,
-   .map_memory_to_gpu = amdgpu_amdkfd_gpuvm_map_memory_to_gpu,
-   .unmap_memory_to_gpu = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu,
-   .sync_memory = amdgpu_amdkfd_gpuvm_sync_memory,
-   .map_gtt_bo_to_kernel = amdgpu_amdkfd_gpuvm_map_gtt_bo_to_kernel,
-   .restore_process_bos = amdgpu_amdkfd_gpuvm_restore_process_bos,
.invalidate_tlbs = invalidate_tlbs,
.invalidate_tlbs_vmid = invalidate_tlbs_vmid,
-   .submit_ib = amdgpu_amdkfd_submit_ib,
-   .get_vm_fault_info = amdgpu_amdkfd_gpuvm_get_vm_fault_info,
.read_vmid_from_vmfault_reg = read_vmid_from_vmfault_reg,
-   .gpu_recover = amdgpu_amdkfd_gpu_reset,
-   .set_compute_idle = amdgpu_amdkfd_set_compute_idle
 };
 
 struct kfd2kgd_calls *amdgpu_amdkfd_gfx_7_get_functions(void)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
index 9f14991..0e2a56b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
@@ -128,13 +128,6 @@ static int get_tile_config(struct kgd_dev *kgd,
 }
 
 static const struct kfd2kgd_calls kfd2kgd = {
-   .init_gtt_mem_allocation = alloc_gtt_mem,
-   .free_gtt_mem = free_gtt_mem,
-   .get_local_mem_info = get_local_mem_info,
-   .get_gpu_clock_counter = get_gpu_clock_counter,
-   .get_max_engine_clock_in_mhz = get_max_engine_clock_in_mhz,
-   .alloc_pasid = amdgpu_pasid_alloc,
-   .free_pasid = amdgpu_pasid_free,
.program_sh_mem_settings = kgd_program_sh_mem_settings,
.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
.init_interrupts = kgd_init_interrupts,
@@ -157,27 +150,9 @@ static const struct kfd2kgd_calls kfd2kgd = {
.get_fw_version = get_fw_version,
.set_scratch_backing_va = set_scratch_backing_va,
.get_tile_config = get_tile_config,
-   .get_cu_info = get_cu_info,
-   .get_vram_usage = amdgpu_amdkfd_get_vram_usage,
-   .create_process_vm = amdgpu_amdkfd_gpuvm_create_process_vm,
-   .acquire_process_vm = amdgpu_amdkfd_gpuvm_acquire_process_vm,
-   .destroy_process_vm = amdgpu_amdkfd_gpuvm_destroy_process_vm,
-   .release_process_vm = amdgpu_amdkfd_gpuvm_release_process_vm,
-   .get_process_page_dir = amdgpu_amdkfd_gpuvm_get_process_page_dir,
.set_vm_context_page_table_base = set_vm_context_page_table_base,
-   .alloc_memory_of_gpu = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu,
-   .free_memory_of_gpu = amdgpu_amdkfd_gpuvm_free_memory_of_gpu,
-   .map_memory_to_gpu = amdgpu_amdkfd_gpuvm_map_memory_to_gpu,
-   .unmap_memory_to_gpu = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu,
-   .sync_memory = amdgpu_amdkfd_gpuvm_sync_memory,
-   .map_gtt_bo_to_kernel =

Re: [PATCH 3/3] drm/amdkfd: Use functions from amdgpu for setting up page table base

2018-10-18 Thread Kuehling, Felix

On 2018-10-18 5:59 p.m., wrote:
>
> Please include a patch description on 2 and 3, with that fixed, series is:
>
> Reviewed-by: Alex Deucher 
>

Reviewed-by: Felix Kuehling 


> 
> *From:* Zhao, Yong
> *Sent:* Thursday, October 18, 2018 5:13:04 PM
> *To:* amd-gfx@lists.freedesktop.org; brahma_sw_dev
> *Cc:* Zhao, Yong
> *Subject:* [PATCH 3/3] drm/amdkfd: Use functions from amdgpu for
> setting up page table base
>  
> Change-Id: I42eb2e41ce21b4a6ea0c8394dcc762ee92b2ca5e
> Signed-off-by: Yong Zhao 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 12 +++-
>  1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> index 4b79639..223bbc1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
> @@ -46,6 +46,7 @@
>  #include "v9_structs.h"
>  #include "soc15.h"
>  #include "soc15d.h"
> +#include "gmc_v9_0.h"
>  
>  /* HACK: MMHUB and GC both have VM-related register with the same
>   * names but different offsets. Define the MMHUB register we need here
> @@ -59,11 +60,6 @@
>  #define mmMMHUB_VM_INVALIDATE_ENG16_ACK 0x0705
>  #define mmMMHUB_VM_INVALIDATE_ENG16_ACK_BASE_IDX    0
>  
> -#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32  0x072b
> -#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0
> -#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32  0x072c
> -#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0
> -
>  #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32 0x0727
>  #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32_BASE_IDX    0
>  #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI32 0x0728
> @@ -1018,9 +1014,7 @@ static void
> set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
>   * now, all processes share the same address space size, like
>   * on GFX8 and older.
>   */
> -   WREG32(SOC15_REG_OFFSET(MMHUB, 0,
> mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2),
> lower_32_bits(base));
> -   WREG32(SOC15_REG_OFFSET(MMHUB, 0,
> mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2),
> upper_32_bits(base));
> +   mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
>  
> -   WREG32(SOC15_REG_OFFSET(GC, 0,
> mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
> -   WREG32(SOC15_REG_OFFSET(GC, 0,
> mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
> +   gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
>  }
> -- 
> 2.7.4
>
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Re: [PATCH] drm/amdgpu: fix amdgpu_vm_fini

2018-10-18 Thread zhoucm1




On 2018年10月18日 20:31, Christian König wrote:

We should not remove mappings in rbtree_postorder_for_each_entry_safe
because that rebalances the tree.

Signed-off-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 -
  1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6904d794d60a..01d94de6a6a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -3235,7 +3235,6 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
rbtree_postorder_for_each_entry_safe(mapping, tmp,
 >va.rb_root, rb) {
list_del(>list);
-   amdgpu_vm_it_remove(mapping, >va);
kfree(mapping);
At least, we should add some comments here, like rb_root would be 
invalid, we cannot use it any more, although that is fact.

Or as you suggested to me before, we can change to while(next_node)...:)

anyway, depending on your favorite, Reviewed-by: Chunming Zhou 


}
list_for_each_entry_safe(mapping, tmp, >freed, list) {


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RE: [PATCH 2/2] drm/amdgpu: Fix null point errro

2018-10-18 Thread Zhou, David(ChunMing)

A minor suggestion, not sure if it's proper, Can we insert these callback 
checking to func? I know these func could be defined as a macro, can we change 
them to function definition?

David

> -Original Message-
> From: amd-gfx  On Behalf Of Rex
> Zhu
> Sent: Friday, October 19, 2018 10:51 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex 
> Subject: [PATCH 2/2] drm/amdgpu: Fix null point errro
> 
> need to check adev->powerplay.pp_funcs first, becasue from AI, the smu ip
> may be disabled by user, and the pp_handle is null in this case.
> 
> Signed-off-by: Rex Zhu 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c| 6 --
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 2 +-
>  drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c| 2 +-
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 --
>  5 files changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 297a549..0a4fba1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain
> *genpd)
>* 2. power off the acp tiles
>* 3. check and enter ulv state
>*/
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
>   amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, true);
>   }
>   return 0;
> @@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
>   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
>   bool enable = state == AMD_PG_STATE_GATE ? true : false;
> 
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> + adev->powerplay.pp_funcs->set_powergating_by_smu)
>   amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_ACP, enable);
> 
>   return 0;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 4fca67a..7dad682 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1783,6 +1783,7 @@ static int amdgpu_device_set_pg_state(struct
> amdgpu_device *adev, enum amd_power
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_VCE ||
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_VCN ||
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_ACP) &&
> + adev->powerplay.pp_funcs &&
>   adev->powerplay.pp_funcs->set_powergating_by_smu) {
>   if (!adev->ip_blocks[i].status.valid) {
> 
>   amdgpu_dpm_set_powergating_by_smu(adev, adev-
> >ip_blocks[i].version->type, state == AMD_PG_STATE_GATE ?
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index 790fd54..1a656b8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device
> *adev, bool enable)
>   if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
>   return;
> 
> - if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (!adev->powerplay.pp_funcs ||
> +!adev->powerplay.pp_funcs->set_powergating_by_smu)
>   return;
> 
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> index 14649f8..fd23ba1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
> @@ -280,7 +280,7 @@ void mmhub_v1_0_update_power_gating(struct
> amdgpu_device *adev,
>   return;
> 
>   if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
> - if (adev->powerplay.pp_funcs->set_powergating_by_smu)
> + if (adev->powerplay.pp_funcs &&
> +adev->powerplay.pp_funcs->set_powergating_by_smu)
>   amdgpu_dpm_set_powergating_by_smu(adev,
> AMD_IP_BLOCK_TYPE_GMC, true);
> 
>   }
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 2e8365d..d97e6a2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1595,7 +1595,8 @@ static int sdma_v4_0_hw_init(void *handle)
>   int r;
>   struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> 
> - if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
> + if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
> &&
> + adev->powerplay.pp_funcs-
> >set_powergating_by_smu)
>   amdgpu_dpm_set_powergating_by_smu(adev,
>

Re: [PATCH 1/3] drm/ttm: Provide struct ttm_global for referencing TTM global state

2018-10-18 Thread Huang Rui

On Fri, Oct 19, 2018 at 12:27:50AM +0800, Thomas Zimmermann wrote:
> The new struct ttm_global provides drivers with TTM's global memory and
> BO in a unified way. Initialization and release is handled internally.
> 
> The functionality provided by struct ttm_global is currently re-implemented
> by a dozen individual DRM drivers using struct drm_global. The implementation
> of struct ttm_global is also built on top of drm_global, so it can co-exists
> with the existing drivers. Once all TTM-based drivers have been converted to
> struct ttm_global, the implementation of struct drm_global can be made
> private to TTM.
> 
> Signed-off-by: Thomas Zimmermann 
> ---
>  drivers/gpu/drm/ttm/Makefile |  2 +-
>  drivers/gpu/drm/ttm/ttm_global.c | 98 
>  include/drm/drm_global.h |  8 +++
>  include/drm/ttm/ttm_global.h | 79 +
>  4 files changed, 186 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/gpu/drm/ttm/ttm_global.c
>  create mode 100644 include/drm/ttm/ttm_global.h
> 
> diff --git a/drivers/gpu/drm/ttm/Makefile b/drivers/gpu/drm/ttm/Makefile
> index 01fc670ce7a2..b7272b26e9f3 100644
> --- a/drivers/gpu/drm/ttm/Makefile
> +++ b/drivers/gpu/drm/ttm/Makefile
> @@ -5,7 +5,7 @@
>  ttm-y := ttm_memory.o ttm_tt.o ttm_bo.o \
>   ttm_bo_util.o ttm_bo_vm.o ttm_module.o \
>   ttm_execbuf_util.o ttm_page_alloc.o ttm_bo_manager.o \
> - ttm_page_alloc_dma.o
> + ttm_page_alloc_dma.o ttm_global.o
>  ttm-$(CONFIG_AGP) += ttm_agp_backend.o
>  
>  obj-$(CONFIG_DRM_TTM) += ttm.o
> diff --git a/drivers/gpu/drm/ttm/ttm_global.c 
> b/drivers/gpu/drm/ttm/ttm_global.c
> new file mode 100644
> index ..ca9da0a46147
> --- /dev/null
> +++ b/drivers/gpu/drm/ttm/ttm_global.c
> @@ -0,0 +1,98 @@
> +/* SPDX-License-Identifier: GPL-2.0 OR MIT */
> +/**
> + *
> + * Copyright 2008-2009 VMware, Inc., Palo Alto, CA., USA
> + * All Rights Reserved.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> + * "Software"), to deal in the Software without restriction, including
> + * without limitation the rights to use, copy, modify, merge, publish,
> + * distribute, sub license, and/or sell copies of the Software, and to
> + * permit persons to whom the Software is furnished to do so, subject to
> + * the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the
> + * next paragraph) shall be included in all copies or substantial portions
> + * of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY 
> CLAIM,
> + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
> + * USE OR OTHER DEALINGS IN THE SOFTWARE.
> + *
> + **/
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +static int ttm_global_init_mem(struct drm_global_reference *ref)
> +{
> + BUG_ON(!ref->object);
> + return ttm_mem_global_init(ref->object);
> +}
> +
> +static void ttm_global_release_mem(struct drm_global_reference *ref)
> +{
> + BUG_ON(!ref->object);
> + ttm_mem_global_release(ref->object);
> +}
> +
> +static int ttm_global_init_bo(struct drm_global_reference *ref)
> +{
> + struct ttm_global *glob =
> + container_of(ref, struct ttm_global, bo_ref);
> + BUG_ON(!ref->object);
> + BUG_ON(!glob->mem_ref.object);
> + return ttm_bo_global_init(ref->object, glob->mem_ref.object);
> +}
> +
> +static void ttm_global_release_bo(struct drm_global_reference *ref)
> +{
> + BUG_ON(!ref->object);
> + ttm_bo_global_release(ref->object);
> +}
> +
> +int ttm_global_init(struct ttm_global *glob)
> +{
> + int ret;
> +

We would better add a protection here to make sure the glob is not NULL.

if (!glob)
return -EINVAL;

Others, look good for me.

Thanks,
Ray

> + glob->mem_ref.global_type = DRM_GLOBAL_TTM_MEM;
> + glob->mem_ref.size = sizeof(struct ttm_mem_global);
> + glob->bo_ref.object = NULL;
> + glob->mem_ref.init = _global_init_mem;
> + glob->mem_ref.release = _global_release_mem;
> + ret = drm_global_item_ref(>mem_ref);
> + if (ret)
> + return ret;
> +
> + glob->bo_ref.global_type = DRM_GLOBAL_TTM_BO;
> + glob->bo_ref.size = sizeof(struct ttm_bo_global);
> + glob->bo_ref.object = NULL;
> + glob->bo_ref.init = _global_init_bo;
> + glob->bo_ref.release = _global_release_bo;
> + ret =

[PATCH 2/2] drm/amdgpu: Fix null point errro

2018-10-18 Thread Rex Zhu

need to check adev->powerplay.pp_funcs first, becasue from
AI, the smu ip may be disabled by user, and the pp_handle
is null in this case.

Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c| 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 6 --
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
index 297a549..0a4fba1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
@@ -135,7 +135,8 @@ static int acp_poweroff(struct generic_pm_domain *genpd)
 * 2. power off the acp tiles
 * 3. check and enter ulv state
 */
-   if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (adev->powerplay.pp_funcs &&
+   adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, 
AMD_IP_BLOCK_TYPE_ACP, true);
}
return 0;
@@ -517,7 +518,8 @@ static int acp_set_powergating_state(void *handle,
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
bool enable = state == AMD_PG_STATE_GATE ? true : false;
 
-   if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (adev->powerplay.pp_funcs &&
+   adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_ACP, 
enable);
 
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4fca67a..7dad682 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1783,6 +1783,7 @@ static int amdgpu_device_set_pg_state(struct 
amdgpu_device *adev, enum amd_power
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_VCE ||
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_VCN ||
adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_ACP) 
&&
+   adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->set_powergating_by_smu) {
if (!adev->ip_blocks[i].status.valid) {
amdgpu_dpm_set_powergating_by_smu(adev, 
adev->ip_blocks[i].version->type, state == AMD_PG_STATE_GATE ?
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 790fd54..1a656b8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -392,7 +392,7 @@ void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool 
enable)
if (!(adev->powerplay.pp_feature & PP_GFXOFF_MASK))
return;
 
-   if (!adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (!adev->powerplay.pp_funcs || 
!adev->powerplay.pp_funcs->set_powergating_by_smu)
return;
 
 
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 14649f8..fd23ba1 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -280,7 +280,7 @@ void mmhub_v1_0_update_power_gating(struct amdgpu_device 
*adev,
return;
 
if (enable && adev->pg_flags & AMD_PG_SUPPORT_MMHUB) {
-   if (adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, 
AMD_IP_BLOCK_TYPE_GMC, true);
 
}
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 2e8365d..d97e6a2 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1595,7 +1595,8 @@ static int sdma_v4_0_hw_init(void *handle)
int r;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
-   if (adev->asic_type == CHIP_RAVEN && 
adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs &&
+   adev->powerplay.pp_funcs->set_powergating_by_smu)
amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_SDMA, 
false);
 
sdma_v4_0_init_golden_registers(adev);
@@ -1615,7 +1616,8 @@ static int sdma_v4_0_hw_fini(void *handle)
sdma_v4_0_ctx_switch_enable(adev, false);
sdma_v4_0_enable(adev, false);
 
-   if (adev->asic_type == CHIP_RAVEN && 
adev->powerplay.pp_funcs->set_powergating_by_smu)
+   if (adev->asic_type == CHIP_RAVEN && adev->powerplay.pp_funcs
+   && adev->powerplay.pp_funcs->set_powergating_by_smu)

[PATCH 1/2] drm/amd/display: Fix Null point error if smu ip was disabled

2018-10-18 Thread Rex Zhu

from AI, SMU Ip is not indispensable to driver and can be
disabled by user via module parameter ip_block_mask.
so the pp_handle may be NULL.

Signed-off-by: Rex Zhu 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 0fab64a..12001a0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -101,7 +101,7 @@ bool dm_pp_apply_display_requirements(
adev->pm.pm_display_cfg.displays[i].controller_id = 
dc_cfg->pipe_idx + 1;
}
 
-   if (adev->powerplay.pp_funcs->display_configuration_change)
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->display_configuration_change)
adev->powerplay.pp_funcs->display_configuration_change(
adev->powerplay.pp_handle,
>pm.pm_display_cfg);
@@ -304,7 +304,7 @@ bool dm_pp_get_clock_levels_by_type(
struct amd_pp_simple_clock_info validation_clks = { 0 };
uint32_t i;
 
-   if (adev->powerplay.pp_funcs->get_clock_by_type) {
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->get_clock_by_type) {
if (adev->powerplay.pp_funcs->get_clock_by_type(pp_handle,
dc_to_pp_clock_type(clk_type), _clks)) {
/* Error in pplib. Provide default values. */
@@ -315,7 +315,7 @@ bool dm_pp_get_clock_levels_by_type(
 
pp_to_dc_clock_levels(_clks, dc_clks, clk_type);
 
-   if (adev->powerplay.pp_funcs->get_display_mode_validation_clocks) {
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->get_display_mode_validation_clocks) {
if 
(adev->powerplay.pp_funcs->get_display_mode_validation_clocks(
pp_handle, _clks)) {
/* Error in pplib. Provide default values. */
@@ -398,6 +398,9 @@ bool dm_pp_get_clock_levels_by_type_with_voltage(
struct pp_clock_levels_with_voltage pp_clk_info = {0};
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
 
+   if (!pp_funcs || !pp_funcs->get_clock_by_type_with_voltage)
+   return false;
+
if (pp_funcs->get_clock_by_type_with_voltage(pp_handle,
 
dc_to_pp_clock_type(clk_type),
 _clk_info))
@@ -438,7 +441,7 @@ bool dm_pp_apply_clock_for_voltage_request(
if (!pp_clock_request.clock_type)
return false;
 
-   if (adev->powerplay.pp_funcs->display_clock_voltage_request)
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->display_clock_voltage_request)
ret = adev->powerplay.pp_funcs->display_clock_voltage_request(
adev->powerplay.pp_handle,
_clock_request);
@@ -455,7 +458,7 @@ bool dm_pp_get_static_clocks(
struct amd_pp_clock_info pp_clk_info = {0};
int ret = 0;
 
-   if (adev->powerplay.pp_funcs->get_current_clocks)
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->get_current_clocks)
ret = adev->powerplay.pp_funcs->get_current_clocks(
adev->powerplay.pp_handle,
_clk_info);
@@ -505,6 +508,9 @@ void pp_rv_set_wm_ranges(struct pp_smu *pp,
wm_with_clock_ranges.num_wm_dmif_sets = ranges->num_reader_wm_sets;
wm_with_clock_ranges.num_wm_mcif_sets = ranges->num_writer_wm_sets;
 
+   if (!pp_funcs || !pp_funcs->set_watermarks_for_clocks_ranges)
+   return;
+
for (i = 0; i < wm_with_clock_ranges.num_wm_dmif_sets; i++) {
if (ranges->reader_wm_sets[i].wm_inst > 3)
wm_dce_clocks[i].wm_set_id = WM_SET_A;
-- 
1.9.1

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Re: [PATCH 2/7] drm: add syncobj timeline support v8

2018-10-18 Thread zhoucm1




On 2018年10月18日 19:50, Christian König wrote:

Am 18.10.18 um 05:11 schrieb zhoucm1:



On 2018年10月17日 18:24, Daniel Vetter wrote:

On Wed, Oct 17, 2018 at 11:29 AM Koenig, Christian
 wrote:

Am 17.10.18 um 11:17 schrieb zhoucm1:

[SNIP]

   +struct drm_syncobj_signal_pt {
+    struct dma_fence_array *base;

Out of curiosity, why the pointer and not embedding? base is kinda
misleading for a pointer.

Yeah, Christian doesn't like signal_pt lifecycle same as fence, so
it's a pointer.
If you don't like 'base' name, I can change it.
Well I never said that you can't embed the fence array into the 
signal_pt.


You just need to make sure that we don't affect the drm_syncobj
lilecycle as well, e.g. that we don't also need to keep that around.

I don't see a problem with that, as long as drm_syncobj keeps a
reference to the fence while it's on the timeline list. Which it
already does. And embedding would avoid that 2nd separate allocation,
aside from making base less confusing.
That's indeed my initial implementation for signal_pt/wait_pt with 
fence based, but after long and many discussions, we get current 
solution, as you see, the version is up to v8 :).


For here  why the pointer and not embedding?
Two reasons:
1. their lifecycles are not same.
2. It is a fence array usage, which always needs separate allocation, 
seems which is mandatory.

So it is a pointer.

But the name is historical from initial, and indeed be kinda 
misleading for a pointer, I will change it to fence_array instead in 
coming v9.


To avoid running into a v10 I've just pushed this version upstream :)

Thanks a lot.


The rest in the series looks good to me as well,

Can I get your RB on them first?

but I certainly want the radv/anv developers to take a look as well as 
Daniel suggested.
Ping @Dave/Bas/Jason or other radv/anv developers, Could anyone of you 
take a look the rest of series for u/k interface? So that we can move to 
next step for libdrm patches?


Thanks,
David


Christian.



Thanks,
David Zhou


-Daniel


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Re: [PATCH 3/3] drm/radeon: Replace TTM initialization/release with ttm_global

2018-10-18 Thread Huang Rui

On Fri, Oct 19, 2018 at 12:27:52AM +0800, Thomas Zimmermann wrote:
> Unified initialization and release of the global TTM state is provided
> by struct ttm_global and its interfaces.
> 
> Signed-off-by: Thomas Zimmermann 

Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/radeon/radeon.h |  4 +--
>  drivers/gpu/drm/radeon/radeon_ttm.c | 40 -
>  2 files changed, 7 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index 1a6f6edb3515..554c0421b779 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -73,6 +73,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  #include 
>  
> @@ -448,8 +449,7 @@ struct radeon_surface_reg {
>   * TTM.
>   */
>  struct radeon_mman {
> - struct ttm_bo_global_refbo_global_ref;
> - struct drm_global_reference mem_global_ref;
> + struct ttm_global   glob;
>   struct ttm_bo_devicebdev;
>   boolmem_global_referenced;
>   boolinitialized;
> diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c 
> b/drivers/gpu/drm/radeon/radeon_ttm.c
> index dac4ec5a120b..363860e82892 100644
> --- a/drivers/gpu/drm/radeon/radeon_ttm.c
> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c
> @@ -64,45 +64,16 @@ static struct radeon_device *radeon_get_rdev(struct 
> ttm_bo_device *bdev)
>  /*
>   * Global memory.
>   */
> -static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
> -{
> - return ttm_mem_global_init(ref->object);
> -}
> -
> -static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
> -{
> - ttm_mem_global_release(ref->object);
> -}
>  
>  static int radeon_ttm_global_init(struct radeon_device *rdev)
>  {
> - struct drm_global_reference *global_ref;
>   int r;
>  
>   rdev->mman.mem_global_referenced = false;
> - global_ref = >mman.mem_global_ref;
> - global_ref->global_type = DRM_GLOBAL_TTM_MEM;
> - global_ref->size = sizeof(struct ttm_mem_global);
> - global_ref->init = _ttm_mem_global_init;
> - global_ref->release = _ttm_mem_global_release;
> - r = drm_global_item_ref(global_ref);
> - if (r != 0) {
> - DRM_ERROR("Failed setting up TTM memory accounting "
> -   "subsystem.\n");
> - return r;
> - }
>  
> - rdev->mman.bo_global_ref.mem_glob =
> - rdev->mman.mem_global_ref.object;
> - global_ref = >mman.bo_global_ref.ref;
> - global_ref->global_type = DRM_GLOBAL_TTM_BO;
> - global_ref->size = sizeof(struct ttm_bo_global);
> - global_ref->init = _bo_global_ref_init;
> - global_ref->release = _bo_global_ref_release;
> - r = drm_global_item_ref(global_ref);
> - if (r != 0) {
> - DRM_ERROR("Failed setting up TTM BO subsystem.\n");
> - drm_global_item_unref(>mman.mem_global_ref);
> + r = ttm_global_init(>mman.glob);
> + if (r) {
> + DRM_ERROR("Failed setting up TTM subsystem.\n");
>   return r;
>   }
>  
> @@ -113,8 +84,7 @@ static int radeon_ttm_global_init(struct radeon_device 
> *rdev)
>  static void radeon_ttm_global_fini(struct radeon_device *rdev)
>  {
>   if (rdev->mman.mem_global_referenced) {
> - drm_global_item_unref(>mman.bo_global_ref.ref);
> - drm_global_item_unref(>mman.mem_global_ref);
> + ttm_global_release(>mman.glob);
>   rdev->mman.mem_global_referenced = false;
>   }
>  }
> @@ -853,7 +823,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
>   }
>   /* No others user of address space so set it to 0 */
>   r = ttm_bo_device_init(>mman.bdev,
> -rdev->mman.bo_global_ref.ref.object,
> +ttm_global_get_bo_global(>mman.glob),
>  _bo_driver,
>  rdev->ddev->anon_inode->i_mapping,
>  DRM_FILE_PAGE_OFFSET,
> -- 
> 2.19.1
> 
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Re: [PATCH 2/3] drm/amdgpu: Replace TTM initialization/release with ttm_global

2018-10-18 Thread Huang Rui

On Fri, Oct 19, 2018 at 12:27:51AM +0800, Thomas Zimmermann wrote:
> Unified initialization and relesae of the global TTM state is provided
> by struct ttm_global and its interfaces.
> 
> Signed-off-by: Thomas Zimmermann 

Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 63 ++---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h |  4 +-
>  2 files changed, 7 insertions(+), 60 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 3a6802846698..70b0e8c77bb4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -65,33 +65,6 @@ static void amdgpu_ttm_debugfs_fini(struct amdgpu_device 
> *adev);
>   * Global memory.
>   */
>  
> -/**
> - * amdgpu_ttm_mem_global_init - Initialize and acquire reference to
> - * memory object
> - *
> - * @ref: Object for initialization.
> - *
> - * This is called by drm_global_item_ref() when an object is being
> - * initialized.
> - */
> -static int amdgpu_ttm_mem_global_init(struct drm_global_reference *ref)
> -{
> - return ttm_mem_global_init(ref->object);
> -}
> -
> -/**
> - * amdgpu_ttm_mem_global_release - Drop reference to a memory object
> - *
> - * @ref: Object being removed
> - *
> - * This is called by drm_global_item_unref() when an object is being
> - * released.
> - */
> -static void amdgpu_ttm_mem_global_release(struct drm_global_reference *ref)
> -{
> - ttm_mem_global_release(ref->object);
> -}
> -
>  /**
>   * amdgpu_ttm_global_init - Initialize global TTM memory reference 
> structures.
>   *
> @@ -102,35 +75,15 @@ static void amdgpu_ttm_mem_global_release(struct 
> drm_global_reference *ref)
>   */
>  static int amdgpu_ttm_global_init(struct amdgpu_device *adev)
>  {
> - struct drm_global_reference *global_ref;
>   int r;
>  
>   /* ensure reference is false in case init fails */
>   adev->mman.mem_global_referenced = false;
>  
> - global_ref = >mman.mem_global_ref;
> - global_ref->global_type = DRM_GLOBAL_TTM_MEM;
> - global_ref->size = sizeof(struct ttm_mem_global);
> - global_ref->init = _ttm_mem_global_init;
> - global_ref->release = _ttm_mem_global_release;
> - r = drm_global_item_ref(global_ref);
> + r = ttm_global_init(>mman.glob);
>   if (r) {
> - DRM_ERROR("Failed setting up TTM memory accounting "
> -   "subsystem.\n");
> - goto error_mem;
> - }
> -
> - adev->mman.bo_global_ref.mem_glob =
> - adev->mman.mem_global_ref.object;
> - global_ref = >mman.bo_global_ref.ref;
> - global_ref->global_type = DRM_GLOBAL_TTM_BO;
> - global_ref->size = sizeof(struct ttm_bo_global);
> - global_ref->init = _bo_global_ref_init;
> - global_ref->release = _bo_global_ref_release;
> - r = drm_global_item_ref(global_ref);
> - if (r) {
> - DRM_ERROR("Failed setting up TTM BO subsystem.\n");
> - goto error_bo;
> + DRM_ERROR("Failed setting up TTM subsystem.\n");
> + return r;
>   }
>  
>   mutex_init(>mman.gtt_window_lock);
> @@ -138,19 +91,13 @@ static int amdgpu_ttm_global_init(struct amdgpu_device 
> *adev)
>   adev->mman.mem_global_referenced = true;
>  
>   return 0;
> -
> -error_bo:
> - drm_global_item_unref(>mman.mem_global_ref);
> -error_mem:
> - return r;
>  }
>  
>  static void amdgpu_ttm_global_fini(struct amdgpu_device *adev)
>  {
>   if (adev->mman.mem_global_referenced) {
>   mutex_destroy(>mman.gtt_window_lock);
> - drm_global_item_unref(>mman.bo_global_ref.ref);
> - drm_global_item_unref(>mman.mem_global_ref);
> + ttm_global_release(>mman.glob);
>   adev->mman.mem_global_referenced = false;
>   }
>  }
> @@ -1765,7 +1712,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
>   }
>   /* No others user of address space so set it to 0 */
>   r = ttm_bo_device_init(>mman.bdev,
> -adev->mman.bo_global_ref.ref.object,
> +ttm_global_get_bo_global(>mman.glob),
>  _bo_driver,
>  adev->ddev->anon_inode->i_mapping,
>  DRM_FILE_PAGE_OFFSET,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> index fe8f276e9811..c3a7fe3ead3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h
> @@ -26,6 +26,7 @@
>  
>  #include "amdgpu.h"
>  #include 
> +#include 
>  
>  #define AMDGPU_PL_GDS(TTM_PL_PRIV + 0)
>  #define AMDGPU_PL_GWS(TTM_PL_PRIV + 1)
> @@ -39,8 +40,7 @@
>  #define AMDGPU_GTT_NUM_TRANSFER_WINDOWS  2
>  
>  struct amdgpu_mman {
> - struct ttm_bo_global_refbo_global_ref;
> - struct drm_global_reference mem_global_ref;
> +

Re: [PATCH 3/3] drm/amdkfd: Add proper prefix to functions

2018-10-18 Thread Deucher, Alexander

Series is:

Reviewed-by: Alex Deucher 


From: amd-gfx  on behalf of Lin, Amber 

Sent: Thursday, October 18, 2018 5:15:24 PM
To: amd-gfx@lists.freedesktop.org
Cc: Lin, Amber
Subject: [PATCH 3/3] drm/amdkfd: Add proper prefix to functions

Add amdgpu_amdkfd_ prefix to amdgpu functions served for amdkfd usage.

Signed-off-by: Amber Lin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c  | 12 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h  | 12 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_chardev.c|  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c   |  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_device.c |  6 +++---
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c|  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c |  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c   |  8 
 8 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index c31a884..4e384ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -268,7 +268,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
 amdgpu_device_gpu_recover(adev, NULL);
 }

-int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
+int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
 void **mem_obj, uint64_t *gpu_addr,
 void **cpu_ptr, bool mqd_gfx9)
 {
@@ -340,7 +340,7 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
 return r;
 }

-void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
+void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
 {
 struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;

@@ -351,7 +351,7 @@ void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
 amdgpu_bo_unref(&(bo));
 }

-void get_local_mem_info(struct kgd_dev *kgd,
+void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
 struct kfd_local_mem_info *mem_info)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
@@ -383,7 +383,7 @@ void get_local_mem_info(struct kgd_dev *kgd,
 mem_info->mem_clk_max = 100;
 }

-uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
+uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)kgd;

@@ -392,7 +392,7 @@ uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
 return 0;
 }

-uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
+uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)kgd;

@@ -405,7 +405,7 @@ uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
 return 100;
 }

-void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)
+void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info 
*cu_info)
 {
 struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 struct amdgpu_cu_info acu_info = adev->gfx.cu_info;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index 8e0d4f7..69cc9a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
@@ -134,16 +134,16 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
 void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);

 /* Shared API */
-int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
+int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
 void **mem_obj, uint64_t *gpu_addr,
 void **cpu_ptr, bool mqd_gfx9);
-void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
-void get_local_mem_info(struct kgd_dev *kgd,
+void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
+void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
 struct kfd_local_mem_info *mem_info);
-uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
+uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);

-uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
-void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
+uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
+void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info 
*cu_info);
 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
 uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 85e833d..5f4062b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -835,7 +835,7 @@ static int kfd_ioctl_get_clock_counters(struct file *filep,
 dev = kfd_device_by_id(args->gpu_id);
 if (dev)
 /* Reading GPU clock

Re: [PATCH 3/3] drm/amdkfd: Add proper prefix to functions

2018-10-18 Thread Kuehling, Felix

On 2018-10-18 6:03 p.m., Deucher, Alexander wrote:
>
> Series is:
>
> Reviewed-by: Alex Deucher 
>

Reviewed-by: Felix Kuehling 


as well.


> 
> *From:* amd-gfx  on behalf of
> Lin, Amber 
> *Sent:* Thursday, October 18, 2018 5:15:24 PM
> *To:* amd-gfx@lists.freedesktop.org
> *Cc:* Lin, Amber
> *Subject:* [PATCH 3/3] drm/amdkfd: Add proper prefix to functions
>  
> Add amdgpu_amdkfd_ prefix to amdgpu functions served for amdkfd usage.
>
> Signed-off-by: Amber Lin 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c  | 12 ++--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h  | 12 ++--
>  drivers/gpu/drm/amd/amdkfd/kfd_chardev.c    |  4 ++--
>  drivers/gpu/drm/amd/amdkfd/kfd_crat.c   |  4 ++--
>  drivers/gpu/drm/amd/amdkfd/kfd_device.c |  6 +++---
>  drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c    |  2 +-
>  drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c |  4 ++--
>  drivers/gpu/drm/amd/amdkfd/kfd_topology.c   |  8 
>  8 files changed, 26 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> index c31a884..4e384ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
> @@ -268,7 +268,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
>  amdgpu_device_gpu_recover(adev, NULL);
>  }
>  
> -int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
> +int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>  void **mem_obj, uint64_t *gpu_addr,
>  void **cpu_ptr, bool mqd_gfx9)
>  {
> @@ -340,7 +340,7 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>  return r;
>  }
>  
> -void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
> +void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
>  {
>  struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;
>  
> @@ -351,7 +351,7 @@ void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
>  amdgpu_bo_unref(&(bo));
>  }
>  
> -void get_local_mem_info(struct kgd_dev *kgd,
> +void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
>  struct kfd_local_mem_info *mem_info)
>  {
>  struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
> @@ -383,7 +383,7 @@ void get_local_mem_info(struct kgd_dev *kgd,
>  mem_info->mem_clk_max = 100;
>  }
>  
> -uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
> +uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd)
>  {
>  struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
>  
> @@ -392,7 +392,7 @@ uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
>  return 0;
>  }
>  
> -uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
> +uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
>  {
>  struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
>  
> @@ -405,7 +405,7 @@ uint32_t get_max_engine_clock_in_mhz(struct
> kgd_dev *kgd)
>  return 100;
>  }
>  
> -void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)
> +void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct
> kfd_cu_info *cu_info)
>  {
>  struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
>  struct amdgpu_cu_info acu_info = adev->gfx.cu_info;
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> index 8e0d4f7..69cc9a9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
> @@ -134,16 +134,16 @@ int amdgpu_amdkfd_post_reset(struct
> amdgpu_device *adev);
>  void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
>  
>  /* Shared API */
> -int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
> +int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
>  void **mem_obj, uint64_t *gpu_addr,
>  void **cpu_ptr, bool mqd_gfx9);
> -void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
> -void get_local_mem_info(struct kgd_dev *kgd,
> +void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
> +void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
>  struct kfd_local_mem_info *mem_info);
> -uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
> +uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
>  
> -uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
> -void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
> +uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
> +void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct
> kfd_cu_info *cu_info);
>  uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
>  uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);
>  
> diff --git

[PATCH 2/2] drm/amdgpu: replace get_user_pages with HMM address mirror helpers v2

2018-10-18 Thread Yang, Philip

Use HMM helper function hmm_vma_fault() to get physical pages backing
userptr and start CPU page table update track of those pages. Then use
hmm_vma_range_done() to check if those pages are updated before
amdgpu_cs_submit for gfx or before user queues are resumed for kfd.

If userptr pages are updated, for gfx, amdgpu_cs_ioctl will restart
from scratch, for kfd, restore worker is rescheduled to retry.

To avoid circular lock dependency, no nested locking between mmap_sem
and bo::reserve. The locking order is:
bo::reserve -> amdgpu_mn_lock(p->mn)

HMM simplify the CPU page table concurrent update check, so remove
guptasklock, mmu_invalidations, last_set_pages fields from
amdgpu_ttm_tt struct.

HMM does not pin the page (increase page ref count), so remove related
operations like release_pages(), put_page(), mark_page_dirty().

v2:
* Remove nested locking between mmap_sem and bo::reserve
* Change locking order to bo::reserve -> amdgpu_mn_lock()
* Use dynamic allocation to replace VLA in kernel stack

Change-Id: Iffd5f855cc9ce402cdfca167f68f83fe39ac56f9
Signed-off-by: Philip Yang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c   | 101 ---
 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c|   2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h|   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 188 ++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c|  14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c |  34 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_mn.h |   7 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 164 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h|   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c |   1 -
 .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c  |  67 
 11 files changed, 312 insertions(+), 272 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index df0a059..3fd0340 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -615,8 +615,7 @@ static int init_user_pages(struct kgd_mem *mem, struct 
mm_struct *mm,
amdgpu_bo_unreserve(bo);
 
 release_out:
-   if (ret)
-   release_pages(mem->user_pages, bo->tbo.ttm->num_pages);
+   amdgpu_ttm_tt_get_user_pages_done(bo->tbo.ttm);
 free_out:
kvfree(mem->user_pages);
mem->user_pages = NULL;
@@ -678,7 +677,6 @@ static int reserve_bo_and_vm(struct kgd_mem *mem,
ctx->kfd_bo.priority = 0;
ctx->kfd_bo.tv.bo = >tbo;
ctx->kfd_bo.tv.shared = true;
-   ctx->kfd_bo.user_pages = NULL;
list_add(>kfd_bo.tv.head, >list);
 
amdgpu_vm_get_pd_bo(vm, >list, >vm_pd[0]);
@@ -742,7 +740,6 @@ static int reserve_bo_and_cond_vms(struct kgd_mem *mem,
ctx->kfd_bo.priority = 0;
ctx->kfd_bo.tv.bo = >tbo;
ctx->kfd_bo.tv.shared = true;
-   ctx->kfd_bo.user_pages = NULL;
list_add(>kfd_bo.tv.head, >list);
 
i = 0;
@@ -1311,9 +1308,6 @@ int amdgpu_amdkfd_gpuvm_free_memory_of_gpu(
/* Free user pages if necessary */
if (mem->user_pages) {
pr_debug("%s: Freeing user_pages array\n", __func__);
-   if (mem->user_pages[0])
-   release_pages(mem->user_pages,
-   mem->bo->tbo.ttm->num_pages);
kvfree(mem->user_pages);
}
 
@@ -1739,8 +1733,6 @@ static int update_invalid_user_pages(struct 
amdkfd_process_info *process_info,
   __func__);
return -ENOMEM;
}
-   } else if (mem->user_pages[0]) {
-   release_pages(mem->user_pages, bo->tbo.ttm->num_pages);
}
 
/* Get updated user pages */
@@ -1756,12 +1748,6 @@ static int update_invalid_user_pages(struct 
amdkfd_process_info *process_info,
 * stalled user mode queues.
 */
}
-
-   /* Mark the BO as valid unless it was invalidated
-* again concurrently
-*/
-   if (atomic_cmpxchg(>invalid, invalid, 0) != invalid)
-   return -EAGAIN;
}
 
return 0;
@@ -1854,14 +1840,10 @@ static int validate_invalid_user_pages(struct 
amdkfd_process_info *process_info)
}
 
/* Validate succeeded, now the BO owns the pages, free
-* our copy of the pointer array. Put this BO back on
-* the userptr_valid_list. If we need to revalidate
-* it, we need to start from scratch.
+* our copy of the pointer array.
 */
kvfree(mem->user_pages);
mem->user_pages = NULL;
-   list_move_tail(>validate_list.head,
-

Re: [PATCH 3/3] drm/amdkfd: Use functions from amdgpu for setting up page table base

2018-10-18 Thread Deucher, Alexander

Please include a patch description on 2 and 3, with that fixed, series is:

Reviewed-by: Alex Deucher 


From: Zhao, Yong
Sent: Thursday, October 18, 2018 5:13:04 PM
To: amd-gfx@lists.freedesktop.org; brahma_sw_dev
Cc: Zhao, Yong
Subject: [PATCH 3/3] drm/amdkfd: Use functions from amdgpu for setting up page 
table base

Change-Id: I42eb2e41ce21b4a6ea0c8394dcc762ee92b2ca5e
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 4b79639..223bbc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -46,6 +46,7 @@
 #include "v9_structs.h"
 #include "soc15.h"
 #include "soc15d.h"
+#include "gmc_v9_0.h"

 /* HACK: MMHUB and GC both have VM-related register with the same
  * names but different offsets. Define the MMHUB register we need here
@@ -59,11 +60,6 @@
 #define mmMMHUB_VM_INVALIDATE_ENG16_ACK 0x0705
 #define mmMMHUB_VM_INVALIDATE_ENG16_ACK_BASE_IDX0

-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32  0x072b
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32  0x072c
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0
-
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32 0x0727
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32_BASE_IDX0
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI32 0x0728
@@ -1018,9 +1014,7 @@ static void set_vm_context_page_table_base(struct kgd_dev 
*kgd, uint32_t vmid,
  * now, all processes share the same address space size, like
  * on GFX8 and older.
  */
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
+   mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);

-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) 
+ (vmid*2), lower_32_bits(base));
-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) 
+ (vmid*2), upper_32_bits(base));
+   gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
 }
--
2.7.4

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[PATCH 2/3] drm/amdgpu: Expose *_setup_vm_pt_regs for kfd to use

2018-10-18 Thread Zhao, Yong

Change-Id: I2ea27c4749a454506fecf75bb5b78b09bde9cb28
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 20 +++-
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h|  6 ++
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c  | 20 +++-
 3 files changed, 36 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
index ceb7847..34145a6 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
@@ -35,15 +35,25 @@ u64 gfxhub_v1_0_get_mc_fb_offset(struct amdgpu_device *adev)
return (u64)RREG32_SOC15(GC, 0, mmMC_VM_FB_OFFSET) << 24;
 }
 
+void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+   uint64_t value)
+{
+   /* two registers distance between mmVM_CONTEXT0_* to mmVM_CONTEXT1_* */
+   int offset = mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
+   - mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
+
+   WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
+   offset * vmid, lower_32_bits(value));
+
+   WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
+   offset * vmid, upper_32_bits(value));
+}
+
 static void gfxhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
 {
uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
 
-   WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
-lower_32_bits(value));
-
-   WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
-upper_32_bits(value));
+   gfxhub_v1_0_setup_vm_pt_regs(adev, 0, value);
 }
 
 static void gfxhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
index b030ca5..008ab08 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h
@@ -27,4 +27,10 @@
 extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;
 extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;
 
+/* amdgpu_amdkfd*.c */
+void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+   uint64_t value);
+void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+   uint64_t value);
+
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 14649f8..8e18be0 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
@@ -52,15 +52,25 @@ u64 mmhub_v1_0_get_fb_location(struct amdgpu_device *adev)
return base;
 }
 
+void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,
+   uint64_t value)
+{
+   /* two registers distance between mmVM_CONTEXT0_* to mmVM_CONTEXT1_* */
+   int offset = mmVM_CONTEXT1_PAGE_TABLE_BASE_ADDR_LO32
+   - mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32;
+
+   WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
+   offset * vmid, lower_32_bits(value));
+
+   WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
+   offset * vmid, upper_32_bits(value));
+}
+
 static void mmhub_v1_0_init_gart_pt_regs(struct amdgpu_device *adev)
 {
uint64_t value = amdgpu_gmc_pd_addr(adev->gart.bo);
 
-   WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32,
-lower_32_bits(value));
-
-   WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32,
-upper_32_bits(value));
+   mmhub_v1_0_setup_vm_pt_regs(adev, 0, value);
 }
 
 static void mmhub_v1_0_init_gart_aperture_regs(struct amdgpu_device *adev)
-- 
2.7.4

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[PATCH 3/3] drm/amdkfd: Use functions from amdgpu for setting up page table base

2018-10-18 Thread Zhao, Yong

Change-Id: I42eb2e41ce21b4a6ea0c8394dcc762ee92b2ca5e
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 4b79639..223bbc1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -46,6 +46,7 @@
 #include "v9_structs.h"
 #include "soc15.h"
 #include "soc15d.h"
+#include "gmc_v9_0.h"
 
 /* HACK: MMHUB and GC both have VM-related register with the same
  * names but different offsets. Define the MMHUB register we need here
@@ -59,11 +60,6 @@
 #define mmMMHUB_VM_INVALIDATE_ENG16_ACK0x0705
 #define mmMMHUB_VM_INVALIDATE_ENG16_ACK_BASE_IDX   0
 
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32  0x072b
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32_BASE_IDX 0
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32  0x072c
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0
-
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO320x0727
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32_BASE_IDX   0
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI320x0728
@@ -1018,9 +1014,7 @@ static void set_vm_context_page_table_base(struct kgd_dev 
*kgd, uint32_t vmid,
 * now, all processes share the same address space size, like
 * on GFX8 and older.
 */
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
+   mmhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
 
-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) 
+ (vmid*2), lower_32_bits(base));
-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) 
+ (vmid*2), upper_32_bits(base));
+   gfxhub_v1_0_setup_vm_pt_regs(adev, vmid, base);
 }
-- 
2.7.4

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[PATCH 1/3] drm/amdkfd: Delete unnecessary register settings

2018-10-18 Thread Zhao, Yong

Those register settings have been performed in amdgpu initialization
gfxhub_v1_0_setup_vmid_config() and mmhub_v1_0_setup_vmid_config().
So no need to do it again in kfd.

Change-Id: I2b534cdb37f125581e10b1a19c1c2792aae474d6
Signed-off-by: Yong Zhao 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 26 ---
 1 file changed, 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index 42cb4c4..4b79639 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -64,16 +64,6 @@
 #define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32  0x072c
 #define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32_BASE_IDX 0
 
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32 0x074b
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32_BASE_IDX0
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32 0x074c
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32_BASE_IDX0
-
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32   0x076b
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32_BASE_IDX  0
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32   0x076c
-#define mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32_BASE_IDX  0
-
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO320x0727
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_LO32_BASE_IDX   0
 #define mmMMHUB_VM_INVALIDATE_ENG16_ADDR_RANGE_HI320x0728
@@ -1028,25 +1018,9 @@ static void set_vm_context_page_table_base(struct 
kgd_dev *kgd, uint32_t vmid,
 * now, all processes share the same address space size, like
 * on GFX8 and older.
 */
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32) + (vmid*2), 0);
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32) + (vmid*2), 0);
-
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) + (vmid*2),
-   lower_32_bits(adev->vm_manager.max_pfn - 1));
-   WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) + (vmid*2),
-   upper_32_bits(adev->vm_manager.max_pfn - 1));
-
WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) + (vmid*2), lower_32_bits(base));
WREG32(SOC15_REG_OFFSET(MMHUB, 0, 
mmMMHUB_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) + (vmid*2), upper_32_bits(base));
 
-   WREG32(SOC15_REG_OFFSET(GC, 0, 
mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32) + (vmid*2), 0);
-   WREG32(SOC15_REG_OFFSET(GC, 0, 
mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32) + (vmid*2), 0);
-
-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32) 
+ (vmid*2),
-   lower_32_bits(adev->vm_manager.max_pfn - 1));
-   WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32) 
+ (vmid*2),
-   upper_32_bits(adev->vm_manager.max_pfn - 1));
-
WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32) 
+ (vmid*2), lower_32_bits(base));
WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32) 
+ (vmid*2), upper_32_bits(base));
 }
-- 
2.7.4

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[PATCH v2] drm/amd/pp: enable power limit increase in OD mode

2018-10-18 Thread Greathouse, Joseph

OverDrive mode allows users to increase the maximum SCLK and MCLK
frequencies beyond the default on the GPU. However, this may not
results in large performance gains if the GPU then runs into its TDP
power limit. This patch adds the capability to increase the power
limit of a GPU above its default maximum.

This is only allowed when overdrive is enabled in the ppfeaturemask,
since this is an overdrive feature. The TDPODLimit value from the
VBIOS describes how how much higher the TDP should be allowed to go
over its default, in percentage.

v2: Moved dereference of hwmgr to after its validity check

Signed-off-by: Joseph Greathouse 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index e8964ca..586f1ff 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -963,6 +963,7 @@ static int pp_dpm_switch_power_profile(void *handle,
 static int pp_set_power_limit(void *handle, uint32_t limit)
 {
struct pp_hwmgr *hwmgr = handle;
+   uint32_t max_power_limit;
 
if (!hwmgr || !hwmgr->pm_en)
return -EINVAL;
@@ -975,7 +976,13 @@ static int pp_set_power_limit(void *handle, uint32_t limit)
if (limit == 0)
limit = hwmgr->default_power_limit;
 
-   if (limit > hwmgr->default_power_limit)
+   max_power_limit = hwmgr->default_power_limit;
+   if (hwmgr->od_enabled) {
+   max_power_limit *= (100 + 
hwmgr->platform_descriptor.TDPODLimit);
+   max_power_limit /= 100;
+   }
+
+   if (limit > max_power_limit)
return -EINVAL;
 
mutex_lock(>smu_lock);
@@ -994,8 +1001,13 @@ static int pp_get_power_limit(void *handle, uint32_t 
*limit, bool default_limit)
 
mutex_lock(>smu_lock);
 
-   if (default_limit)
+   if (default_limit) {
*limit = hwmgr->default_power_limit;
+   if (hwmgr->od_enabled) {
+   *limit *= (100 + hwmgr->platform_descriptor.TDPODLimit);
+   *limit /= 100;
+   }
+   }
else
*limit = hwmgr->power_limit;
 
-- 
2.7.4

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Re: [PATCH v2] drm: Get ref on CRTC commit object when waiting for flip_done

2018-10-18 Thread Wentland, Harry

On 2018-10-18 1:38 p.m., Wentland, Harry wrote:
> On 2018-10-16 11:48 a.m., Alex Deucher wrote:
>> On Tue, Oct 16, 2018 at 11:00 AM Li, Sun peng (Leo)  
>> wrote:
>>>
>>>
>>>
>>> On 2018-10-16 08:33 AM, Daniel Vetter wrote:
 On Mon, Oct 15, 2018 at 09:46:40AM -0400, sunpeng...@amd.com wrote:
> From: Leo Li 
>
> This fixes a general protection fault, caused by accessing the contents
> of a flip_done completion object that has already been freed. It occurs
> due to the preemption of a non-blocking commit worker thread W by
> another commit thread X. X continues to clear its atomic state at the
> end, destroying the CRTC commit object that W still needs. Switching
> back to W and accessing the commit objects then leads to bad results.
>
> Worker W becomes preemptable when waiting for flip_done to complete. At
> this point, a frequently occurring commit thread X can take over. Here's
> an example where W is a worker thread that flips on both CRTCs, and X
> does a legacy cursor update on both CRTCs:
>
>  ...
>   1. W does flip work
>   2. W runs commit_hw_done()
>   3. W waits for flip_done on CRTC 1
>   4. > flip_done for CRTC 1 completes
>   5. W finishes waiting for CRTC 1
>   6. W waits for flip_done on CRTC 2
>
>   7. > Preempted by X
>   8. > flip_done for CRTC 2 completes
>   9. X atomic_check: hw_done and flip_done are complete on all CRTCs
>  10. X updates cursor on both CRTCs
>  11. X destroys atomic state
>  12. X done
>
>  13. > Switch back to W
>  14. W waits for flip_done on CRTC 2
>  15. W raises general protection fault
>
> The error looks like so:
>
>  general protection fault:  [#1] PREEMPT SMP PTI
>  **snip**
>  Call Trace:
>   lock_acquire+0xa2/0x1b0
>   _raw_spin_lock_irq+0x39/0x70
>   wait_for_completion_timeout+0x31/0x130
>   drm_atomic_helper_wait_for_flip_done+0x64/0x90 [drm_kms_helper]
>   amdgpu_dm_atomic_commit_tail+0xcae/0xdd0 [amdgpu]
>   commit_tail+0x3d/0x70 [drm_kms_helper]
>   process_one_work+0x212/0x650
>   worker_thread+0x49/0x420
>   kthread+0xfb/0x130
>   ret_from_fork+0x3a/0x50
>  Modules linked in: x86_pkg_temp_thermal amdgpu(O) chash(O)
>  gpu_sched(O) drm_kms_helper(O) syscopyarea sysfillrect sysimgblt
>  fb_sys_fops ttm(O) drm(O)
>
> Note that i915 has this issue masked, since hw_done is signaled after
> waiting for flip_done. Doing so will block the cursor update from
> happening until hw_done is signaled, preventing the cursor commit from
> destroying the state.
>
> v2: The reference on the commit object needs to be obtained before
>  hw_done() is signaled, since that's the point where another commit
>  is allowed to modify the state. Assuming that the
>  new_crtc_state->commit object still exists within flip_done() is
>  incorrect.
>
>  Fix by getting a reference in setup_commit(), and releasing it
>  during default_clear().
>
> Signed-off-by: Leo Li 
> ---
>
> Sending again, this time to the correct mailing list :)
>
> Leo

 Reviewed-by: Daniel Vetter 
 Cc: sta...@vger.kernel.org

 I think it'd be really good if you could get intel-gfx-ci to test this
 patch. Simply submit it to intel-...@lists.freedesktop.org. I'll leave
 applying to one of the amd drm-misc committers, once it's passed CI.
>>
>> Leo, do you or Harry have drm-misc commit access yet?  If not, you should.
>>
> 
> I believe I do and will push the patch. Leo's getting the ball rolling to get 
> access (fdo account, etc).
> 

... and pushed to drm-misc-fixes.

Harry

> Harry
> 
>> Alex
>>

 Cheers, Daniel
>>>
>>> Thanks for the rb!
>>>
>>> On the topic of CI, is it possible to write a test (maybe one already
>>> exists) for this issue? I've attempted to do one here:
>>>
>>> https://patchwork.freedesktop.org/patch/256319/
>>>
>>> The problem is finding a surefire way to trigger the sequence, I'm not
>>> sure how that can be done. If you have any ideas, I would love to hear them.
>>>
>>> Leo
>>>

>
>   drivers/gpu/drm/drm_atomic.c|  5 +
>   drivers/gpu/drm/drm_atomic_helper.c | 12 
>   include/drm/drm_atomic.h| 11 +++
>   3 files changed, 24 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 3eb061e..12ae917 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -174,6 +174,11 @@ void drm_atomic_state_default_clear(struct 
> drm_atomic_state *state)
>  state->crtcs[i].state = NULL;
>

[PATCH 2/3] drm/sched: Expose drm_sched_entity_select_rq to use in drivers.

2018-10-18 Thread Andrey Grodzovsky

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/scheduler/sched_entity.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/scheduler/sched_entity.c 
b/drivers/gpu/drm/scheduler/sched_entity.c
index 320c77a..426606c 100644
--- a/drivers/gpu/drm/scheduler/sched_entity.c
+++ b/drivers/gpu/drm/scheduler/sched_entity.c
@@ -492,6 +492,7 @@ void drm_sched_entity_select_rq(struct drm_sched_entity 
*entity)
entity->rq = rq;
spin_unlock(>rq_lock);
 }
+EXPORT_SYMBOL(drm_sched_entity_select_rq);
 
 /**
  * drm_sched_entity_push_job - Submit a job to the entity's job queue
-- 
2.7.4

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[PATCH 3/3] drm/amdgpu: Refresh rq selection for job after ASIC reset

2018-10-18 Thread Andrey Grodzovsky

A ring might become unusable after reset, if that the case
drm_sched_entity_select_rq will choose another, working rq
to run the job if there is one.
Also, skip recovery of ring which is not ready.

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16 +++-
 1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index d11489e..3124ca1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3355,10 +3355,24 @@ int amdgpu_device_gpu_recover(struct amdgpu_device 
*adev,
else
r = amdgpu_device_reset(adev);
 
+   /*
+* After reboot a ring might fail in which case this will
+* move the job to different rq if possible
+*/
+   if (job) {
+   drm_sched_entity_select_rq(job->base.entity);
+   if (job->base.entity->rq) {
+   job->base.sched = job->base.entity->rq->sched;
+   } else {
+   job->base.sched = NULL;
+   r = -ENOENT;
+   }
+   }
+
for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
struct amdgpu_ring *ring = adev->rings[i];
 
-   if (!ring || !ring->sched.thread)
+   if (!ring || !ring->ready || !ring->sched.thread)
continue;
 
/* only need recovery sched of the given job's ring
-- 
2.7.4

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Re: [PATCH v2] drm/amd/pp: enable power limit increase in OD mode

2018-10-18 Thread Deucher, Alexander

Reviewed-by: Alex Deucher 


From: amd-gfx  on behalf of Greathouse, 
Joseph 
Sent: Thursday, October 18, 2018 3:44:39 PM
To: amd-gfx@lists.freedesktop.org
Cc: Greathouse, Joseph
Subject: [PATCH v2] drm/amd/pp: enable power limit increase in OD mode

OverDrive mode allows users to increase the maximum SCLK and MCLK
frequencies beyond the default on the GPU. However, this may not
results in large performance gains if the GPU then runs into its TDP
power limit. This patch adds the capability to increase the power
limit of a GPU above its default maximum.

This is only allowed when overdrive is enabled in the ppfeaturemask,
since this is an overdrive feature. The TDPODLimit value from the
VBIOS describes how how much higher the TDP should be allowed to go
over its default, in percentage.

v2: Moved dereference of hwmgr to after its validity check

Signed-off-by: Joseph Greathouse 
---
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c 
b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
index e8964ca..586f1ff 100644
--- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
+++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
@@ -963,6 +963,7 @@ static int pp_dpm_switch_power_profile(void *handle,
 static int pp_set_power_limit(void *handle, uint32_t limit)
 {
 struct pp_hwmgr *hwmgr = handle;
+   uint32_t max_power_limit;

 if (!hwmgr || !hwmgr->pm_en)
 return -EINVAL;
@@ -975,7 +976,13 @@ static int pp_set_power_limit(void *handle, uint32_t limit)
 if (limit == 0)
 limit = hwmgr->default_power_limit;

-   if (limit > hwmgr->default_power_limit)
+   max_power_limit = hwmgr->default_power_limit;
+   if (hwmgr->od_enabled) {
+   max_power_limit *= (100 + 
hwmgr->platform_descriptor.TDPODLimit);
+   max_power_limit /= 100;
+   }
+
+   if (limit > max_power_limit)
 return -EINVAL;

 mutex_lock(>smu_lock);
@@ -994,8 +1001,13 @@ static int pp_get_power_limit(void *handle, uint32_t 
*limit, bool default_limit)

 mutex_lock(>smu_lock);

-   if (default_limit)
+   if (default_limit) {
 *limit = hwmgr->default_power_limit;
+   if (hwmgr->od_enabled) {
+   *limit *= (100 + hwmgr->platform_descriptor.TDPODLimit);
+   *limit /= 100;
+   }
+   }
 else
 *limit = hwmgr->power_limit;

--
2.7.4

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Re: [PATCH 2/3] drm/amdgpu: increase the size of HQD EOP buffers

2018-10-18 Thread Alex Deucher

On Thu, Oct 18, 2018 at 3:47 PM Marek Olšák  wrote:
>
> On Tue, Oct 9, 2018 at 12:17 PM Alex Deucher  wrote:
>>
>> On Fri, Oct 5, 2018 at 5:01 PM Marek Olšák  wrote:
>> >
>> > From: Marek Olšák 
>> >
>> > Signed-off-by: Marek Olšák 
>> > ---
>> >  drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
>> >  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
>>
>> Any reason not to bump the size for gfx7 as well?
>
>
> No, I just don't know if gfx7 supports the same size.

Looks like it does not.  gfx7 is 2^11, gfx8 is 2^12.  Series is:
Reviewed-by: Alex Deucher 
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[PATCH 1/3] drm/sched: Add callback to mark if sched is ready to work.

2018-10-18 Thread Andrey Grodzovsky

Problem:
A particular scheduler may become unsuable (underlying HW) after
some event (e.g. GPU reset). If it's later chosen by
the get free sched. policy a command will fail to be
submitted.

Fix:
Add a driver specific callback to report the sced. status so
rq with bad sched. can be avoided in favor of working one or
none in which case job init will fail.

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |  9 -
 drivers/gpu/drm/etnaviv/etnaviv_sched.c   |  3 ++-
 drivers/gpu/drm/scheduler/sched_entity.c  | 11 ++-
 drivers/gpu/drm/scheduler/sched_main.c|  8 +++-
 drivers/gpu/drm/v3d/v3d_sched.c   |  3 ++-
 include/drm/gpu_scheduler.h   |  5 -
 6 files changed, 33 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
index 5448cf2..bbfe7f501 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c
@@ -404,6 +404,13 @@ int amdgpu_fence_driver_start_ring(struct amdgpu_ring 
*ring,
return 0;
 }
 
+static bool amdgpu_ring_ready(struct drm_gpu_scheduler *sched)
+{
+   struct amdgpu_ring *ring = to_amdgpu_ring(sched);
+
+   return ring->ready;
+}
+
 /**
  * amdgpu_fence_driver_init_ring - init the fence driver
  * for the requested ring.
@@ -450,7 +457,7 @@ int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring,
 
r = drm_sched_init(>sched, _sched_ops,
   num_hw_submission, amdgpu_job_hang_limit,
-  timeout, ring->name);
+  timeout, ring->name, amdgpu_ring_ready);
if (r) {
DRM_ERROR("Failed to create scheduler on ring %s.\n",
  ring->name);
diff --git a/drivers/gpu/drm/etnaviv/etnaviv_sched.c 
b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
index f8c5f1e..5094013 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_sched.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_sched.c
@@ -178,7 +178,8 @@ int etnaviv_sched_init(struct etnaviv_gpu *gpu)
 
ret = drm_sched_init(>sched, _sched_ops,
 etnaviv_hw_jobs_limit, etnaviv_job_hang_limit,
-msecs_to_jiffies(500), dev_name(gpu->dev));
+msecs_to_jiffies(500), dev_name(gpu->dev),
+NULL);
if (ret)
return ret;
 
diff --git a/drivers/gpu/drm/scheduler/sched_entity.c 
b/drivers/gpu/drm/scheduler/sched_entity.c
index 3e22a54..320c77a 100644
--- a/drivers/gpu/drm/scheduler/sched_entity.c
+++ b/drivers/gpu/drm/scheduler/sched_entity.c
@@ -130,7 +130,16 @@ drm_sched_entity_get_free_sched(struct drm_sched_entity 
*entity)
int i;
 
for (i = 0; i < entity->num_rq_list; ++i) {
-   num_jobs = atomic_read(>rq_list[i]->sched->num_jobs);
+   struct drm_gpu_scheduler *sched = entity->rq_list[i]->sched;
+
+   if (entity->rq_list[i]->sched->ready &&
+   !entity->rq_list[i]->sched->ready(sched)) {
+   DRM_WARN("sched%s is not ready, skipping", sched->name);
+
+   continue;
+   }
+
+   num_jobs = atomic_read(>num_jobs);
if (num_jobs < min_jobs) {
min_jobs = num_jobs;
rq = entity->rq_list[i];
diff --git a/drivers/gpu/drm/scheduler/sched_main.c 
b/drivers/gpu/drm/scheduler/sched_main.c
index 63b997d..6b151f2 100644
--- a/drivers/gpu/drm/scheduler/sched_main.c
+++ b/drivers/gpu/drm/scheduler/sched_main.c
@@ -420,6 +420,9 @@ int drm_sched_job_init(struct drm_sched_job *job,
struct drm_gpu_scheduler *sched;
 
drm_sched_entity_select_rq(entity);
+   if (!entity->rq)
+   return -ENOENT;
+
sched = entity->rq->sched;
 
job->sched = sched;
@@ -606,7 +609,8 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
   unsigned hw_submission,
   unsigned hang_limit,
   long timeout,
-  const char *name)
+  const char *name,
+  bool (*ready)(struct drm_gpu_scheduler *sched))
 {
int i;
sched->ops = ops;
@@ -633,6 +637,8 @@ int drm_sched_init(struct drm_gpu_scheduler *sched,
return PTR_ERR(sched->thread);
}
 
+   sched->ready = ready;
+
return 0;
 }
 EXPORT_SYMBOL(drm_sched_init);
diff --git a/drivers/gpu/drm/v3d/v3d_sched.c b/drivers/gpu/drm/v3d/v3d_sched.c
index 80b641f..e06cc0d 100644
--- a/drivers/gpu/drm/v3d/v3d_sched.c
+++ b/drivers/gpu/drm/v3d/v3d_sched.c
@@ -212,7 +212,8 @@ v3d_sched_init(struct v3d_dev *v3d)
 _sched_ops,
 hw_jobs_limit, job_hang_limit,
 msecs_to_jiffies(hang_limit_ms),
-

[PATCH 3/3] drm/amdkfd: Add proper prefix to functions

2018-10-18 Thread Lin, Amber

Add amdgpu_amdkfd_ prefix to amdgpu functions served for amdkfd usage.

Signed-off-by: Amber Lin 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c  | 12 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h  | 12 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_chardev.c|  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_crat.c   |  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_device.c |  6 +++---
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager.c|  2 +-
 drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c |  4 ++--
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c   |  8 
 8 files changed, 26 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index c31a884..4e384ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -268,7 +268,7 @@ void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd)
amdgpu_device_gpu_recover(adev, NULL);
 }
 
-int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
+int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
void **mem_obj, uint64_t *gpu_addr,
void **cpu_ptr, bool mqd_gfx9)
 {
@@ -340,7 +340,7 @@ int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
return r;
 }
 
-void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
+void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
 {
struct amdgpu_bo *bo = (struct amdgpu_bo *) mem_obj;
 
@@ -351,7 +351,7 @@ void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj)
amdgpu_bo_unref(&(bo));
 }
 
-void get_local_mem_info(struct kgd_dev *kgd,
+void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
struct kfd_local_mem_info *mem_info)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
@@ -383,7 +383,7 @@ void get_local_mem_info(struct kgd_dev *kgd,
mem_info->mem_clk_max = 100;
 }
 
-uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
+uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 
@@ -392,7 +392,7 @@ uint64_t get_gpu_clock_counter(struct kgd_dev *kgd)
return 0;
 }
 
-uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
+uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
 
@@ -405,7 +405,7 @@ uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)
return 100;
 }
 
-void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info)
+void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info 
*cu_info)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)kgd;
struct amdgpu_cu_info acu_info = adev->gfx.cu_info;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index 8e0d4f7..69cc9a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
@@ -134,16 +134,16 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
 void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
 
 /* Shared API */
-int alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
+int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
void **mem_obj, uint64_t *gpu_addr,
void **cpu_ptr, bool mqd_gfx9);
-void free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
-void get_local_mem_info(struct kgd_dev *kgd,
+void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj);
+void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd,
struct kfd_local_mem_info *mem_info);
-uint64_t get_gpu_clock_counter(struct kgd_dev *kgd);
+uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
 
-uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
-void get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
+uint32_t amdgpu_amdkfd_get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
+void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info 
*cu_info);
 uint64_t amdgpu_amdkfd_get_vram_usage(struct kgd_dev *kgd);
 uint64_t amdgpu_amdkfd_get_hive_id(struct kgd_dev *kgd);
 
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index 85e833d..5f4062b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -835,7 +835,7 @@ static int kfd_ioctl_get_clock_counters(struct file *filep,
dev = kfd_device_by_id(args->gpu_id);
if (dev)
/* Reading GPU clock counter from KGD */
-   args->gpu_clock_counter = get_gpu_clock_counter(dev->kgd);
+   args->gpu_clock_counter = 
amdgpu_amdkfd_get_gpu_clock_counter(dev->kgd);
else
/* Node without GPU resource */

[PATCH] drm/amdgpu: Fix null pointer amdgpu_device_fw_loading

2018-10-18 Thread Emily Deng

Need to check adev->powerplay.pp_funcs.

Signed-off-by: Emily Deng 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 618d9e5..e26dfc9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1651,7 +1651,7 @@ static int amdgpu_device_fw_loading(struct amdgpu_device 
*adev)
}
}
 
-   if (adev->powerplay.pp_funcs->load_firmware) {
+   if (adev->powerplay.pp_funcs && 
adev->powerplay.pp_funcs->load_firmware) {
r = 
adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
if (r) {
pr_err("firmware loading failed\n");
-- 
2.7.4

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Re: [PATCH] drm/amdgpu: Fix null pointer amdgpu_device_fw_loading

2018-10-18 Thread Huang Rui

On Thu, Oct 18, 2018 at 02:27:18PM +0800, Emily Deng wrote:
> Need to check adev->powerplay.pp_funcs.
> 
> Signed-off-by: Emily Deng 

Reviewed-by: Huang Rui 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 618d9e5..e26dfc9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1651,7 +1651,7 @@ static int amdgpu_device_fw_loading(struct 
> amdgpu_device *adev)
>   }
>   }
>  
> - if (adev->powerplay.pp_funcs->load_firmware) {
> + if (adev->powerplay.pp_funcs && 
> adev->powerplay.pp_funcs->load_firmware) {
>   r = 
> adev->powerplay.pp_funcs->load_firmware(adev->powerplay.pp_handle);
>   if (r) {
>   pr_err("firmware loading failed\n");
> -- 
> 2.7.4
> 
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[PATCH xf86-video-ati] dri3: Handle radeon_get_pixmap_bo returning NULL

2018-10-18 Thread Michel Dänzer

From: Michel Dänzer 

We were trying to already, but testing the wrong pointer.

Fixes: b85b7b11f5b5 "Add struct radeon_buffer"
Bug: https://bugs.debian.org/910846
Signed-off-by: Michel Dänzer 
---
 src/radeon_dri3.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/radeon_dri3.c b/src/radeon_dri3.c
index 7e89a2f0b..25078bae1 100644
--- a/src/radeon_dri3.c
+++ b/src/radeon_dri3.c
@@ -212,7 +212,7 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
  CARD16 *stride,
  CARD32 *size)
 {
-   struct radeon_bo *bo;
+   struct radeon_buffer *bo;
int fd;
 #ifdef USE_GLAMOR
ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
@@ -222,10 +222,10 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
return glamor_fd_from_pixmap(screen, pixmap, stride, size);
 #endif
 
-   bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
+   bo = radeon_get_pixmap_bo(pixmap);
if (!bo) {
exaMoveInPixmap(pixmap);
-   bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
+   bo = radeon_get_pixmap_bo(pixmap);
if (!bo)
return -1;
}
@@ -233,11 +233,11 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
if (pixmap->devKind > UINT16_MAX)
return -1;
 
-   if (radeon_gem_prime_share_bo(bo, ) < 0)
+   if (radeon_gem_prime_share_bo(bo->bo.radeon, ) < 0)
return -1;
 
*stride = pixmap->devKind;
-   *size = bo->size;
+   *size = bo->bo.radeon->size;
return fd;
 }
 
-- 
2.19.1

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[PATCH] drm/amdgpu: add ring test for page queue

2018-10-18 Thread Huang Rui

We add page queue for sdma to update page table. So here it also needs ring test
to verify it workable during the initialization.

Signed-off-by: Huang Rui 
---
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 6ad4fda..ede149a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1150,6 +1150,15 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
return r;
}
 
+   if (adev->sdma.has_page_queue) {
+   ring = >sdma.instance[i].page;
+   r = amdgpu_ring_test_ring(ring);
+   if (r) {
+   ring->ready = false;
+   return r;
+   }
+   }
+
if (adev->mman.buffer_funcs_ring == ring)
amdgpu_ttm_set_buffer_funcs_status(adev, true);
}
-- 
2.7.4

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[PATCH] drm/amd/powerplay: drop highest UCLK setting after display configuration change

2018-10-18 Thread Evan Quan

The UCLK is forced to highest at the start of display configuration
change. Downgrade the UCLK from highest after display configuration change.
Otherwise, we may see the UCLK stuck in the highest in some cases.

Change-Id: I7ee6dd3cf6b4df30667e48576612b6af1a8e9184
Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
index b4dbbb7c334c..6e0b2b8df455 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
@@ -2046,6 +2046,8 @@ static int 
vega20_notify_smc_display_config_after_ps_adjustment(
 {
struct vega20_hwmgr *data =
(struct vega20_hwmgr *)(hwmgr->backend);
+   struct vega20_single_dpm_table *dpm_table =
+   >dpm_table.mem_table;
struct PP_Clocks min_clocks = {0};
struct pp_display_clock_request clock_req;
int ret = 0;
@@ -2076,6 +2078,15 @@ static int 
vega20_notify_smc_display_config_after_ps_adjustment(
}
}
 
+   if (data->smu_features[GNLD_DPM_UCLK].enabled) {
+   dpm_table->dpm_state.hard_min_level = min_clocks.memoryClock / 
100;
+   PP_ASSERT_WITH_CODE(!(ret = 
smum_send_msg_to_smc_with_parameter(hwmgr,
+   PPSMC_MSG_SetHardMinByFreq,
+   (PPCLK_UCLK << 16 ) | 
dpm_table->dpm_state.hard_min_level)),
+   "[SetHardMinFreq] Set hard min uclk failed!",
+   return ret);
+   }
+
return 0;
 }
 
-- 
2.19.1

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Re: [PATCH 2/7] drm: add syncobj timeline support v8

2018-10-18 Thread Christian König


Am 18.10.18 um 05:11 schrieb zhoucm1:



On 2018年10月17日 18:24, Daniel Vetter wrote:

On Wed, Oct 17, 2018 at 11:29 AM Koenig, Christian
 wrote:

Am 17.10.18 um 11:17 schrieb zhoucm1:

[SNIP]

   +struct drm_syncobj_signal_pt {
+    struct dma_fence_array *base;

Out of curiosity, why the pointer and not embedding? base is kinda
misleading for a pointer.

Yeah, Christian doesn't like signal_pt lifecycle same as fence, so
it's a pointer.
If you don't like 'base' name, I can change it.
Well I never said that you can't embed the fence array into the 
signal_pt.


You just need to make sure that we don't affect the drm_syncobj
lilecycle as well, e.g. that we don't also need to keep that around.

I don't see a problem with that, as long as drm_syncobj keeps a
reference to the fence while it's on the timeline list. Which it
already does. And embedding would avoid that 2nd separate allocation,
aside from making base less confusing.
That's indeed my initial implementation for signal_pt/wait_pt with 
fence based, but after long and many discussions, we get current 
solution, as you see, the version is up to v8 :).


For here  why the pointer and not embedding?
Two reasons:
1. their lifecycles are not same.
2. It is a fence array usage, which always needs separate allocation, 
seems which is mandatory.

So it is a pointer.

But the name is historical from initial, and indeed be kinda 
misleading for a pointer, I will change it to fence_array instead in 
coming v9.


To avoid running into a v10 I've just pushed this version upstream :)

The rest in the series looks good to me as well, but I certainly want 
the radv/anv developers to take a look as well as Daniel suggested.


Christian.



Thanks,
David Zhou


-Daniel


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[PATCH] drm/amdgpu: fix amdgpu_vm_fini

2018-10-18 Thread Christian König

We should not remove mappings in rbtree_postorder_for_each_entry_safe
because that rebalances the tree.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index 6904d794d60a..01d94de6a6a1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -3235,7 +3235,6 @@ void amdgpu_vm_fini(struct amdgpu_device *adev, struct 
amdgpu_vm *vm)
rbtree_postorder_for_each_entry_safe(mapping, tmp,
 >va.rb_root, rb) {
list_del(>list);
-   amdgpu_vm_it_remove(mapping, >va);
kfree(mapping);
}
list_for_each_entry_safe(mapping, tmp, >freed, list) {
-- 
2.14.1

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Re: [PATCH] drm/amdgpu: add ring test for page queue

2018-10-18 Thread Christian König


Am 18.10.18 um 12:14 schrieb Huang Rui:

We add page queue for sdma to update page table. So here it also needs ring test
to verify it workable during the initialization.

Signed-off-by: Huang Rui 


Reviewed-by: Christian König 


---
  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 9 +
  1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 6ad4fda..ede149a 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1150,6 +1150,15 @@ static int sdma_v4_0_start(struct amdgpu_device *adev)
return r;
}
  
+		if (adev->sdma.has_page_queue) {

+   ring = >sdma.instance[i].page;
+   r = amdgpu_ring_test_ring(ring);
+   if (r) {
+   ring->ready = false;
+   return r;
+   }
+   }
+
if (adev->mman.buffer_funcs_ring == ring)
amdgpu_ttm_set_buffer_funcs_status(adev, true);
}


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Re: [PATCH xf86-video-ati] dri3: Handle radeon_get_pixmap_bo returning NULL

2018-10-18 Thread Deucher, Alexander

Reviewed-by: Alex Deucher 


From: amd-gfx  on behalf of Michel 
Dänzer 
Sent: Thursday, October 18, 2018 4:13:58 AM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH xf86-video-ati] dri3: Handle radeon_get_pixmap_bo returning NULL

From: Michel Dänzer 

We were trying to already, but testing the wrong pointer.

Fixes: b85b7b11f5b5 "Add struct radeon_buffer"
Bug: https://bugs.debian.org/910846
Signed-off-by: Michel Dänzer 
---
 src/radeon_dri3.c | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/radeon_dri3.c b/src/radeon_dri3.c
index 7e89a2f0b..25078bae1 100644
--- a/src/radeon_dri3.c
+++ b/src/radeon_dri3.c
@@ -212,7 +212,7 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
   CARD16 *stride,
   CARD32 *size)
 {
-   struct radeon_bo *bo;
+   struct radeon_buffer *bo;
 int fd;
 #ifdef USE_GLAMOR
 ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
@@ -222,10 +222,10 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
 return glamor_fd_from_pixmap(screen, pixmap, stride, size);
 #endif

-   bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
+   bo = radeon_get_pixmap_bo(pixmap);
 if (!bo) {
 exaMoveInPixmap(pixmap);
-   bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
+   bo = radeon_get_pixmap_bo(pixmap);
 if (!bo)
 return -1;
 }
@@ -233,11 +233,11 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
 if (pixmap->devKind > UINT16_MAX)
 return -1;

-   if (radeon_gem_prime_share_bo(bo, ) < 0)
+   if (radeon_gem_prime_share_bo(bo->bo.radeon, ) < 0)
 return -1;

 *stride = pixmap->devKind;
-   *size = bo->size;
+   *size = bo->bo.radeon->size;
 return fd;
 }

--
2.19.1

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Re: [PATCH] drm/amd/powerplay: drop highest UCLK setting after display configuration change

2018-10-18 Thread Alex Deucher

On Thu, Oct 18, 2018 at 6:41 AM Evan Quan  wrote:
>
> The UCLK is forced to highest at the start of display configuration
> change. Downgrade the UCLK from highest after display configuration change.
> Otherwise, we may see the UCLK stuck in the highest in some cases.
>
> Change-Id: I7ee6dd3cf6b4df30667e48576612b6af1a8e9184
> Signed-off-by: Evan Quan 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 11 +++
>  1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c 
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> index b4dbbb7c334c..6e0b2b8df455 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c
> @@ -2046,6 +2046,8 @@ static int 
> vega20_notify_smc_display_config_after_ps_adjustment(
>  {
> struct vega20_hwmgr *data =
> (struct vega20_hwmgr *)(hwmgr->backend);
> +   struct vega20_single_dpm_table *dpm_table =
> +   >dpm_table.mem_table;
> struct PP_Clocks min_clocks = {0};
> struct pp_display_clock_request clock_req;
> int ret = 0;
> @@ -2076,6 +2078,15 @@ static int 
> vega20_notify_smc_display_config_after_ps_adjustment(
> }
> }
>
> +   if (data->smu_features[GNLD_DPM_UCLK].enabled) {
> +   dpm_table->dpm_state.hard_min_level = min_clocks.memoryClock 
> / 100;
> +   PP_ASSERT_WITH_CODE(!(ret = 
> smum_send_msg_to_smc_with_parameter(hwmgr,
> +   PPSMC_MSG_SetHardMinByFreq,
> +   (PPCLK_UCLK << 16 ) | 
> dpm_table->dpm_state.hard_min_level)),
> +   "[SetHardMinFreq] Set hard min uclk failed!",
> +   return ret);
> +   }
> +
> return 0;
>  }
>
> --
> 2.19.1
>
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