[PATCH] ARM/Samsung: remaining clean up...
...in preparation to add the S3C6410 SoC support. Mostly simplifying the Samsung serial driver and some more cosmetic. These patches are a re-work and re-send of the remaining ones not yet included from the previous ARM/Samsung: more clean up... series. The patches 1/3 and 3/3 base on the current next, because they touch code for the new S5Pxx SoCs. jbe ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
Re: [PATCH] Add JTAG bitbang driver
Hi, Slawa! Use 'git-send-email' for submiting patches to this maillist! Please, do not send attached patches! On 24 July 2012 13:11, Wjatscheslaw Stoljarski (Slawa) wjatscheslaw.stoljar...@kiwigrid.com wrote: ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox -- Best regards, Antony Pavlov ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] OMAP4: small header cleanup
Use mach/clocks.h for OMAP4. Signed-off-by: Teresa Gámez t.ga...@phytec.de --- arch/arm/mach-omap/include/mach/clocks.h |3 +++ arch/arm/mach-omap/omap4_clock.c |4 ++-- arch/arm/mach-omap/omap4_generic.c |5 ++--- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap/include/mach/clocks.h b/arch/arm/mach-omap/include/mach/clocks.h index 1221238..3efa057 100644 --- a/arch/arm/mach-omap/include/mach/clocks.h +++ b/arch/arm/mach-omap/include/mach/clocks.h @@ -44,5 +44,8 @@ #ifdef CONFIG_ARCH_OMAP3 #include mach/omap3-clock.h #endif +#ifdef CONFIG_ARCH_OMAP4 +#include mach/omap4-clock.h +#endif #endif /* __OMAP_CLOCKS_H_ */ diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c index f8bab5f..3ab01f0 100644 --- a/arch/arm/mach-omap/omap4_clock.c +++ b/arch/arm/mach-omap/omap4_clock.c @@ -1,7 +1,7 @@ #include common.h -#include mach/syslib.h #include io.h -#include mach/omap4-clock.h +#include mach/syslib.h +#include mach/clocks.h #define LDELAY 1200 diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index 5092242..de69934 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -1,10 +1,9 @@ #include common.h #include init.h -#include mach/silicon.h #include io.h -#include mach/omap4-silicon.h +#include mach/clocks.h +#include mach/silicon.h #include mach/omap4-mux.h -#include mach/omap4-clock.h #include mach/syslib.h #include mach/xload.h #include mach/gpmc.h -- 1.7.0.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] scripts/checkpatch.pl: reset rpt_cleaners warnings
When running checkpatch against multiple patches and one of them has a whitespace issue, all following patches will contain the same note, even if they are ok. This patch is taken from the linux kernel: scripts/checkpatch.pl: reset rpt_cleaners warnings b0781216e7bff68aca2fbcd275b4db7531d1e22f Written by Mike Frysinger vap...@gentoo.org Signed-off-by: Teresa Gámez t.ga...@phytec.de --- scripts/checkpatch.pl |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 151c53a..0d94f98 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2934,6 +2934,7 @@ sub process { if ($rpt_cleaners) { print NOTE: whitespace errors detected, you may wish to use scripts/cleanpatch or\n; print scripts/cleanfile\n\n; + $rpt_cleaners = 0; } } -- 1.7.0.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH] ARM i.MX53: notify clocksource about changing clock
This fix a clock inaccuracy in get_time_ns (used by sleep, time, etc). At i.MX53 power-on GPT clock is typically 5550 Hz, and it will be used to calc the clock multiplier. After call imx53_init_lowlevel() GPT clock will changed (e.g. to Hz), but multiplier not. To fix this behavior call clock_notifier_call_chain() after changing clock in imx53_init_lowlevel(). Signed-off-by: Wjatscheslaw Stoljarski wjatscheslaw.stoljar...@kiwigrid.com --- arch/arm/mach-imx/imx53.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c index e20b60a..3359819 100644 --- a/arch/arm/mach-imx/imx53.c +++ b/arch/arm/mach-imx/imx53.c @@ -18,6 +18,7 @@ #include init.h #include common.h #include io.h +#include notifier.h #include sizes.h #include mach/imx5.h #include mach/imx-regs.h @@ -211,4 +212,6 @@ void imx53_init_lowlevel(unsigned int cpufreq_mhz) writel(0x, ccm + MX53_CCM_CCGR7); writel(0, ccm + MX5_CCM_CCDR); + + clock_notifier_call_chain(); } -- 1.7.9.5 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 0/3] nand: autodetect buswith
Add flag NAND_BUSWIDTH_UNKNOWN to allow the nand driver to detect the buswidth. Driver must provide callback set_buswidth which configure buswidth set in (struct nand_chip) nand-options Jan Weitzel (3): nand: base: Add autodetect buswidth OMAP GPMC NAND: add set_buswidth callback PCA-A_XL2 PCM049: Use autodetection for NAND width arch/arm/boards/pcm049/board.c|4 +- arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |3 +- arch/arm/mach-omap/devices-gpmc-nand.c|8 ++--- arch/arm/mach-omap/gpmc.c | 19 arch/arm/mach-omap/include/mach/gpmc.h|8 + drivers/mtd/nand/nand_base.c | 45 ++-- drivers/mtd/nand/nand_omap_gpmc.c | 43 --- include/linux/mtd/nand.h |4 ++ 8 files changed, 117 insertions(+), 17 deletions(-) ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 3/3] PCA-A_XL2 PCM049: Use autodetection for NAND width
Signed-off-by: Jan Weitzel j.weit...@phytec.de --- arch/arm/boards/pcm049/board.c|4 ++-- arch/arm/boards/phycard-a-xl2/pca-a-xl2.c |3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/arch/arm/boards/pcm049/board.c b/arch/arm/boards/pcm049/board.c index 8718d2b..006e924 100644 --- a/arch/arm/boards/pcm049/board.c +++ b/arch/arm/boards/pcm049/board.c @@ -111,9 +111,9 @@ static int pcm049_devices_init(void) pcm049_network_init(); - gpmc_generic_nand_devices_init(0, 8, + /* Autodetect buswidth */ + gpmc_generic_nand_devices_init(0, 0, OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg); - #ifdef CONFIG_PARTITION devfs_add_partition(nand0, 0x0, SZ_128K, PARTITION_FIXED, xload_raw); dev_add_bb_dev(xload_raw, xload); diff --git a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c index 9bbb054..f246f86 100644 --- a/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c +++ b/arch/arm/boards/phycard-a-xl2/pca-a-xl2.c @@ -124,7 +124,8 @@ static int pcaaxl2_devices_init(void) pcaaxl2_network_init(); - gpmc_generic_nand_devices_init(0, 16, + /* Autodetect buswidth */ + gpmc_generic_nand_devices_init(0, 0, OMAP_ECC_BCH8_CODE_HW, omap4_nand_cfg); #ifdef CONFIG_PARTITION -- 1.7.0.4 ___ barebox mailing list barebox@lists.infradead.org http://lists.infradead.org/mailman/listinfo/barebox
[PATCH 1/3] nand: base: Add autodetect buswidth
If a 16bit NAND is attached, but configured with 8bit nand_base will fail. Add a flag NAND_BUSWIDTH_UNKNOWN and callback set_buswidth to allow it to change the configuration to 16bit. Signed-off-by: Jan Weitzel j.weit...@phytec.de --- drivers/mtd/nand/nand_base.c | 45 ++--- include/linux/mtd/nand.h |4 +++ 2 files changed, 45 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index c4eca0d..055c710 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -1027,6 +1027,23 @@ static void nand_set_defaults(struct nand_chip *chip, int busw) } /* + * Override defaults with 16 bit ones + */ +static void nand_set_defaults16(struct nand_chip *chip) +{ + if (chip-read_byte == nand_read_byte) + chip-read_byte = nand_read_byte16; +#ifdef CONFIG_MTD_WRITE + if (chip-write_buf == nand_write_buf) + chip-write_buf = nand_write_buf16; +#endif + if (chip-read_buf == nand_read_buf) + chip-read_buf = nand_read_buf16; + if (chip-verify_buf == nand_verify_buf) + chip-verify_buf = nand_verify_buf16; +} + +/* * Get the flash and manufacturer id and lookup if the type is supported */ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, @@ -1128,9 +1145,12 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, /* * Check, if buswidth is correct. Hardware drivers should set -* chip correct ! +* chip correct or ask for autodetection! */ - if (busw != (chip-options NAND_BUSWIDTH_16)) { + if (chip-options NAND_BUSWIDTH_UNKNOWN) { + printk(KERN_INFO NAND bus width %d bit detected\n, + (type-options NAND_BUSWIDTH_16) ? 16 : 8); + } else if (busw != (chip-options NAND_BUSWIDTH_16)) { printk(KERN_INFO NAND device: Manufacturer ID: 0x%02x, Chip ID: 0x%02x (%s %s)\n, *maf_id, dev_id, nand_manuf_ids[maf_idx].name, mtd-name); @@ -1202,8 +1222,18 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips) struct nand_chip *chip = mtd-priv; struct nand_flash_dev *type; - /* Get buswidth to select the correct functions */ - busw = chip-options NAND_BUSWIDTH_16; + if (chip-options NAND_BUSWIDTH_UNKNOWN) { + if (!chip-set_buswidth) { + chip-options = ~NAND_BUSWIDTH_UNKNOWN; + printk(KERN_WARNING Buswidth unknown, but no callback to fix it.\n); + } + /* Detect NAND with 8bit buswidth*/ + busw = 0; + } else { + /* Get buswidth to select the correct functions */ + busw = chip-options NAND_BUSWIDTH_16; + } + /* Set the default functions */ nand_set_defaults(chip, busw); @@ -1216,6 +1246,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips) return PTR_ERR(type); } + if (chip-options NAND_BUSWIDTH_UNKNOWN) { + chip-set_buswidth(mtd, chip); + if (chip-options NAND_BUSWIDTH_16) + /* Change buswidth to 16 bit*/ + nand_set_defaults16(chip); + } + /* Check for a chip array */ for (i = 1; i maxchips; i++) { chip-select_chip(mtd, i); diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 8e20876..184fc69 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -192,6 +192,8 @@ typedef enum { /* This option is defined if the board driver allocates its own buffers (e.g. because it needs them DMA-coherent */ #define NAND_OWN_BUFFERS 0x0004 +/* Buswitdh is currently unknown */ +#define NAND_BUSWIDTH_UNKNOWN 0x0008 /* Options set by nand scan */ /* Nand scan has allocated controller struct */ #define NAND_CONTROLLER_ALLOC 0x8000 @@ -358,6 +360,7 @@ struct nand_buffers { * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks * (determine if errors are correctable) * @write_page:[REPLACEABLE] High-level page write function + * @set_buswidth: [BOARDSPECIFIC] hardware specific function to configure buswidth */ struct nand_chip { @@ -382,6 +385,7 @@ struct nand_chip { int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, int page, int cached, int raw); + int (*set_buswidth)(struct mtd_info *mtd, struct nand_chip *this); int chip_delay; unsigned intoptions; -- 1.7.0.4