[clang] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td (PR #67587)
https://github.com/4vtomat closed https://github.com/llvm/llvm-project/pull/67587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td (PR #67587)
https://github.com/topperc approved this pull request. LGTM https://github.com/llvm/llvm-project/pull/67587 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
[clang] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td (PR #67587)
llvmbot wrote: @llvm/pr-subscribers-clang Changes Since there are more vendor extensions that needs to implement custom intrinsics, it's useful to move some common usages to riscv_vector_common.td. --- Patch is 35.34 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/67587.diff 2 Files Affected: - (modified) clang/include/clang/Basic/riscv_vector.td (-460) - (modified) clang/include/clang/Basic/riscv_vector_common.td (+460) ``diff diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td index 60a1a2b2be6fb40..c685f3ef6087d81 100644 --- a/clang/include/clang/Basic/riscv_vector.td +++ b/clang/include/clang/Basic/riscv_vector.td @@ -14,466 +14,6 @@ include "riscv_vector_common.td" -//===--===// -// Basic classes with automatic codegen. -//===--===// - -class RVVOutBuiltin -: RVVBuiltin { - let IntrinsicTypes = [-1]; -} - -class RVVOp0Builtin -: RVVBuiltin { - let IntrinsicTypes = [0]; -} - -class RVVOutOp1Builtin -: RVVBuiltin { - let IntrinsicTypes = [-1, 1]; -} - -class RVVOutOp0Op1Builtin -: RVVBuiltin { - let IntrinsicTypes = [-1, 0, 1]; -} - -multiclass RVVBuiltinSet> suffixes_prototypes, - list intrinsic_types> { - let IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask", - IntrinsicTypes = intrinsic_types in { -foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0] in { -defvar suffix = s_p[1]; -defvar prototype = s_p[2]; -def : RVVBuiltin; - } -} - } -} - -// IntrinsicTypes is output, op0, op1 [-1, 0, 1] -multiclass RVVOutOp0Op1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOutBuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOp0BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 0] -multiclass RVVOutOp0BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 1] -multiclass RVVOutOp1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOp0Op1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOutOp1Op2BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op2 [-1, 2] -multiclass RVVOutOp2BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVSignedBinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedBinBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVIntBinBuiltinSet -: RVVSignedBinBuiltinSet, - RVVUnsignedBinBuiltinSet; - -multiclass RVVInt64BinBuiltinSet -: RVVOutOp1BuiltinSet, - RVVOutOp1BuiltinSet; - -multiclass RVVSlideOneBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVShiftBuiltinSet -: RVVSignedShiftBuiltinSet, - RVVUnsignedShiftBuiltinSet; - -let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - multiclass RVVSignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVSignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - -} - -multiclass RVVCarryinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVCarryOutInBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVSignedMaskOutBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVUnsignedMaskOutBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVIntMaskOutBuiltinSet -: RVVSignedMaskOutBuiltinSet, - RVVUnsignedMaskOutBuiltinSet; - -class RVVIntExt -: RVVBuiltin { - let IRName = intrinsic_name; - let MaskedIRName = intrinsic_name # "_mask"; - let OverloadedName = NAME; - let IntrinsicTypes = [-1, 0]; -} - -let HasMaskedOffOperand = false in { - multiclass RVVIntTerBuiltinSet { -defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSet { -defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSetRoundingMode { -defm "" : RVVOutOp1BuiltinSet; - } -} - -let HasMaskedOffOperand = false, Log2LMUL = [-2, -1, 0, 1, 2] in { - multiclass RVVFloatingWidenTerBuiltinSet { -defm "" : RVVOutOp1Op2BuiltinSet; - } - multiclass RVVFloatingWidenTerBuiltinSetRoundingMode { -defm "" : RVVOutOp1Op2BuiltinSet; - } -} - -
[clang] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td (PR #67587)
https://github.com/4vtomat created https://github.com/llvm/llvm-project/pull/67587 Since there are more vendor extensions that needs to implement custom intrinsics, it's useful to move some common usages to riscv_vector_common.td. >From 6f3575b70438a0529bd2505ccf55a87cca3eeefd Mon Sep 17 00:00:00 2001 From: Brandon Wu Date: Wed, 27 Sep 2023 11:31:28 -0700 Subject: [PATCH] [RISCV][NFC] Move some common class/multiclass from riscv_vector.td to riscv_vector_common.td Since there are more vendor extensions that needs to implement custom intrinsics, it's useful to move some common usages to riscv_vector_common.td. --- clang/include/clang/Basic/riscv_vector.td | 460 -- .../clang/Basic/riscv_vector_common.td| 460 ++ 2 files changed, 460 insertions(+), 460 deletions(-) diff --git a/clang/include/clang/Basic/riscv_vector.td b/clang/include/clang/Basic/riscv_vector.td index 60a1a2b2be6fb40..c685f3ef6087d81 100644 --- a/clang/include/clang/Basic/riscv_vector.td +++ b/clang/include/clang/Basic/riscv_vector.td @@ -14,466 +14,6 @@ include "riscv_vector_common.td" -//===--===// -// Basic classes with automatic codegen. -//===--===// - -class RVVOutBuiltin -: RVVBuiltin { - let IntrinsicTypes = [-1]; -} - -class RVVOp0Builtin -: RVVBuiltin { - let IntrinsicTypes = [0]; -} - -class RVVOutOp1Builtin -: RVVBuiltin { - let IntrinsicTypes = [-1, 1]; -} - -class RVVOutOp0Op1Builtin -: RVVBuiltin { - let IntrinsicTypes = [-1, 0, 1]; -} - -multiclass RVVBuiltinSet> suffixes_prototypes, - list intrinsic_types> { - let IRName = intrinsic_name, MaskedIRName = intrinsic_name # "_mask", - IntrinsicTypes = intrinsic_types in { -foreach s_p = suffixes_prototypes in { - let Name = NAME # "_" # s_p[0] in { -defvar suffix = s_p[1]; -defvar prototype = s_p[2]; -def : RVVBuiltin; - } -} - } -} - -// IntrinsicTypes is output, op0, op1 [-1, 0, 1] -multiclass RVVOutOp0Op1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOutBuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOp0BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 0] -multiclass RVVOutOp0BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op1 [-1, 1] -multiclass RVVOutOp1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOp0Op1BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVOutOp1Op2BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -// IntrinsicTypes is output, op2 [-1, 2] -multiclass RVVOutOp2BuiltinSet> suffixes_prototypes> -: RVVBuiltinSet; - -multiclass RVVSignedBinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedBinBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedBinBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVIntBinBuiltinSet -: RVVSignedBinBuiltinSet, - RVVUnsignedBinBuiltinSet; - -multiclass RVVInt64BinBuiltinSet -: RVVOutOp1BuiltinSet, - RVVOutOp1BuiltinSet; - -multiclass RVVSlideOneBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVSignedShiftBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVUnsignedShiftBuiltinSetRoundingMode -: RVVOutOp1BuiltinSet; - -multiclass RVVShiftBuiltinSet -: RVVSignedShiftBuiltinSet, - RVVUnsignedShiftBuiltinSet; - -let Log2LMUL = [-3, -2, -1, 0, 1, 2] in { - multiclass RVVSignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVSignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSet - : RVVOutOp0Op1BuiltinSet; - - multiclass RVVUnsignedNShiftBuiltinSetRoundingMode - : RVVOutOp0Op1BuiltinSet; - -} - -multiclass RVVCarryinBuiltinSet -: RVVOutOp1BuiltinSet; - -multiclass RVVCarryOutInBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVSignedMaskOutBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVUnsignedMaskOutBuiltinSet -: RVVOp0Op1BuiltinSet; - -multiclass RVVIntMaskOutBuiltinSet -: RVVSignedMaskOutBuiltinSet, - RVVUnsignedMaskOutBuiltinSet; - -class RVVIntExt -: RVVBuiltin { - let IRName = intrinsic_name; - let MaskedIRName = intrinsic_name # "_mask"; - let OverloadedName = NAME; - let IntrinsicTypes = [-1, 0]; -} - -let HasMaskedOffOperand = false in { - multiclass RVVIntTerBuiltinSet { -defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSet { -defm "" : RVVOutOp1BuiltinSet; - } - multiclass RVVFloatingTerBuiltinSetRou