[Intel-gfx] [PATCH V6 0/6] mdev based hardware virtio offloading support
Hi all: There are hardwares that can do virtio datapath offloading while having its own control path. This path tries to implement a mdev based unified API to support using kernel virtio driver to drive those devices. This is done by introducing a new mdev transport for virtio (virtio_mdev) and register itself as a new kind of mdev driver. Then it provides a unified way for kernel virtio driver to talk with mdev device implementation. Though the series only contains kernel driver support, the goal is to make the transport generic enough to support userspace drivers. This means vhost-mdev[1] could be built on top as well by resuing the transport. A sample driver is also implemented which simulate a virito-net loopback ethernet device on top of vringh + workqueue. This could be used as a reference implementation for real hardware driver. Also a real ICF VF driver was also posted here[2] which is a good reference for vendors who is interested in their own virtio datapath offloading product. Consider mdev framework only support VFIO device and driver right now, this series also extend it to support other types. This is done through introducing class id to the device and pairing it with id_talbe claimed by the driver. On top, this seris also decouple device specific parents ops out of the common ones. Pktgen test was done with virito-net + mvnet loop back device. Please review. [1] https://lkml.org/lkml/2019/10/29/335 [2] https://lkml.org/lkml/2019/10/15/1226 Changes from V5: - use dev_warn() instead of WARN(1) when class id is not set - validate id_table before trying to do matching between device and driver - add wildcard for modpost script - use unique name for id_table - move get_mdev_features() to be the first member of virtio_device_ops and more comments for it - typo fixes for the comments above virtio_mdev_ops Changes from V4: - keep mdev_set_class() for the device that doesn't use device ops - use union for device ops pointer in mdev_device - introduce class specific helper for getting is device ops - use WARN_ON instead of BUG_ON in mdev_set_virtio_ops - explain details of get_mdev_features() and get_vendor_id() - distinguish the optional virito device ops from mandatory ones and make get_generation() optional - rename vfio_mdev.h to vfio_mdev_ops.h, rename virito_mdev.h to virtio_mdev_ops.h - don't abuse version fileds in virtio_mdev structure, use features instead - fix warning during device remove - style & docs tweaks and typo fixes Changes from V3: - document that class id (device ops) must be specified in create() - add WARN() when trying to set class_id when it has already set - add WARN() when class_id is not specified in create() and correctly return an error in this case - correct the prototype of mdev_set_class() in the doc - add documention of mdev_set_class() - remove the unnecessary "class_id_fail" label when class id is not specified in create() - convert id_table in vfio_mdev to const - move mdev_set_class and its friends after mdev_uuid() - suqash the patch of bus uevent into patch of introducing class id - tweak the words in the docs per Cornelia suggestion - tie class_id and device ops through class specific initialization routine like mdev_set_vfio_ops() - typos fixes in the docs of virtio-mdev callbacks - document the usage of virtqueues in struct virtio_mdev_device - remove the useless vqs array in struct virtio_mdev_device - rename MDEV_ID_XXX to MDEV_CLASS_ID_XXX Changes from V2: - fail when class_id is not specified - drop the vringh patch - match the doc to the code - tweak the commit log - move device_ops from parent to mdev device - remove the unused MDEV_ID_VHOST Changes from V1: - move virtio_mdev.c to drivers/virtio - store class_id in mdev_device instead of mdev_parent - store device_ops in mdev_device instead of mdev_parent - reorder the patch, vringh fix comes first - really silent compiling warnings - really switch to use u16 for class_id - uevent and modpost support for mdev class_id - vraious tweaks per comments from Parav Changes from RFC-V2: - silent compile warnings on some specific configuration - use u16 instead u8 for class id - reseve MDEV_ID_VHOST for future vhost-mdev work - introduce "virtio" type for mvnet and make "vhost" type for future work - add entries in MAINTAINER - tweak and typos fixes in commit log Changes from RFC-V1: - rename device id to class id - add docs for class id and device specific ops (device_ops) - split device_ops into seperate headers - drop the mdev_set_dma_ops() - use device_ops to implement the transport API, then it's not a part of UAPI any more - use GFP_ATOMIC in mvnet sample device and other tweaks - set_vring_base/get_vring_base support for mvnet device Jason Wang (6): mdev: class id support modpost: add support for mdev class id mdev: introduce device specific ops mdev: introduce virtio device and its device ops virtio: introduce a mdev based transport docs: sample
Re: [Intel-gfx] [RFC 0/3] Display uncore
On Tue, 29 Oct 2019, Daniele Ceraolo Spurio wrote: > On 10/29/19 2:23 AM, Jani Nikula wrote: >> On Wed, 07 Aug 2019, Daniele Ceraolo Spurio >> wrote: >>> I've been trying to identify MMIO ranges to clearly define what belongs >>> to display_uncore to do a check on access, but there are lots of >>> exceptions and differences across gens (with a few more coming with TGL), >>> so I don't think that's a viable way. The alternative option implemented >>> here is to differentiate the register by type, which should ensure we >>> never mix them up, but at the cost of a more complex transition. >>> >>> Thoughts? I'm very open to (and I actually hope for) better ideas. >> >> Has there been any progress in this front lately, or have I just missed >> it? >> > > No progress on the ML. I've been locally trying on and off to break > i915_reg.h in more manageable chunks to be able to more easily mark the > display registers, but I keep finding special cases, especially around > VLV/CHV. I'll try to prioritize this task more and get something out, at > least as a RFC. Okay. As you saw, I decided to start moving forward with display uncore helpers [1]. We'll need them anyway, and we can add the display checks there afterwards. If anything, they should make your job easier, not harder. BR, Jani. [1] http://patchwork.freedesktop.org/patch/msgid/20191029105156.21658-1-jani.nik...@intel.com -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission (rev2)
== Series Details == Series: drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission (rev2) URL : https://patchwork.freedesktop.org/series/68685/ State : failure == Summary == Applying: drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission Using index info to reconstruct a base tree... A drivers/gpu/drm/i915/intel_uc.c Falling back to patching base and 3-way merge... CONFLICT (modify/delete): drivers/gpu/drm/i915/intel_uc.c deleted in HEAD and modified in drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission. Version drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission of drivers/gpu/drm/i915/intel_uc.c left in tree. error: Failed to merge in the changes. hint: Use 'git am --show-current-patch' to see the failed patch Patch failed at 0001 drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 12/12] drm/i915: Complete plane hw and uapi split, v2.
Op 29-10-2019 om 19:34 schreef Ville Syrjälä:
> On Tue, Oct 29, 2019 at 08:22:29AM +0100, Maarten Lankhorst wrote:
>> Splitting plane state is easier than splitting crtc_state,
>> before plane check we copy the drm properties to hw so we can
>> do the same in bigjoiner later on.
>>
>> We copy the state after we did all the modeset handling, but fortunately
>> i915 seems to be split correctly and nothing during modeset looks
>> at plane_state.
>>
>> Changes since v1:
>> - Do not clear hw state on duplication.
>>
>> Signed-off-by: Maarten Lankhorst
>> ---
>> .../gpu/drm/i915/display/intel_atomic_plane.c | 37 ++-
>> .../gpu/drm/i915/display/intel_atomic_plane.h | 2 +
>> drivers/gpu/drm/i915/display/intel_display.c | 1 +
>> .../drm/i915/display/intel_display_types.h| 23 +---
>> 4 files changed, 57 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> index ba7d5421f791..75a5004b234e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> @@ -93,6 +93,10 @@ intel_plane_duplicate_state(struct drm_plane *plane)
>> intel_state->vma = NULL;
>> intel_state->flags = 0;
>>
>> +/* add reference to fb */
>> +if (intel_state->hw.fb)
>> +drm_framebuffer_get(intel_state->hw.fb);
>> +
>> return _state->uapi;
>> }
>>
>> @@ -112,6 +116,8 @@ intel_plane_destroy_state(struct drm_plane *plane,
>> WARN_ON(plane_state->vma);
>>
>> __drm_atomic_helper_plane_destroy_state(_state->uapi);
>> +if (plane_state->hw.fb)
>> +drm_framebuffer_put(plane_state->hw.fb);
>> kfree(plane_state);
>> }
>>
>> @@ -176,15 +182,44 @@ bool intel_plane_calc_min_cdclk(struct
>> intel_atomic_state *state,
>> return false;
>> }
>>
>> +static void intel_plane_clear_hw_state(struct intel_plane_state
>> *plane_state)
>> +{
>> +if (plane_state->hw.fb)
>> +drm_framebuffer_put(plane_state->hw.fb);
>> +
>> +memset(_state->hw, 0, sizeof(plane_state->hw));
>> +}
>> +
>> +void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state
>> *plane_state,
>> + const struct intel_plane_state
>> *from_plane_state)
>> +{
>> +intel_plane_clear_hw_state(plane_state);
>> +
>> +plane_state->hw.crtc = from_plane_state->uapi.crtc;
>> +plane_state->hw.fb = from_plane_state->uapi.fb;
>> +if (plane_state->hw.fb)
>> +drm_framebuffer_get(plane_state->hw.fb);
>> +
>> +plane_state->hw.alpha = from_plane_state->uapi.alpha;
>> +plane_state->hw.pixel_blend_mode =
>> +from_plane_state->uapi.pixel_blend_mode;
>> +plane_state->hw.rotation = from_plane_state->uapi.rotation;
>> +plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
>> +plane_state->hw.color_range = from_plane_state->uapi.color_range;
>> +}
>> +
>> int intel_plane_atomic_check_with_state(const struct intel_crtc_state
>> *old_crtc_state,
>> struct intel_crtc_state *new_crtc_state,
>> const struct intel_plane_state
>> *old_plane_state,
>> struct intel_plane_state
>> *new_plane_state)
>> {
>> struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
>> -const struct drm_framebuffer *fb = new_plane_state->hw.fb;
>> +const struct drm_framebuffer *fb;
>> int ret;
>>
>> +intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
>> +fb = new_plane_state->hw.fb;
>> +
>> new_crtc_state->active_planes &= ~BIT(plane->id);
>> new_crtc_state->nv12_planes &= ~BIT(plane->id);
>> new_crtc_state->c8_planes &= ~BIT(plane->id);
>> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> index e61e9a82aadf..cdb0f97d09f9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
>> @@ -20,6 +20,8 @@ extern const struct drm_plane_helper_funcs
>> intel_plane_helper_funcs;
>>
>> unsigned int intel_plane_data_rate(const struct intel_crtc_state
>> *crtc_state,
>> const struct intel_plane_state *plane_state);
>> +void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state
>> *plane_state,
>> + const struct intel_plane_state
>> *from_plane_state);
>> void intel_update_plane(struct intel_plane *plane,
>> const struct intel_crtc_state *crtc_state,
>> const struct intel_plane_state *plane_state);
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index 91a059e5fdcb..ed9504d0336e 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++
[Intel-gfx] Unexpected screen flicker during i915 initialization
Hi guys, We have 2 laptops, ASUS Z406MA and Acer TravelMate B118, both powered by the same Intel N5000 GemniLake CPU. On the Acer laptop, the panel will blink once during boot which never happens on the ASUS laptop. It caught my attention and I find the difference between them but I need help for more information, The major difference happens in bxt_sanitize_cdclk() on the following condition check. if (cdctl == expected) /* All well; nothing to sanitize */ return; On the problematic Acer laptop, the value of cdctl is 0x27a while the same cdctl is 0x278 on ASUS machine. Due to the 0x27a is not equal to the expected value 0x278 so it needs to be sanitized by assigning -1 to dev_priv->cdclk.hw.vco. Then the consequent bxt_set_cdclk() will force the full PLL disable and enable. And that's the flicker (blink) we observed during boot. Although I can't find the definition about the BIT(2) of CDCLK_CTL which cause this difference. Can anyone suggest what exactly the problem is and how should we deal with it? Thanks. Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
During startup, we may find ourselves in an interesting position where
we haven't fully enabled RPS before the display starts trying to use it.
This may lead to an imbalance in our "interactive" counter:
<3>[4.813326] intel_rps_mark_interactive:652
GEM_BUG_ON(!rps->power.interactive)
<4>[4.813396] [ cut here ]
<2>[4.813398] kernel BUG at drivers/gpu/drm/i915/gt/intel_rps.c:652!
<4>[4.813430] invalid opcode: [#1] PREEMPT SMP PTI
<4>[4.813438] CPU: 1 PID: 18 Comm: kworker/1:0H Not tainted
5.4.0-rc5-CI-CI_DRM_7209+ #1
<4>[4.813447] Hardware name: /NUC7i5BNB, BIOS
BNKBL357.86A.0054.2017.1025.1822 10/25/2017
<4>[4.813525] Workqueue: events_highpri intel_atomic_cleanup_work [i915]
<4>[4.813589] RIP: 0010:intel_rps_mark_interactive+0xb3/0xc0 [i915]
<4>[4.813597] Code: bc 3f de e0 48 8b 35 84 2e 24 00 49 c7 c0 f3 d4 4e a0
b9 8c 02 00 00 48 c7 c2 80 9c 48 a0 48 c7 c7 3e 73 34 a0 e8 8d 3b e5 e0 <0f> 0b
90 66 2e 0f 1f 84 00 00 00 00 00 80 bf c0 00 00 00 00 74 32
<4>[4.813616] RSP: 0018:c90efe00 EFLAGS: 00010286
<4>[4.813623] RAX: 000e RBX: 8882583cc7f0 RCX:
<4>[4.813631] RDX: 0001 RSI: 0008 RDI:
888275969c00
<4>[4.813639] RBP: R08: 0008 R09:
888275ace000
<4>[4.813646] R10: c90efe00 R11: 888275969c00 R12:
8882583cc8d8
<4>[4.813654] R13: 888276abce00 R14: R15:
88825e878860
<4>[4.813662] FS: () GS:888276a8()
knlGS:
<4>[4.813672] CS: 0010 DS: ES: CR0: 80050033
<4>[4.813678] CR2: 7f051d5ca0a8 CR3: 000262f48001 CR4:
003606e0
<4>[4.813686] Call Trace:
<4>[4.813755] intel_cleanup_plane_fb+0x4e/0x60 [i915]
<4>[4.813764] drm_atomic_helper_cleanup_planes+0x4d/0x70
<4>[4.813833] intel_atomic_cleanup_work+0x15/0x80 [i915]
<4>[4.813842] process_one_work+0x26a/0x620
<4>[4.813850] worker_thread+0x37/0x380
<4>[4.813857] ? process_one_work+0x620/0x620
<4>[4.813864] kthread+0x119/0x130
<4>[4.813870] ? kthread_park+0x80/0x80
<4>[4.813878] ret_from_fork+0x3a/0x50
<4>[4.813887] Modules linked in: i915(+) mei_hdcp x86_pkg_temp_thermal
coretemp crct10dif_pclmul crc32_pclmul btusb btrtl btbcm btintel snd_hda_intel
snd_intel_nhlt snd_hda_codec bluetooth snd_hwdep snd_hda_core
ghash_clmulni_intel snd_pcm e1000e ecdh_generic ecc ptp pps_core mei_me mei
prime_numbers
<4>[4.813934] ---[ end trace c13289af88174ffc ]---
The solution employed is to not worry about RPS state and keep the tally
of the interactive counter separate. When we do enable RPS, we will then
take the display activity into account.
Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management")
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
drivers/gpu/drm/i915/gt/intel_rps.c | 12 ++--
drivers/gpu/drm/i915/gt/intel_rps.h | 1 +
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index f2440113fdf8..898662c158ad 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -26,6 +26,8 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
intel_gt_init_reset(gt);
intel_gt_init_requests(gt);
intel_gt_pm_init_early(gt);
+
+ intel_rps_init_early(>rps);
intel_uc_init_early(>uc);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
index f6de19456c54..20d6ee148afc 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -641,9 +641,6 @@ static void gen6_rps_set_thresholds(struct intel_rps *rps,
u8 val)
void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive)
{
- if (!rps->enabled)
- return;
-
mutex_lock(>power.mutex);
if (interactive) {
if (!rps->power.interactive++ && rps->active)
@@ -1609,16 +1606,19 @@ void gen5_rps_irq_handler(struct intel_rps *rps)
spin_unlock(_lock);
}
-void intel_rps_init(struct intel_rps *rps)
+void intel_rps_init_early(struct intel_rps *rps)
{
- struct drm_i915_private *i915 = rps_to_i915(rps);
-
mutex_init(>lock);
mutex_init(>power.mutex);
INIT_WORK(>work, rps_work);
atomic_set(>num_waiters, 0);
+}
+
+void intel_rps_init(struct intel_rps *rps)
+{
+ struct drm_i915_private *i915 = rps_to_i915(rps);
if (IS_CHERRYVIEW(i915))
chv_rps_init(rps);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h
b/drivers/gpu/drm/i915/gt/intel_rps.h
index 997a4b4e0207..9518c66c9792 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -11,6 +11,7 @@
struct
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Always track callers to intel_rps_mark_interactive() (rev2)
== Series Details == Series: drm/i915/gt: Always track callers to intel_rps_mark_interactive() (rev2) URL : https://patchwork.freedesktop.org/series/68764/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0802e1c1452f drm/i915/gt: Always track callers to intel_rps_mark_interactive() -:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #11: <3>[4.813326] intel_rps_mark_interactive:652 GEM_BUG_ON(!rps->power.interactive) total: 0 errors, 1 warnings, 0 checks, 46 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V6 5/6] virtio: introduce a mdev based transport
This patch introduces a new mdev transport for virtio. This is used to
use kernel virtio driver to drive the mediated device that is capable
of populating virtqueue directly.
A new virtio-mdev driver will be registered to the mdev bus, when a
new virtio-mdev device is probed, it will register the device with
mdev based config ops. This means it is a software transport between
mdev driver and mdev device. The transport was implemented through
device specific ops which is a part of mdev_parent_ops now.
Signed-off-by: Jason Wang
---
drivers/virtio/Kconfig | 7 +
drivers/virtio/Makefile | 1 +
drivers/virtio/virtio_mdev.c | 413 +++
3 files changed, 421 insertions(+)
create mode 100644 drivers/virtio/virtio_mdev.c
diff --git a/drivers/virtio/Kconfig b/drivers/virtio/Kconfig
index 078615cf2afc..8d18722ab572 100644
--- a/drivers/virtio/Kconfig
+++ b/drivers/virtio/Kconfig
@@ -43,6 +43,13 @@ config VIRTIO_PCI_LEGACY
If unsure, say Y.
+config VIRTIO_MDEV_DEVICE
+ tristate "VIRTIO driver for Mediated devices"
+ depends on VFIO_MDEV && VIRTIO
+ default n
+ help
+ VIRTIO based driver for Mediated devices.
+
config VIRTIO_PMEM
tristate "Support for virtio pmem driver"
depends on VIRTIO
diff --git a/drivers/virtio/Makefile b/drivers/virtio/Makefile
index 3a2b5c5dcf46..ebc7fa15ae82 100644
--- a/drivers/virtio/Makefile
+++ b/drivers/virtio/Makefile
@@ -6,3 +6,4 @@ virtio_pci-y := virtio_pci_modern.o virtio_pci_common.o
virtio_pci-$(CONFIG_VIRTIO_PCI_LEGACY) += virtio_pci_legacy.o
obj-$(CONFIG_VIRTIO_BALLOON) += virtio_balloon.o
obj-$(CONFIG_VIRTIO_INPUT) += virtio_input.o
+obj-$(CONFIG_VIRTIO_MDEV_DEVICE) += virtio_mdev.o
diff --git a/drivers/virtio/virtio_mdev.c b/drivers/virtio/virtio_mdev.c
new file mode 100644
index ..3d49072b2d3e
--- /dev/null
+++ b/drivers/virtio/virtio_mdev.c
@@ -0,0 +1,413 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * VIRTIO based driver for Mediated device
+ *
+ * Copyright (c) 2019, Red Hat. All rights reserved.
+ * Author: Jason Wang
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define DRIVER_VERSION "0.1"
+#define DRIVER_AUTHOR "Red Hat Corporation"
+#define DRIVER_DESC "VIRTIO based driver for Mediated device"
+
+#define to_virtio_mdev_device(dev) \
+ container_of(dev, struct virtio_mdev_device, vdev)
+
+struct virtio_mdev_device {
+ struct virtio_device vdev;
+ struct mdev_device *mdev;
+ u64 features;
+
+ /* The lock to protect virtqueue list */
+ spinlock_t lock;
+ /* List of virtio_mdev_vq_info */
+ struct list_head virtqueues;
+};
+
+struct virtio_mdev_vq_info {
+ /* the actual virtqueue */
+ struct virtqueue *vq;
+
+ /* the list node for the virtqueues list */
+ struct list_head node;
+};
+
+static struct mdev_device *vm_get_mdev(struct virtio_device *vdev)
+{
+ struct virtio_mdev_device *vm_dev = to_virtio_mdev_device(vdev);
+ struct mdev_device *mdev = vm_dev->mdev;
+
+ return mdev;
+}
+
+static void virtio_mdev_get(struct virtio_device *vdev, unsigned offset,
+ void *buf, unsigned len)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ ops->get_config(mdev, offset, buf, len);
+}
+
+static void virtio_mdev_set(struct virtio_device *vdev, unsigned offset,
+ const void *buf, unsigned len)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ ops->set_config(mdev, offset, buf, len);
+}
+
+static u32 virtio_mdev_generation(struct virtio_device *vdev)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ if (ops->get_generation)
+ return ops->get_generation(mdev);
+
+ return 0;
+}
+
+static u8 virtio_mdev_get_status(struct virtio_device *vdev)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ return ops->get_status(mdev);
+}
+
+static void virtio_mdev_set_status(struct virtio_device *vdev, u8 status)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ return ops->set_status(mdev, status);
+}
+
+static void virtio_mdev_reset(struct virtio_device *vdev)
+{
+ struct mdev_device *mdev = vm_get_mdev(vdev);
+ const struct virtio_mdev_device_ops *ops = mdev_get_virtio_ops(mdev);
+
+ return ops->set_status(mdev, 0);
+}
+
+static bool virtio_mdev_notify(struct virtqueue *vq)
+{
+ struct mdev_device *mdev =
[Intel-gfx] [PATCH 3/3] drm/i915: Remove i915->kernel_context
Allocate only an internal intel_context for the kernel_context, forgoing
a global GEM context for internal use as we only require a separate
address space (for our own protection).
Now having weaned GT from requiring ce->gem_context, we can stop
referencing it entirely. This also means we no longer have to create random
and unnecessary GEM contexts for internal use.
GEM contexts are now entirely for tracking GEM clients, and intel_context
the execution environment on the GPU.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 91 +---
drivers/gpu/drm/i915/gem/i915_gem_context.h | 6 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 +-
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 6 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 5 +-
.../gpu/drm/i915/gem/selftests/mock_context.c | 11 +-
drivers/gpu/drm/i915/gt/intel_context.c | 32 +---
drivers/gpu/drm/i915/gt/intel_context.h | 4 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 21 +--
drivers/gpu/drm/i915/gt/intel_gt.c| 21 ++-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 7 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 +--
drivers/gpu/drm/i915/gt/intel_lrc.h | 6 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +-
.../gpu/drm/i915/gt/intel_ring_submission.c | 4 +-
drivers/gpu/drm/i915/gt/selftest_context.c| 51 ++-
.../drm/i915/gt/selftest_engine_heartbeat.c | 3 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 29 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c| 137 ++
drivers/gpu/drm/i915/gvt/scheduler.c | 16 +-
drivers/gpu/drm/i915/i915_drv.h | 3 -
drivers/gpu/drm/i915/i915_gem.c | 16 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 8 +-
drivers/gpu/drm/i915/i915_perf.c | 3 -
drivers/gpu/drm/i915/i915_request.c | 50 ---
drivers/gpu/drm/i915/selftests/i915_request.c | 6 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 8 +-
28 files changed, 226 insertions(+), 353 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 455690c80d42..ff9e64c513e7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -170,6 +170,26 @@ lookup_user_engine(struct i915_gem_context *ctx,
return i915_gem_context_get_engine(ctx, idx);
}
+static void intel_context_set_gem(struct intel_context *ce,
+ struct i915_gem_context *ctx)
+{
+ ce->gem_context = ctx;
+
+ ce->ring = __intel_context_ring_size(SZ_16K);
+
+ if (ctx->vm) {
+ i915_vm_put(ce->vm);
+ ce->vm = i915_vm_get(ctx->vm);
+ }
+
+ if (ctx->timeline)
+ ce->timeline = intel_timeline_get(ctx->timeline);
+
+ if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
+ intel_engine_has_semaphores(ce->engine))
+ __set_bit(CONTEXT_USE_SEMAPHORES, >flags);
+}
+
static void __free_engines(struct i915_gem_engines *e, unsigned int count)
{
while (count--) {
@@ -212,12 +232,14 @@ static struct i915_gem_engines *default_engines(struct
i915_gem_context *ctx)
GEM_BUG_ON(engine->legacy_idx >= I915_NUM_ENGINES);
GEM_BUG_ON(e->engines[engine->legacy_idx]);
- ce = intel_context_create(ctx, engine);
+ ce = intel_context_create(engine);
if (IS_ERR(ce)) {
__free_engines(e, e->num_engines + 1);
return ERR_CAST(ce);
}
+ intel_context_set_gem(ce, ctx);
+
e->engines[engine->legacy_idx] = ce;
e->num_engines = max(e->num_engines, engine->legacy_idx);
}
@@ -634,37 +656,6 @@ i915_gem_create_context(struct drm_i915_private *i915,
unsigned int flags)
return ctx;
}
-static void
-destroy_kernel_context(struct i915_gem_context **ctxp)
-{
- struct i915_gem_context *ctx;
-
- /* Keep the context ref so that we can free it immediately ourselves */
- ctx = i915_gem_context_get(fetch_and_zero(ctxp));
- GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
-
- context_close(ctx);
- i915_gem_context_free(ctx);
-}
-
-struct i915_gem_context *
-i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
-{
- struct i915_gem_context *ctx;
-
- ctx = i915_gem_create_context(i915, 0);
- if (IS_ERR(ctx))
- return ctx;
-
- i915_gem_context_clear_bannable(ctx);
- i915_gem_context_set_persistence(ctx);
- ctx->sched.priority = I915_USER_PRIORITY(prio);
-
- GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
-
- return ctx;
-}
-
static void init_contexts(struct i915_gem_contexts *gc)
{
[Intel-gfx] [PATCH 2/3] drm/i915: Push the use-semaphore marker onto the intel_context
Instead of rummaging through the intel_context to peek at the GEM
context in the middle of request submission to decide whether to use
semaphores, store that information on the intel_context itself.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 52 +--
drivers/gpu/drm/i915/gt/intel_context.c | 3 ++
drivers/gpu/drm/i915/gt/intel_context.h | 15 ++
drivers/gpu/drm/i915/gt/intel_context_types.h | 7 +--
drivers/gpu/drm/i915/i915_request.c | 8 ++-
5 files changed, 60 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 412d6c7949b7..455690c80d42 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1778,6 +1778,40 @@ set_persistence(struct i915_gem_context *ctx,
return __context_set_persistence(ctx, args->value);
}
+static void __apply_priority(struct intel_context *ce, void *arg)
+{
+ struct i915_gem_context *ctx = arg;
+
+ if (intel_context_use_semaphores(ce) &&
+ ctx->sched.priority < I915_PRIORITY_NORMAL)
+ intel_context_clear_use_semaphores(ce);
+}
+
+static int set_priority(struct i915_gem_context *ctx,
+ const struct drm_i915_gem_context_param *args)
+{
+ s64 priority = args->value;
+
+ if (args->size)
+ return -EINVAL;
+
+ if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
+ return -ENODEV;
+
+ if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
+ priority < I915_CONTEXT_MIN_USER_PRIORITY)
+ return -EINVAL;
+
+ if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
+ !capable(CAP_SYS_NICE))
+ return -EPERM;
+
+ ctx->sched.priority = I915_USER_PRIORITY(priority);
+ context_apply_all(ctx, __apply_priority, ctx);
+
+ return 0;
+}
+
static int ctx_setparam(struct drm_i915_file_private *fpriv,
struct i915_gem_context *ctx,
struct drm_i915_gem_context_param *args)
@@ -1824,23 +1858,7 @@ static int ctx_setparam(struct drm_i915_file_private
*fpriv,
break;
case I915_CONTEXT_PARAM_PRIORITY:
- {
- s64 priority = args->value;
-
- if (args->size)
- ret = -EINVAL;
- else if (!(ctx->i915->caps.scheduler &
I915_SCHEDULER_CAP_PRIORITY))
- ret = -ENODEV;
- else if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
-priority < I915_CONTEXT_MIN_USER_PRIORITY)
- ret = -EINVAL;
- else if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
-!capable(CAP_SYS_NICE))
- ret = -EPERM;
- else
- ctx->sched.priority =
- I915_USER_PRIORITY(priority);
- }
+ ret = set_priority(ctx, args);
break;
case I915_CONTEXT_PARAM_SSEU:
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c
b/drivers/gpu/drm/i915/gt/intel_context.c
index 625f75f7825d..7075d03f508f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -238,6 +238,9 @@ intel_context_init(struct intel_context *ce,
rcu_read_unlock();
if (ctx->timeline)
ce->timeline = intel_timeline_get(ctx->timeline);
+ if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
+ intel_engine_has_semaphores(engine))
+ __set_bit(CONTEXT_USE_SEMAPHORES, >flags);
ce->engine = engine;
ce->ops = engine->cops;
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h
b/drivers/gpu/drm/i915/gt/intel_context.h
index 1e607343d256..d7b667a26e08 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -155,6 +155,21 @@ static inline struct intel_ring
*__intel_context_ring_size(u64 sz)
return u64_to_ptr(struct intel_ring, sz);
}
+static inline bool intel_context_use_semaphores(const struct intel_context *ce)
+{
+ return test_bit(CONTEXT_USE_SEMAPHORES, >flags);
+}
+
+static inline void intel_context_set_use_semaphores(struct intel_context *ce)
+{
+ set_bit(CONTEXT_USE_SEMAPHORES, >flags);
+}
+
+static inline void intel_context_clear_use_semaphores(struct intel_context *ce)
+{
+ clear_bit(CONTEXT_USE_SEMAPHORES, >flags);
+}
+
static inline bool intel_context_is_banned(const struct intel_context *ce)
{
return test_bit(CONTEXT_BANNED, >flags);
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 0251edc8f568..264c1efde772 100644
---
[Intel-gfx] [PATCH 1/3] drm/i915: Drop GEM context as a direct link from i915_request
Keep the intel_context as being the primary state for i915_request, with
the GEM context a backpointer from the low level state for the rarer
cases we need client information. Our goal is to remove such references
to clients from the backend, and leave the HW submission agnostic to
client interfaces and self-contained.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 +++
drivers/gpu/drm/i915/gem/i915_gem_context.h | 38
.../gpu/drm/i915/gem/i915_gem_context_types.h | 7 +--
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 8 ++--
drivers/gpu/drm/i915/gt/intel_breadcrumbs.c | 4 +-
drivers/gpu/drm/i915/gt/intel_context.c | 2 +-
drivers/gpu/drm/i915/gt/intel_context.h | 42 ++
drivers/gpu/drm/i915/gt/intel_context_types.h | 5 ++-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 6 +--
drivers/gpu/drm/i915/gt/intel_lrc.c | 44 +--
drivers/gpu/drm/i915/gt/intel_reset.c | 38 +---
.../gpu/drm/i915/gt/intel_ring_submission.c | 10 ++---
drivers/gpu/drm/i915/gt/selftest_lrc.c| 20 -
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 6 +--
drivers/gpu/drm/i915/gvt/scheduler.c | 27 +---
drivers/gpu/drm/i915/i915_gem.c | 6 +--
drivers/gpu/drm/i915/i915_gpu_error.c | 11 +++--
drivers/gpu/drm/i915/i915_perf.c | 4 +-
drivers/gpu/drm/i915/i915_request.c | 18
drivers/gpu/drm/i915/i915_request.h | 3 +-
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
21 files changed, 160 insertions(+), 156 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index cbdf2fb32636..412d6c7949b7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -69,6 +69,7 @@
#include
+#include "gt/intel_context.h"
#include "gt/intel_engine_heartbeat.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_lrc_reg.h"
@@ -365,15 +366,6 @@ static void kill_context(struct i915_gem_context *ctx)
struct i915_gem_engines_iter it;
struct intel_context *ce;
- /*
-* If we are already banned, it was due to a guilty request causing
-* a reset and the entire context being evicted from the GPU.
-*/
- if (i915_gem_context_is_banned(ctx))
- return;
-
- i915_gem_context_set_banned(ctx);
-
/*
* Map the user's engine back to the actual engines; one virtual
* engine will be mapped to multiple engines, and using ctx->engine[]
@@ -385,6 +377,9 @@ static void kill_context(struct i915_gem_context *ctx)
struct intel_engine_cs *engine;
struct dma_fence *fence;
+ if (!intel_context_set_banned(ce))
+ continue;
+
if (!ce->timeline)
continue;
@@ -1026,7 +1021,7 @@ static void set_ppgtt_barrier(void *data)
static int emit_ppgtt_update(struct i915_request *rq, void *data)
{
- struct i915_address_space *vm = rq->hw_context->vm;
+ struct i915_address_space *vm = rq->context->vm;
struct intel_engine_cs *engine = rq->engine;
u32 base = engine->mmio_base;
u32 *cs;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.h
b/drivers/gpu/drm/i915/gem/i915_gem_context.h
index 18e50a769a6e..69932899803e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.h
@@ -91,26 +91,6 @@ static inline void i915_gem_context_clear_persistence(struct
i915_gem_context *c
clear_bit(UCONTEXT_PERSISTENCE, >user_flags);
}
-static inline bool i915_gem_context_is_banned(const struct i915_gem_context
*ctx)
-{
- return test_bit(CONTEXT_BANNED, >flags);
-}
-
-static inline void i915_gem_context_set_banned(struct i915_gem_context *ctx)
-{
- set_bit(CONTEXT_BANNED, >flags);
-}
-
-static inline bool i915_gem_context_force_single_submission(const struct
i915_gem_context *ctx)
-{
- return test_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, >flags);
-}
-
-static inline void i915_gem_context_set_force_single_submission(struct
i915_gem_context *ctx)
-{
- __set_bit(CONTEXT_FORCE_SINGLE_SUBMISSION, >flags);
-}
-
static inline bool
i915_gem_context_user_engines(const struct i915_gem_context *ctx)
{
@@ -129,24 +109,6 @@ i915_gem_context_clear_user_engines(struct
i915_gem_context *ctx)
clear_bit(CONTEXT_USER_ENGINES, >flags);
}
-static inline bool
-i915_gem_context_nopreempt(const struct i915_gem_context *ctx)
-{
- return test_bit(CONTEXT_NOPREEMPT, >flags);
-}
-
-static inline void
-i915_gem_context_set_nopreempt(struct i915_gem_context *ctx)
-{
- set_bit(CONTEXT_NOPREEMPT, >flags);
-}
-
-static inline void
-i915_gem_context_clear_nopreempt(struct i915_gem_context *ctx)
-{
-
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()
== Series Details ==
Series: drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()
URL : https://patchwork.freedesktop.org/series/68717/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7211_full -> Patchwork_15050_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15050_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_big_fb@y-tiled-32bpp-rotate-90:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-tglb3/igt@kms_big...@y-tiled-32bpp-rotate-90.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-tglb7/igt@kms_big...@y-tiled-32bpp-rotate-90.html
* igt@perf@disabled-read-error:
- {shard-tglb}: NOTRUN -> [SKIP][3] +1 similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-tglb2/igt@p...@disabled-read-error.html
Known issues
Here are the changes found in Patchwork_15050_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([fdo#108566]) +7
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl7/igt@gem_ctx_isolat...@rcs0-s3.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-kbl2/igt@gem_ctx_isolat...@rcs0-s3.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#110841])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-iclb1/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
* igt@gem_exec_schedule@promotion-bsd1:
- shard-iclb: [PASS][8] -> [SKIP][9] ([fdo#109276]) +13 similar
issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_exec_sched...@promotion-bsd1.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-iclb5/igt@gem_exec_sched...@promotion-bsd1.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][10] -> [SKIP][11] ([fdo#112146]) +5 similar
issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_exec_sched...@reorder-wide-bsd.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-iclb1/igt@gem_exec_sched...@reorder-wide-bsd.html
* igt@gem_linear_blits@normal:
- shard-apl: [PASS][12] -> [INCOMPLETE][13] ([fdo#103927])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl3/igt@gem_linear_bl...@normal.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-apl4/igt@gem_linear_bl...@normal.html
* igt@gem_softpin@softpin:
- shard-iclb: [PASS][14] -> [INCOMPLETE][15] ([fdo#107713] /
[fdo#109100])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb4/igt@gem_soft...@softpin.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-iclb7/igt@gem_soft...@softpin.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-hsw: [PASS][16] -> [DMESG-WARN][17] ([fdo#111870])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw7/igt@gem_userptr_bl...@dmabuf-sync.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-hsw7/igt@gem_userptr_bl...@dmabuf-sync.html
* igt@i915_pm_rpm@modeset-stress-extra-wait:
- shard-glk: [PASS][18] -> [DMESG-WARN][19] ([fdo#105763] /
[fdo#106538])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-glk5/igt@i915_pm_...@modeset-stress-extra-wait.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-glk8/igt@i915_pm_...@modeset-stress-extra-wait.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-skl: [PASS][20] -> [INCOMPLETE][21] ([fdo#110741])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl6/igt@kms_cursor_...@pipe-b-cursor-suspend.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-skl8/igt@kms_cursor_...@pipe-b-cursor-suspend.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-iclb: [PASS][22] -> [DMESG-WARN][23] ([fdo#111764])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@kms_f...@flip-vs-suspend-interruptible.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15050/shard-iclb6/igt@kms_f...@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
-
[Intel-gfx] [PATCH V6 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework
This sample driver creates mdev device that simulate virtio net device
over virtio mdev transport. The device is implemented through vringh
and workqueue. A device specific dma ops is to make sure HVA is used
directly as the IOVA. This should be sufficient for kernel virtio
driver to work.
Only 'virtio' type is supported right now. I plan to add 'vhost' type
on top which requires some virtual IOMMU implemented in this sample
driver.
Signed-off-by: Jason Wang
---
MAINTAINERS| 1 +
samples/Kconfig| 7 +
samples/vfio-mdev/Makefile | 1 +
samples/vfio-mdev/mvnet.c | 691 +
4 files changed, 700 insertions(+)
create mode 100644 samples/vfio-mdev/mvnet.c
diff --git a/MAINTAINERS b/MAINTAINERS
index 9e10ae9c2b4d..8b17927a81fd 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17248,6 +17248,7 @@ F: include/linux/virtio*.h
F: include/uapi/linux/virtio_*.h
F: drivers/crypto/virtio/
F: mm/balloon_compaction.c
+F: samples/vfio-mdev/mvnet.c
VIRTIO BLOCK AND SCSI DRIVERS
M: "Michael S. Tsirkin"
diff --git a/samples/Kconfig b/samples/Kconfig
index c8dacb4dda80..a1a1ca2c00b7 100644
--- a/samples/Kconfig
+++ b/samples/Kconfig
@@ -131,6 +131,13 @@ config SAMPLE_VFIO_MDEV_MDPY
mediated device. It is a simple framebuffer and supports
the region display interface (VFIO_GFX_PLANE_TYPE_REGION).
+config SAMPLE_VIRTIO_MDEV_NET
+tristate "Build virtio mdev net example mediated device sample code --
loadable modules only"
+ depends on VIRTIO_MDEV_DEVICE && VHOST_RING && m
+ help
+ Build a networking sample device for use as a virtio
+ mediated device.
+
config SAMPLE_VFIO_MDEV_MDPY_FB
tristate "Build VFIO mdpy example guest fbdev driver -- loadable module
only"
depends on FB && m
diff --git a/samples/vfio-mdev/Makefile b/samples/vfio-mdev/Makefile
index 10d179c4fdeb..f34af90ed0a0 100644
--- a/samples/vfio-mdev/Makefile
+++ b/samples/vfio-mdev/Makefile
@@ -3,3 +3,4 @@ obj-$(CONFIG_SAMPLE_VFIO_MDEV_MTTY) += mtty.o
obj-$(CONFIG_SAMPLE_VFIO_MDEV_MDPY) += mdpy.o
obj-$(CONFIG_SAMPLE_VFIO_MDEV_MDPY_FB) += mdpy-fb.o
obj-$(CONFIG_SAMPLE_VFIO_MDEV_MBOCHS) += mbochs.o
+obj-$(CONFIG_SAMPLE_VIRTIO_MDEV_NET) += mvnet.o
diff --git a/samples/vfio-mdev/mvnet.c b/samples/vfio-mdev/mvnet.c
new file mode 100644
index ..a2a902d59fb7
--- /dev/null
+++ b/samples/vfio-mdev/mvnet.c
@@ -0,0 +1,691 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Mediated virtual virtio-net device driver.
+ *
+ * Copyright (c) 2019, Red Hat Inc. All rights reserved.
+ * Author: Jason Wang
+ *
+ * Sample driver that creates mdev device that simulates ethernet loopback
+ * device.
+ *
+ * Usage:
+ *
+ * # modprobe virtio_mdev
+ * # modprobe mvnet
+ * # cd /sys/devices/virtual/mvnet/mvnet/mdev_supported_types/mvnet-virtio
+ * # echo "83b8f4f2-509f-382f-3c1e-e6bfe0fa1001" > ./create
+ * # cd devices/83b8f4f2-509f-382f-3c1e-e6bfe0fa1001
+ * # ls -d virtio0
+ * virtio0
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define VERSION_STRING "0.1"
+#define DRIVER_AUTHOR "Red Hat Corporation"
+
+#define MVNET_CLASS_NAME "mvnet"
+#define MVNET_NAME "mvnet"
+
+/*
+ * Global Structures
+ */
+
+static struct mvnet_dev {
+ struct class*vd_class;
+ struct idr vd_idr;
+ struct device dev;
+} mvnet_dev;
+
+struct mvnet_virtqueue {
+ struct vringh vring;
+ struct vringh_kiov iov;
+ unsigned short head;
+ bool ready;
+ u64 desc_addr;
+ u64 device_addr;
+ u64 driver_addr;
+ u32 num;
+ void *private;
+ irqreturn_t (*cb)(void *data);
+};
+
+#define MVNET_QUEUE_ALIGN PAGE_SIZE
+#define MVNET_QUEUE_MAX 256
+#define MVNET_DEVICE_ID 0x1
+#define MVNET_VENDOR_ID 0
+
+u64 mvnet_features = (1ULL << VIRTIO_F_ANY_LAYOUT) |
+(1ULL << VIRTIO_F_VERSION_1) |
+(1ULL << VIRTIO_F_IOMMU_PLATFORM);
+
+/* State of each mdev device */
+struct mvnet_state {
+ struct mvnet_virtqueue vqs[2];
+ struct work_struct work;
+ spinlock_t lock;
+ struct mdev_device *mdev;
+ struct virtio_net_config config;
+ void *buffer;
+ u32 status;
+ u32 generation;
+ u64 features;
+ struct list_head next;
+};
+
+static struct mutex mdev_list_lock;
+static struct list_head mdev_devices_list;
+
+static void mvnet_queue_ready(struct mvnet_state *mvnet, unsigned int idx)
+{
+ struct mvnet_virtqueue *vq = >vqs[idx];
+ int ret;
+
+ ret = vringh_init_kern(>vring, mvnet_features, MVNET_QUEUE_MAX,
+ false, (struct vring_desc *)vq->desc_addr,
+ (struct vring_avail *)vq->driver_addr,
+
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Always track callers to intel_rps_mark_interactive() (rev2)
== Series Details == Series: drm/i915/gt: Always track callers to intel_rps_mark_interactive() (rev2) URL : https://patchwork.freedesktop.org/series/68764/ State : success == Summary == CI Bug Log - changes from CI_DRM_7223 -> Patchwork_15071 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/index.html Known issues Here are the changes found in Patchwork_15071 that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_switch@legacy-render: - fi-bxt-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html * igt@gem_mmap_gtt@basic-write-gtt: - fi-icl-u3: [PASS][3] -> [DMESG-WARN][4] ([fdo#107724]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-icl-u3/igt@gem_mmap_...@basic-write-gtt.html * igt@i915_selftest@live_blt: - fi-hsw-peppy: [PASS][5] -> [DMESG-FAIL][6] ([fdo#112147]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-peppy/igt@i915_selftest@live_blt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-hsw-peppy/igt@i915_selftest@live_blt.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#111045] / [fdo#111096]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html Possible fixes * igt@gem_basic@bad-close: - fi-icl-u3: [DMESG-WARN][9] ([fdo#107724]) -> [PASS][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@gem_ba...@bad-close.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-icl-u3/igt@gem_ba...@bad-close.html * igt@i915_selftest@live_active: - fi-icl-u2: [DMESG-FAIL][11] ([fdo#112045]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u2/igt@i915_selftest@live_active.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-icl-u2/igt@i915_selftest@live_active.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][13] ([fdo#102614]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#112045]: https://bugs.freedesktop.org/show_bug.cgi?id=112045 [fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147 Participating hosts (50 -> 41) -- Missing(9): fi-ilk-m540 fi-bsw-n3050 fi-byt-j1900 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_7223 -> Patchwork_15071 CI-20190529: 20190529 CI_DRM_7223: 4055dfb8f197a9e3450d8f9de79ec0a1c6bbcd22 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5251: 6d30ec2314f22f465113f7a972944fee546ecbd9 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_15071: 0802e1c1452fc3dda52393e591c4524e0397df00 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 0802e1c1452f drm/i915/gt: Always track callers to intel_rps_mark_interactive() == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15071/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/guc: Skip suspend/resume GuC action on platforms w/o GuC submission
On Tue, Oct 29, 2019 at 01:33:22PM +0100, Michal Wajdeczko wrote:
> On Mon, 28 Oct 2019 22:25:27 +0100, wrote:
> > +* we do not need to suspend the GuC but we do need to disable the
> > +* GuC communication on suspend.
> > +*/
> > + if (!guc->submission_supported)
>
> Using submission_supported flag directly can be tricky, as today it
> is always set to false, but in the future it may indicate either that
> submission is supported by the driver/fw and/or enabled by modparam.
>
> There is no guarantee that it will reflect actual runtime status,
> as even supported/unblocked guc submission may fallback to execlists.
>
> We may need something like intel_guc_submission_is_active() that will
> reflect actual mode of submission currently used by the driver.
What about this:
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index ae45651ac73c..acda38a9fec5 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -522,10 +522,19 @@ void intel_uc_runtime_suspend(struct drm_i915_private
*i915)
if (!intel_guc_is_loaded(guc))
return;
+ /*
+* If GuC communication is enabled but submission is not supported,
+* we do not need to suspend the GuC but we do need to disable the
+* GuC communication on suspend.
+*/
+ if (!USES_GUC_SUBMISSION(i915))
+ goto guc_disable_comm;
+
err = intel_guc_suspend(guc);
if (err)
DRM_DEBUG_DRIVER("Failed to suspend GuC, err=%d", err);
+guc_disable_comm:
guc_disable_communication(guc);
}
@@ -551,6 +560,14 @@ int intel_uc_resume(struct drm_i915_private *i915)
guc_enable_communication(guc);
+ /*
+* If GuC communication is enabled but submission is not supported,
+* we do not need to resume the GuC but we do need to enable the
+* GuC communication on resume (above).
+*/
+ if (!USES_GUC_SUBMISSION(i915))
+ return 0;
+
err = intel_guc_resume(guc);
if (err) {
DRM_DEBUG_DRIVER("Failed to resume GuC, err=%d", err);
This is what the backport to stable-5.3 will look like anyway as there's no
submission_supported there. The name "USES_GUC_SUBMISSION" does suggest it
might reflect actual runtime status... :-)
--
Tomáš Janoušek, a.k.a. Pivník, a.k.a. Liskni_si, http://work.lisk.in/
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for mdev based hardware virtio offloading support (rev7)
== Series Details ==
Series: mdev based hardware virtio offloading support (rev7)
URL : https://patchwork.freedesktop.org/series/66989/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7222 -> Patchwork_15067
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/index.html
Known issues
Here are the changes found in Patchwork_15067 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][1] -> [FAIL][2] ([fdo#109483]) +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [INCOMPLETE][3] ([fdo#107713] / [fdo#109100]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* igt@i915_selftest@live_blt:
- fi-bsw-n3050: [DMESG-FAIL][5] -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-bsw-n3050/igt@i915_selftest@live_blt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/fi-bsw-n3050/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_execlists:
- fi-kbl-7500u: [INCOMPLETE][7] -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-kbl-7500u/igt@i915_selftest@live_execlists.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/fi-kbl-7500u/igt@i915_selftest@live_execlists.html
* {igt@i915_selftest@live_gt_timelines}:
- {fi-tgl-u}: [INCOMPLETE][9] ([fdo#111831]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
Participating hosts (50 -> 43)
--
Additional (1): fi-cfl-8109u
Missing(8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7222 -> Patchwork_15067
CI-20190529: 20190529
CI_DRM_7222: 8644d705561f6144142819da036bc3c8edbecd92 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5251: 6d30ec2314f22f465113f7a972944fee546ecbd9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15067: 37ffc610a39e943d4635a5abbd02ec7c58932b65 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
37ffc610a39e docs: sample driver to demonstrate how to implement virtio-mdev
framework
7f94f725f372 virtio: introduce a mdev based transport
f26964d916d1 mdev: introduce virtio device and its device ops
19b3bb0c8c55 mdev: introduce device specific ops
91d56ca65904 modpost: add support for mdev class id
a54b4e12fd9e mdev: class id support
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15067/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gt: Always track callers to intel_rps_mark_interactive()
== Series Details ==
Series: drm/i915/gt: Always track callers to intel_rps_mark_interactive()
URL : https://patchwork.freedesktop.org/series/68764/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7222 -> Patchwork_15069
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15069 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15069, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15069:
### IGT changes ###
Possible regressions
* igt@runner@aborted:
- fi-whl-u: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-whl-u/igt@run...@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-bxt-dsi/igt@run...@aborted.html
- fi-bsw-n3050: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-bsw-n3050/igt@run...@aborted.html
- fi-bsw-kefka: NOTRUN -> [FAIL][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-bsw-kefka/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_15069 that come from known issues:
### IGT changes ###
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [INCOMPLETE][5] ([fdo#107713] / [fdo#109100]) ->
[PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* {igt@i915_selftest@live_gt_timelines}:
- {fi-tgl-u}: [INCOMPLETE][7] ([fdo#111831]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7222/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#111461]: https://bugs.freedesktop.org/show_bug.cgi?id=111461
[fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
[fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
Participating hosts (50 -> 41)
--
Additional (1): fi-cfl-8109u
Missing(10): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-byt-squawks
fi-icl-u2 fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7222 -> Patchwork_15069
CI-20190529: 20190529
CI_DRM_7222: 8644d705561f6144142819da036bc3c8edbecd92 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5251: 6d30ec2314f22f465113f7a972944fee546ecbd9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15069: b642c35d72bb86be5e55f8d544ee2d4237080548 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b642c35d72bb drm/i915/gt: Always track callers to intel_rps_mark_interactive()
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15069/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 04/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2.
Op 29-10-2019 om 14:23 schreef Ville Syrjälä:
> On Tue, Oct 29, 2019 at 08:22:21AM +0100, Maarten Lankhorst wrote:
>> intel_get_load_detect_pipe() needs to set uapi active,
>> uapi enable is set by the call to drm_atomic_set_mode_for_crtc(),
>> so we can remove it.
>>
>> intel_pipe_config_compare() needs to look at hw state, but I didn't
>> change spatch to look at it. It's easy enough to do manually.
>>
>> intel_atomic_check() definitely needs to check for uapi enable,
>> otherwise intel_modeset_pipe_config cannot copy uapi state to hw.
>>
>> Changes since v1:
>> - Actually set uapi.active in get_load_detect_pipe().
>>
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 42 ++--
>> 1 file changed, 21 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index d0df9b24a969..4baa0226abff 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector
>> *connector,
>> goto fail;
>> }
>>
>> -crtc_state->base.active = crtc_state->base.enable = true;
>> +crtc_state->uapi.active = true;
> The fact that load detection broke in ci makes this a bit suspicious.
> But AFAICS it should work.
>
>
> Hmm. Long ago I had a patch to fix something in
> drm_atomic_set_mode_for_crtc()...
> https://patchwork.freedesktop.org/patch/262996/?series=52778=1
>
> Doesn't seem like it should make a difference unless somehow uapi.mode
> is left with the load detect mode but uapi.enable is set to false before
> another call to drm_atomic_set_mode_for_crtc(load_detect_mode).
Ah, I will just put back the base.enable for now then, can fix the core later.
:)
>
>>
>> if (!mode)
>> mode = _detect_mode;
>> @@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> PIPE_CONF_CHECK_X(output_types);
>>
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>>
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
>>
>> PIPE_CONF_CHECK_I(pixel_multiplier);
>> PIPE_CONF_CHECK_I(output_format);
>> @@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>>
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_INTERLACE);
>>
>> if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_PHSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_NHSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_PVSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_NVSYNC);
>> }
>>
>> @@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> bp_gamma =
Re: [Intel-gfx] Unexpected screen flicker during i915 initialization
On Wed, Oct 30, 2019 at 6:25 PM Chris Chiu wrote: > > Hi guys, > We have 2 laptops, ASUS Z406MA and Acer TravelMate B118, both > powered by the same Intel N5000 GemniLake CPU. On the Acer laptop, the > panel will blink once during boot which never happens on the ASUS > laptop. It caught my attention and I find the difference between them > but I need help for more information, Sorry, I forgot to mention that the problem was reproduced on the latest kernel 5.3. Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V6 4/6] mdev: introduce virtio device and its device ops
This patch implements basic support for mdev driver that supports
virtio transport for kernel virtio driver.
Signed-off-by: Jason Wang
---
drivers/vfio/mdev/mdev_core.c| 20
drivers/vfio/mdev/mdev_private.h | 2 +
include/linux/mdev.h | 6 ++
include/linux/virtio_mdev_ops.h | 161 +++
4 files changed, 189 insertions(+)
create mode 100644 include/linux/virtio_mdev_ops.h
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c
index ab6cf5a5ff9f..22ca589750d8 100644
--- a/drivers/vfio/mdev/mdev_core.c
+++ b/drivers/vfio/mdev/mdev_core.c
@@ -76,6 +76,26 @@ const struct vfio_mdev_device_ops *mdev_get_vfio_ops(struct
mdev_device *mdev)
}
EXPORT_SYMBOL(mdev_get_vfio_ops);
+/* Specify the virtio device ops for the mdev device, this
+ * must be called during create() callback for virtio mdev device.
+ */
+void mdev_set_virtio_ops(struct mdev_device *mdev,
+const struct virtio_mdev_device_ops *virtio_ops)
+{
+ mdev_set_class(mdev, MDEV_CLASS_ID_VIRTIO);
+ mdev->virtio_ops = virtio_ops;
+}
+EXPORT_SYMBOL(mdev_set_virtio_ops);
+
+/* Get the virtio device ops for the mdev device. */
+const struct virtio_mdev_device_ops *
+mdev_get_virtio_ops(struct mdev_device *mdev)
+{
+ WARN_ON(mdev->class_id != MDEV_CLASS_ID_VIRTIO);
+ return mdev->virtio_ops;
+}
+EXPORT_SYMBOL(mdev_get_virtio_ops);
+
struct device *mdev_dev(struct mdev_device *mdev)
{
return >dev;
diff --git a/drivers/vfio/mdev/mdev_private.h b/drivers/vfio/mdev/mdev_private.h
index 0770410ded2a..7b47890c34e7 100644
--- a/drivers/vfio/mdev/mdev_private.h
+++ b/drivers/vfio/mdev/mdev_private.h
@@ -11,6 +11,7 @@
#define MDEV_PRIVATE_H
#include
+#include
int mdev_bus_register(void);
void mdev_bus_unregister(void);
@@ -38,6 +39,7 @@ struct mdev_device {
u16 class_id;
union {
const struct vfio_mdev_device_ops *vfio_ops;
+ const struct virtio_mdev_device_ops *virtio_ops;
};
};
diff --git a/include/linux/mdev.h b/include/linux/mdev.h
index 4625f1a11014..9b69b0bbebfd 100644
--- a/include/linux/mdev.h
+++ b/include/linux/mdev.h
@@ -17,6 +17,7 @@
struct mdev_device;
struct vfio_mdev_device_ops;
+struct virtio_mdev_device_ops;
/*
* Called by the parent device driver to set the device which represents
@@ -112,6 +113,10 @@ void mdev_set_class(struct mdev_device *mdev, u16 id);
void mdev_set_vfio_ops(struct mdev_device *mdev,
const struct vfio_mdev_device_ops *vfio_ops);
const struct vfio_mdev_device_ops *mdev_get_vfio_ops(struct mdev_device *mdev);
+void mdev_set_virtio_ops(struct mdev_device *mdev,
+const struct virtio_mdev_device_ops *virtio_ops);
+const struct virtio_mdev_device_ops *
+mdev_get_virtio_ops(struct mdev_device *mdev);
extern struct bus_type mdev_bus_type;
@@ -127,6 +132,7 @@ struct mdev_device *mdev_from_dev(struct device *dev);
enum {
MDEV_CLASS_ID_VFIO = 1,
+ MDEV_CLASS_ID_VIRTIO = 2,
/* New entries must be added here */
};
diff --git a/include/linux/virtio_mdev_ops.h b/include/linux/virtio_mdev_ops.h
new file mode 100644
index ..5fcc17d6044d
--- /dev/null
+++ b/include/linux/virtio_mdev_ops.h
@@ -0,0 +1,161 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Virtio mediated device driver
+ *
+ * Copyright 2019, Red Hat Corp.
+ * Author: Jason Wang
+ */
+#ifndef _LINUX_VIRTIO_MDEV_H
+#define _LINUX_VIRTIO_MDEV_H
+
+#include
+#include
+#include
+
+#define VIRTIO_MDEV_DEVICE_API_STRING "virtio-mdev"
+#define VIRTIO_MDEV_F_VERSION_1 0x1
+
+struct virtio_mdev_callback {
+ irqreturn_t (*callback)(void *data);
+ void *private;
+};
+
+/**
+ * struct vfio_mdev_device_ops - Structure to be registered for each
+ * mdev device to register the device for virtio/vhost drivers.
+ *
+ * The device ops that is supported by VIRTIO_MDEV_F_VERSION_1, the
+ * callbacks are mandatory unless explicity mentioned.
+ *
+ * @get_mdev_features: Get a set of bits that demonstrate
+ * thecapability of the mdev device. New
+ * features bits must be added when
+ * introducing new device ops. This
+ * allows the device ops to be extended
+ * (one feature could have N new ops).
+ * @mdev: mediated device
+ * Returns the mdev features (API) support by
+ * the device.
+ * @set_vq_address:Set the address of virtqueue
+ * @mdev: mediated device
+ * @idx: virtqueue index
+ * @desc_area: address of desc area
+ * @driver_area: address of driver area
+ * @device_area: address of
Re: [Intel-gfx] [PULL] topic/mst-suspend-resume-reprobe-2019-10-29-2
On Tue, Oct 29, 2019 at 11:06 PM Lyude Paul wrote: > > topic/mst-suspend-resume-reprobe-2019-10-29-2: > UAPI Changes: > > Cross-subsystem Changes: > > Core Changes: > * Handle UP requests asynchronously in the DP MST helpers, fixing > hotplug notifications and allowing us to implement suspend/resume > reprobing > * Add basic suspend/resume reprobing to the DP MST helpers > * Improve locking for link address reprobing and connection status > request handling in the DP MST helpers > * Miscellaneous refactoring in the DP MST helpers > * Add a Kconfig option to the DP MST helpers to enable tracking of > gets/puts for topology references for debugging purposes > > Driver Changes: > * nouveau: Resume hotplug interrupts earlier, so that sideband > messages may be transmitted during resume and thus allow > suspend/resume reprobing for DP MST to work > * nouveau: Avoid grabbing runtime PM references when handling short DP > pulses, so that handling sideband messages in resume codepaths with the > DP MST helpers doesn't deadlock us > * i915, nouveau, amdgpu, radeon: Use detect_ctx for probing MST > connectors, so that we can grab the topology manager's atomic lock > > Note: there's some amdgpu patches that I didn't realize were pushed > upstream already when creating this topic branch. When they fail to > apply, you can just ignore and skip them. > The following changes since commit 2e79e22e092acd55da0b2db066e4826d7d152c41: Out of curiosity, why did you go with a topic branch here? Usually we only do those if there's a serious cross-tree coordination problem, that can't be solved with some acks for merging the patches through the unusual tree. Plus then some notes in the pull requests why and who should pull this in. These one here doesn't seem like this is necessary, and the standard approach of stuffing it all into drm-misc-next should be good enough. Also rule of thumb maintainers do the topic branch stuff with merges and prep and everything. I'm also confused with your "when they fail to apply", topic branches are only ever merged, not applied individually. -Daniel > > Merge v5.4-rc4 into drm-next (2019-10-23 12:10:05 +0200) > > are available in the Git repository at: > > git://anongit.freedesktop.org/drm/drm-misc > tags/topic/mst-suspend-resume-reprobe-2019-10-29-2 > > for you to fetch changes up to 12a280c7286857119cf0d88c487f695e3a1c0912: > > drm/dp_mst: Add topology ref history tracking for debugging (2019-10-24 > 14:36:13 -0400) > > > UAPI Changes: > > Cross-subsystem Changes: > > Core Changes: > * Handle UP requests asynchronously in the DP MST helpers, fixing > hotplug notifications and allowing us to implement suspend/resume > reprobing > * Add basic suspend/resume reprobing to the DP MST helpers > * Improve locking for link address reprobing and connection status > request handling in the DP MST helpers > * Miscellaneous refactoring in the DP MST helpers > * Add a Kconfig option to the DP MST helpers to enable tracking of > gets/puts for topology references for debugging purposes > > Driver Changes: > * nouveau: Resume hotplug interrupts earlier, so that sideband > messages may be transmitted during resume and thus allow > suspend/resume reprobing for DP MST to work > * nouveau: Avoid grabbing runtime PM references when handling short DP > pulses, so that handling sideband messages in resume codepaths with the > DP MST helpers doesn't deadlock us > * i915, nouveau, amdgpu, radeon: Use detect_ctx for probing MST > connectors, so that we can grab the topology manager's atomic lock > > Note: there's some amdgpu patches that I didn't realize were pushed > upstream already when creating this topic branch. When they fail to > apply, you can just ignore and skip them. > > > Lyude Paul (14): > drm/dp_mst: Destroy MSTBs asynchronously > drm/dp_mst: Remove PDT teardown in drm_dp_destroy_port() and refactor > drm/dp_mst: Refactor pdt setup/teardown, add more locking > drm/dp_mst: Handle UP requests asynchronously > drm/dp_mst: Add probe_lock > drm/dp_mst: Protect drm_dp_mst_port members with locking > drm/dp_mst: Don't forget to update port->input in > drm_dp_mst_handle_conn_stat() > drm/dp_mst: Lessen indenting in drm_dp_mst_topology_mgr_resume() > drm/nouveau: Don't grab runtime PM refs for HPD IRQs > drm/nouveau: Resume hotplug interrupts earlier > drm/amdgpu: Iterate through DRM connectors correctly > drm/amdgpu/dm: Resume short HPD IRQs before resuming MST topology > drm/dp_mst: Add basic topology reprobing when resuming > drm/dp_mst: Add topology ref history tracking for debugging > > drivers/gpu/drm/Kconfig| 14 + > drivers/gpu/drm/amd/amdgpu/amdgpu_connectors.c | 13 +- >
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
== Series Details ==
Series: series starting with [1/5] drm/i915/gt: Always track callers to
intel_rps_mark_interactive()
URL : https://patchwork.freedesktop.org/series/68770/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7223 -> Patchwork_15072
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_15072:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live_gt_pm}:
- fi-kbl-guc: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-kbl-guc/igt@i915_selftest@live_gt_pm.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-kbl-guc/igt@i915_selftest@live_gt_pm.html
Known issues
Here are the changes found in Patchwork_15072 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live_blt:
- fi-bsw-n3050: [PASS][3] -> [DMESG-FAIL][4] ([fdo#112176])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-bsw-n3050/igt@i915_selftest@live_blt.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-bsw-n3050/igt@i915_selftest@live_blt.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][5] -> [FAIL][6] ([fdo#111407])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-cfl-guc: [PASS][7] -> [INCOMPLETE][8] ([fdo#108126] /
[fdo#108743])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-cfl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-cfl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
- fi-skl-guc: [PASS][9] -> [INCOMPLETE][10] ([fdo#104108] /
[fdo#108743])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-skl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-skl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
- fi-apl-guc: [PASS][11] -> [INCOMPLETE][12] ([fdo#103927] /
[fdo#108743])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-apl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-apl-guc/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
* igt@vgem_basic@create:
- fi-icl-u3: [PASS][13] -> [DMESG-WARN][14] ([fdo#107724])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@vgem_ba...@create.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-icl-u3/igt@vgem_ba...@create.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-u3: [DMESG-WARN][15] ([fdo#107724]) -> [PASS][16] +1
similar issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@gem_ba...@bad-close.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-icl-u3/igt@gem_ba...@bad-close.html
* igt@i915_selftest@live_active:
- fi-icl-u2: [DMESG-FAIL][17] ([fdo#112045]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u2/igt@i915_selftest@live_active.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-icl-u2/igt@i915_selftest@live_active.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][19] ([fdo#102614]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15072/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108126]: https://bugs.freedesktop.org/show_bug.cgi?id=108126
[fdo#108743]: https://bugs.freedesktop.org/show_bug.cgi?id=108743
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#112045]:
[Intel-gfx] [PATCH V6 1/6] mdev: class id support
Mdev bus only supports vfio driver right now, so it doesn't implement
match method. But in the future, we may add drivers other than vfio,
the first driver could be virtio-mdev. This means we need to add
device class id support in bus match method to pair the mdev device
and mdev driver correctly.
So this patch adds id_table to mdev_driver and class_id for mdev
device with the match method for mdev bus.
Signed-off-by: Jason Wang
---
.../driver-api/vfio-mediated-device.rst | 5
drivers/gpu/drm/i915/gvt/kvmgt.c | 1 +
drivers/s390/cio/vfio_ccw_ops.c | 1 +
drivers/s390/crypto/vfio_ap_ops.c | 1 +
drivers/vfio/mdev/mdev_core.c | 16
drivers/vfio/mdev/mdev_driver.c | 25 +++
drivers/vfio/mdev/mdev_private.h | 1 +
drivers/vfio/mdev/vfio_mdev.c | 6 +
include/linux/mdev.h | 8 ++
include/linux/mod_devicetable.h | 8 ++
samples/vfio-mdev/mbochs.c| 1 +
samples/vfio-mdev/mdpy.c | 1 +
samples/vfio-mdev/mtty.c | 1 +
13 files changed, 75 insertions(+)
diff --git a/Documentation/driver-api/vfio-mediated-device.rst
b/Documentation/driver-api/vfio-mediated-device.rst
index 25eb7d5b834b..6709413bee29 100644
--- a/Documentation/driver-api/vfio-mediated-device.rst
+++ b/Documentation/driver-api/vfio-mediated-device.rst
@@ -102,12 +102,14 @@ structure to represent a mediated device's driver::
* @probe: called when new device created
* @remove: called when device removed
* @driver: device driver structure
+ * @id_table: the ids serviced by this driver
*/
struct mdev_driver {
const char *name;
int (*probe) (struct device *dev);
void (*remove) (struct device *dev);
struct device_driverdriver;
+const struct mdev_class_id *id_table;
};
A mediated bus driver for mdev should use this structure in the function calls
@@ -170,6 +172,9 @@ that a driver should use to unregister itself with the mdev
core driver::
extern void mdev_unregister_device(struct device *dev);
+It is also required to specify the class_id in create() callback through::
+
+ int mdev_set_class(struct mdev_device *mdev, u16 id);
Mediated Device Management Interface Through sysfs
==
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 343d79c1cb7e..6420f0dbd31b 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -678,6 +678,7 @@ static int intel_vgpu_create(struct kobject *kobj, struct
mdev_device *mdev)
dev_name(mdev_dev(mdev)));
ret = 0;
+ mdev_set_class(mdev, MDEV_CLASS_ID_VFIO);
out:
return ret;
}
diff --git a/drivers/s390/cio/vfio_ccw_ops.c b/drivers/s390/cio/vfio_ccw_ops.c
index f0d71ab77c50..cf2c013ae32f 100644
--- a/drivers/s390/cio/vfio_ccw_ops.c
+++ b/drivers/s390/cio/vfio_ccw_ops.c
@@ -129,6 +129,7 @@ static int vfio_ccw_mdev_create(struct kobject *kobj,
struct mdev_device *mdev)
private->sch->schid.ssid,
private->sch->schid.sch_no);
+ mdev_set_class(mdev, MDEV_CLASS_ID_VFIO);
return 0;
}
diff --git a/drivers/s390/crypto/vfio_ap_ops.c
b/drivers/s390/crypto/vfio_ap_ops.c
index 5c0f53c6dde7..07c31070afeb 100644
--- a/drivers/s390/crypto/vfio_ap_ops.c
+++ b/drivers/s390/crypto/vfio_ap_ops.c
@@ -343,6 +343,7 @@ static int vfio_ap_mdev_create(struct kobject *kobj, struct
mdev_device *mdev)
list_add(_mdev->node, _dev->mdev_list);
mutex_unlock(_dev->lock);
+ mdev_set_class(mdev, MDEV_CLASS_ID_VFIO);
return 0;
}
diff --git a/drivers/vfio/mdev/mdev_core.c b/drivers/vfio/mdev/mdev_core.c
index b558d4cfd082..d23ca39e3be6 100644
--- a/drivers/vfio/mdev/mdev_core.c
+++ b/drivers/vfio/mdev/mdev_core.c
@@ -45,6 +45,16 @@ void mdev_set_drvdata(struct mdev_device *mdev, void *data)
}
EXPORT_SYMBOL(mdev_set_drvdata);
+/* Specify the class for the mdev device, this must be called during
+ * create() callback.
+ */
+void mdev_set_class(struct mdev_device *mdev, u16 id)
+{
+ WARN_ON(mdev->class_id);
+ mdev->class_id = id;
+}
+EXPORT_SYMBOL(mdev_set_class);
+
struct device *mdev_dev(struct mdev_device *mdev)
{
return >dev;
@@ -324,6 +334,12 @@ int mdev_device_create(struct kobject *kobj,
if (ret)
goto ops_create_fail;
+ if (!mdev->class_id) {
+ ret = -EINVAL;
+ dev_warn(dev, "mdev vendor driver failed to specify device
class\n");
+ goto add_fail;
+ }
+
ret = device_add(>dev);
if (ret)
goto add_fail;
diff --git a/drivers/vfio/mdev/mdev_driver.c
[Intel-gfx] [PATCH V6 2/6] modpost: add support for mdev class id
Add support to parse mdev class id table.
Reviewed-by: Parav Pandit
Signed-off-by: Jason Wang
---
drivers/vfio/mdev/vfio_mdev.c | 2 ++
scripts/mod/devicetable-offsets.c | 3 +++
scripts/mod/file2alias.c | 11 +++
3 files changed, 16 insertions(+)
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
index 38431e9ef7f5..a6641cd8b5a3 100644
--- a/drivers/vfio/mdev/vfio_mdev.c
+++ b/drivers/vfio/mdev/vfio_mdev.c
@@ -125,6 +125,8 @@ static const struct mdev_class_id vfio_id_table[] = {
{ 0 },
};
+MODULE_DEVICE_TABLE(mdev, vfio_id_table);
+
static struct mdev_driver vfio_mdev_driver = {
.name = "vfio_mdev",
.probe = vfio_mdev_probe,
diff --git a/scripts/mod/devicetable-offsets.c
b/scripts/mod/devicetable-offsets.c
index 054405b90ba4..6cbb1062488a 100644
--- a/scripts/mod/devicetable-offsets.c
+++ b/scripts/mod/devicetable-offsets.c
@@ -231,5 +231,8 @@ int main(void)
DEVID(wmi_device_id);
DEVID_FIELD(wmi_device_id, guid_string);
+ DEVID(mdev_class_id);
+ DEVID_FIELD(mdev_class_id, id);
+
return 0;
}
diff --git a/scripts/mod/file2alias.c b/scripts/mod/file2alias.c
index c91eba751804..45f1c22f49be 100644
--- a/scripts/mod/file2alias.c
+++ b/scripts/mod/file2alias.c
@@ -1335,6 +1335,16 @@ static int do_wmi_entry(const char *filename, void
*symval, char *alias)
return 1;
}
+/* looks like: "mdev:cN" */
+static int do_mdev_entry(const char *filename, void *symval, char *alias)
+{
+ DEF_FIELD(symval, mdev_class_id, id);
+
+ sprintf(alias, "mdev:c%02X", id);
+ add_wildcard(alias);
+ return 1;
+}
+
/* Does namelen bytes of name exactly match the symbol? */
static bool sym_is(const char *name, unsigned namelen, const char *symbol)
{
@@ -1407,6 +1417,7 @@ static const struct devtable devtable[] = {
{"typec", SIZE_typec_device_id, do_typec_entry},
{"tee", SIZE_tee_client_device_id, do_tee_entry},
{"wmi", SIZE_wmi_device_id, do_wmi_entry},
+ {"mdev", SIZE_mdev_class_id, do_mdev_entry},
};
/* Create MODULE_ALIAS() statements.
--
2.19.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH V6 3/6] mdev: introduce device specific ops
Currently, except for the create and remove, the rest of
mdev_parent_ops is designed for vfio-mdev driver only and may not help
for kernel mdev driver. With the help of class id, this patch
introduces device specific callbacks inside mdev_device
structure. This allows different set of callback to be used by
vfio-mdev and virtio-mdev.
Signed-off-by: Jason Wang
---
.../driver-api/vfio-mediated-device.rst | 35 +
MAINTAINERS | 1 +
drivers/gpu/drm/i915/gvt/kvmgt.c | 18 ---
drivers/s390/cio/vfio_ccw_ops.c | 18 ---
drivers/s390/crypto/vfio_ap_ops.c | 14 +++--
drivers/vfio/mdev/mdev_core.c | 25 -
drivers/vfio/mdev/mdev_private.h | 5 ++
drivers/vfio/mdev/vfio_mdev.c | 37 ++---
include/linux/mdev.h | 43 ---
include/linux/vfio_mdev_ops.h | 52 +++
samples/vfio-mdev/mbochs.c| 20 ---
samples/vfio-mdev/mdpy.c | 20 ---
samples/vfio-mdev/mtty.c | 18 ---
13 files changed, 206 insertions(+), 100 deletions(-)
create mode 100644 include/linux/vfio_mdev_ops.h
diff --git a/Documentation/driver-api/vfio-mediated-device.rst
b/Documentation/driver-api/vfio-mediated-device.rst
index 6709413bee29..0d8f9e7d7983 100644
--- a/Documentation/driver-api/vfio-mediated-device.rst
+++ b/Documentation/driver-api/vfio-mediated-device.rst
@@ -152,15 +152,6 @@ callbacks per mdev parent device, per mdev type, or any
other categorization.
Vendor drivers are expected to be fully asynchronous in this respect or
provide their own internal resource protection.)
-The callbacks in the mdev_parent_ops structure are as follows:
-
-* open: open callback of mediated device
-* close: close callback of mediated device
-* ioctl: ioctl callback of mediated device
-* read : read emulation callback
-* write: write emulation callback
-* mmap: mmap emulation callback
-
A driver should use the mdev_parent_ops structure in the function call to
register itself with the mdev core driver::
@@ -172,10 +163,34 @@ that a driver should use to unregister itself with the
mdev core driver::
extern void mdev_unregister_device(struct device *dev);
-It is also required to specify the class_id in create() callback through::
+As multiple types of mediated devices may be supported, class id needs
+to be specified in the create callback(). This could be done
+explicitly for the device that does not use on mdev bus for its
+operation through:
int mdev_set_class(struct mdev_device *mdev, u16 id);
+For the device that uses on the mdev bus for its operation, the class
+should provide helper function to set class id and device specific
+ops. E.g for vfio-mdev devices, the function to be called is::
+
+ int mdev_set_vfio_ops(struct mdev_device *mdev,
+ const struct vfio_mdev_ops *vfio_ops);
+
+The class id (set by this function to MDEV_CLASS_ID_VFIO) is used to
+match a device with an mdev driver via its id table. The device
+specific callbacks (specified in *vfio_ops) are obtainable via
+mdev_get_vfio_ops() (for use by the mdev bus driver). A vfio-mdev
+device (class id MDEV_CLASS_ID_VFIO) uses the following
+device-specific ops:
+
+* open: open callback of vfio mediated device
+* close: close callback of vfio mediated device
+* ioctl: ioctl callback of vfio mediated device
+* read : read emulation callback
+* write: write emulation callback
+* mmap: mmap emulation callback
+
Mediated Device Management Interface Through sysfs
==
diff --git a/MAINTAINERS b/MAINTAINERS
index e51a68bf8ca8..9e10ae9c2b4d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17121,6 +17121,7 @@ S: Maintained
F: Documentation/driver-api/vfio-mediated-device.rst
F: drivers/vfio/mdev/
F: include/linux/mdev.h
+F: include/linux/vfio_mdev_ops.h
F: samples/vfio-mdev/
VFIO PLATFORM DRIVER
diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c b/drivers/gpu/drm/i915/gvt/kvmgt.c
index 6420f0dbd31b..c2b7f9dbe4d1 100644
--- a/drivers/gpu/drm/i915/gvt/kvmgt.c
+++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
@@ -42,6 +42,7 @@
#include
#include
#include
+#include
#include
#include
@@ -643,6 +644,8 @@ static void kvmgt_put_vfio_device(void *vgpu)
vfio_device_put(((struct intel_vgpu *)vgpu)->vdev.vfio_device);
}
+static const struct vfio_mdev_device_ops intel_vfio_vgpu_dev_ops;
+
static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
{
struct intel_vgpu *vgpu = NULL;
@@ -678,7 +681,7 @@ static int intel_vgpu_create(struct kobject *kobj, struct
mdev_device *mdev)
dev_name(mdev_dev(mdev)));
ret = 0;
- mdev_set_class(mdev, MDEV_CLASS_ID_VFIO);
+ mdev_set_vfio_ops(mdev, _vfio_vgpu_dev_ops);
Re: [Intel-gfx] [PATCH V5 4/6] mdev: introduce virtio device and its device ops
On 10/29/2019 6:42 PM, Jason Wang wrote:
On 2019/10/29 下午3:42, Zhu Lingshan wrote:
+ void (*set_status)(struct mdev_device *mdev, u8 status);
Hi Jason
Is it possible to make set_status() return an u8 or bool, because this
may fail in real hardware. Without a returned code, I am not sure
whether it is a good idea to set the status | NEED_RESET when fail.
Thanks,
BR
Zhu Lingshan
Hi:
It's possible but I'm not sure whether any user will care about it. E.g
see virtio_add_status():
void virtio_add_status(struct virtio_device *dev, unsigned int status)
{
might_sleep();
dev->config->set_status(dev, dev->config->get_status(dev) | status);
}
EXPORT_SYMBOL_GPL(virtio_add_status);
And I believe how it work should be:
virtio_add_status(xyz);
status = virtio_get_status();
if (!(status & xyz))
error;
Thanks
Thanks Jason, then I believe upper layer can handle this well.
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2.
Op 29-10-2019 om 19:35 schreef Ville Syrjälä:
> On Tue, Oct 29, 2019 at 08:22:18AM +0100, Maarten Lankhorst wrote:
>> Use this in all the places where we try to acquire planes after the planes
>> atomic_check().
>>
>> In case of intel_modeset_all_pipes() this is not yet done after atomic_check,
>> but seems like it will be in the future. To add some paranoia, add all planes
>> rather than active planes, because of bigjoiner and planar YUV support having
>> extra planes outside of the core's view that wouldn't be added otherwise.
>>
>> Changes since v1:
>> - Always add all planes, to handle force plane updates to work correctly
>> with a disabled cursor plane.
>>
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/display/intel_atomic.c | 41 +--
>> .../gpu/drm/i915/display/intel_atomic_plane.c | 15 +++
>> drivers/gpu/drm/i915/display/intel_cdclk.c| 15 ---
>> drivers/gpu/drm/i915/display/intel_color.c| 7 ++--
>> .../drm/i915/display/intel_display_types.h| 6 +++
>> drivers/gpu/drm/i915/intel_pm.c | 14 ---
>> 6 files changed, 62 insertions(+), 36 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
>> b/drivers/gpu/drm/i915/display/intel_atomic.c
>> index 9cd6d2348a1e..80df6c233581 100644
>> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
>> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
>> @@ -313,13 +313,10 @@ int intel_atomic_setup_scalers(struct drm_i915_private
>> *dev_priv,
>> struct intel_crtc *intel_crtc,
>> struct intel_crtc_state *crtc_state)
>> {
>> -struct drm_plane *plane = NULL;
>> -struct intel_plane *intel_plane;
>> -struct intel_plane_state *plane_state = NULL;
>> struct intel_crtc_scaler_state *scaler_state =
>> _state->scaler_state;
>> struct drm_atomic_state *drm_state = crtc_state->base.state;
>> -struct intel_atomic_state *intel_state =
>> to_intel_atomic_state(drm_state);
>> +struct intel_atomic_state *state = to_intel_atomic_state(drm_state);
>> int num_scalers_need;
>> int i;
>>
>> @@ -346,6 +343,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private
>> *dev_priv,
>>
>> /* walkthrough scaler_users bits and start assigning scalers */
>> for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
>> +struct intel_plane_state *plane_state = NULL;
>> int *scaler_id;
>> const char *name;
>> int idx;
>> @@ -361,19 +359,16 @@ int intel_atomic_setup_scalers(struct drm_i915_private
>> *dev_priv,
>> /* panel fitter case: assign as a crtc scaler */
>> scaler_id = _state->scaler_id;
>> } else {
>> -name = "PLANE";
>> +struct intel_plane *plane;
>>
>> /* plane scaler case: assign as a plane scaler */
>> /* find the plane that set the bit as scaler_user */
>> -plane = drm_state->planes[i].ptr;
>>
>> /*
>> * to enable/disable hq mode, add planes that are using
>> scaler
>> * into this transaction
>> */
>> -if (!plane) {
>> -struct drm_plane_state *state;
>> -
>> +if (!drm_state->planes[i].ptr) {
>> /*
>> * GLK+ scalers don't have a HQ mode so it
>> * isn't necessary to change between HQ and dyn
>> mode
>> @@ -382,24 +377,28 @@ int intel_atomic_setup_scalers(struct drm_i915_private
>> *dev_priv,
>> if (INTEL_GEN(dev_priv) >= 10 ||
>> IS_GEMINILAKE(dev_priv))
>> continue;
>>
>> -plane = drm_plane_from_index(_priv->drm, i);
>> -state = drm_atomic_get_plane_state(drm_state,
>> plane);
>> -if (IS_ERR(state)) {
>> -DRM_DEBUG_KMS("Failed to add [PLANE:%d]
>> to drm_state\n",
>> -plane->base.id);
>> -return PTR_ERR(state);
>> +plane =
>> to_intel_plane(drm_plane_from_index(_priv->drm, i));
>> +plane_state =
>> +
>> intel_atomic_get_plane_state_after_check(state,
>> +
>> crtc_state,
>> +
>> plane);
>> +if (IS_ERR(plane_state)) {
>> +DRM_DEBUG_KMS("Failed to add [PLANE:%d]
>> to drm_state: %li\n",
>> +
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Drop GEM context as a direct link from i915_request
== Series Details == Series: series starting with [1/3] drm/i915: Drop GEM context as a direct link from i915_request URL : https://patchwork.freedesktop.org/series/68769/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7223 -> Patchwork_15070 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_15070 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_15070, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_15070: ### IGT changes ### Possible regressions * igt@i915_selftest@live_gt_contexts: - fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-blb-e6850/igt@i915_selftest@live_gt_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-blb-e6850/igt@i915_selftest@live_gt_contexts.html - fi-bwr-2160:[PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-bwr-2160/igt@i915_selftest@live_gt_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-bwr-2160/igt@i915_selftest@live_gt_contexts.html - fi-hsw-peppy: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-peppy/igt@i915_selftest@live_gt_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-hsw-peppy/igt@i915_selftest@live_gt_contexts.html - fi-snb-2520m: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-snb-2520m/igt@i915_selftest@live_gt_contexts.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-snb-2520m/igt@i915_selftest@live_gt_contexts.html - fi-ilk-650: [PASS][9] -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-ilk-650/igt@i915_selftest@live_gt_contexts.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-ilk-650/igt@i915_selftest@live_gt_contexts.html - fi-ivb-3770:[PASS][11] -> [INCOMPLETE][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-ivb-3770/igt@i915_selftest@live_gt_contexts.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-ivb-3770/igt@i915_selftest@live_gt_contexts.html - fi-hsw-4770:[PASS][13] -> [INCOMPLETE][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-4770/igt@i915_selftest@live_gt_contexts.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-hsw-4770/igt@i915_selftest@live_gt_contexts.html * igt@runner@aborted: - fi-ilk-650: NOTRUN -> [FAIL][15] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-ilk-650/igt@run...@aborted.html - fi-pnv-d510:NOTRUN -> [FAIL][16] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-pnv-d510/igt@run...@aborted.html - fi-gdg-551: NOTRUN -> [FAIL][17] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-gdg-551/igt@run...@aborted.html - fi-blb-e6850: NOTRUN -> [FAIL][18] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-blb-e6850/igt@run...@aborted.html - fi-elk-e7500: NOTRUN -> [FAIL][19] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-elk-e7500/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_15070 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live_execlists: - fi-cfl-8700k: [PASS][20] -> [DMESG-FAIL][21] ([fdo#112046]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-cfl-8700k/igt@i915_selftest@live_execlists.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-cfl-8700k/igt@i915_selftest@live_execlists.html - fi-icl-u2: [PASS][22] -> [DMESG-FAIL][23] ([fdo#112046]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u2/igt@i915_selftest@live_execlists.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-icl-u2/igt@i915_selftest@live_execlists.html - fi-skl-guc: [PASS][24] -> [DMESG-FAIL][25] ([fdo#112046]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-skl-guc/igt@i915_selftest@live_execlists.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15070/fi-skl-guc/igt@i915_selftest@live_execlists.html - fi-cfl-guc: [PASS][26] -> [DMESG-FAIL][27] ([fdo#112046]) [26]:
Re: [Intel-gfx] [PATCH v2 2/5] drm/dsi: add missing DSI data types
> -Original Message-
> From: Jani Nikula
> Sent: Monday, October 28, 2019 8:31 PM
> To: dri-de...@lists.freedesktop.org
> Cc: intel-gfx@lists.freedesktop.org; Nikula, Jani ;
> Kulkarni, Vandita
> Subject: [PATCH v2 2/5] drm/dsi: add missing DSI data types
>
> Add execute queue and compressed pixel stream packet data types for
> completeness.
>
> Cc: Vandita Kulkarni
Looks good to me.
Reviewed-by: Vandita Kulkarni
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_mipi_dsi.c | 2 ++
> include/video/mipi_display.h | 2 ++
> 2 files changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_mipi_dsi.c
> b/drivers/gpu/drm/drm_mipi_dsi.c index f237d80828c3..3f33f02571fd
> 100644
> --- a/drivers/gpu/drm/drm_mipi_dsi.c
> +++ b/drivers/gpu/drm/drm_mipi_dsi.c
> @@ -388,6 +388,7 @@ bool mipi_dsi_packet_format_is_short(u8 type)
> case MIPI_DSI_DCS_SHORT_WRITE:
> case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
> case MIPI_DSI_DCS_READ:
> + case MIPI_DSI_EXECUTE_QUEUE:
> case MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE:
> return true;
> }
> @@ -411,6 +412,7 @@ bool mipi_dsi_packet_format_is_long(u8 type)
> case MIPI_DSI_GENERIC_LONG_WRITE:
> case MIPI_DSI_DCS_LONG_WRITE:
> case MIPI_DSI_PICTURE_PARAMETER_SET:
> + case MIPI_DSI_COMPRESSED_PIXEL_STREAM:
> case MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20:
> case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24:
> case MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16:
> diff --git a/include/video/mipi_display.h b/include/video/mipi_display.h
> index 79fd71cf4934..6b6390dfa203 100644
> --- a/include/video/mipi_display.h
> +++ b/include/video/mipi_display.h
> @@ -37,6 +37,7 @@ enum {
> MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
>
> MIPI_DSI_DCS_READ = 0x06,
> + MIPI_DSI_EXECUTE_QUEUE = 0x16,
>
> MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE =
> 0x37,
>
> @@ -46,6 +47,7 @@ enum {
> MIPI_DSI_DCS_LONG_WRITE = 0x39,
>
> MIPI_DSI_PICTURE_PARAMETER_SET = 0x0a,
> + MIPI_DSI_COMPRESSED_PIXEL_STREAM= 0x0b,
>
> MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20= 0x0c,
> MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24= 0x1c,
> --
> 2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
During startup, we may find ourselves in an interesting position where
we haven't fully enabled RPS before the display starts trying to use it.
This may lead to an imbalance in our "interactive" counter:
<3>[4.813326] intel_rps_mark_interactive:652
GEM_BUG_ON(!rps->power.interactive)
<4>[4.813396] [ cut here ]
<2>[4.813398] kernel BUG at drivers/gpu/drm/i915/gt/intel_rps.c:652!
<4>[4.813430] invalid opcode: [#1] PREEMPT SMP PTI
<4>[4.813438] CPU: 1 PID: 18 Comm: kworker/1:0H Not tainted
5.4.0-rc5-CI-CI_DRM_7209+ #1
<4>[4.813447] Hardware name: /NUC7i5BNB, BIOS
BNKBL357.86A.0054.2017.1025.1822 10/25/2017
<4>[4.813525] Workqueue: events_highpri intel_atomic_cleanup_work [i915]
<4>[4.813589] RIP: 0010:intel_rps_mark_interactive+0xb3/0xc0 [i915]
<4>[4.813597] Code: bc 3f de e0 48 8b 35 84 2e 24 00 49 c7 c0 f3 d4 4e a0
b9 8c 02 00 00 48 c7 c2 80 9c 48 a0 48 c7 c7 3e 73 34 a0 e8 8d 3b e5 e0 <0f> 0b
90 66 2e 0f 1f 84 00 00 00 00 00 80 bf c0 00 00 00 00 74 32
<4>[4.813616] RSP: 0018:c90efe00 EFLAGS: 00010286
<4>[4.813623] RAX: 000e RBX: 8882583cc7f0 RCX:
<4>[4.813631] RDX: 0001 RSI: 0008 RDI:
888275969c00
<4>[4.813639] RBP: R08: 0008 R09:
888275ace000
<4>[4.813646] R10: c90efe00 R11: 888275969c00 R12:
8882583cc8d8
<4>[4.813654] R13: 888276abce00 R14: R15:
88825e878860
<4>[4.813662] FS: () GS:888276a8()
knlGS:
<4>[4.813672] CS: 0010 DS: ES: CR0: 80050033
<4>[4.813678] CR2: 7f051d5ca0a8 CR3: 000262f48001 CR4:
003606e0
<4>[4.813686] Call Trace:
<4>[4.813755] intel_cleanup_plane_fb+0x4e/0x60 [i915]
<4>[4.813764] drm_atomic_helper_cleanup_planes+0x4d/0x70
<4>[4.813833] intel_atomic_cleanup_work+0x15/0x80 [i915]
<4>[4.813842] process_one_work+0x26a/0x620
<4>[4.813850] worker_thread+0x37/0x380
<4>[4.813857] ? process_one_work+0x620/0x620
<4>[4.813864] kthread+0x119/0x130
<4>[4.813870] ? kthread_park+0x80/0x80
<4>[4.813878] ret_from_fork+0x3a/0x50
<4>[4.813887] Modules linked in: i915(+) mei_hdcp x86_pkg_temp_thermal
coretemp crct10dif_pclmul crc32_pclmul btusb btrtl btbcm btintel snd_hda_intel
snd_intel_nhlt snd_hda_codec bluetooth snd_hwdep snd_hda_core
ghash_clmulni_intel snd_pcm e1000e ecdh_generic ecc ptp pps_core mei_me mei
prime_numbers
<4>[4.813934] ---[ end trace c13289af88174ffc ]---
The solution employed is to not worry about RPS state and keep the tally
of the interactive counter separate. When we do enable RPS, we will then
take the display activity into account.
Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management")
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_rps.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
index f6de19456c54..62447e521af0 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -641,9 +641,6 @@ static void gen6_rps_set_thresholds(struct intel_rps *rps,
u8 val)
void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive)
{
- if (!rps->enabled)
- return;
-
mutex_lock(>power.mutex);
if (interactive) {
if (!rps->power.interactive++ && rps->active)
--
2.24.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Always track callers to intel_rps_mark_interactive()
== Series Details == Series: drm/i915/gt: Always track callers to intel_rps_mark_interactive() URL : https://patchwork.freedesktop.org/series/68764/ State : warning == Summary == $ dim checkpatch origin/drm-tip b642c35d72bb drm/i915/gt: Always track callers to intel_rps_mark_interactive() -:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #11: <3>[4.813326] intel_rps_mark_interactive:652 GEM_BUG_ON(!rps->power.interactive) total: 0 errors, 1 warnings, 0 checks, 9 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
During startup, we may find ourselves in an interesting position where
we haven't fully enabled RPS before the display starts trying to use it.
This may lead to an imbalance in our "interactive" counter:
<3>[4.813326] intel_rps_mark_interactive:652
GEM_BUG_ON(!rps->power.interactive)
<4>[4.813396] [ cut here ]
<2>[4.813398] kernel BUG at drivers/gpu/drm/i915/gt/intel_rps.c:652!
<4>[4.813430] invalid opcode: [#1] PREEMPT SMP PTI
<4>[4.813438] CPU: 1 PID: 18 Comm: kworker/1:0H Not tainted
5.4.0-rc5-CI-CI_DRM_7209+ #1
<4>[4.813447] Hardware name: /NUC7i5BNB, BIOS
BNKBL357.86A.0054.2017.1025.1822 10/25/2017
<4>[4.813525] Workqueue: events_highpri intel_atomic_cleanup_work [i915]
<4>[4.813589] RIP: 0010:intel_rps_mark_interactive+0xb3/0xc0 [i915]
<4>[4.813597] Code: bc 3f de e0 48 8b 35 84 2e 24 00 49 c7 c0 f3 d4 4e a0
b9 8c 02 00 00 48 c7 c2 80 9c 48 a0 48 c7 c7 3e 73 34 a0 e8 8d 3b e5 e0 <0f> 0b
90 66 2e 0f 1f 84 00 00 00 00 00 80 bf c0 00 00 00 00 74 32
<4>[4.813616] RSP: 0018:c90efe00 EFLAGS: 00010286
<4>[4.813623] RAX: 000e RBX: 8882583cc7f0 RCX:
<4>[4.813631] RDX: 0001 RSI: 0008 RDI:
888275969c00
<4>[4.813639] RBP: R08: 0008 R09:
888275ace000
<4>[4.813646] R10: c90efe00 R11: 888275969c00 R12:
8882583cc8d8
<4>[4.813654] R13: 888276abce00 R14: R15:
88825e878860
<4>[4.813662] FS: () GS:888276a8()
knlGS:
<4>[4.813672] CS: 0010 DS: ES: CR0: 80050033
<4>[4.813678] CR2: 7f051d5ca0a8 CR3: 000262f48001 CR4:
003606e0
<4>[4.813686] Call Trace:
<4>[4.813755] intel_cleanup_plane_fb+0x4e/0x60 [i915]
<4>[4.813764] drm_atomic_helper_cleanup_planes+0x4d/0x70
<4>[4.813833] intel_atomic_cleanup_work+0x15/0x80 [i915]
<4>[4.813842] process_one_work+0x26a/0x620
<4>[4.813850] worker_thread+0x37/0x380
<4>[4.813857] ? process_one_work+0x620/0x620
<4>[4.813864] kthread+0x119/0x130
<4>[4.813870] ? kthread_park+0x80/0x80
<4>[4.813878] ret_from_fork+0x3a/0x50
<4>[4.813887] Modules linked in: i915(+) mei_hdcp x86_pkg_temp_thermal
coretemp crct10dif_pclmul crc32_pclmul btusb btrtl btbcm btintel snd_hda_intel
snd_intel_nhlt snd_hda_codec bluetooth snd_hwdep snd_hda_core
ghash_clmulni_intel snd_pcm e1000e ecdh_generic ecc ptp pps_core mei_me mei
prime_numbers
<4>[4.813934] ---[ end trace c13289af88174ffc ]---
The solution employed is to not worry about RPS state and keep the tally
of the interactive counter separate. When we do enable RPS, we will then
take the display activity into account.
Fixes: 3e7abf814193 ("drm/i915: Extract GT render power state management")
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt.c | 2 ++
drivers/gpu/drm/i915/gt/intel_rps.c | 12 ++--
drivers/gpu/drm/i915/gt/intel_rps.h | 1 +
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index f2440113fdf8..898662c158ad 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -26,6 +26,8 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
intel_gt_init_reset(gt);
intel_gt_init_requests(gt);
intel_gt_pm_init_early(gt);
+
+ intel_rps_init_early(>rps);
intel_uc_init_early(>uc);
}
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c
b/drivers/gpu/drm/i915/gt/intel_rps.c
index f6de19456c54..20d6ee148afc 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -641,9 +641,6 @@ static void gen6_rps_set_thresholds(struct intel_rps *rps,
u8 val)
void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive)
{
- if (!rps->enabled)
- return;
-
mutex_lock(>power.mutex);
if (interactive) {
if (!rps->power.interactive++ && rps->active)
@@ -1609,16 +1606,19 @@ void gen5_rps_irq_handler(struct intel_rps *rps)
spin_unlock(_lock);
}
-void intel_rps_init(struct intel_rps *rps)
+void intel_rps_init_early(struct intel_rps *rps)
{
- struct drm_i915_private *i915 = rps_to_i915(rps);
-
mutex_init(>lock);
mutex_init(>power.mutex);
INIT_WORK(>work, rps_work);
atomic_set(>num_waiters, 0);
+}
+
+void intel_rps_init(struct intel_rps *rps)
+{
+ struct drm_i915_private *i915 = rps_to_i915(rps);
if (IS_CHERRYVIEW(i915))
chv_rps_init(rps);
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.h
b/drivers/gpu/drm/i915/gt/intel_rps.h
index 997a4b4e0207..9518c66c9792 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.h
+++ b/drivers/gpu/drm/i915/gt/intel_rps.h
@@ -11,6 +11,7 @@
struct
[Intel-gfx] [PATCH 4/5] drm/i915/gt: Move user_forcewake application to GT
We already track the debugfs user_forcewake on the GT, so it is natural
to pull the suspend/resume handling under gt/ as well.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 22 --
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 22 ++
2 files changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 64dd04ae3d57..6779ab34101b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -11,24 +11,6 @@
#include "i915_drv.h"
-static void user_forcewake(struct intel_gt *gt, bool suspend)
-{
- int count = atomic_read(>user_wakeref);
-
- /* Inside suspend/resume so single threaded, no races to worry about. */
- if (likely(!count))
- return;
-
- intel_gt_pm_get(gt);
- if (suspend) {
- GEM_BUG_ON(count > atomic_read(>wakeref.count));
- atomic_sub(count, >wakeref.count);
- } else {
- atomic_add(count, >wakeref.count);
- }
- intel_gt_pm_put(gt);
-}
-
void i915_gem_suspend(struct drm_i915_private *i915)
{
GEM_TRACE("\n");
@@ -36,8 +18,6 @@ void i915_gem_suspend(struct drm_i915_private *i915)
intel_wakeref_auto(>ggtt.userfault_wakeref, 0);
flush_workqueue(i915->wq);
- user_forcewake(>gt, true);
-
/*
* We have to flush all the executing contexts to main memory so
* that they can saved in the hibernation image. To ensure the last
@@ -132,8 +112,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
if (intel_gt_resume(>gt))
goto err_wedged;
- user_forcewake(>gt, false);
-
out_unlock:
intel_uncore_forcewake_put(>uncore, FORCEWAKE_ALL);
return;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 1679f4f78d65..11661de8c40b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -18,6 +18,24 @@
#include "intel_rps.h"
#include "intel_wakeref.h"
+static void user_forcewake(struct intel_gt *gt, bool suspend)
+{
+ int count = atomic_read(>user_wakeref);
+
+ /* Inside suspend/resume so single threaded, no races to worry about. */
+ if (likely(!count))
+ return;
+
+ intel_gt_pm_get(gt);
+ if (suspend) {
+ GEM_BUG_ON(count > atomic_read(>wakeref.count));
+ atomic_sub(count, >wakeref.count);
+ } else {
+ atomic_add(count, >wakeref.count);
+ }
+ intel_gt_pm_put(gt);
+}
+
static int __gt_unpark(struct intel_wakeref *wf)
{
struct intel_gt *gt = container_of(wf, typeof(*gt), wakeref);
@@ -210,6 +228,8 @@ int intel_gt_resume(struct intel_gt *gt)
intel_uc_resume(>uc);
+ user_forcewake(gt, false);
+
intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
intel_gt_pm_put(gt);
@@ -233,6 +253,8 @@ void intel_gt_suspend(struct intel_gt *gt)
{
intel_wakeref_t wakeref;
+ user_forcewake(gt, true);
+
/* We expect to be idle already; but also want to be independent */
wait_for_idle(gt);
--
2.24.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/5] drm/i915: Defer rc6 shutdown to suspend_late
Currently we shutdown rc6 during i915_gem_resume() but this is called
during the preparation phase (i915_drm_prepare) for all suspend paths,
but we only want to shutdown rc6 for S3+. Move the actual shutdown to
i915_gem_suspend_late().
We then need to differentiate between suspend targets, to distinguish S0
(s2idle) where the device is kept awake but needs to be in a low power
mode (the same as runtime suspend) from the device suspend levels where
we lose control of HW and so must disable any HW access to dangling
memory.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909
Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
Testcase: igt/gem_exec_suspend/power-S0
Signed-off-by: Chris Wilson
Cc: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 4 +++-
drivers/gpu/drm/i915/gt/intel_gt_pm.c| 30 +++-
drivers/gpu/drm/i915/gt/intel_gt_pm.h| 3 ++-
drivers/gpu/drm/i915/gt/intel_rc6.c | 5
drivers/gpu/drm/i915/gt/selftest_gt_pm.c | 2 +-
5 files changed, 35 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 6779ab34101b..f88ee1317bb4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -27,7 +27,7 @@ void i915_gem_suspend(struct drm_i915_private *i915)
* state. Fortunately, the kernel_context is disposable and we do
* not rely on its state.
*/
- intel_gt_suspend(>gt);
+ intel_gt_suspend_prepare(>gt);
i915_gem_drain_freed_objects(i915);
}
@@ -69,6 +69,8 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
* machine in an unusable condition.
*/
+ intel_gt_suspend_late(>gt);
+
spin_lock_irqsave(>mm.obj_lock, flags);
for (phase = phases; *phase; phase++) {
LIST_HEAD(keep);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 11661de8c40b..09f59acf5e63 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -4,6 +4,8 @@
* Copyright © 2019 Intel Corporation
*/
+#include
+
#include "i915_drv.h"
#include "i915_globals.h"
#include "i915_params.h"
@@ -236,8 +238,13 @@ int intel_gt_resume(struct intel_gt *gt)
return err;
}
-static void wait_for_idle(struct intel_gt *gt)
+void intel_gt_suspend_prepare(struct intel_gt *gt)
{
+ if (!intel_gt_pm_is_awake(gt))
+ return;
+
+ user_forcewake(gt, true);
+
if (intel_gt_wait_for_idle(gt, I915_GEM_IDLE_TIMEOUT) == -ETIME) {
/*
* Forcibly cancel outstanding work and leave
@@ -247,18 +254,29 @@ static void wait_for_idle(struct intel_gt *gt)
}
intel_gt_pm_wait_for_idle(gt);
+
+ intel_uc_suspend(>uc);
}
-void intel_gt_suspend(struct intel_gt *gt)
+void intel_gt_suspend_late(struct intel_gt *gt)
{
intel_wakeref_t wakeref;
- user_forcewake(gt, true);
-
/* We expect to be idle already; but also want to be independent */
- wait_for_idle(gt);
+ intel_gt_suspend_prepare(gt);
- intel_uc_suspend(>uc);
+ /*
+* On disabling the device, we want to turn off HW access to memory
+* that we no longer own.
+*
+* However, not all suspend-states disable the device. S0 (s2idle)
+* is effectively runtime-suspend, the device is left powered on
+* but needs to be put into a low power state. We need to keep
+* powermanagement enabled, but we also retain system state and so
+* it remains safe to keep on using our allocated memory.
+*/
+ if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE)
+ return;
with_intel_runtime_pm(gt->uncore->rpm, wakeref) {
intel_rps_disable(>rps);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index d924c984c74d..b3e17399be9b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -43,8 +43,9 @@ void intel_gt_pm_fini(struct intel_gt *gt);
void intel_gt_sanitize(struct intel_gt *gt, bool force);
+void intel_gt_suspend_prepare(struct intel_gt *gt);
+void intel_gt_suspend_late(struct intel_gt *gt);
int intel_gt_resume(struct intel_gt *gt);
-void intel_gt_suspend(struct intel_gt *gt);
void intel_gt_runtime_suspend(struct intel_gt *gt);
int intel_gt_runtime_resume(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c
b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 70f0e01a38b9..5ad4a92a9582 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -525,6 +525,11 @@ void intel_rc6_init(struct intel_rc6 *rc6)
void intel_rc6_sanitize(struct intel_rc6 *rc6)
{
+ if (rc6->enabled) { /* unbalanced suspend/resume */
+ rpm_get(rc6);
+
[Intel-gfx] [PATCH 2/5] drm/i915/gt: Call intel_gt_sanitize() directly
Assume all responsibility for operating on the HW to sanitize the GT
state upon load/resume in intel_gt_sanitize() itself.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c| 5 ---
drivers/gpu/drm/i915/gt/intel_gt.c| 6 ++-
drivers/gpu/drm/i915/gt/intel_gt.h| 2 +-
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 36 +-
drivers/gpu/drm/i915/i915_drv.c | 8 +---
drivers/gpu/drm/i915/i915_drv.h | 2 -
drivers/gpu/drm/i915/i915_gem.c | 37 ---
drivers/gpu/drm/i915/selftests/i915_gem.c | 1 -
.../gpu/drm/i915/selftests/mock_gem_device.c | 1 -
drivers/gpu/drm/i915/selftests/mock_gtt.c | 3 +-
10 files changed, 43 insertions(+), 58 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index c99bb94fe41e..e2ee9c04ece8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -74,7 +74,6 @@ void i915_gem_suspend(struct drm_i915_private *i915)
* not rely on its state.
*/
intel_gt_suspend(>gt);
- intel_uc_suspend(>gt.uc);
i915_gem_drain_freed_objects(i915);
}
@@ -140,8 +139,6 @@ void i915_gem_suspend_late(struct drm_i915_private *i915)
list_splice_tail(, *phase);
}
spin_unlock_irqrestore(>mm.obj_lock, flags);
-
- i915_gem_sanitize(i915);
}
void i915_gem_resume(struct drm_i915_private *i915)
@@ -161,8 +158,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
if (intel_gt_resume(>gt))
goto err_wedged;
- intel_uc_resume(>gt.uc);
-
/* Always reload a context for powersaving. */
if (!switch_to_kernel_context_sync(>gt))
goto err_wedged;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 898662c158ad..4c26daf7ee46 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -31,9 +31,11 @@ void intel_gt_init_early(struct intel_gt *gt, struct
drm_i915_private *i915)
intel_uc_init_early(>uc);
}
-void intel_gt_init_hw_early(struct drm_i915_private *i915)
+void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt)
{
- i915->gt.ggtt = >ggtt;
+ gt->ggtt = ggtt;
+
+ intel_gt_sanitize(gt, false);
}
static void init_unused_ring(struct intel_gt *gt, u32 base)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h
b/drivers/gpu/drm/i915/gt/intel_gt.h
index 5b6effed3713..5436f8c30708 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -28,7 +28,7 @@ static inline struct intel_gt *huc_to_gt(struct intel_huc
*huc)
}
void intel_gt_init_early(struct intel_gt *gt, struct drm_i915_private *i915);
-void intel_gt_init_hw_early(struct drm_i915_private *i915);
+void intel_gt_init_hw_early(struct intel_gt *gt, struct i915_ggtt *ggtt);
int __must_check intel_gt_init_hw(struct intel_gt *gt);
int intel_gt_init(struct intel_gt *gt);
void intel_gt_driver_register(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 32becf15d4e0..1679f4f78d65 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -118,8 +118,22 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
{
struct intel_engine_cs *engine;
enum intel_engine_id id;
+ intel_wakeref_t wakeref;
- GEM_TRACE("\n");
+ GEM_TRACE("force:%s\n", yesno(force));
+
+ /* Use a raw wakeref to avoid calling intel_display_power_get early */
+ wakeref = intel_runtime_pm_get(gt->uncore->rpm);
+ intel_uncore_forcewake_get(gt->uncore, FORCEWAKE_ALL);
+
+ /*
+* As we have just resumed the machine and woken the device up from
+* deep PCI sleep (presumably D3_cold), assume the HW has been reset
+* back to defaults, recovering from whatever wedged state we left it
+* in and so worth trying to use the device once more.
+*/
+ if (intel_gt_is_wedged(gt))
+ intel_gt_unset_wedged(gt);
intel_uc_sanitize(>uc);
@@ -127,6 +141,8 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
if (engine->reset.prepare)
engine->reset.prepare(engine);
+ intel_uc_reset_prepare(>uc);
+
if (reset_engines(gt) || force) {
for_each_engine(engine, gt, id)
__intel_engine_reset(engine, false);
@@ -135,6 +151,9 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
for_each_engine(engine, gt, id)
if (engine->reset.finish)
engine->reset.finish(engine);
+
+ intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
+ intel_runtime_pm_put(gt->uncore->rpm, wakeref);
}
void intel_gt_pm_fini(struct
[Intel-gfx] [PATCH 3/5] drm/i915/gem: Leave reloading kernel context on resume to GT
As we already do reload the kernel context in intel_gt_resume, repeating
that action inside i915_gem_resume() as well is redundant.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_pm.c | 30 --
1 file changed, 30 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index e2ee9c04ece8..64dd04ae3d57 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -11,32 +11,6 @@
#include "i915_drv.h"
-static bool switch_to_kernel_context_sync(struct intel_gt *gt)
-{
- bool result = !intel_gt_is_wedged(gt);
-
- if (intel_gt_wait_for_idle(gt, I915_GEM_IDLE_TIMEOUT) == -ETIME) {
- /* XXX hide warning from gem_eio */
- if (i915_modparams.reset) {
- dev_err(gt->i915->drm.dev,
- "Failed to idle engines, declaring wedged!\n");
- GEM_TRACE_DUMP();
- }
-
- /*
-* Forcibly cancel outstanding work and leave
-* the gpu quiet.
-*/
- intel_gt_set_wedged(gt);
- result = false;
- }
-
- if (intel_gt_pm_wait_for_idle(gt))
- result = false;
-
- return result;
-}
-
static void user_forcewake(struct intel_gt *gt, bool suspend)
{
int count = atomic_read(>user_wakeref);
@@ -158,10 +132,6 @@ void i915_gem_resume(struct drm_i915_private *i915)
if (intel_gt_resume(>gt))
goto err_wedged;
- /* Always reload a context for powersaving. */
- if (!switch_to_kernel_context_sync(>gt))
- goto err_wedged;
-
user_forcewake(>gt, false);
out_unlock:
--
2.24.0.rc1
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
== Series Details == Series: series starting with [1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive() URL : https://patchwork.freedesktop.org/series/68770/ State : warning == Summary == $ dim checkpatch origin/drm-tip 62347effd8e0 drm/i915/gt: Always track callers to intel_rps_mark_interactive() -:11: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #11: <3>[4.813326] intel_rps_mark_interactive:652 GEM_BUG_ON(!rps->power.interactive) total: 0 errors, 1 warnings, 0 checks, 46 lines checked ffbcda201db9 drm/i915/gt: Call intel_gt_sanitize() directly 1572a210a9a8 drm/i915/gem: Leave reloading kernel context on resume to GT fbe8724a2f25 drm/i915/gt: Move user_forcewake application to GT 546534e93a37 drm/i915: Defer rc6 shutdown to suspend_late ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/dp: Increase link status size
== Series Details ==
Series: drm/dp: Increase link status size
URL : https://patchwork.freedesktop.org/series/68721/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7211_full -> Patchwork_15051_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15051_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@perf@oa-formats:
- {shard-tglb}: NOTRUN -> [SKIP][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-tglb5/igt@p...@oa-formats.html
Known issues
Here are the changes found in Patchwork_15051_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][2] -> [SKIP][3] ([fdo#110841])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-iclb1/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
* igt@gem_exec_schedule@promotion-bsd1:
- shard-iclb: [PASS][4] -> [SKIP][5] ([fdo#109276]) +15 similar
issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb2/igt@gem_exec_sched...@promotion-bsd1.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-iclb5/igt@gem_exec_sched...@promotion-bsd1.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#112146]) +3 similar
issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb6/igt@gem_exec_sched...@reorder-wide-bsd.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-iclb1/igt@gem_exec_sched...@reorder-wide-bsd.html
* igt@gem_exec_suspend@basic-s3:
- shard-kbl: [PASS][8] -> [DMESG-WARN][9] ([fdo#108566]) +7
similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-kbl2/igt@gem_exec_susp...@basic-s3.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-kbl3/igt@gem_exec_susp...@basic-s3.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-snb: [PASS][10] -> [FAIL][11] ([fdo#112037])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb2/igt@gem_persistent_rel...@forked-interruptible-thrashing.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-snb2/igt@gem_persistent_rel...@forked-interruptible-thrashing.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-hsw: [PASS][12] -> [DMESG-WARN][13] ([fdo#111870]) +1
similar issue
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-hsw4/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-hsw6/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-snb: [PASS][14] -> [DMESG-WARN][15] ([fdo#111870])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-snb7/igt@gem_userptr_bl...@sync-unmap-after-close.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-snb6/igt@gem_userptr_bl...@sync-unmap-after-close.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][16] -> [DMESG-WARN][17] ([fdo#108566]) +4
similar issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl2/igt@gem_workarou...@suspend-resume-context.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-apl4/igt@gem_workarou...@suspend-resume-context.html
* igt@i915_pm_rpm@universal-planes-dpms:
- shard-apl: [PASS][18] -> [INCOMPLETE][19] ([fdo#103927]) +1
similar issue
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-apl2/igt@i915_pm_...@universal-planes-dpms.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-apl3/igt@i915_pm_...@universal-planes-dpms.html
* igt@kms_color@pipe-b-ctm-0-5:
- shard-skl: [PASS][20] -> [DMESG-WARN][21] ([fdo#106107])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-skl1/igt@kms_co...@pipe-b-ctm-0-5.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15051/shard-skl8/igt@kms_co...@pipe-b-ctm-0-5.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-iclb: [PASS][22] -> [DMESG-WARN][23] ([fdo#111764])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7211/shard-iclb7/igt@kms_f...@flip-vs-suspend-interruptible.html
[23]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for mdev based hardware virtio offloading support (rev7)
== Series Details == Series: mdev based hardware virtio offloading support (rev7) URL : https://patchwork.freedesktop.org/series/66989/ State : warning == Summary == $ dim checkpatch origin/drm-tip a54b4e12fd9e mdev: class id support 91d56ca65904 modpost: add support for mdev class id 19b3bb0c8c55 mdev: introduce device specific ops -:258: CHECK:LINE_SPACING: Please don't use multiple blank lines #258: FILE: drivers/vfio/mdev/mdev_core.c:48: + -:263: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a separate line #263: FILE: drivers/vfio/mdev/mdev_core.c:51: + * provided by each class. */ -:500: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #500: new file mode 100644 total: 0 errors, 2 warnings, 1 checks, 620 lines checked f26964d916d1 mdev: introduce virtio device and its device ops -:94: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #94: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 225 lines checked 7f94f725f372 virtio: introduce a mdev based transport -:26: WARNING:CONFIG_DESCRIPTION: please write a paragraph that describes the config symbol fully #26: FILE: drivers/virtio/Kconfig:46: +config VIRTIO_MDEV_DEVICE -:46: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #46: new file mode 100644 -:106: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #106: FILE: drivers/virtio/virtio_mdev.c:56: +static void virtio_mdev_get(struct virtio_device *vdev, unsigned offset, -:107: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #107: FILE: drivers/virtio/virtio_mdev.c:57: + void *buf, unsigned len) -:115: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #115: FILE: drivers/virtio/virtio_mdev.c:65: +static void virtio_mdev_set(struct virtio_device *vdev, unsigned offset, -:116: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #116: FILE: drivers/virtio/virtio_mdev.c:66: + const void *buf, unsigned len) -:186: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #186: FILE: drivers/virtio/virtio_mdev.c:136: +virtio_mdev_setup_vq(struct virtio_device *vdev, unsigned index, -:265: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #265: FILE: drivers/virtio/virtio_mdev.c:215: + +} -:297: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #297: FILE: drivers/virtio/virtio_mdev.c:247: +static int virtio_mdev_find_vqs(struct virtio_device *vdev, unsigned nvqs, total: 0 errors, 8 warnings, 1 checks, 430 lines checked 37ffc610a39e docs: sample driver to demonstrate how to implement virtio-mdev framework -:39: WARNING:CONFIG_DESCRIPTION: please write a paragraph that describes the config symbol fully #39: FILE: samples/Kconfig:134: +config SAMPLE_VIRTIO_MDEV_NET -:59: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #59: new file mode 100644 -:147: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment #147: FILE: samples/vfio-mdev/mvnet.c:84: + spinlock_t lock; -:180: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #180: FILE: samples/vfio-mdev/mvnet.c:117: + vringh_init_kern(>vring, mvnet_features, MVNET_QUEUE_MAX, + false, 0, 0, 0); -:285: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!addr" #285: FILE: samples/vfio-mdev/mvnet.c:222: + if (addr == NULL) -:288: CHECK:SPACING: No space is necessary after a cast #288: FILE: samples/vfio-mdev/mvnet.c:225: + *dma_addr = (dma_addr_t) addr; -:318: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*mvnet)...) over kzalloc(sizeof(struct mvnet_state)...) #318: FILE: samples/vfio-mdev/mvnet.c:255: + mvnet = kzalloc(sizeof(struct mvnet_state), GFP_KERNEL); -:319: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!mvnet" #319: FILE: samples/vfio-mdev/mvnet.c:256: + if (mvnet == NULL) -:375: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #375: FILE: samples/vfio-mdev/mvnet.c:312: +sample_mvnet_dev_show(struct device *dev, struct device_attribute *attr, +char *buf) total: 0 errors, 2 warnings, 7 checks, 715 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/lmem: add the fake lmem region
Quoting Matthew Auld (2019-10-29 16:51:34)
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 21273b516dbe..db1736d95651 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1483,6 +1483,21 @@ int i915_driver_probe(struct pci_dev *pdev, const
> struct pci_device_id *ent)
> if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
> dev_priv->drm.driver_features &= ~DRIVER_ATOMIC;
>
> + /*
> +* Check if we support fake LMEM -- for now we only unleash this for
> +* the live selftests.
> +*/
> + if (IS_ENABLED(CONFIG_DRM_I915_UNSTABLE)) {
The pattern I have in mind for unstable config options was to add
config DRM_I915_UNSTABLE_FAKE_LMEM
bool "Enable the experimental fake lmem"
depends on DRM_I915_UNSTABLE
default n
help
Convert some system memory into a fake local memory region for
testing.
So each is isolated and less likely to cross-contanimate.
> + if (INTEL_GEN(dev_priv) >= 9 && i915_selftest.live &&
Probably want i915_selftest.live < 0 so that we only enable it for
selftest-and-exit rather than inline selftests that keep the module
loaded afterwards
i915_selftest.live=0 => no tests
i915_selftest.live=-1 => test and exit
i915_selftest.live=1 => test and run userspace
> + i915_modparams.fake_lmem_start) {
> + mkwrite_device_info(dev_priv)->memory_regions =
> + REGION_SMEM | REGION_LMEM | REGION_STOLEN;
> + mkwrite_device_info(dev_priv)->is_dgfx = true;
> + GEM_BUG_ON(!HAS_LMEM(dev_priv));
> + GEM_BUG_ON(!IS_DGFX(dev_priv));
> + }
> + }
> +
> +struct intel_memory_region *
> +intel_setup_fake_lmem(struct drm_i915_private *i915)
> +{
> + struct pci_dev *pdev = i915->drm.pdev;
> + struct intel_memory_region *mem;
> + resource_size_t mappable_end;
> + resource_size_t io_start;
> + resource_size_t start;
> +
> + GEM_BUG_ON(i915_ggtt_has_aperture(>ggtt));
> + GEM_BUG_ON(!i915_modparams.fake_lmem_start);
> +
> + /* Your mappable aperture belongs to me now! */
> + mappable_end = pci_resource_len(pdev, 2);
> + io_start = pci_resource_start(pdev, 2),
> + start = i915_modparams.fake_lmem_start;
> +
> + mem = intel_memory_region_create(i915,
> +start,
> +mappable_end,
> +PAGE_SIZE,
> +io_start,
> +_region_lmem_ops);
> + if (!IS_ERR(mem)) {
> + DRM_INFO("Intel graphics fake LMEM: %pR\n", >region);
> + DRM_INFO("Intel graphics fake LMEM IO start: %llx\n",
> +(u64)mem->io_start);
> + DRM_INFO("Intel graphics fake LMEM size: %llx\n",
> +(u64)resource_size(>region));
Ok, as this is unstable and therefore dev-centric I'll let you off
having clear user information.
resource_size_t => %pa
Remember to make BAT happy!
-Chris
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/perf: ensure selftests select valid format
== Series Details ==
Series: drm/i915/perf: ensure selftests select valid format
URL : https://patchwork.freedesktop.org/series/68723/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7213_full -> Patchwork_15052_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15052_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_rotation_crc@multiplane-rotation:
- {shard-tglb}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-tglb8/igt@kms_rotation_...@multiplane-rotation.html
Known issues
Here are the changes found in Patchwork_15052_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@drm_import_export@prime:
- shard-apl: [PASS][2] -> [INCOMPLETE][3] ([fdo#103927])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-apl2/igt@drm_import_exp...@prime.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-apl6/igt@drm_import_exp...@prime.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([fdo#108566]) +7
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-kbl3/igt@gem_ctx_isolat...@rcs0-s3.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-kbl2/igt@gem_ctx_isolat...@rcs0-s3.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [PASS][6] -> [SKIP][7] ([fdo#109276]) +13 similar
issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-iclb2/igt@gem_exec_sched...@preempt-contexts-bsd2.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-iclb5/igt@gem_exec_sched...@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@wide-bsd:
- shard-iclb: [PASS][8] -> [SKIP][9] ([fdo#112146]) +5 similar
issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-iclb6/igt@gem_exec_sched...@wide-bsd.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-iclb4/igt@gem_exec_sched...@wide-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [PASS][10] -> [DMESG-WARN][11] ([fdo#111870])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-hsw6/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-hsw1/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
* igt@i915_selftest@live_hangcheck:
- shard-hsw: [PASS][12] -> [DMESG-FAIL][13] ([fdo#111991])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-hsw6/igt@i915_selftest@live_hangcheck.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-hsw7/igt@i915_selftest@live_hangcheck.html
* igt@kms_busy@extended-modeset-hang-newfb-render-a:
- shard-hsw: [PASS][14] -> [INCOMPLETE][15] ([fdo#103540])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-hsw1/igt@kms_b...@extended-modeset-hang-newfb-render-a.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-hsw5/igt@kms_b...@extended-modeset-hang-newfb-render-a.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][16] -> [FAIL][17] ([fdo#105363])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-glk6/igt@kms_f...@flip-vs-expired-vblank.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-glk3/igt@kms_f...@flip-vs-expired-vblank.html
* igt@kms_flip_tiling@flip-changes-tiling-yf:
- shard-skl: [PASS][18] -> [FAIL][19] ([fdo#108303])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-skl9/igt@kms_flip_til...@flip-changes-tiling-yf.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-skl4/igt@kms_flip_til...@flip-changes-tiling-yf.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
- shard-iclb: [PASS][20] -> [FAIL][21] ([fdo#103167]) +2 similar
issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7213/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15052/shard-iclb1/igt@kms_frontbuffer_track...@fbc-1p-primscrn-shrfb-msflip-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][22] -> [DMESG-WARN][23] ([fdo#108566]) +2
similar issues
[22]:
[Intel-gfx] [PATCH] drm/i915: Remove i915->kernel_context
Allocate only an internal intel_context for the kernel_context, forgoing
a global GEM context for internal use as we only require a separate
address space (for our own protection).
Now having weaned GT from requiring ce->gem_context, we can stop
referencing it entirely. This also means we no longer have to create random
and unnecessary GEM contexts for internal use.
GEM contexts are now entirely for tracking GEM clients, and intel_context
the execution environment on the GPU.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 91 +---
drivers/gpu/drm/i915/gem/i915_gem_context.h | 6 +-
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 +-
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 6 +-
.../drm/i915/gem/selftests/i915_gem_context.c | 5 +-
.../gpu/drm/i915/gem/selftests/mock_context.c | 11 +-
drivers/gpu/drm/i915/gt/intel_context.c | 32 +---
drivers/gpu/drm/i915/gt/intel_context.h | 4 +-
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 21 +--
drivers/gpu/drm/i915/gt/intel_gt.c| 21 ++-
drivers/gpu/drm/i915/gt/intel_gt_types.h | 7 +
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 +--
drivers/gpu/drm/i915/gt/intel_lrc.h | 6 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 6 +-
.../gpu/drm/i915/gt/intel_ring_submission.c | 4 +-
drivers/gpu/drm/i915/gt/selftest_context.c| 59 +++-
.../drm/i915/gt/selftest_engine_heartbeat.c | 3 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 29 ++--
drivers/gpu/drm/i915/gt/selftest_lrc.c| 137 ++
drivers/gpu/drm/i915/gvt/scheduler.c | 16 +-
drivers/gpu/drm/i915/i915_drv.h | 3 -
drivers/gpu/drm/i915/i915_gem.c | 16 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 8 +-
drivers/gpu/drm/i915/i915_perf.c | 3 -
drivers/gpu/drm/i915/i915_request.c | 5 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 6 +-
.../gpu/drm/i915/selftests/mock_gem_device.c | 8 +-
28 files changed, 211 insertions(+), 331 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 455690c80d42..ff9e64c513e7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -170,6 +170,26 @@ lookup_user_engine(struct i915_gem_context *ctx,
return i915_gem_context_get_engine(ctx, idx);
}
+static void intel_context_set_gem(struct intel_context *ce,
+ struct i915_gem_context *ctx)
+{
+ ce->gem_context = ctx;
+
+ ce->ring = __intel_context_ring_size(SZ_16K);
+
+ if (ctx->vm) {
+ i915_vm_put(ce->vm);
+ ce->vm = i915_vm_get(ctx->vm);
+ }
+
+ if (ctx->timeline)
+ ce->timeline = intel_timeline_get(ctx->timeline);
+
+ if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
+ intel_engine_has_semaphores(ce->engine))
+ __set_bit(CONTEXT_USE_SEMAPHORES, >flags);
+}
+
static void __free_engines(struct i915_gem_engines *e, unsigned int count)
{
while (count--) {
@@ -212,12 +232,14 @@ static struct i915_gem_engines *default_engines(struct
i915_gem_context *ctx)
GEM_BUG_ON(engine->legacy_idx >= I915_NUM_ENGINES);
GEM_BUG_ON(e->engines[engine->legacy_idx]);
- ce = intel_context_create(ctx, engine);
+ ce = intel_context_create(engine);
if (IS_ERR(ce)) {
__free_engines(e, e->num_engines + 1);
return ERR_CAST(ce);
}
+ intel_context_set_gem(ce, ctx);
+
e->engines[engine->legacy_idx] = ce;
e->num_engines = max(e->num_engines, engine->legacy_idx);
}
@@ -634,37 +656,6 @@ i915_gem_create_context(struct drm_i915_private *i915,
unsigned int flags)
return ctx;
}
-static void
-destroy_kernel_context(struct i915_gem_context **ctxp)
-{
- struct i915_gem_context *ctx;
-
- /* Keep the context ref so that we can free it immediately ourselves */
- ctx = i915_gem_context_get(fetch_and_zero(ctxp));
- GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
-
- context_close(ctx);
- i915_gem_context_free(ctx);
-}
-
-struct i915_gem_context *
-i915_gem_context_create_kernel(struct drm_i915_private *i915, int prio)
-{
- struct i915_gem_context *ctx;
-
- ctx = i915_gem_create_context(i915, 0);
- if (IS_ERR(ctx))
- return ctx;
-
- i915_gem_context_clear_bannable(ctx);
- i915_gem_context_set_persistence(ctx);
- ctx->sched.priority = I915_USER_PRIORITY(prio);
-
- GEM_BUG_ON(!i915_gem_context_is_kernel(ctx));
-
- return ctx;
-}
-
static void init_contexts(struct i915_gem_contexts *gc)
{
Re: [Intel-gfx] pcm_lock deadlock
On Wed, 30 Oct 2019 14:50:09 +0100,
Ville Syrjälä wrote:
>
> On Tue, Oct 29, 2019 at 09:52:57PM +0100, Takashi Iwai wrote:
> > On Tue, 29 Oct 2019 20:10:50 +0100,
> > From: Takashi Iwai
> > Subject: [PATCH] ALSA: hda - Fix mutex deadlock in HDMI codec driver
> >
> > The commit ade49db337a9 ("ALSA: hda/hdmi - Allow audio component for
> > AMD/ATI and Nvidia HDMI") introduced the spec->pcm_lock mutex lock to
> > the whole generic_hdmi_init() function for avoiding the race with the
> > audio component registration. However, this caused a dead lock when
> > the unsolicited event is handled without the audio component, as the
> > codec gets runtime-resumed in hdmi_present_sense() which is already
> > inside the spec->pcm_lock in its caller.
> >
> > For avoiding this deadlock, add a new mutex only for the audio
> > component binding that is used in both generic_hdmi_init() and the
> > audio notifier registration where the jack callbacks are handled /
> > re-registered.
> >
> > Fixes: ade49db337a9 ("ALSA: hda/hdmi - Allow audio component for AMD/ATI
> > and Nvidia HDMI")
> > Reported-by: Ville Syrjälä
> > Signed-off-by: Takashi Iwai
> > ---
> > sound/pci/hda/patch_hdmi.c | 9 +
> > 1 file changed, 5 insertions(+), 4 deletions(-)
> >
> > diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
> > index 795cbda32cbb..d9b5ba361409 100644
> > --- a/sound/pci/hda/patch_hdmi.c
> > +++ b/sound/pci/hda/patch_hdmi.c
> > @@ -145,6 +145,7 @@ struct hdmi_spec {
> > struct snd_array pins; /* struct hdmi_spec_per_pin */
> > struct hdmi_pcm pcm_rec[16];
> > struct mutex pcm_lock;
> > + struct mutex bind_lock; /* for audio component binding */
>
> Missing mutex_init() for this guy.
Ouch, fixed now.
> Tested-by: Ville Syrjälä
Thanks for quick testing. Now pushed out the right version.
I'll include this to the next pull request to 5.4-rc.
Takashi
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Re: [Intel-gfx] [PATCH] drm/i915: Stop frobbing crtc->base.mode
Op 29-10-2019 om 15:55 schreef Ville Syrjala:
> From: Ville Syrjälä
>
> The core no longer uses drm_crtc_state::mode with atomic drivers,
> so let's stop frobbing it in the driver. For the user mode readout
> we'll just use an on stack mode.
>
> Signed-off-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e56a75c07043..96f76abb2d37 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14127,9 +14127,6 @@ static void intel_pipe_fastset(const struct
> intel_crtc_state *old_crtc_state,
> struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>
> - /* drm_atomic_helper_update_legacy_modeset_state might not be called. */
> - crtc->base.mode = new_crtc_state->base.mode;
> -
> /*
>* Update pipe size and adjust fitter if needed: the reason for this is
>* that in compute_mode_changes we check the native mode (not the pfit
> @@ -17394,13 +17391,16 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
> struct intel_plane *plane;
> int min_cdclk = 0;
>
> - memset(>base.mode, 0, sizeof(crtc->base.mode));
> if (crtc_state->base.active) {
> - intel_mode_from_pipe_config(>base.mode,
> crtc_state);
> - crtc->base.mode.hdisplay = crtc_state->pipe_src_w;
> - crtc->base.mode.vdisplay = crtc_state->pipe_src_h;
> -
> intel_mode_from_pipe_config(_state->base.adjusted_mode, crtc_state);
> - WARN_ON(drm_atomic_set_mode_for_crtc(_state->base,
> >base.mode));
> + struct drm_display_mode mode;
> +
> +
> intel_mode_from_pipe_config(_state->base.adjusted_mode,
> + crtc_state);
> +
> + mode = crtc_state->base.adjusted_mode;
> + mode.hdisplay = crtc_state->pipe_src_w;
> + mode.vdisplay = crtc_state->pipe_src_h;
> + WARN_ON(drm_atomic_set_mode_for_crtc(_state->base,
> ));
>
> /*
>* The initial mode needs to be set in order to keep
Hey,
We used to do this not for the core, but because i915 still used
crtc->base.mode in some cases. I guess we no longer do, so this is fine.
Reviewed-by: Maarten Lankhorst
~Maarten
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3.
== Series Details ==
Series: series starting with [CI,01/12] drm/i915: Handle a few more cases for
crtc hw/uapi split, v3.
URL : https://patchwork.freedesktop.org/series/68775/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7224 -> Patchwork_15074
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15074/index.html
Known issues
Here are the changes found in Patchwork_15074 that come from known issues:
### IGT changes ###
Issues hit
* igt@prime_busy@basic-wait-after-default:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7224/fi-icl-u3/igt@prime_b...@basic-wait-after-default.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15074/fi-icl-u3/igt@prime_b...@basic-wait-after-default.html
Possible fixes
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- {fi-icl-dsi}: [DMESG-WARN][3] ([fdo#106107]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7224/fi-icl-dsi/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15074/fi-icl-dsi/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
* igt@vgem_basic@unload:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1
similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7224/fi-icl-u3/igt@vgem_ba...@unload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15074/fi-icl-u3/igt@vgem_ba...@unload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111833]: https://bugs.freedesktop.org/show_bug.cgi?id=111833
Participating hosts (51 -> 42)
--
Missing(9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-bwr-2160 fi-gdg-551 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7224 -> Patchwork_15074
CI-20190529: 20190529
CI_DRM_7224: ddab9d461085ff18509c97eb4bf308df87db24f4 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5252: 03c1c6e4721b64b40e476423f7f956b026b4b03f @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15074: c55eecda334c0c3d8e216dc175a69a820a0a1011 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c55eecda334c drm/i915: Remove special case slave handling during hw
programming, v3.
458aaa55eea4 drm/i915: Complete plane hw and uapi split, v2.
5eb56542cc9f drm/i915: Perform automated conversions for plane uapi/hw split,
base -> uapi.
b9466bcd7ab7 drm/i915: Perform automated conversions for plane uapi/hw split,
base -> hw.
a5ff4f639f56 drm/i915: Perform manual conversions for plane uapi/hw split, v2.
0155a0d5474e drm/i915: Add aliases for uapi and hw to plane_state
bf5ed354107d drm/i915: Complete crtc hw/uapi split, v5.
5a396a2373ce drm/i915: Perform automated conversions for crtc uapi/hw split,
base -> uapi.
59dc3f8575d8 drm/i915: Perform automated conversions for crtc uapi/hw split,
base -> hw.
767bd125ad64 drm/i915: Perform manual conversions for crtc uapi/hw split, v2.
e96549d2f605 drm/i915: Add aliases for uapi and hw to crtc_state
82ecaad3eafe drm/i915: Handle a few more cases for crtc hw/uapi split, v3.
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15074/index.html
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Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Avoid HPD poll detect triggering a new detect cycle (rev2)
On Wed, Oct 30, 2019 at 12:06:53AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915: Avoid HPD poll detect triggering a new detect cycle (rev2) > URL : https://patchwork.freedesktop.org/series/68644/ > State : success Thanks for the review, pushed to -dinq. > > == Summary == > > CI Bug Log - changes from CI_DRM_7205_full -> Patchwork_15031_full > > > Summary > --- > > **SUCCESS** > > No regressions found. > > > > Known issues > > > Here are the changes found in Patchwork_15031_full that come from known > issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_ctx_shared@exec-single-timeline-bsd: > - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110841]) >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb3/igt@gem_ctx_sha...@exec-single-timeline-bsd.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb2/igt@gem_ctx_sha...@exec-single-timeline-bsd.html > > * igt@gem_ctx_switch@vcs1: > - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +11 similar > issues >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb2/igt@gem_ctx_swi...@vcs1.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb5/igt@gem_ctx_swi...@vcs1.html > > * igt@gem_exec_balancer@smoke: > - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb4/igt@gem_exec_balan...@smoke.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb7/igt@gem_exec_balan...@smoke.html > > * igt@gem_exec_schedule@preempt-other-chain-bsd: > - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +6 similar > issues >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb5/igt@gem_exec_sched...@preempt-other-chain-bsd.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html > > * igt@gem_exec_schedule@preempt-queue-bsd1: > - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +18 similar > issues >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb1/igt@gem_exec_sched...@preempt-queue-bsd1.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb5/igt@gem_exec_sched...@preempt-queue-bsd1.html > > * igt@gem_flink_race@flink_name: > - shard-apl: [PASS][11] -> [INCOMPLETE][12] ([fdo#103927]) +1 > similar issue >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-apl1/igt@gem_flink_race@flink_name.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-apl4/igt@gem_flink_race@flink_name.html > > * igt@gem_persistent_relocs@forked-interruptible-thrashing: > - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#112037]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-iclb1/igt@gem_persistent_rel...@forked-interruptible-thrashing.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-iclb5/igt@gem_persistent_rel...@forked-interruptible-thrashing.html > > * igt@gem_userptr_blits@dmabuf-sync: > - shard-snb: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870]) +1 > similar issue >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-snb5/igt@gem_userptr_bl...@dmabuf-sync.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-snb2/igt@gem_userptr_bl...@dmabuf-sync.html > > * igt@gem_userptr_blits@dmabuf-unsync: > - shard-hsw: [PASS][17] -> [DMESG-WARN][18] ([fdo#111870]) +1 > similar issue >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-hsw4/igt@gem_userptr_bl...@dmabuf-unsync.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-hsw1/igt@gem_userptr_bl...@dmabuf-unsync.html > > * igt@gem_workarounds@suspend-resume-fd: > - shard-kbl: [PASS][19] -> [FAIL][20] ([fdo#103375]) >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-kbl1/igt@gem_workarou...@suspend-resume-fd.html >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-kbl4/igt@gem_workarou...@suspend-resume-fd.html > > * igt@i915_selftest@mock_requests: > - shard-glk: [PASS][21] -> [INCOMPLETE][22] ([fdo#103359] / > [k.org#198133]) >[21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7205/shard-glk3/igt@i915_selftest@mock_requests.html >[22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15031/shard-glk3/igt@i915_selftest@mock_requests.html > > * igt@kms_color@pipe-b-ctm-0-5: > - shard-skl: [PASS][23] -> [DMESG-WARN][24] ([fdo#106107]) >[23]: >
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3.
== Series Details == Series: series starting with [CI,01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3. URL : https://patchwork.freedesktop.org/series/68775/ State : warning == Summary == $ dim checkpatch origin/drm-tip 82ecaad3eafe drm/i915: Handle a few more cases for crtc hw/uapi split, v3. e96549d2f605 drm/i915: Add aliases for uapi and hw to crtc_state -:67: WARNING:LONG_LINE: line over 100 characters #67: FILE: drivers/gpu/drm/i915/display/intel_display.h:453: + to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->uapi.state, >base total: 0 errors, 1 warnings, 0 checks, 83 lines checked 767bd125ad64 drm/i915: Perform manual conversions for crtc uapi/hw split, v2. 59dc3f8575d8 drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw. -:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #10: Split up crtc_state->base to hw where appropriate. This is done using the following patch: -:1423: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided #1423: FILE: drivers/gpu/drm/i915/display/intel_display.c:17296: + crtc_state->hw.active = crtc_state->hw.enable = total: 0 errors, 1 warnings, 1 checks, 2068 lines checked 5a396a2373ce drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. -:2400: ERROR:CODE_INDENT: code indent should use tabs where possible #2400: FILE: drivers/gpu/drm/i915/display/intel_sprite.c:211: +^I^I^I^I new_crtc_state->uapi.event);$ -:2400: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #2400: FILE: drivers/gpu/drm/i915/display/intel_sprite.c:211: + drm_crtc_arm_vblank_event(>base, + new_crtc_state->uapi.event); total: 1 errors, 0 warnings, 1 checks, 2552 lines checked bf5ed354107d drm/i915: Complete crtc hw/uapi split, v5. -:15: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #15: - Clear crtc_state->hw on disable, instead of using clear_intel_crtc_state(). total: 0 errors, 1 warnings, 0 checks, 236 lines checked 0155a0d5474e drm/i915: Add aliases for uapi and hw to plane_state -:49: WARNING:LINE_SPACING: Missing a blank line after declarations #49: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:112: + struct intel_plane_state *plane_state = to_intel_plane_state(state); + WARN_ON(plane_state->vma); total: 0 errors, 1 warnings, 0 checks, 59 lines checked a5ff4f639f56 drm/i915: Perform manual conversions for plane uapi/hw split, v2. b9466bcd7ab7 drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw. -:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #14: identifier x =~ "^(crtc|fb|alpha|pixel_blend_mode|rotation|color_encoding|color_range)$"; -:912: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "plane_state->hw.fb" #912: FILE: drivers/gpu/drm/i915/intel_pm.c:804: + return plane_state->hw.fb != NULL; total: 0 errors, 1 warnings, 1 checks, 890 lines checked 5eb56542cc9f drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi. -:745: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #745: FILE: drivers/gpu/drm/i915/display/intel_display.c:11181: + unsigned width = drm_rect_width(_state->uapi.dst); -:746: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #746: FILE: drivers/gpu/drm/i915/display/intel_display.c:11182: + unsigned height = drm_rect_height(_state->uapi.dst); -:814: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided #814: FILE: drivers/gpu/drm/i915/display/intel_display.c:11784: + plane_state->uapi.visible = visible = false; -:1541: WARNING:LONG_LINE: line over 100 characters #1541: FILE: drivers/gpu/drm/i915/intel_pm.c:3103: + (drm_rect_width(>uapi.dst) != drm_rect_width(>uapi.src) >> 16 || -:1542: WARNING:LONG_LINE: line over 100 characters #1542: FILE: drivers/gpu/drm/i915/intel_pm.c:3104: +drm_rect_height(>uapi.dst) != drm_rect_height(>uapi.src) >> 16); total: 0 errors, 4 warnings, 1 checks, 1442 lines checked 458aaa55eea4 drm/i915: Complete plane hw and uapi split, v2. -:139: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u16' over 'uint16_t' #139: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:538: + uint16_t pixel_blend_mode; total: 0 errors, 0 warnings, 1 checks, 107 lines checked c55eecda334c drm/i915: Remove special case slave handling during hw programming, v3. -:16: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #16: - Use the correct color_plane for pre-gen11 by using planar_linked_plane != NULL. total: 0 errors, 1
Re: [Intel-gfx] [CI 11/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi.
Op 29-10-2019 om 16:43 schreef Ville Syrjälä:
> On Tue, Oct 29, 2019 at 08:22:28AM +0100, Maarten Lankhorst wrote:
>> Split up plane_state->base to uapi. This is done using the following patch,
>> ran after the previous commit that splits out any hw references:
>>
>> @@
>> struct intel_plane_state *T;
>> identifier x;
>> @@
>> -T->base.x
>> +T->uapi.x
>>
>> @@
>> struct intel_plane_state *T;
>> @@
>> -T->base
>> +T->uapi
>>
>> Signed-off-by: Maarten Lankhorst
>> ---
>> drivers/gpu/drm/i915/display/intel_atomic.c | 2 +-
>> .../gpu/drm/i915/display/intel_atomic_plane.c | 32 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 298 +-
>> drivers/gpu/drm/i915/display/intel_fbc.c | 12 +-
>> drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
>> drivers/gpu/drm/i915/display/intel_sprite.c | 136
>> drivers/gpu/drm/i915/intel_pm.c | 57 ++--
>> 7 files changed, 271 insertions(+), 268 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
>> b/drivers/gpu/drm/i915/display/intel_atomic.c
>> index fb4126de994d..cb5c914f627f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
>> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
>> @@ -299,7 +299,7 @@ static void intel_atomic_setup_scaler(struct
>> intel_crtc_scaler_state *scaler_sta
>> if (plane_state && plane_state->hw.fb &&
>> plane_state->hw.fb->format->is_yuv &&
>> plane_state->hw.fb->format->num_planes > 1) {
>> -struct intel_plane *plane =
>> to_intel_plane(plane_state->base.plane);
>> +struct intel_plane *plane =
>> to_intel_plane(plane_state->uapi.plane);
>> if (IS_GEN(dev_priv, 9) &&
>> !IS_GEMINILAKE(dev_priv)) {
>> mode = SKL_PS_SCALER_MODE_NV12;
>> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> index cac1d6ae67f6..ba7d5421f791 100644
>> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
>> @@ -56,7 +56,7 @@ struct intel_plane *intel_plane_alloc(void)
>> return ERR_PTR(-ENOMEM);
>> }
>>
>> -__drm_atomic_helper_plane_reset(>base, _state->base);
>> +__drm_atomic_helper_plane_reset(>base, _state->uapi);
>> plane_state->scaler_id = -1;
>>
>> return plane;
>> @@ -88,12 +88,12 @@ intel_plane_duplicate_state(struct drm_plane *plane)
>> if (!intel_state)
>> return NULL;
>>
>> -__drm_atomic_helper_plane_duplicate_state(plane, _state->base);
>> +__drm_atomic_helper_plane_duplicate_state(plane, _state->uapi);
>>
>> intel_state->vma = NULL;
>> intel_state->flags = 0;
>>
>> -return _state->base;
>> +return _state->uapi;
>> }
>>
>> /**
>> @@ -111,7 +111,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
>> struct intel_plane_state *plane_state = to_intel_plane_state(state);
>> WARN_ON(plane_state->vma);
>>
>> -__drm_atomic_helper_plane_destroy_state(_state->base);
>> +__drm_atomic_helper_plane_destroy_state(_state->uapi);
>> kfree(plane_state);
>> }
>>
>> @@ -121,7 +121,7 @@ unsigned int intel_plane_data_rate(const struct
>> intel_crtc_state *crtc_state,
>> const struct drm_framebuffer *fb = plane_state->hw.fb;
>> unsigned int cpp;
>>
>> -if (!plane_state->base.visible)
>> +if (!plane_state->uapi.visible)
>> return 0;
>>
>> cpp = fb->format->cpp[0];
>> @@ -144,10 +144,10 @@ bool intel_plane_calc_min_cdclk(struct
>> intel_atomic_state *state,
>> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>> const struct intel_plane_state *plane_state =
>> intel_atomic_get_new_plane_state(state, plane);
>> -struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc);
>> +struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);
> This looks wrong. Should be hw.crtc I believe.
Correct, I accidentally messed up last time I ran this, and forgot to run the
base->hw patch first.
So some references were changed to uapi, that should be hw. I fixed it in a
rerun, but noticed it too late here. :)
Will respin!
>
>> struct intel_crtc_state *crtc_state;
>>
>> -if (!plane_state->base.visible || !plane->min_cdclk)
>> +if (!plane_state->uapi.visible || !plane->min_cdclk)
> Not duplicating visible,src,dst leads to slightly confusing looking
> code. I wonder if it wouldn't be better to just duplicate those as
> well...
>
>> return false;
>>
>> crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
>> @@ -181,7 +181,7 @@ int intel_plane_atomic_check_with_state(const struct
>> intel_crtc_state *old_crtc_
>> const struct intel_plane_state
>> *old_plane_state,
>> struct intel_plane_state
>> *new_plane_state)
>> {
>> -struct
Re: [Intel-gfx] [PATCH v2] drm/i915: Avoid HPD poll detect triggering a new detect cycle
On Mon, Oct 28, 2019 at 08:15:17PM +0200, Imre Deak wrote:
> For the HPD interrupt functionality the HW depends on power wells in the
> display core domain to be on. Accordingly when enabling these power
> wells the HPD polling logic will force an HPD detection cycle to account
> for hotplug events that may have happened when such a power well was
> off.
>
> Thus a detect cycle started by polling could start a new detect cycle if
> a power well in the display core domain gets enabled during detect and
> stays enabled after detect completes. That in turn can lead to a
> detection cycle runaway.
>
> To prevent re-triggering a poll-detect cycle make sure we drop all power
> references we acquired during detect synchronously by the end of detect.
> This will let the poll-detect logic continue with polling (matching the
> off state of the corresponding power wells) instead of scheduling a new
> detection cycle.
>
> Fixes: 6cfe7ec02e85 ("drm/i915: Remove the unneeded AUX power ref from
> intel_dp_detect()")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112125
> Reported-and-tested-by: Val Kulkov
> Reported-and-tested-by: wangqr
> Cc: Val Kulkov
> Cc: wangqr
> Cc: Ville Syrjälä
> Signed-off-by: Imre Deak
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 7 +++
> drivers/gpu/drm/i915/display/intel_dp.c | 6 ++
> drivers/gpu/drm/i915/display/intel_hdmi.c | 6 ++
> 3 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index ff6126ea793c..834bf1d43bb8 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -864,6 +864,13 @@ intel_crt_detect(struct drm_connector *connector,
>
> out:
> intel_display_power_put(dev_priv, intel_encoder->power_domain, wakeref);
> +
> + /*
> + * Make sure the refs for power wells enabled during detect are
> + * dropped to avoid a new detect cycle triggered by HPD polling.
> + */
> + intel_display_power_flush_work(dev_priv);
> +
> return status;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 86989ec25bc6..486fe203f56c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5688,6 +5688,12 @@ intel_dp_detect(struct drm_connector *connector,
> if (status != connector_status_connected && !intel_dp->is_mst)
> intel_dp_unset_edid(intel_dp);
>
> + /*
> + * Make sure the refs for power wells enabled during detect are
> + * dropped to avoid a new detect cycle triggered by HPD polling.
> + */
> + intel_display_power_flush_work(dev_priv);
> +
> return status;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index b54ccbb5aad5..ff71a4da3d00 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2626,6 +2626,12 @@ intel_hdmi_detect(struct drm_connector *connector,
> bool force)
> if (status != connector_status_connected)
> cec_notifier_phys_addr_invalidate(intel_hdmi->cec_notifier);
>
> + /*
> + * Make sure the refs for power wells enabled during detect are
> + * dropped to avoid a new detect cycle triggered by HPD polling.
> + */
> + intel_display_power_flush_work(dev_priv);
> +
> return status;
> }
>
> --
> 2.17.1
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH] drm/i915: Nuke 'mode' argument to intel_get_load_detect_pipe()
On Tue, 29 Oct 2019, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> We always pass mode==NULL to intel_get_load_detect_pipe(). Remove
> the pointless function argument.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.c | 7 ++-
> drivers/gpu/drm/i915/display/intel_display.h | 1 -
> drivers/gpu/drm/i915/display/intel_tv.c | 2 +-
> 4 files changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index ff6126ea793c..25118619e240 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -844,7 +844,7 @@ intel_crt_detect(struct drm_connector *connector,
> }
>
> /* for pre-945g platforms use load detect */
> - ret = intel_get_load_detect_pipe(connector, NULL, , ctx);
> + ret = intel_get_load_detect_pipe(connector, , ctx);
> if (ret > 0) {
> if (intel_crt_detect_ddc(connector))
> status = connector_status_connected;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e56a75c07043..1862546356fd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11328,7 +11328,6 @@ static int intel_modeset_disable_planes(struct
> drm_atomic_state *state,
> }
>
> int intel_get_load_detect_pipe(struct drm_connector *connector,
> -const struct drm_display_mode *mode,
> struct intel_load_detect_pipe *old,
> struct drm_modeset_acquire_ctx *ctx)
> {
> @@ -11435,10 +11434,8 @@ int intel_get_load_detect_pipe(struct drm_connector
> *connector,
>
> crtc_state->base.active = crtc_state->base.enable = true;
>
> - if (!mode)
> - mode = _detect_mode;
> -
> - ret = drm_atomic_set_mode_for_crtc(_state->base, mode);
> + ret = drm_atomic_set_mode_for_crtc(_state->base,
> +_detect_mode);
> if (ret)
> goto fail;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index ca7ca2804d8b..355c50088589 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -509,7 +509,6 @@ void vlv_wait_port_ready(struct drm_i915_private
> *dev_priv,
>struct intel_digital_port *dport,
>unsigned int expected_mask);
> int intel_get_load_detect_pipe(struct drm_connector *connector,
> -const struct drm_display_mode *mode,
> struct intel_load_detect_pipe *old,
> struct drm_modeset_acquire_ctx *ctx);
> void intel_release_load_detect_pipe(struct drm_connector *connector,
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c
> b/drivers/gpu/drm/i915/display/intel_tv.c
> index 70726b481244..5556d8300a88 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -1701,7 +1701,7 @@ intel_tv_detect(struct drm_connector *connector,
> struct intel_load_detect_pipe tmp;
> int ret;
>
> - ret = intel_get_load_detect_pipe(connector, NULL, , ctx);
> + ret = intel_get_load_detect_pipe(connector, , ctx);
> if (ret < 0)
> return ret;
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 7/9] drm/i915: Reject ckey+fp16 on skl+
>> >>-Original Message-
>> >>From: Intel-gfx On Behalf
>> >>Of Ville Syrjala
>> >>Sent: Tuesday, October 8, 2019 9:45 PM
>> >>To: intel-gfx@lists.freedesktop.org
>> >>Subject: [Intel-gfx] [PATCH 7/9] drm/i915: Reject ckey+fp16 on skl+
>> >>
>> >>From: Ville Syrjälä
>> >>
>> >>According to the spec color keying is not supported with
>> >>fp16 pixel formats on skl+. Reject that combo.
>> >>
>> >>Signed-off-by: Ville Syrjälä
>> >>---
>> >> drivers/gpu/drm/i915/display/intel_sprite.c | 18 ++
>> >> 1 file changed, 18 insertions(+)
>> >>
>> >>diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
>> >>b/drivers/gpu/drm/i915/display/intel_sprite.c
>> >>index cc9e5c9668b1..d6cd46e3f738 100644
>> >>--- a/drivers/gpu/drm/i915/display/intel_sprite.c
>> >>+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
>> >>@@ -1689,6 +1689,19 @@ vlv_sprite_check(struct intel_crtc_state
>> >>*crtc_state,
>> >> return 0;
>> >> }
>> >>
>> >>+static bool format_is_fp16(u32 format) {
>> >>+ switch (format) {
>> >>+ case DRM_FORMAT_XRGB16161616F:
>> >>+ case DRM_FORMAT_XBGR16161616F:
>> >>+ case DRM_FORMAT_ARGB16161616F:
>> >>+ case DRM_FORMAT_ABGR16161616F:
>> >>+ return true;
>> >>+ default:
>> >>+ return false;
>> >>+ }
>> >>+}
>> >>+
>> >> static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>> >> const struct intel_plane_state *plane_state) {
>> >> @@ -
>> >>1760,6 +1773,11 @@ static int skl_plane_check_fb(const struct
>> >>intel_crtc_state *crtc_state,
>> >> return -EINVAL;
>> >> }
>> >>
>> >>+ if (plane_state->ckey.flags && format_is_fp16(fb->format->format)) {
>> >>+ DRM_DEBUG_KMS("Color keying not supported with fp16
>> >>formats\n");
>> >
>> >It seems even "Indexed 8 bit formats" also don't support Color
>> >Keying. May be you can extend it to even C8.
>>
>> wrt C8, at the bit definition of color keying on PLANE_CTL the
>> description says "Plane color keying is not compatible with the
>> Indexed 8-bit pixel format.", but on capability it do list C8. So not sure
>> what is
>correct.
>
>It works just fine, or at least it did on older platforms.
>So unless they broke it recently we should be good.
Ok, yeah that description was misleading. Will try to get some clarification
from
hardware folks as well.
>Regarding fp16 vs. colorkey, not sure what the deal really is.
>I should probably test it across the board now that we have
>fp16 for all gen4+.
That would be great and will confirm the behaviour.
Regards,
Uma Shankar
>--
>Ville Syrjälä
>Intel
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Stop frobbing crtc->base.mode
== Series Details ==
Series: drm/i915: Stop frobbing crtc->base.mode
URL : https://patchwork.freedesktop.org/series/68725/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7215_full -> Patchwork_15054_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15054_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
- {shard-tglb}: [FAIL][1] ([fdo#111703]) -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-tglb5/igt@kms_cursor_...@pipe-b-cursor-256x256-onscreen.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-tglb7/igt@kms_cursor_...@pipe-b-cursor-256x256-onscreen.html
Known issues
Here are the changes found in Patchwork_15054_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +11 similar
issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-iclb4/igt@gem_exec_paral...@vcs1-fds.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-iclb7/igt@gem_exec_paral...@vcs1-fds.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) +7 similar
issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-iclb8/igt@gem_exec_sched...@in-order-bsd.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-iclb1/igt@gem_exec_sched...@in-order-bsd.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +10 similar
issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-iclb2/igt@gem_exec_sched...@preempt-contexts-bsd2.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-iclb3/igt@gem_exec_sched...@preempt-contexts-bsd2.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-iclb: [PASS][9] -> [FAIL][10] ([fdo#112037])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-iclb8/igt@gem_persistent_rel...@forked-thrashing.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-iclb6/igt@gem_persistent_rel...@forked-thrashing.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-snb: [PASS][11] -> [DMESG-WARN][12] ([fdo#111870])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-snb2/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-snb7/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@sync-unmap:
- shard-hsw: [PASS][13] -> [DMESG-WARN][14] ([fdo#111870]) +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-hsw2/igt@gem_userptr_bl...@sync-unmap.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-hsw1/igt@gem_userptr_bl...@sync-unmap.html
* igt@i915_selftest@mock_requests:
- shard-skl: [PASS][15] -> [INCOMPLETE][16] ([fdo#112156])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-skl10/igt@i915_selftest@mock_requests.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-skl3/igt@i915_selftest@mock_requests.html
* igt@kms_color@pipe-a-ctm-0-5:
- shard-skl: [PASS][17] -> [DMESG-WARN][18] ([fdo#106107]) +1
similar issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-skl10/igt@kms_co...@pipe-a-ctm-0-5.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-skl7/igt@kms_co...@pipe-a-ctm-0-5.html
* igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
- shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103184] / [fdo#103232])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-iclb8/igt@kms_draw_...@draw-method-rgb565-render-xtiled.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-iclb1/igt@kms_draw_...@draw-method-rgb565-render-xtiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [PASS][21] -> [FAIL][22] ([fdo#105363])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7215/shard-glk3/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15054/shard-glk1/igt@kms_f...@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@plain-flip-interruptible:
- shard-apl: [PASS][23] -> [INCOMPLETE][24] ([fdo#103927]) +2
similar issues
Re: [Intel-gfx] pcm_lock deadlock
On Tue, Oct 29, 2019 at 09:52:57PM +0100, Takashi Iwai wrote:
> On Tue, 29 Oct 2019 20:10:50 +0100,
> From: Takashi Iwai
> Subject: [PATCH] ALSA: hda - Fix mutex deadlock in HDMI codec driver
>
> The commit ade49db337a9 ("ALSA: hda/hdmi - Allow audio component for
> AMD/ATI and Nvidia HDMI") introduced the spec->pcm_lock mutex lock to
> the whole generic_hdmi_init() function for avoiding the race with the
> audio component registration. However, this caused a dead lock when
> the unsolicited event is handled without the audio component, as the
> codec gets runtime-resumed in hdmi_present_sense() which is already
> inside the spec->pcm_lock in its caller.
>
> For avoiding this deadlock, add a new mutex only for the audio
> component binding that is used in both generic_hdmi_init() and the
> audio notifier registration where the jack callbacks are handled /
> re-registered.
>
> Fixes: ade49db337a9 ("ALSA: hda/hdmi - Allow audio component for AMD/ATI and
> Nvidia HDMI")
> Reported-by: Ville Syrjälä
> Signed-off-by: Takashi Iwai
> ---
> sound/pci/hda/patch_hdmi.c | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
> index 795cbda32cbb..d9b5ba361409 100644
> --- a/sound/pci/hda/patch_hdmi.c
> +++ b/sound/pci/hda/patch_hdmi.c
> @@ -145,6 +145,7 @@ struct hdmi_spec {
> struct snd_array pins; /* struct hdmi_spec_per_pin */
> struct hdmi_pcm pcm_rec[16];
> struct mutex pcm_lock;
> + struct mutex bind_lock; /* for audio component binding */
Missing mutex_init() for this guy.
Tested-by: Ville Syrjälä
> /* pcm_bitmap means which pcms have been assigned to pins*/
> unsigned long pcm_bitmap;
> int pcm_used; /* counter of pcm_rec[] */
> @@ -2258,7 +2259,7 @@ static int generic_hdmi_init(struct hda_codec *codec)
> struct hdmi_spec *spec = codec->spec;
> int pin_idx;
>
> - mutex_lock(>pcm_lock);
> + mutex_lock(>bind_lock);
> spec->use_jack_detect = !codec->jackpoll_interval;
> for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
> struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
> @@ -2275,7 +2276,7 @@ static int generic_hdmi_init(struct hda_codec *codec)
> snd_hda_jack_detect_enable_callback(codec, pin_nid,
> jack_callback);
> }
> - mutex_unlock(>pcm_lock);
> + mutex_unlock(>bind_lock);
> return 0;
> }
>
> @@ -2451,7 +2452,7 @@ static void generic_acomp_notifier_set(struct
> drm_audio_component *acomp,
> int i;
>
> spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
> - mutex_lock(>pcm_lock);
> + mutex_lock(>bind_lock);
> spec->use_acomp_notifier = use_acomp;
> spec->codec->relaxed_resume = use_acomp;
> /* reprogram each jack detection logic depending on the notifier */
> @@ -2461,7 +2462,7 @@ static void generic_acomp_notifier_set(struct
> drm_audio_component *acomp,
> get_pin(spec, i)->pin_nid,
> use_acomp);
> }
> - mutex_unlock(>pcm_lock);
> + mutex_unlock(>bind_lock);
> }
>
> /* enable / disable the notifier via master bind / unbind */
> --
> 2.16.4
--
Ville Syrjälä
Intel
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[Intel-gfx] [CI 04/12] drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw.
Split up crtc_state->base to hw where appropriate. This is done using the
following patch:
@@
struct intel_crtc_state *T;
identifier x =~
"^(active|enable|degamma_lut|gamma_lut|ctm|mode|adjusted_mode)$";
@@
-T->base.x
+T->hw.x
@@
struct drm_crtc_state *T;
identifier x =~
"^(active|enable|degamma_lut|gamma_lut|ctm|mode|adjusted_mode)$";
@@
-to_intel_crtc_state(T)->base.x
+to_intel_crtc_state(T)->hw.x
Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/drm_dp_mst_topology.c | 1 +
drivers/gpu/drm/i915/display/icl_dsi.c| 12 +-
drivers/gpu/drm/i915/display/intel_audio.c| 4 +-
drivers/gpu/drm/i915/display/intel_cdclk.c| 8 +-
drivers/gpu/drm/i915/display/intel_color.c| 108
drivers/gpu/drm/i915/display/intel_crt.c | 18 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 18 +-
drivers/gpu/drm/i915/display/intel_display.c | 260 +-
drivers/gpu/drm/i915/display/intel_dp.c | 22 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 6 +-
drivers/gpu/drm/i915/display/intel_dvo.c | 12 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 20 +-
drivers/gpu/drm/i915/display/intel_lspcon.c | 4 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 8 +-
drivers/gpu/drm/i915/display/intel_panel.c| 8 +-
drivers/gpu/drm/i915/display/intel_pipe_crc.c | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 12 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 16 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 8 +-
drivers/gpu/drm/i915/display/intel_tv.c | 4 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 4 +-
drivers/gpu/drm/i915/display/vlv_dsi.c| 10 +-
drivers/gpu/drm/i915/i915_debugfs.c | 8 +-
drivers/gpu/drm/i915/intel_pm.c | 56 ++--
25 files changed, 318 insertions(+), 313 deletions(-)
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 85bef73a6763..fddea7acf7d8 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -33,6 +33,7 @@
#include
#include
#include
+#include
#endif
#include
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 6e398c33a524..4ec493e4755b 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -276,7 +276,7 @@ static void configure_dual_link_mode(struct intel_encoder
*encoder,
if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
const struct drm_display_mode *adjusted_mode =
- _config->base.adjusted_mode;
+ _config->hw.adjusted_mode;
u32 dss_ctl2;
u16 hactive = adjusted_mode->crtc_hdisplay;
u16 dl_buffer_depth;
@@ -768,7 +768,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder
*encoder,
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(>base);
const struct drm_display_mode *adjusted_mode =
- _config->base.adjusted_mode;
+ _config->hw.adjusted_mode;
enum port port;
enum transcoder dsi_trans;
/* horizontal timings */
@@ -1216,7 +1216,7 @@ static void gen11_dsi_get_timings(struct intel_encoder
*encoder,
{
struct intel_dsi *intel_dsi = enc_to_intel_dsi(>base);
struct drm_display_mode *adjusted_mode =
- _config->base.adjusted_mode;
+ _config->hw.adjusted_mode;
if (intel_dsi->dual_link) {
adjusted_mode->crtc_hdisplay *= 2;
@@ -1249,9 +1249,9 @@ static void gen11_dsi_get_config(struct intel_encoder
*encoder,
pipe_config->port_clock =
cnl_calc_wrpll_link(dev_priv, _config->dpll_hw_state);
- pipe_config->base.adjusted_mode.crtc_clock = intel_dsi->pclk;
+ pipe_config->hw.adjusted_mode.crtc_clock = intel_dsi->pclk;
if (intel_dsi->dual_link)
- pipe_config->base.adjusted_mode.crtc_clock *= 2;
+ pipe_config->hw.adjusted_mode.crtc_clock *= 2;
gen11_dsi_get_timings(encoder, pipe_config);
pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
@@ -1269,7 +1269,7 @@ static int gen11_dsi_compute_config(struct intel_encoder
*encoder,
const struct drm_display_mode *fixed_mode =
intel_connector->panel.fixed_mode;
struct drm_display_mode *adjusted_mode =
- _config->base.adjusted_mode;
+ _config->hw.adjusted_mode;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
[Intel-gfx] [CI 07/12] drm/i915: Add aliases for uapi and hw to plane_state
Prepare to split up hw and uapi machinally, by adding a uapi and
hw alias. We will remove the base in a bit. This is a split from the
original uapi/hw patch, which did it all in one go.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c| 16
.../gpu/drm/i915/display/intel_display_types.h | 8 ++--
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 4558c0b29fc1..393fb97a3dca 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -80,22 +80,20 @@ void intel_plane_free(struct intel_plane *plane)
struct drm_plane_state *
intel_plane_duplicate_state(struct drm_plane *plane)
{
- struct drm_plane_state *state;
struct intel_plane_state *intel_state;
- intel_state = kmemdup(plane->state, sizeof(*intel_state), GFP_KERNEL);
+ intel_state = to_intel_plane_state(plane->state);
+ intel_state = kmemdup(intel_state, sizeof(*intel_state), GFP_KERNEL);
if (!intel_state)
return NULL;
- state = _state->base;
-
- __drm_atomic_helper_plane_duplicate_state(plane, state);
+ __drm_atomic_helper_plane_duplicate_state(plane, _state->base);
intel_state->vma = NULL;
intel_state->flags = 0;
- return state;
+ return _state->base;
}
/**
@@ -110,9 +108,11 @@ void
intel_plane_destroy_state(struct drm_plane *plane,
struct drm_plane_state *state)
{
- WARN_ON(to_intel_plane_state(state)->vma);
+ struct intel_plane_state *plane_state = to_intel_plane_state(state);
+ WARN_ON(plane_state->vma);
- drm_atomic_helper_plane_destroy_state(plane, state);
+ __drm_atomic_helper_plane_destroy_state(_state->base);
+ kfree(plane_state);
}
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9319ca682105..6036b2b3980b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -523,7 +523,11 @@ struct intel_atomic_state {
};
struct intel_plane_state {
- struct drm_plane_state base;
+ union {
+ struct drm_plane_state base;
+ struct drm_plane_state uapi;
+ struct drm_plane_state hw;
+ };
struct i915_ggtt_view view;
struct i915_vma *vma;
unsigned long flags;
@@ -1143,7 +1147,7 @@ struct cxsr_latency {
#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
#define to_intel_plane(x) container_of(x, struct intel_plane, base)
-#define to_intel_plane_state(x) container_of(x, struct intel_plane_state, base)
+#define to_intel_plane_state(x) container_of(x, struct intel_plane_state, uapi)
#define intel_fb_obj(x) ((x) ? to_intel_bo((x)->obj[0]) : NULL)
struct intel_hdmi {
--
2.23.0
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[Intel-gfx] [CI 09/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw.
Split up plane_state->base to hw. This is done using the following patch:
@@
struct intel_plane_state *T;
identifier x =~
"^(crtc|fb|alpha|pixel_blend_mode|rotation|color_encoding|color_range)$";
@@
-T->base.x
+T->hw.x
Signed-off-by: Maarten Lankhorst
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_atomic.c | 6 +-
.../gpu/drm/i915/display/intel_atomic_plane.c | 6 +-
drivers/gpu/drm/i915/display/intel_display.c | 126 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 8 +-
drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 90 ++---
drivers/gpu/drm/i915/intel_pm.c | 32 ++---
7 files changed, 135 insertions(+), 135 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 3301c178da03..0a5eee4c350f 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -283,9 +283,9 @@ static void intel_atomic_setup_scaler(struct
intel_crtc_scaler_state *scaler_sta
return;
/* set scaler mode */
- if (plane_state && plane_state->base.fb &&
- plane_state->base.fb->format->is_yuv &&
- plane_state->base.fb->format->num_planes > 1) {
+ if (plane_state && plane_state->hw.fb &&
+ plane_state->hw.fb->format->is_yuv &&
+ plane_state->hw.fb->format->num_planes > 1) {
struct intel_plane *plane =
to_intel_plane(plane_state->base.plane);
if (IS_GEN(dev_priv, 9) &&
!IS_GEMINILAKE(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 416cfa439f33..4e928e361be1 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -118,7 +118,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
- const struct drm_framebuffer *fb = plane_state->base.fb;
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int cpp;
if (!plane_state->base.visible)
@@ -182,7 +182,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
struct intel_plane_state
*new_plane_state)
{
struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
- const struct drm_framebuffer *fb = new_plane_state->base.fb;
+ const struct drm_framebuffer *fb = new_plane_state->hw.fb;
int ret;
new_crtc_state->active_planes &= ~BIT(plane->id);
@@ -192,7 +192,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
new_crtc_state->min_cdclk[plane->id] = 0;
new_plane_state->base.visible = false;
- if (!new_plane_state->base.crtc && !old_plane_state->base.crtc)
+ if (!new_plane_state->hw.crtc && !old_plane_state->hw.crtc)
return 0;
ret = plane->check_plane(new_crtc_state, new_plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index b0b2c46e4c0a..1c0c55a78d03 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2215,7 +2215,7 @@ u32 intel_fb_xy_to_linear(int x, int y,
const struct intel_plane_state *state,
int color_plane)
{
- const struct drm_framebuffer *fb = state->base.fb;
+ const struct drm_framebuffer *fb = state->hw.fb;
unsigned int cpp = fb->format->cpp[color_plane];
unsigned int pitch = state->color_plane[color_plane].stride;
@@ -2316,8 +2316,8 @@ static u32 intel_plane_adjust_aligned_offset(int *x, int
*y,
int color_plane,
u32 old_offset, u32 new_offset)
{
- return intel_adjust_aligned_offset(x, y, state->base.fb, color_plane,
- state->base.rotation,
+ return intel_adjust_aligned_offset(x, y, state->hw.fb, color_plane,
+ state->hw.rotation,
state->color_plane[color_plane].stride,
old_offset, new_offset);
}
@@ -2393,8 +2393,8 @@ static u32 intel_plane_compute_aligned_offset(int *x, int
*y,
{
struct intel_plane *intel_plane = to_intel_plane(state->base.plane);
struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
- const struct drm_framebuffer *fb = state->base.fb;
- unsigned int rotation = state->base.rotation;
+ const struct drm_framebuffer
[Intel-gfx] [CI 12/12] drm/i915: Remove special case slave handling during hw programming, v3.
Now that we split plane_state which I didn't want to do yet, we can
program the slave plane without requiring the master plane.
This is useful for programming bigjoiner slave planes as well. We
will no longer need the master's plane_state.
Changes since v1:
- set src/dst rectangles after copy_uapi_to_hw_state.
Changes since v2:
- Use the correct color_plane for pre-gen11 by using planar_linked_plane !=
NULL.
- Use drm_format_info_is_yuv_semiplanar in skl_plane_check() to fix gen11+.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 30 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 -
drivers/gpu/drm/i915/display/intel_display.c | 18 ++
.../drm/i915/display/intel_display_types.h| 6 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 57 ++-
5 files changed, 40 insertions(+), 74 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 249fb41d78a5..93d391ab3f75 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -348,16 +348,6 @@ void intel_update_plane(struct intel_plane *plane,
plane->update_plane(plane, crtc_state, plane_state);
}
-void intel_update_slave(struct intel_plane *plane,
- const struct intel_crtc_state *crtc_state,
- const struct intel_plane_state *plane_state)
-{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-
- trace_intel_update_plane(>base, crtc);
- plane->update_slave(plane, crtc_state, plane_state);
-}
-
void intel_disable_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state)
{
@@ -390,25 +380,9 @@ void skl_update_planes_on_crtc(struct intel_atomic_state
*state,
struct intel_plane_state *new_plane_state =
intel_atomic_get_new_plane_state(state, plane);
- if (new_plane_state->uapi.visible) {
+ if (new_plane_state->uapi.visible ||
+ new_plane_state->planar_slave) {
intel_update_plane(plane, new_crtc_state,
new_plane_state);
- } else if (new_plane_state->planar_slave) {
- struct intel_plane *master =
- new_plane_state->planar_linked_plane;
-
- /*
-* We update the slave plane from this function because
-* programming it from the master plane's update_plane
-* callback runs into issues when the Y plane is
-* reassigned, disabled or used by a different plane.
-*
-* The slave plane is updated with the master plane's
-* plane_state.
-*/
- new_plane_state =
- intel_atomic_get_new_plane_state(state, master);
-
- intel_update_slave(plane, new_crtc_state,
new_plane_state);
} else {
intel_disable_plane(plane, new_crtc_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index cdb0f97d09f9..5cedafdddb55 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -25,9 +25,6 @@ void intel_plane_copy_uapi_to_hw_state(struct
intel_plane_state *plane_state,
void intel_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
-void intel_update_slave(struct intel_plane *plane,
- const struct intel_crtc_state *crtc_state,
- const struct intel_plane_state *plane_state);
void intel_disable_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state);
struct intel_plane *intel_plane_alloc(void);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 7ee5d1f5a180..53f9c885fc56 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11988,6 +11988,24 @@ static int icl_check_nv12_planes(struct
intel_crtc_state *crtc_state)
crtc_state->active_planes |= BIT(linked->id);
crtc_state->update_planes |= BIT(linked->id);
DRM_DEBUG_KMS("Using %s as Y plane for %s\n",
linked->base.name, plane->base.name);
+
+ /* Copy parameters to slave plane */
+ linked_state->ctl = plane_state->ctl | PLANE_CTL_YUV420_Y_PLANE;
+ linked_state->color_ctl = plane_state->color_ctl;
+
[Intel-gfx] [CI 03/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2.
intel_get_load_detect_pipe() needs to set uapi active,
uapi enable is set by the call to drm_atomic_set_mode_for_crtc(),
so we can remove it.
intel_pipe_config_compare() needs to look at hw state, but I didn't
change spatch to look at it. It's easy enough to do manually.
intel_atomic_check() definitely needs to check for uapi enable,
otherwise intel_modeset_pipe_config cannot copy uapi state to hw.
Changes since v1:
- Actually set uapi.active in get_load_detect_pipe().
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_display.c | 42 ++--
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 5bf460caf8a3..a66033e3bdfa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector
*connector,
goto fail;
}
- crtc_state->base.active = crtc_state->base.enable = true;
+ crtc_state->uapi.active = true;
if (!mode)
mode = _detect_mode;
@@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct
intel_crtc_state *current_config,
PIPE_CONF_CHECK_X(output_types);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start);
- PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
+ PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
PIPE_CONF_CHECK_I(pixel_multiplier);
PIPE_CONF_CHECK_I(output_format);
@@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct
intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
- PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_INTERLACE);
if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
- PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_PHSYNC);
- PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_NHSYNC);
- PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_PVSYNC);
- PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
+ PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
DRM_MODE_FLAG_NVSYNC);
}
@@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
bp_gamma = intel_color_get_gamma_bit_precision(pipe_config);
if (bp_gamma)
- PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, base.gamma_lut,
bp_gamma);
+ PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut,
bp_gamma);
}
@@ -13203,7 +13203,7 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
PIPE_CONF_CHECK_I(pipe_bpp);
- PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.crtc_clock);
+ PIPE_CONF_CHECK_CLOCK_FUZZY(hw.adjusted_mode.crtc_clock);
PIPE_CONF_CHECK_CLOCK_FUZZY(port_clock);
PIPE_CONF_CHECK_I(min_voltage_level);
@@ -14010,7 +14010,7 @@ static int intel_atomic_check(struct drm_device *dev,
if
[Intel-gfx] [CI 11/12] drm/i915: Complete plane hw and uapi split, v2.
Splitting plane state is easier than splitting crtc_state,
before plane check we copy the drm properties to hw so we can
do the same in bigjoiner later on.
We copy the state after we did all the modeset handling, but fortunately
i915 seems to be split correctly and nothing during modeset looks
at plane_state.
Changes since v1:
- Do not clear hw state on duplication.
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 37 ++-
.../gpu/drm/i915/display/intel_atomic_plane.h | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 1 +
.../drm/i915/display/intel_display_types.h| 23 +---
4 files changed, 57 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 18023422a34d..249fb41d78a5 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -93,6 +93,10 @@ intel_plane_duplicate_state(struct drm_plane *plane)
intel_state->vma = NULL;
intel_state->flags = 0;
+ /* add reference to fb */
+ if (intel_state->hw.fb)
+ drm_framebuffer_get(intel_state->hw.fb);
+
return _state->uapi;
}
@@ -112,6 +116,8 @@ intel_plane_destroy_state(struct drm_plane *plane,
WARN_ON(plane_state->vma);
__drm_atomic_helper_plane_destroy_state(_state->uapi);
+ if (plane_state->hw.fb)
+ drm_framebuffer_put(plane_state->hw.fb);
kfree(plane_state);
}
@@ -176,15 +182,44 @@ bool intel_plane_calc_min_cdclk(struct intel_atomic_state
*state,
return false;
}
+static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
+{
+ if (plane_state->hw.fb)
+ drm_framebuffer_put(plane_state->hw.fb);
+
+ memset(_state->hw, 0, sizeof(plane_state->hw));
+}
+
+void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
+ const struct intel_plane_state
*from_plane_state)
+{
+ intel_plane_clear_hw_state(plane_state);
+
+ plane_state->hw.crtc = from_plane_state->uapi.crtc;
+ plane_state->hw.fb = from_plane_state->uapi.fb;
+ if (plane_state->hw.fb)
+ drm_framebuffer_get(plane_state->hw.fb);
+
+ plane_state->hw.alpha = from_plane_state->uapi.alpha;
+ plane_state->hw.pixel_blend_mode =
+ from_plane_state->uapi.pixel_blend_mode;
+ plane_state->hw.rotation = from_plane_state->uapi.rotation;
+ plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
+ plane_state->hw.color_range = from_plane_state->uapi.color_range;
+}
+
int intel_plane_atomic_check_with_state(const struct intel_crtc_state
*old_crtc_state,
struct intel_crtc_state *new_crtc_state,
const struct intel_plane_state
*old_plane_state,
struct intel_plane_state
*new_plane_state)
{
struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
- const struct drm_framebuffer *fb = new_plane_state->hw.fb;
+ const struct drm_framebuffer *fb;
int ret;
+ intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
+ fb = new_plane_state->hw.fb;
+
new_crtc_state->active_planes &= ~BIT(plane->id);
new_crtc_state->nv12_planes &= ~BIT(plane->id);
new_crtc_state->c8_planes &= ~BIT(plane->id);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index e61e9a82aadf..cdb0f97d09f9 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -20,6 +20,8 @@ extern const struct drm_plane_helper_funcs
intel_plane_helper_funcs;
unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
+void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
+ const struct intel_plane_state
*from_plane_state);
void intel_update_plane(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 1584421c76b9..7ee5d1f5a180 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3283,6 +3283,7 @@ intel_find_initial_plane_obj(struct intel_crtc
*intel_crtc,
plane_state->fb = fb;
plane_state->crtc = _crtc->base;
+ intel_plane_copy_uapi_to_hw_state(intel_state, intel_state);
atomic_or(to_intel_plane(primary)->frontbuffer_bit,
[Intel-gfx] [CI 10/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi.
Split up plane_state->base to uapi. This is done using the following patch,
ran after the previous commit that splits out any hw references:
@@
struct intel_plane_state *T;
identifier x;
@@
-T->base.x
+T->uapi.x
@@
struct intel_plane_state *T;
@@
-T->base
+T->uapi
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_atomic.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.c | 32 +--
drivers/gpu/drm/i915/display/intel_display.c | 262 +-
drivers/gpu/drm/i915/display/intel_fbc.c | 12 +-
drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 136 -
drivers/gpu/drm/i915/intel_pm.c | 57 ++--
7 files changed, 252 insertions(+), 251 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 0a5eee4c350f..ea24a45dab86 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -286,7 +286,7 @@ static void intel_atomic_setup_scaler(struct
intel_crtc_scaler_state *scaler_sta
if (plane_state && plane_state->hw.fb &&
plane_state->hw.fb->format->is_yuv &&
plane_state->hw.fb->format->num_planes > 1) {
- struct intel_plane *plane =
to_intel_plane(plane_state->base.plane);
+ struct intel_plane *plane =
to_intel_plane(plane_state->uapi.plane);
if (IS_GEN(dev_priv, 9) &&
!IS_GEMINILAKE(dev_priv)) {
mode = SKL_PS_SCALER_MODE_NV12;
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 4e928e361be1..18023422a34d 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -56,7 +56,7 @@ struct intel_plane *intel_plane_alloc(void)
return ERR_PTR(-ENOMEM);
}
- __drm_atomic_helper_plane_reset(>base, _state->base);
+ __drm_atomic_helper_plane_reset(>base, _state->uapi);
plane_state->scaler_id = -1;
return plane;
@@ -88,12 +88,12 @@ intel_plane_duplicate_state(struct drm_plane *plane)
if (!intel_state)
return NULL;
- __drm_atomic_helper_plane_duplicate_state(plane, _state->base);
+ __drm_atomic_helper_plane_duplicate_state(plane, _state->uapi);
intel_state->vma = NULL;
intel_state->flags = 0;
- return _state->base;
+ return _state->uapi;
}
/**
@@ -111,7 +111,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
struct intel_plane_state *plane_state = to_intel_plane_state(state);
WARN_ON(plane_state->vma);
- __drm_atomic_helper_plane_destroy_state(_state->base);
+ __drm_atomic_helper_plane_destroy_state(_state->uapi);
kfree(plane_state);
}
@@ -121,7 +121,7 @@ unsigned int intel_plane_data_rate(const struct
intel_crtc_state *crtc_state,
const struct drm_framebuffer *fb = plane_state->hw.fb;
unsigned int cpp;
- if (!plane_state->base.visible)
+ if (!plane_state->uapi.visible)
return 0;
cpp = fb->format->cpp[0];
@@ -144,10 +144,10 @@ bool intel_plane_calc_min_cdclk(struct intel_atomic_state
*state,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
const struct intel_plane_state *plane_state =
intel_atomic_get_new_plane_state(state, plane);
- struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc);
+ struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);
struct intel_crtc_state *crtc_state;
- if (!plane_state->base.visible || !plane->min_cdclk)
+ if (!plane_state->uapi.visible || !plane->min_cdclk)
return false;
crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
@@ -181,7 +181,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
const struct intel_plane_state
*old_plane_state,
struct intel_plane_state
*new_plane_state)
{
- struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
+ struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
const struct drm_framebuffer *fb = new_plane_state->hw.fb;
int ret;
@@ -190,7 +190,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
new_crtc_state->c8_planes &= ~BIT(plane->id);
new_crtc_state->data_rate[plane->id] = 0;
new_crtc_state->min_cdclk[plane->id] = 0;
- new_plane_state->base.visible = false;
+ new_plane_state->uapi.visible = false;
if (!new_plane_state->hw.crtc && !old_plane_state->hw.crtc)
return 0;
@@ -200,18 +200,18 @@ int intel_plane_atomic_check_with_state(const struct
[Intel-gfx] [CI 08/12] drm/i915: Perform manual conversions for plane uapi/hw split, v2.
get_crtc_from_states() is called before plane_state is copied to uapi,
so use the uapi state there.
intel_legacy_cursor_update() could probably get away with looking at
the hw state, but for clarity always look at the uapi state.
Changes since v1:
- Convert entirety of intel_legacy_cursor_update (Ville).
Signed-off-by: Maarten Lankhorst
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 8 ++--
drivers/gpu/drm/i915/display/intel_display.c | 45 ++-
2 files changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 393fb97a3dca..416cfa439f33 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -225,11 +225,11 @@ static struct intel_crtc *
get_crtc_from_states(const struct intel_plane_state *old_plane_state,
const struct intel_plane_state *new_plane_state)
{
- if (new_plane_state->base.crtc)
- return to_intel_crtc(new_plane_state->base.crtc);
+ if (new_plane_state->uapi.crtc)
+ return to_intel_crtc(new_plane_state->uapi.crtc);
- if (old_plane_state->base.crtc)
- return to_intel_crtc(old_plane_state->base.crtc);
+ if (old_plane_state->uapi.crtc)
+ return to_intel_crtc(old_plane_state->uapi.crtc);
return NULL;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index e30f467eec67..b0b2c46e4c0a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15357,12 +15357,12 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
* take the slowpath. Only changing fb or position should be
* in the fastpath.
*/
- if (old_plane_state->base.crtc != >base ||
- old_plane_state->base.src_w != src_w ||
- old_plane_state->base.src_h != src_h ||
- old_plane_state->base.crtc_w != crtc_w ||
- old_plane_state->base.crtc_h != crtc_h ||
- !old_plane_state->base.fb != !fb)
+ if (old_plane_state->uapi.crtc != >base ||
+ old_plane_state->uapi.src_w != src_w ||
+ old_plane_state->uapi.src_h != src_h ||
+ old_plane_state->uapi.crtc_w != crtc_w ||
+ old_plane_state->uapi.crtc_h != crtc_h ||
+ !old_plane_state->uapi.fb != !fb)
goto slow;
new_plane_state =
to_intel_plane_state(intel_plane_duplicate_state(>base));
@@ -15375,16 +15375,16 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
goto out_free;
}
- drm_atomic_set_fb_for_plane(_plane_state->base, fb);
+ drm_atomic_set_fb_for_plane(_plane_state->uapi, fb);
- new_plane_state->base.src_x = src_x;
- new_plane_state->base.src_y = src_y;
- new_plane_state->base.src_w = src_w;
- new_plane_state->base.src_h = src_h;
- new_plane_state->base.crtc_x = crtc_x;
- new_plane_state->base.crtc_y = crtc_y;
- new_plane_state->base.crtc_w = crtc_w;
- new_plane_state->base.crtc_h = crtc_h;
+ new_plane_state->uapi.src_x = src_x;
+ new_plane_state->uapi.src_y = src_y;
+ new_plane_state->uapi.src_w = src_w;
+ new_plane_state->uapi.src_h = src_h;
+ new_plane_state->uapi.crtc_x = crtc_x;
+ new_plane_state->uapi.crtc_y = crtc_y;
+ new_plane_state->uapi.crtc_w = crtc_w;
+ new_plane_state->uapi.crtc_h = crtc_h;
ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state,
old_plane_state,
new_plane_state);
@@ -15395,13 +15395,14 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
if (ret)
goto out_free;
- intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->base.fb),
ORIGIN_FLIP);
- intel_frontbuffer_track(to_intel_frontbuffer(old_plane_state->base.fb),
- to_intel_frontbuffer(new_plane_state->base.fb),
+ intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->hw.fb),
+ ORIGIN_FLIP);
+ intel_frontbuffer_track(to_intel_frontbuffer(old_plane_state->hw.fb),
+ to_intel_frontbuffer(new_plane_state->hw.fb),
plane->frontbuffer_bit);
/* Swap plane state */
- plane->base.state = _plane_state->base;
+ plane->base.state = _plane_state->uapi;
/*
* We cannot swap crtc_state as it may be in use by an atomic commit or
@@ -15415,7 +15416,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
*/
crtc_state->active_planes = new_crtc_state->active_planes;
- if (new_plane_state->base.visible)
+ if (new_plane_state->uapi.visible)
intel_update_plane(plane, crtc_state,
[Intel-gfx] [CI 06/12] drm/i915: Complete crtc hw/uapi split, v5.
Now that we separated everything into uapi and hw, it's
time to make the split definitive. Remove the union and
make a copy of the hw state on modeset and fastset.
Color blobs are copied in crtc atomic_check(), right
before color management is checked.
Changes since v1:
- Copy all blobs immediately after drm_atomic_helper_check_modeset().
- Clear crtc_state->hw on disable, instead of using clear_intel_crtc_state().
Changes since v2:
- Use intel_crtc_free_hw_state + clear in intel_crtc_disable_noatomic().
- Make a intel_crtc_prepare_state() function that clears the crtc_state
and copies hw members.
- Remove setting uapi.adjusted_mode, we now have a direct call to
drm_calc_timestamping_constants().
Changes since v3:
- Rename prefix copy_hw_to_uapi_state() with intel_crtc.
- Copy color blobs to uapi as well.
- Add a intel_crtc_copy_uapi_to_hw_state_nomodeset() function for clarity.
Changes since v4:
- Copy hw.adjusted_mode back to uapi.adjusted_mode, to shut up
the call to drm_calc_timestamping_constants() in
drm_atomic_helper_update_legacy_modeset_state().
- Use drm_property_replace_blob (Ville).
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_atomic.c | 31
drivers/gpu/drm/i915/display/intel_atomic.h | 2 +
drivers/gpu/drm/i915/display/intel_display.c | 78 +++
.../drm/i915/display/intel_display_types.h| 9 ++-
4 files changed, 103 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 48964f33c0c1..3301c178da03 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -195,6 +195,14 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
__drm_atomic_helper_crtc_duplicate_state(crtc, _state->uapi);
+ /* copy color blobs */
+ if (crtc_state->hw.degamma_lut)
+ drm_property_blob_get(crtc_state->hw.degamma_lut);
+ if (crtc_state->hw.ctm)
+ drm_property_blob_get(crtc_state->hw.ctm);
+ if (crtc_state->hw.gamma_lut)
+ drm_property_blob_get(crtc_state->hw.gamma_lut);
+
crtc_state->update_pipe = false;
crtc_state->disable_lp_wm = false;
crtc_state->disable_cxsr = false;
@@ -208,6 +216,28 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
return _state->uapi;
}
+static void intel_crtc_put_color_blobs(struct intel_crtc_state *crtc_state)
+{
+ drm_property_blob_put(crtc_state->hw.degamma_lut);
+ drm_property_blob_put(crtc_state->hw.gamma_lut);
+ drm_property_blob_put(crtc_state->hw.ctm);
+}
+
+void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)
+{
+ intel_crtc_put_color_blobs(crtc_state);
+}
+
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state)
+{
+ drm_property_replace_blob(_state->hw.degamma_lut,
+ crtc_state->uapi.degamma_lut);
+ drm_property_replace_blob(_state->hw.gamma_lut,
+ crtc_state->uapi.gamma_lut);
+ drm_property_replace_blob(_state->hw.ctm,
+ crtc_state->uapi.ctm);
+}
+
/**
* intel_crtc_destroy_state - destroy crtc state
* @crtc: drm crtc
@@ -223,6 +253,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
__drm_atomic_helper_crtc_destroy_state(_state->uapi);
+ intel_crtc_free_hw_state(crtc_state);
kfree(crtc_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h
b/drivers/gpu/drm/i915/display/intel_atomic.h
index 49d5cb1b9e0a..7b49623419ba 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic.h
@@ -36,6 +36,8 @@ intel_digital_connector_duplicate_state(struct drm_connector
*connector);
struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
void intel_crtc_destroy_state(struct drm_crtc *crtc,
struct drm_crtc_state *state);
+void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);
+void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state);
struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
void intel_atomic_state_clear(struct drm_atomic_state *state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 66223701ef78..e30f467eec67 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7185,6 +7185,8 @@ static void intel_crtc_disable_noatomic(struct drm_crtc
*crtc,
crtc->enabled = false;
crtc->state->connector_mask = 0;
crtc->state->encoder_mask = 0;
+ intel_crtc_free_hw_state(crtc_state);
+ memset(_state->hw, 0, sizeof(crtc_state->hw));
for_each_encoder_on_crtc(crtc->dev, crtc, encoder)
Re: [Intel-gfx] [PATCH 1/5] drm/i915/gt: Always track callers to intel_rps_mark_interactive()
Hi Chris, On Wed, Oct 30, 2019 at 10:38:23AM +, Chris Wilson wrote: > During startup, we may find ourselves in an interesting position where > we haven't fully enabled RPS before the display starts trying to use it. > This may lead to an imbalance in our "interactive" counter: yes, makes sense! Thanks! Acked-by: Andi Shyti Andi ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH i-g-t] i915/gem_exec_suspend: Measure power consumption during suspend
Chris Wilson writes:
> For this test, we need a laptop running on battery power so that we can
> read the battery charge level before and after suspend. And then wait
> long enough for a reliable measure.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=111909
> Signed-off-by: Chris Wilson
> Cc: Mika Kuoppala
> ---
> tests/i915/gem_exec_suspend.c | 67 ++-
> 1 file changed, 66 insertions(+), 1 deletion(-)
>
> diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
> index af6190ddd..ee0d0719f 100644
> --- a/tests/i915/gem_exec_suspend.c
> +++ b/tests/i915/gem_exec_suspend.c
> @@ -27,9 +27,13 @@
> * Exercise executing batches across suspend before checking the results.
> */
>
> +#include
> +#include
> +
> #include "igt.h"
> -#include "igt_gt.h"
> #include "igt_dummyload.h"
> +#include "igt_gt.h"
> +#include "igt_sysfs.h"
>
> #define NOSLEEP 0
> #define IDLE 1
> @@ -232,6 +236,62 @@ static void run_test(int fd, unsigned engine, unsigned
> flags)
> test_all(fd, flags);
> }
>
> +struct battery_sample {
> + struct timespec tv;
> + uint64_t charge;
> +};
> +
> +static bool get_power(int dir, struct battery_sample *s)
> +{
> + return (clock_gettime(CLOCK_REALTIME, >tv) == 0 &&
> + igt_sysfs_scanf(dir, "charge_now", "%"PRIu64, >charge) == 1);
> +}
> +
> +static double d_charge(const struct battery_sample *after,
> +const struct battery_sample *before)
> +{
> + return (before->charge - after->charge) * 1e-3; /* mWh */
> +}
> +
> +static double d_time(const struct battery_sample *after,
> + const struct battery_sample *before)
> +{
> + return ((after->tv.tv_sec - before->tv.tv_sec) +
> + (after->tv.tv_nsec - before->tv.tv_nsec) * 1e-9);
> +}
> +
> +static void power_test(int i915, unsigned engine, unsigned flags)
> +{
> + struct battery_sample before, after;
> + char *status;
> + int dir;
> +
> + dir = open("/sys/class/power_supply/BAT0", O_RDONLY);
> + igt_require_f(dir != -1, "/sys/class/power_supply/BAT0 not
> available\n");
> +
> + igt_require_f(get_power(dir, ),
> + "power test needs reported energy level\n");
> + free(status);
This looks bogus.
> +
> + status = igt_sysfs_get(dir, "status");
> + igt_require_f(status && strcmp(status, "Discharging") == 0,
> + "power test needs to be on battery, not mains, power\n");
> + free(status);
> +
> + igt_set_autoresume_delay(30 * 60); /* 30 minutes */
As you said, this is quite a long time. Even with the suspend and modern
laptop it should show meaningful data quicker. But we need moar
data on multiple specimens to find a good spot.
> +
> + igt_assert(get_power(dir, ));
> + run_test(i915, engine, flags);
> + igt_assert(get_power(dir, ));
> +
> + igt_set_autoresume_delay(0);
> +
> + igt_info("Power consumed while suspended: %.3fmWh\n",
> + d_charge(, ));
> + igt_info("Discharge rate while suspended: %.3fmW\n",
> + d_charge(, ) * 3600 / d_time(, ));
I dunno what is the go-to unit in here, but mA would be
as comparable and time independant. Perhaps show both.
There are lot of potential in here to automate against pm
regressions. Plugging this into the apc and gathering
baseline consumptions.
This is a neat start and I aimed at t-b too.
Didn't happen so I can offer only,
Acked-by: Mika Kuoppala
> +}
> +
> igt_main
> {
> const struct {
> @@ -289,6 +349,11 @@ igt_main
> igt_subtest("hang-S4")
> run_test(fd, 0, HIBERNATE | HANG);
>
> + igt_subtest("power-S0")
> + power_test(fd, 0, IDLE);
> + igt_subtest("power-S3")
> + power_test(fd, 0, SUSPEND);
> +
> igt_fixture {
> igt_disallow_hang(fd, hang);
> close(fd);
> --
> 2.24.0.rc1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Drop GEM context as a direct link from i915_request (rev2)
== Series Details ==
Series: series starting with [1/3] drm/i915: Drop GEM context as a direct link
from i915_request (rev2)
URL : https://patchwork.freedesktop.org/series/68769/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7223 -> Patchwork_15073
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/index.html
Known issues
Here are the changes found in Patchwork_15073 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +1
similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@gem_exec_susp...@basic-s4-devices.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/fi-icl-u3/igt@gem_exec_susp...@basic-s4-devices.html
Possible fixes
* igt@gem_basic@bad-close:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4] +1
similar issue
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u3/igt@gem_ba...@bad-close.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/fi-icl-u3/igt@gem_ba...@bad-close.html
* igt@i915_selftest@live_active:
- fi-icl-u2: [DMESG-FAIL][5] ([fdo#112045]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-icl-u2/igt@i915_selftest@live_active.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/fi-icl-u2/igt@i915_selftest@live_active.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][7] ([fdo#102614]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7223/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/fi-hsw-peppy/igt@kms_frontbuffer_track...@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
[fdo#111597]: https://bugs.freedesktop.org/show_bug.cgi?id=111597
[fdo#112045]: https://bugs.freedesktop.org/show_bug.cgi?id=112045
Participating hosts (50 -> 44)
--
Missing(6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y
fi-byt-clapper
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7223 -> Patchwork_15073
CI-20190529: 20190529
CI_DRM_7223: 4055dfb8f197a9e3450d8f9de79ec0a1c6bbcd22 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5251: 6d30ec2314f22f465113f7a972944fee546ecbd9 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15073: e8c495e4eb7b268503607949b6a717001c45af07 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e8c495e4eb7b drm/i915: Remove i915->kernel_context
4c301e112db5 drm/i915: Push the use-semaphore marker onto the intel_context
ebf6ae21bc05 drm/i915: Drop GEM context as a direct link from i915_request
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15073/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 01/12] drm/i915: Introduce intel_atomic_get_plane_state_after_check(), v2.
On Wed, Oct 30, 2019 at 10:17:52AM +0100, Maarten Lankhorst wrote:
> Op 29-10-2019 om 19:35 schreef Ville Syrjälä:
> > On Tue, Oct 29, 2019 at 08:22:18AM +0100, Maarten Lankhorst wrote:
> >> Use this in all the places where we try to acquire planes after the planes
> >> atomic_check().
> >>
> >> In case of intel_modeset_all_pipes() this is not yet done after
> >> atomic_check,
> >> but seems like it will be in the future. To add some paranoia, add all
> >> planes
> >> rather than active planes, because of bigjoiner and planar YUV support
> >> having
> >> extra planes outside of the core's view that wouldn't be added otherwise.
> >>
> >> Changes since v1:
> >> - Always add all planes, to handle force plane updates to work correctly
> >> with a disabled cursor plane.
> >>
> >> Signed-off-by: Maarten Lankhorst
> >> ---
> >> drivers/gpu/drm/i915/display/intel_atomic.c | 41 +--
> >> .../gpu/drm/i915/display/intel_atomic_plane.c | 15 +++
> >> drivers/gpu/drm/i915/display/intel_cdclk.c| 15 ---
> >> drivers/gpu/drm/i915/display/intel_color.c| 7 ++--
> >> .../drm/i915/display/intel_display_types.h| 6 +++
> >> drivers/gpu/drm/i915/intel_pm.c | 14 ---
> >> 6 files changed, 62 insertions(+), 36 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
> >> b/drivers/gpu/drm/i915/display/intel_atomic.c
> >> index 9cd6d2348a1e..80df6c233581 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> >> @@ -313,13 +313,10 @@ int intel_atomic_setup_scalers(struct
> >> drm_i915_private *dev_priv,
> >> struct intel_crtc *intel_crtc,
> >> struct intel_crtc_state *crtc_state)
> >> {
> >> - struct drm_plane *plane = NULL;
> >> - struct intel_plane *intel_plane;
> >> - struct intel_plane_state *plane_state = NULL;
> >>struct intel_crtc_scaler_state *scaler_state =
> >>_state->scaler_state;
> >>struct drm_atomic_state *drm_state = crtc_state->base.state;
> >> - struct intel_atomic_state *intel_state =
> >> to_intel_atomic_state(drm_state);
> >> + struct intel_atomic_state *state = to_intel_atomic_state(drm_state);
> >>int num_scalers_need;
> >>int i;
> >>
> >> @@ -346,6 +343,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private
> >> *dev_priv,
> >>
> >>/* walkthrough scaler_users bits and start assigning scalers */
> >>for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
> >> + struct intel_plane_state *plane_state = NULL;
> >>int *scaler_id;
> >>const char *name;
> >>int idx;
> >> @@ -361,19 +359,16 @@ int intel_atomic_setup_scalers(struct
> >> drm_i915_private *dev_priv,
> >>/* panel fitter case: assign as a crtc scaler */
> >>scaler_id = _state->scaler_id;
> >>} else {
> >> - name = "PLANE";
> >> + struct intel_plane *plane;
> >>
> >>/* plane scaler case: assign as a plane scaler */
> >>/* find the plane that set the bit as scaler_user */
> >> - plane = drm_state->planes[i].ptr;
> >>
> >>/*
> >> * to enable/disable hq mode, add planes that are using
> >> scaler
> >> * into this transaction
> >> */
> >> - if (!plane) {
> >> - struct drm_plane_state *state;
> >> -
> >> + if (!drm_state->planes[i].ptr) {
> >>/*
> >> * GLK+ scalers don't have a HQ mode so it
> >> * isn't necessary to change between HQ and dyn
> >> mode
> >> @@ -382,24 +377,28 @@ int intel_atomic_setup_scalers(struct
> >> drm_i915_private *dev_priv,
> >>if (INTEL_GEN(dev_priv) >= 10 ||
> >> IS_GEMINILAKE(dev_priv))
> >>continue;
> >>
> >> - plane = drm_plane_from_index(_priv->drm, i);
> >> - state = drm_atomic_get_plane_state(drm_state,
> >> plane);
> >> - if (IS_ERR(state)) {
> >> - DRM_DEBUG_KMS("Failed to add [PLANE:%d]
> >> to drm_state\n",
> >> - plane->base.id);
> >> - return PTR_ERR(state);
> >> + plane =
> >> to_intel_plane(drm_plane_from_index(_priv->drm, i));
> >> + plane_state =
> >> +
> >> intel_atomic_get_plane_state_after_check(state,
> >> +
> >> crtc_state,
> >> +
> >> plane);
> >> +
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3.
== Series Details == Series: series starting with [CI,01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3. URL : https://patchwork.freedesktop.org/series/68775/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Handle a few more cases for crtc hw/uapi split, v3. Okay! Commit: drm/i915: Add aliases for uapi and hw to crtc_state Okay! Commit: drm/i915: Perform manual conversions for crtc uapi/hw split, v2. Okay! Commit: drm/i915: Perform automated conversions for crtc uapi/hw split, base -> hw. Okay! Commit: drm/i915: Perform automated conversions for crtc uapi/hw split, base -> uapi. Okay! Commit: drm/i915: Complete crtc hw/uapi split, v5. Okay! Commit: drm/i915: Add aliases for uapi and hw to plane_state Okay! Commit: drm/i915: Perform manual conversions for plane uapi/hw split, v2. Okay! Commit: drm/i915: Perform automated conversions for plane uapi/hw split, base -> hw. -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:184:44: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:283:14: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:320:14: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:323:14: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:326:14: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:329:18: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:330:26: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:338:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:340:38: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:344:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:347:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:350:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:354:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:356:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:361:33: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:375:43: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:379:38: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:382:38: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:385:38: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:390:67: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:391:53: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:394:66: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:405:80: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:411:57: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:418:69: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:419:53: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:422:66: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:430:66: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:439:69: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:440:69: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:489:30: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:492:45: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:493:45: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:500:54: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:52:28: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:53:29: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:54:26: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:547:35: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:549:25: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:55:27: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:56:25: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:57:26: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:58:25: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:59:26: warning: cast to restricted __le16 -drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c:593:21: warning: cast to
Re: [Intel-gfx] Unexpected screen flicker during i915 initialization
On Wed, 30 Oct 2019, Chris Chiu wrote: > Hi guys, > We have 2 laptops, ASUS Z406MA and Acer TravelMate B118, both > powered by the same Intel N5000 GemniLake CPU. On the Acer laptop, the > panel will blink once during boot which never happens on the ASUS > laptop. It caught my attention and I find the difference between them > but I need help for more information, > > The major difference happens in bxt_sanitize_cdclk() on the > following condition check. > if (cdctl == expected) > /* All well; nothing to sanitize */ > return; > > On the problematic Acer laptop, the value of cdctl is 0x27a while > the same cdctl is 0x278 on ASUS machine. Due to the 0x27a is not equal > to the expected value 0x278 so it needs to be sanitized by assigning > -1 to dev_priv->cdclk.hw.vco. Then the consequent bxt_set_cdclk() > will force the full PLL disable and enable. And that's the flicker > (blink) we observed during boot. > > Although I can't find the definition about the BIT(2) of CDCLK_CTL > which cause this difference. Can anyone suggest what exactly the > problem is and how should we deal with it? Thanks. The 11 least significant bits of that register are the cdclk frequency in 10.1 fixed point format. Apparently the Acer BIOS or GOP has a different idea of how to calculate the value from what i915 and the Asus think. To handle this in i915, we'd need to allow some deviation from the expected value, and only switch to use our value at the next modeset. We do need the sanitization though, because sometimes there have been completely bogus values to begin with. Please file a bug over at [1] and reference this thread. BR, Jani. [1] https://bugs.freedesktop.org/enter_bug.cgi?product=DRI=DRM/Intel -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] amdgpu/amd_basic: Restrict basic compute to only run on available compute rings
Some time ago amdgpu changed their ABI to reject unknown compute rings,
so we should query the available set prior to execution.
Signed-off-by: Chris Wilson
---
tests/amdgpu/amd_basic.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/tests/amdgpu/amd_basic.c b/tests/amdgpu/amd_basic.c
index d3c060e32..bf626ece8 100644
--- a/tests/amdgpu/amd_basic.c
+++ b/tests/amdgpu/amd_basic.c
@@ -681,16 +681,20 @@ static void amdgpu_command_submission_compute_nop(void)
struct amdgpu_cs_request ibs_request;
struct amdgpu_cs_ib_info ib_info;
struct amdgpu_cs_fence fence_status;
+ struct drm_amdgpu_info_hw_ip info;
uint32_t *ptr;
uint32_t expired;
- int i, r, instance;
+ int r, instance;
amdgpu_bo_list_handle bo_list;
amdgpu_va_handle va_handle;
+ r = amdgpu_query_hw_ip_info(device, AMDGPU_HW_IP_COMPUTE, 0, );
+ igt_assert_eq(r, 0);
+
r = amdgpu_cs_ctx_create(device, _handle);
igt_assert_eq(r, 0);
- for (instance = 0; instance < 8; instance++) {
+ for (instance = 0; info.available_rings & (1 << instance); instance++) {
r = amdgpu_bo_alloc_and_map(device, 4096, 4096,
AMDGPU_GEM_DOMAIN_GTT, 0,
_result_handle, _result_cpu,
@@ -702,8 +706,8 @@ static void amdgpu_command_submission_compute_nop(void)
igt_assert_eq(r, 0);
ptr = ib_result_cpu;
- for (i = 0; i < 16; ++i)
- ptr[i] = 0x1000;
+ memset(ptr, 0, 16);
+ ptr[0] = PACKET3(PACKET3_NOP, 14);
memset(_info, 0, sizeof(struct amdgpu_cs_ib_info));
ib_info.ib_mc_address = ib_result_mc_address;
--
2.24.0.rc1
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Re: [Intel-gfx] [PATCH i-g-t] i915/gem_exec_suspend: Measure power consumption during suspend
Quoting Mika Kuoppala (2019-10-30 12:30:47)
> Chris Wilson writes:
>
> > For this test, we need a laptop running on battery power so that we can
> > read the battery charge level before and after suspend. And then wait
> > long enough for a reliable measure.
> >
> > References: https://bugs.freedesktop.org/show_bug.cgi?id=111909
> > Signed-off-by: Chris Wilson
> > Cc: Mika Kuoppala
> > ---
> > tests/i915/gem_exec_suspend.c | 67 ++-
> > 1 file changed, 66 insertions(+), 1 deletion(-)
> >
> > diff --git a/tests/i915/gem_exec_suspend.c b/tests/i915/gem_exec_suspend.c
> > index af6190ddd..ee0d0719f 100644
> > --- a/tests/i915/gem_exec_suspend.c
> > +++ b/tests/i915/gem_exec_suspend.c
> > @@ -27,9 +27,13 @@
> > * Exercise executing batches across suspend before checking the results.
> > */
> >
> > +#include
> > +#include
> > +
> > #include "igt.h"
> > -#include "igt_gt.h"
> > #include "igt_dummyload.h"
> > +#include "igt_gt.h"
> > +#include "igt_sysfs.h"
> >
> > #define NOSLEEP 0
> > #define IDLE 1
> > @@ -232,6 +236,62 @@ static void run_test(int fd, unsigned engine, unsigned
> > flags)
> > test_all(fd, flags);
> > }
> >
> > +struct battery_sample {
> > + struct timespec tv;
> > + uint64_t charge;
> > +};
> > +
> > +static bool get_power(int dir, struct battery_sample *s)
> > +{
> > + return (clock_gettime(CLOCK_REALTIME, >tv) == 0 &&
> > + igt_sysfs_scanf(dir, "charge_now", "%"PRIu64, >charge) ==
> > 1);
> > +}
> > +
> > +static double d_charge(const struct battery_sample *after,
> > +const struct battery_sample *before)
> > +{
> > + return (before->charge - after->charge) * 1e-3; /* mWh */
> > +}
> > +
> > +static double d_time(const struct battery_sample *after,
> > + const struct battery_sample *before)
> > +{
> > + return ((after->tv.tv_sec - before->tv.tv_sec) +
> > + (after->tv.tv_nsec - before->tv.tv_nsec) * 1e-9);
> > +}
> > +
> > +static void power_test(int i915, unsigned engine, unsigned flags)
> > +{
> > + struct battery_sample before, after;
> > + char *status;
> > + int dir;
> > +
> > + dir = open("/sys/class/power_supply/BAT0", O_RDONLY);
> > + igt_require_f(dir != -1, "/sys/class/power_supply/BAT0 not
> > available\n");
> > +
> > + igt_require_f(get_power(dir, ),
> > + "power test needs reported energy level\n");
> > + free(status);
> This looks bogus.
>
> > +
> > + status = igt_sysfs_get(dir, "status");
> > + igt_require_f(status && strcmp(status, "Discharging") == 0,
> > + "power test needs to be on battery, not mains,
> > power\n");
> > + free(status);
> > +
> > + igt_set_autoresume_delay(30 * 60); /* 30 minutes */
>
> As you said, this is quite a long time. Even with the suspend and modern
> laptop it should show meaningful data quicker. But we need moar
> data on multiple specimens to find a good spot.
>
> > +
> > + igt_assert(get_power(dir, ));
> > + run_test(i915, engine, flags);
> > + igt_assert(get_power(dir, ));
> > +
> > + igt_set_autoresume_delay(0);
> > +
> > + igt_info("Power consumed while suspended: %.3fmWh\n",
> > + d_charge(, ));
> > + igt_info("Discharge rate while suspended: %.3fmW\n",
> > + d_charge(, ) * 3600 / d_time(, ));
>
> I dunno what is the go-to unit in here, but mA would be
> as comparable and time independant. Perhaps show both.
/sys/devices/power_supply/BAT0/ gives mWh and voltage iirc. I went with
mWh/mW as that seems the easiest with less modelling required.
> There are lot of potential in here to automate against pm
> regressions. Plugging this into the apc and gathering
> baseline consumptions.
Yup, fingers crossed that may happen. :)
> This is a neat start and I aimed at t-b too.
> Didn't happen so I can offer only,
>
> Acked-by: Mika Kuoppala
Ta.
-Chris
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[Intel-gfx] [CI 01/12] drm/i915: Handle a few more cases for crtc hw/uapi split, v3.
We are still looking at drm_crtc_state in a few places, convert those
to use intel_crtc_state instead.
Changes since v1:
- Move to before uapi/hw split.
- Add hunks for intel_pm.c as well.
Changes since v2:
- Incorporate Ville's feedback.
Signed-off-by: Maarten Lankhorst
Reviewed-by: Matt Roper
Reviewed-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display.c | 15 ---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 12
drivers/gpu/drm/i915/display/intel_psr.c | 16 +++-
drivers/gpu/drm/i915/intel_pm.c | 6 ++
4 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index e56a75c07043..a7d1515de048 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16720,8 +16720,7 @@ static int intel_initial_commit(struct drm_device *dev)
{
struct drm_atomic_state *state = NULL;
struct drm_modeset_acquire_ctx ctx;
- struct drm_crtc *crtc;
- struct drm_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
int ret = 0;
state = drm_atomic_state_alloc(dev);
@@ -16733,15 +16732,17 @@ static int intel_initial_commit(struct drm_device
*dev)
retry:
state->acquire_ctx =
- drm_for_each_crtc(crtc, dev) {
- crtc_state = drm_atomic_get_crtc_state(state, crtc);
+ for_each_intel_crtc(dev, crtc) {
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_crtc_state(state, crtc);
+
if (IS_ERR(crtc_state)) {
ret = PTR_ERR(crtc_state);
goto out;
}
- if (crtc_state->active) {
- ret = drm_atomic_add_affected_planes(state, crtc);
+ if (crtc_state->base.active) {
+ ret = drm_atomic_add_affected_planes(state,
>base);
if (ret)
goto out;
@@ -16751,7 +16752,7 @@ static int intel_initial_commit(struct drm_device *dev)
* having a proper LUT loaded. Remove once we
* have readout for pipe gamma enable.
*/
- crtc_state->color_mgmt_changed = true;
+ crtc_state->base.color_mgmt_changed = true;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index a9962846a503..42d26214fb23 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -168,7 +168,6 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
struct intel_connector *intel_connector =
to_intel_connector(connector);
struct drm_crtc *new_crtc = new_conn_state->crtc;
- struct drm_crtc_state *crtc_state;
struct drm_dp_mst_topology_mgr *mgr;
int ret;
@@ -183,11 +182,16 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
* connector
*/
if (new_crtc) {
- crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
+ struct intel_atomic_state *intel_state =
+ to_intel_atomic_state(state);
+ struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
+ struct intel_crtc_state *crtc_state =
+ intel_atomic_get_new_crtc_state(intel_state,
+ intel_crtc);
if (!crtc_state ||
- !drm_atomic_crtc_needs_modeset(crtc_state) ||
- crtc_state->enable)
+ !drm_atomic_crtc_needs_modeset(_state->base) ||
+ crtc_state->base.enable)
return 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 6a9f322d3fca..359a60762b49 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -26,6 +26,7 @@
#include "display/intel_dp.h"
#include "i915_drv.h"
+#include "intel_atomic.h"
#include "intel_display_types.h"
#include "intel_psr.h"
#include "intel_sprite.h"
@@ -1096,7 +1097,7 @@ static int intel_psr_fastset_force(struct
drm_i915_private *dev_priv)
struct drm_device *dev = _priv->drm;
struct drm_modeset_acquire_ctx ctx;
struct drm_atomic_state *state;
- struct drm_crtc *crtc;
+ struct intel_crtc *crtc;
int err;
state = drm_atomic_state_alloc(dev);
@@ -1107,21 +1108,18 @@ static int intel_psr_fastset_force(struct
drm_i915_private *dev_priv)
state->acquire_ctx =
retry:
- drm_for_each_crtc(crtc, dev) {
- struct drm_crtc_state *crtc_state;
- struct
[Intel-gfx] [CI 02/12] drm/i915: Add aliases for uapi and hw to crtc_state
Prepare to split up hw and uapi machinally, by adding a uapi and
hw alias. We will remove the base in a bit. This is a split from the
original uapi/hw patch, which did it all in one go.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/i915/display/intel_atomic.c | 8 --
drivers/gpu/drm/i915/display/intel_display.c | 2 ++
drivers/gpu/drm/i915/display/intel_display.h | 6 ++---
.../drm/i915/display/intel_display_types.h| 27 ++-
4 files changed, 37 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 9cd6d2348a1e..4826aa4ee8e7 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -186,9 +186,10 @@ intel_digital_connector_duplicate_state(struct
drm_connector *connector)
struct drm_crtc_state *
intel_crtc_duplicate_state(struct drm_crtc *crtc)
{
+ const struct intel_crtc_state *old_crtc_state =
to_intel_crtc_state(crtc->state);
struct intel_crtc_state *crtc_state;
- crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
+ crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL);
if (!crtc_state)
return NULL;
@@ -219,7 +220,10 @@ void
intel_crtc_destroy_state(struct drm_crtc *crtc,
struct drm_crtc_state *state)
{
- drm_atomic_helper_crtc_destroy_state(crtc, state);
+ struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
+
+ __drm_atomic_helper_crtc_destroy_state(_state->base);
+ kfree(crtc_state);
}
static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state
*scaler_state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index a7d1515de048..5bf460caf8a3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12595,6 +12595,8 @@ clear_intel_crtc_state(struct intel_crtc_state
*crtc_state)
/* Keep base drm_crtc_state intact, only clear our extended struct */
BUILD_BUG_ON(offsetof(struct intel_crtc_state, base));
+ BUILD_BUG_ON(offsetof(struct intel_crtc_state, uapi));
+ BUILD_BUG_ON(offsetof(struct intel_crtc_state, hw));
memcpy(_state->base + 1, _state->base + 1,
sizeof(*crtc_state) - sizeof(crtc_state->base));
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index ca7ca2804d8b..ca3eb6a1c125 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -447,10 +447,10 @@ enum phy_fia {
#define intel_atomic_crtc_state_for_each_plane_state( \
plane, plane_state, \
crtc_state) \
- for_each_intel_plane_mask(((crtc_state)->base.state->dev), (plane), \
- ((crtc_state)->base.plane_mask)) \
+ for_each_intel_plane_mask(((crtc_state)->uapi.state->dev), (plane), \
+ ((crtc_state)->uapi.plane_mask)) \
for_each_if ((plane_state = \
-
to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->base.state,
>base
+
to_intel_plane_state(__drm_atomic_get_current_plane_state((crtc_state)->uapi.state,
>base
void intel_link_compute_m_n(u16 bpp, int nlanes,
int pixel_clock, int link_clock,
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 40184e823c84..e84343d3bf8d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -757,7 +757,32 @@ enum intel_output_format {
};
struct intel_crtc_state {
+ union {
struct drm_crtc_state base;
+ /*
+* uapi (drm) state. This is the software state shown to userspace.
+* In particular, the following members are used for bookkeeping:
+* - crtc
+* - state
+* - *_changed
+* - event
+* - commit
+* - mode_blob
+*/
+ struct drm_crtc_state uapi;
+
+ /*
+* actual hardware state, the state we program to the hardware.
+* The following members are used to verify the hardware state:
+* - enable
+* - active
+* - mode / adjusted_mode
+* - color property blobs.
+*
+* During initial hw readout, they need to be copied to uapi.
+*/
+ struct drm_crtc_state hw;
+ };
/**
* quirks - bitfield with hw state readout quirks
@@ -1112,7 +1137,7 @@ struct cxsr_latency {
#define to_intel_atomic_state(x) container_of(x, struct intel_atomic_state,
base)
#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
-#define
Re: [Intel-gfx] [CI 10/12] drm/i915: Perform automated conversions for plane uapi/hw split, base -> uapi.
On Wed, Oct 30, 2019 at 03:26:55PM +0100, Maarten Lankhorst wrote:
> Split up plane_state->base to uapi. This is done using the following patch,
> ran after the previous commit that splits out any hw references:
>
> @@
> struct intel_plane_state *T;
> identifier x;
> @@
> -T->base.x
> +T->uapi.x
>
> @@
> struct intel_plane_state *T;
> @@
> -T->base
> +T->uapi
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_atomic.c | 2 +-
> .../gpu/drm/i915/display/intel_atomic_plane.c | 32 +--
> drivers/gpu/drm/i915/display/intel_display.c | 262 +-
> drivers/gpu/drm/i915/display/intel_fbc.c | 12 +-
> drivers/gpu/drm/i915/display/intel_overlay.c | 2 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 136 -
> drivers/gpu/drm/i915/intel_pm.c | 57 ++--
> 7 files changed, 252 insertions(+), 251 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
> b/drivers/gpu/drm/i915/display/intel_atomic.c
> index 0a5eee4c350f..ea24a45dab86 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> @@ -286,7 +286,7 @@ static void intel_atomic_setup_scaler(struct
> intel_crtc_scaler_state *scaler_sta
> if (plane_state && plane_state->hw.fb &&
> plane_state->hw.fb->format->is_yuv &&
> plane_state->hw.fb->format->num_planes > 1) {
> - struct intel_plane *plane =
> to_intel_plane(plane_state->base.plane);
> + struct intel_plane *plane =
> to_intel_plane(plane_state->uapi.plane);
> if (IS_GEN(dev_priv, 9) &&
> !IS_GEMINILAKE(dev_priv)) {
> mode = SKL_PS_SCALER_MODE_NV12;
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 4e928e361be1..18023422a34d 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -56,7 +56,7 @@ struct intel_plane *intel_plane_alloc(void)
> return ERR_PTR(-ENOMEM);
> }
>
> - __drm_atomic_helper_plane_reset(>base, _state->base);
> + __drm_atomic_helper_plane_reset(>base, _state->uapi);
> plane_state->scaler_id = -1;
>
> return plane;
> @@ -88,12 +88,12 @@ intel_plane_duplicate_state(struct drm_plane *plane)
> if (!intel_state)
> return NULL;
>
> - __drm_atomic_helper_plane_duplicate_state(plane, _state->base);
> + __drm_atomic_helper_plane_duplicate_state(plane, _state->uapi);
>
> intel_state->vma = NULL;
> intel_state->flags = 0;
>
> - return _state->base;
> + return _state->uapi;
> }
>
> /**
> @@ -111,7 +111,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
> struct intel_plane_state *plane_state = to_intel_plane_state(state);
> WARN_ON(plane_state->vma);
>
> - __drm_atomic_helper_plane_destroy_state(_state->base);
> + __drm_atomic_helper_plane_destroy_state(_state->uapi);
> kfree(plane_state);
> }
>
> @@ -121,7 +121,7 @@ unsigned int intel_plane_data_rate(const struct
> intel_crtc_state *crtc_state,
> const struct drm_framebuffer *fb = plane_state->hw.fb;
> unsigned int cpp;
>
> - if (!plane_state->base.visible)
> + if (!plane_state->uapi.visible)
> return 0;
>
> cpp = fb->format->cpp[0];
> @@ -144,10 +144,10 @@ bool intel_plane_calc_min_cdclk(struct
> intel_atomic_state *state,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> const struct intel_plane_state *plane_state =
> intel_atomic_get_new_plane_state(state, plane);
> - struct intel_crtc *crtc = to_intel_crtc(plane_state->base.crtc);
> + struct intel_crtc *crtc = to_intel_crtc(plane_state->uapi.crtc);
Still wrong?
Otherwise
Reviewed-by: Ville Syrjälä
> struct intel_crtc_state *crtc_state;
>
> - if (!plane_state->base.visible || !plane->min_cdclk)
> + if (!plane_state->uapi.visible || !plane->min_cdclk)
> return false;
>
> crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
> @@ -181,7 +181,7 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> const struct intel_plane_state
> *old_plane_state,
> struct intel_plane_state
> *new_plane_state)
> {
> - struct intel_plane *plane = to_intel_plane(new_plane_state->base.plane);
> + struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
> const struct drm_framebuffer *fb = new_plane_state->hw.fb;
> int ret;
>
> @@ -190,7 +190,7 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> new_crtc_state->c8_planes &= ~BIT(plane->id);
> new_crtc_state->data_rate[plane->id] = 0;
> new_crtc_state->min_cdclk[plane->id] = 0;
> -
Re: [Intel-gfx] [PATCH] drm/i915: Program LUT before intel_color_commit() if LUT was not previously set v2
On Mon, Oct 28, 2019 at 07:58:51PM +0100, Hans de Goede wrote:
> Since commit 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after
> vblank waits"), I am seeing an ugly colored flash of the first few display
> lines on 2 Cherry Trail devices when the gamma table gets set for the first
> time. A blue flash on a GPD win and a yellow flash on an Asus T100HA.
>
> The problem is that since this change, the LUT is programmed after the
> write *and latching* of the double-buffered register which causes the LUT
> to be used starting at the next frame. This means that the old LUT is still
> used for the first couple of lines of the display. If no LUT was in use
> before then the LUT registers may contain bogus values. This leads to
> messed up colors until the new LUT values are written. At least on CHT DSI
> panels this causes messed up colors on the first few lines.
>
> This commit fixes this by adding a load_lut_before_commit boolean,
> modifying commit_pipe_config() to load the luts earlier if this is set.
> and setting this from intel_color_check when enabling gamma (rather then
> updating an existing gamma table).
>
> Changes in v2:
> -Simply check for setting load_lut_before_commit to:
> if (!old_crtc_state->gamma_enable && new_crtc_state->gamma_enable)
>
> Fixes: 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after vblank
> waits")
> Signed-off-by: Hans de Goede
> ---
> drivers/gpu/drm/i915/display/intel_color.c | 14 ++
> drivers/gpu/drm/i915/display/intel_display.c | 6 +-
> drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
> 3 files changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> b/drivers/gpu/drm/i915/display/intel_color.c
> index fa44eb73d088..954a232c15d1 100644
> --- a/drivers/gpu/drm/i915/display/intel_color.c
> +++ b/drivers/gpu/drm/i915/display/intel_color.c
> @@ -1063,6 +1063,8 @@ intel_color_add_affected_planes(struct intel_crtc_state
> *new_crtc_state)
> intel_atomic_get_old_crtc_state(state, crtc);
> struct intel_plane *plane;
>
> + new_crtc_state->load_lut_before_commit = false;
> +
> if (!new_crtc_state->base.active ||
> drm_atomic_crtc_needs_modeset(_crtc_state->base))
> return 0;
> @@ -1071,6 +1073,18 @@ intel_color_add_affected_planes(struct
> intel_crtc_state *new_crtc_state)
> new_crtc_state->csc_enable == old_crtc_state->csc_enable)
> return 0;
>
> + /*
> + * Normally we load the LUTs after vblank / after the double-buffer
> + * registers written by commit have been latched, this avoids a
> + * gamma change mid-way the screen. This does mean that the first
> + * few lines of the display will (sometimes) still use the old
> + * table. This is fine when changing an existing LUT, but if this
> + * is the first time the LUT gets loaded, then the hw may contain
> + * random values, causing the first lines to have funky colors.
> + */
> + if (!old_crtc_state->gamma_enable && new_crtc_state->gamma_enable)
> + new_crtc_state->load_lut_before_commit = true;
Unfortunately gamma_enable is not abstract enough to cover all
platforms.
> +
> for_each_intel_plane_on_crtc(_priv->drm, crtc, plane) {
> struct intel_plane_state *plane_state;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index cbf9cf30050c..6b1dc5a5aeb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14168,8 +14168,11 @@ static void commit_pipe_config(struct
> intel_atomic_state *state,
>*/
> if (!modeset) {
> if (new_crtc_state->base.color_mgmt_changed ||
> - new_crtc_state->update_pipe)
> + new_crtc_state->update_pipe) {
> + if (new_crtc_state->load_lut_before_commit)
> + intel_color_load_luts(new_crtc_state);
We don't want to do this from within the vblank evade critical
section, so needs to be moved earlier.
Lemme try to cook up something...
> intel_color_commit(new_crtc_state);
> + }
>
> if (INTEL_GEN(dev_priv) >= 9)
> skl_detach_scalers(new_crtc_state);
> @@ -14717,6 +14720,7 @@ static void intel_atomic_commit_tail(struct
> intel_atomic_state *state)
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
> if (new_crtc_state->base.active &&
> !needs_modeset(new_crtc_state) &&
> + !new_crtc_state->load_lut_before_commit &&
> (new_crtc_state->base.color_mgmt_changed ||
>new_crtc_state->update_pipe))
> intel_color_load_luts(new_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/lmem: add the fake lmem region (rev2)
== Series Details == Series: drm/i915/lmem: add the fake lmem region (rev2) URL : https://patchwork.freedesktop.org/series/68733/ State : warning == Summary == $ dim checkpatch origin/drm-tip bfc4292da998 drm/i915/lmem: add the fake lmem region -:109: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #109: FILE: drivers/gpu/drm/i915/i915_params.c:184: +i915_param_named_unsafe(fake_lmem_start, ulong, 0600, + "Fake LMEM start offset (default: 0)"); total: 0 errors, 0 warnings, 1 checks, 233 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 03/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2.
Op 30-10-2019 om 18:03 schreef Ville Syrjälä:
> On Wed, Oct 30, 2019 at 03:26:48PM +0100, Maarten Lankhorst wrote:
>> intel_get_load_detect_pipe() needs to set uapi active,
>> uapi enable is set by the call to drm_atomic_set_mode_for_crtc(),
>> so we can remove it.
>>
>> intel_pipe_config_compare() needs to look at hw state, but I didn't
>> change spatch to look at it. It's easy enough to do manually.
>>
>> intel_atomic_check() definitely needs to check for uapi enable,
>> otherwise intel_modeset_pipe_config cannot copy uapi state to hw.
>>
>> Changes since v1:
>> - Actually set uapi.active in get_load_detect_pipe().
>>
>> Signed-off-by: Maarten Lankhorst
> I guess the load detection fail was something else?
>
> Reviewed-by: Ville Syrjälä
Yeah, needs your other patches in drm_misc to stop calling
calc_timestamping_constants. :)
>> ---
>> drivers/gpu/drm/i915/display/intel_display.c | 42 ++--
>> 1 file changed, 21 insertions(+), 21 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index 5bf460caf8a3..a66033e3bdfa 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector
>> *connector,
>> goto fail;
>> }
>>
>> -crtc_state->base.active = crtc_state->base.enable = true;
>> +crtc_state->uapi.active = true;
>>
>> if (!mode)
>> mode = _detect_mode;
>> @@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> PIPE_CONF_CHECK_X(output_types);
>>
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>>
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start);
>> -PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
>> +PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
>>
>> PIPE_CONF_CHECK_I(pixel_multiplier);
>> PIPE_CONF_CHECK_I(output_format);
>> @@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>>
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_INTERLACE);
>>
>> if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_PHSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_NHSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_PVSYNC);
>> -PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
>> +PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
>>DRM_MODE_FLAG_NVSYNC);
>> }
>>
>> @@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>>
>> bp_gamma = intel_color_get_gamma_bit_precision(pipe_config);
>> if (bp_gamma)
>> -PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, base.gamma_lut,
>> bp_gamma);
>> +PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut,
>> bp_gamma);
>>
>> }
>>
>> @@ -13203,7 +13203,7 @@ intel_pipe_config_compare(const struct
>> intel_crtc_state *current_config,
>> if (IS_G4X(dev_priv)
Re: [Intel-gfx] [PULL] topic/mst-suspend-resume-reprobe-2019-10-29-2
On Wed, Oct 30, 2019 at 7:23 PM Lyude Paul wrote: > > On Wed, 2019-10-30 at 10:21 +0100, Daniel Vetter wrote: > > On Tue, Oct 29, 2019 at 11:06 PM Lyude Paul wrote: > > > topic/mst-suspend-resume-reprobe-2019-10-29-2: > > > UAPI Changes: > > > > > > Cross-subsystem Changes: > > > > > > Core Changes: > > > * Handle UP requests asynchronously in the DP MST helpers, fixing > > > hotplug notifications and allowing us to implement suspend/resume > > > reprobing > > > * Add basic suspend/resume reprobing to the DP MST helpers > > > * Improve locking for link address reprobing and connection status > > > request handling in the DP MST helpers > > > * Miscellaneous refactoring in the DP MST helpers > > > * Add a Kconfig option to the DP MST helpers to enable tracking of > > > gets/puts for topology references for debugging purposes > > > > > > Driver Changes: > > > * nouveau: Resume hotplug interrupts earlier, so that sideband > > > messages may be transmitted during resume and thus allow > > > suspend/resume reprobing for DP MST to work > > > * nouveau: Avoid grabbing runtime PM references when handling short DP > > > pulses, so that handling sideband messages in resume codepaths with the > > > DP MST helpers doesn't deadlock us > > > * i915, nouveau, amdgpu, radeon: Use detect_ctx for probing MST > > > connectors, so that we can grab the topology manager's atomic lock > > > > > > Note: there's some amdgpu patches that I didn't realize were pushed > > > upstream already when creating this topic branch. When they fail to > > > apply, you can just ignore and skip them. > > > The following changes since commit > > > 2e79e22e092acd55da0b2db066e4826d7d152c41: > > > > Out of curiosity, why did you go with a topic branch here? Usually we > > only do those if there's a serious cross-tree coordination problem, > > that can't be solved with some acks for merging the patches through > > the unusual tree. Plus then some notes in the pull requests why and > > who should pull this in. These one here doesn't seem like this is > > necessary, and the standard approach of stuffing it all into > > drm-misc-next should be good enough. Also rule of thumb maintainers do > > the topic branch stuff with merges and prep and everything. > > > > I'm also confused with your "when they fail to apply", topic branches > > are only ever merged, not applied individually. > Ah sorry, I'm still a bit new to this. The reason I didn't want to just push > this into drm-misc is because without some of the nouveau and amdgpu patches > coming before the suspend/resume stuff there would have been regressions, and > I didn't want to push a bunch of unrelated patches into drm-misc and cause > issues like what happened the last time I merged a large MST series like this. Hm, what kind of mess happened? In general, all the tricks just move around where/who resolves the conflicts, if there's conflicts between trees and ongoing work you can't really avoid that. Approaches, sorted from most preferred to least: - Just smash it all into one tree, with maintainer acks for all the patches that go through the "wrong" tree. Committers get to sort out conflicts as they push new patches, maintainers get to bake them with a backmerge. Might not be the best around merge window where there's 4 weeks of no backmerging. But even then generally not a big deal. - 1) merge core patches 2) wait 3) merge driver patches 4) more waiting and backmerge 5) merge cleanups. Here author resolves conflicts when resubmitting. - do a topic branch if the above isn't fast enough (mostly that's for when the conflict is with a non-drm tree, where the waiting would be a full merge window). Here maintainers resolve conflicts when applying the topic pull request to each of their tree. More dance than the first option is imo only warranted if there's a known conflict looming, not "just in case". -Daniel > > -Daniel > > > > > Merge v5.4-rc4 into drm-next (2019-10-23 12:10:05 +0200) > > > > > > are available in the Git repository at: > > > > > > git://anongit.freedesktop.org/drm/drm-misc tags/topic/mst-suspend- > > > resume-reprobe-2019-10-29-2 > > > > > > for you to fetch changes up to 12a280c7286857119cf0d88c487f695e3a1c0912: > > > > > > drm/dp_mst: Add topology ref history tracking for debugging (2019-10-24 > > > 14:36:13 -0400) > > > > > > > > > UAPI Changes: > > > > > > Cross-subsystem Changes: > > > > > > Core Changes: > > > * Handle UP requests asynchronously in the DP MST helpers, fixing > > > hotplug notifications and allowing us to implement suspend/resume > > > reprobing > > > * Add basic suspend/resume reprobing to the DP MST helpers > > > * Improve locking for link address reprobing and connection status > > > request handling in the DP MST helpers > > > * Miscellaneous refactoring in the DP MST helpers > > > * Add a Kconfig option to the DP MST helpers to enable tracking of > > >
[Intel-gfx] [PATCH] drm/i915: Preload LUTs if the hw isn't currently using them
From: Ville Syrjälä
The LUTs are single buffered so in order to program them without
tearing we'd have to do it during vblank (actually to be 100%
effective it has to happen between start of vblank and frame start).
We have no proper mechanism for that at the moment so we just
defer loading them after the vblank waits have happened. That
is not quite sufficient (especially when committing multiple pipes
whose vblanks don't line up) so the LUT load will often leak into
the following frame causing tearing.
However in case the hardware wasn't previously using the LUT we
can preload it before setting the enable bit (which is double
buffered so won't tear). Let's determine if we can do such
preloading and make it happen. Slight variation between the
hardware requires some platforms specifics in the checks.
Hans is seeing ugly colored flash on VLV/CHV macchines (GPD win
and Asus T100HA) when the gamma LUT gets loaded for the first
time as the BIOS has left some junk in the LUT memory.
Cc: Hans de Goede
Fixes: 051a6d8d3ca0 ("drm/i915: Move LUT programming to happen after vblank
waits")
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_atomic.c | 1 +
drivers/gpu/drm/i915/display/intel_color.c| 61 +++
drivers/gpu/drm/i915/display/intel_display.c | 6 ++
.../drm/i915/display/intel_display_types.h| 1 +
4 files changed, 69 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
b/drivers/gpu/drm/i915/display/intel_atomic.c
index 9cd6d2348a1e..c2875b10adf9 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic.c
@@ -200,6 +200,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
crtc_state->update_wm_pre = false;
crtc_state->update_wm_post = false;
crtc_state->fifo_changed = false;
+ crtc_state->preload_luts = false;
crtc_state->wm.need_postvbl_update = false;
crtc_state->fb_bits = 0;
crtc_state->update_planes = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index fa44eb73d088..d33676e82140 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1022,6 +1022,55 @@ void intel_color_commit(const struct intel_crtc_state
*crtc_state)
dev_priv->display.color_commit(crtc_state);
}
+static bool intel_can_preload_luts(const struct intel_crtc_state
*new_crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(new_crtc_state->base.state);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
+ return !old_crtc_state->base.gamma_lut &&
+ !old_crtc_state->base.degamma_lut;
+}
+
+static bool chv_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(new_crtc_state->base.state);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
+ /*
+* CGM_PIPE_MODE is itself single buffered. We'd have to
+* somehow split it out from chv_load_luts() if we wanted
+* the ability to preload the GCM LUTs/CSC without tearing.
+*/
+ if (old_crtc_state->cgm_mode || new_crtc_state->cgm_mode)
+ return false;
+
+ return !old_crtc_state->base.gamma_lut;
+}
+
+static bool glk_can_preload_luts(const struct intel_crtc_state *new_crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->base.crtc);
+ struct intel_atomic_state *state =
+ to_intel_atomic_state(new_crtc_state->base.state);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+
+ /*
+* The hardware degamma is active whenever the pipe
+* CSC is active. Thus even if the old state has no
+* software degamma we need to avoid clobbering the
+* linear hardware degamma mid scanout.
+*/
+ return !old_crtc_state->csc_enable &&
+ !old_crtc_state->base.gamma_lut;
+}
+
int intel_color_check(struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
@@ -1165,6 +1214,8 @@ static int i9xx_color_check(struct intel_crtc_state
*crtc_state)
if (ret)
return ret;
+ crtc_state->preload_luts = intel_can_preload_luts(crtc_state);
+
return 0;
}
@@ -1217,6 +1268,8 @@ static int chv_color_check(struct intel_crtc_state
*crtc_state)
if (ret)
return ret;
+ crtc_state->preload_luts = chv_can_preload_luts(crtc_state);
+
Re: [Intel-gfx] [CI 08/12] drm/i915: Perform manual conversions for plane uapi/hw split, v2.
On Wed, Oct 30, 2019 at 03:26:53PM +0100, Maarten Lankhorst wrote:
> get_crtc_from_states() is called before plane_state is copied to uapi,
> so use the uapi state there.
>
> intel_legacy_cursor_update() could probably get away with looking at
> the hw state, but for clarity always look at the uapi state.
>
> Changes since v1:
> - Convert entirety of intel_legacy_cursor_update (Ville).
>
> Signed-off-by: Maarten Lankhorst
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 8 ++--
> drivers/gpu/drm/i915/display/intel_display.c | 45 ++-
> 2 files changed, 27 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 393fb97a3dca..416cfa439f33 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -225,11 +225,11 @@ static struct intel_crtc *
> get_crtc_from_states(const struct intel_plane_state *old_plane_state,
>const struct intel_plane_state *new_plane_state)
> {
> - if (new_plane_state->base.crtc)
> - return to_intel_crtc(new_plane_state->base.crtc);
> + if (new_plane_state->uapi.crtc)
> + return to_intel_crtc(new_plane_state->uapi.crtc);
>
> - if (old_plane_state->base.crtc)
> - return to_intel_crtc(old_plane_state->base.crtc);
> + if (old_plane_state->uapi.crtc)
> + return to_intel_crtc(old_plane_state->uapi.crtc);
>
> return NULL;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e30f467eec67..b0b2c46e4c0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15357,12 +15357,12 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
>* take the slowpath. Only changing fb or position should be
>* in the fastpath.
>*/
> - if (old_plane_state->base.crtc != >base ||
> - old_plane_state->base.src_w != src_w ||
> - old_plane_state->base.src_h != src_h ||
> - old_plane_state->base.crtc_w != crtc_w ||
> - old_plane_state->base.crtc_h != crtc_h ||
> - !old_plane_state->base.fb != !fb)
> + if (old_plane_state->uapi.crtc != >base ||
> + old_plane_state->uapi.src_w != src_w ||
> + old_plane_state->uapi.src_h != src_h ||
> + old_plane_state->uapi.crtc_w != crtc_w ||
> + old_plane_state->uapi.crtc_h != crtc_h ||
> + !old_plane_state->uapi.fb != !fb)
> goto slow;
>
> new_plane_state =
> to_intel_plane_state(intel_plane_duplicate_state(>base));
> @@ -15375,16 +15375,16 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> goto out_free;
> }
>
> - drm_atomic_set_fb_for_plane(_plane_state->base, fb);
> + drm_atomic_set_fb_for_plane(_plane_state->uapi, fb);
>
> - new_plane_state->base.src_x = src_x;
> - new_plane_state->base.src_y = src_y;
> - new_plane_state->base.src_w = src_w;
> - new_plane_state->base.src_h = src_h;
> - new_plane_state->base.crtc_x = crtc_x;
> - new_plane_state->base.crtc_y = crtc_y;
> - new_plane_state->base.crtc_w = crtc_w;
> - new_plane_state->base.crtc_h = crtc_h;
> + new_plane_state->uapi.src_x = src_x;
> + new_plane_state->uapi.src_y = src_y;
> + new_plane_state->uapi.src_w = src_w;
> + new_plane_state->uapi.src_h = src_h;
> + new_plane_state->uapi.crtc_x = crtc_x;
> + new_plane_state->uapi.crtc_y = crtc_y;
> + new_plane_state->uapi.crtc_w = crtc_w;
> + new_plane_state->uapi.crtc_h = crtc_h;
>
> ret = intel_plane_atomic_check_with_state(crtc_state, new_crtc_state,
> old_plane_state,
> new_plane_state);
> @@ -15395,13 +15395,14 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> if (ret)
> goto out_free;
>
> - intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->base.fb),
> ORIGIN_FLIP);
> - intel_frontbuffer_track(to_intel_frontbuffer(old_plane_state->base.fb),
> - to_intel_frontbuffer(new_plane_state->base.fb),
> + intel_frontbuffer_flush(to_intel_frontbuffer(new_plane_state->hw.fb),
> + ORIGIN_FLIP);
> + intel_frontbuffer_track(to_intel_frontbuffer(old_plane_state->hw.fb),
> + to_intel_frontbuffer(new_plane_state->hw.fb),
> plane->frontbuffer_bit);
>
> /* Swap plane state */
> - plane->base.state = _plane_state->base;
> + plane->base.state = _plane_state->uapi;
>
> /*
>* We cannot swap crtc_state as it may be in use by an atomic commit or
> @@ -15415,7 +15416,7 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
>*/
> crtc_state->active_planes =
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915/bios: use a flag for vbt hdmi level shift presence
== Series Details ==
Series: series starting with [1/4] drm/i915/bios: use a flag for vbt hdmi level
shift presence
URL : https://patchwork.freedesktop.org/series/68729/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7218_full -> Patchwork_15056_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15056_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@drm_import_export@prime:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-tglb8/igt@drm_import_exp...@prime.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-tglb4/igt@drm_import_exp...@prime.html
Known issues
Here are the changes found in Patchwork_15056_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112080]) +15 similar
issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-iclb4/igt@gem_b...@busy-vcs1.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-iclb8/igt@gem_b...@busy-vcs1.html
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +3
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-apl2/igt@gem_ctx_isolat...@rcs0-s3.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-apl6/igt@gem_ctx_isolat...@rcs0-s3.html
* igt@gem_ctx_isolation@vcs1-dirty-create:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [fdo#112080])
+4 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-iclb1/igt@gem_ctx_isolat...@vcs1-dirty-create.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-iclb7/igt@gem_ctx_isolat...@vcs1-dirty-create.html
* igt@gem_eio@in-flight-suspend:
- shard-skl: [PASS][9] -> [INCOMPLETE][10] ([fdo#104108]) +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-skl8/igt@gem_...@in-flight-suspend.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-skl3/igt@gem_...@in-flight-suspend.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +8 similar
issues
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-iclb5/igt@gem_exec_sched...@preempt-other-chain-bsd.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd2:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276]) +19 similar
issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-iclb1/igt@gem_exec_sched...@preempt-queue-bsd2.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-iclb8/igt@gem_exec_sched...@preempt-queue-bsd2.html
* igt@gem_linear_blits@interruptible:
- shard-apl: [PASS][15] -> [INCOMPLETE][16] ([fdo#103927] /
[fdo#112067])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-apl7/igt@gem_linear_bl...@interruptible.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-apl3/igt@gem_linear_bl...@interruptible.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-hsw: [PASS][17] -> [FAIL][18] ([fdo#112037])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-hsw5/igt@gem_persistent_rel...@forked-interruptible-thrashing.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-hsw6/igt@gem_persistent_rel...@forked-interruptible-thrashing.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [PASS][19] -> [DMESG-WARN][20] ([fdo#111870])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-hsw6/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-hsw6/igt@gem_userptr_bl...@map-fixed-invalidate-overlap-busy-gup.html
* igt@gem_userptr_blits@sync-unmap-after-close:
- shard-snb: [PASS][21] -> [DMESG-WARN][22] ([fdo#111870]) +2
similar issues
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7218/shard-snb5/igt@gem_userptr_bl...@sync-unmap-after-close.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15056/shard-snb2/igt@gem_userptr_bl...@sync-unmap-after-close.html
* igt@i915_selftest@mock_requests:
- shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#112156])
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915: Use drm_rect to simplify plane {crtc, src}_{x, y, w, h} printing
== Series Details ==
Series: series starting with [1/5] drm/i915: Use drm_rect to simplify plane
{crtc, src}_{x, y, w, h} printing
URL : https://patchwork.freedesktop.org/series/68728/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7216_full -> Patchwork_15055_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_15055_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15055_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15055_full:
### IGT changes ###
Possible regressions
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-snb: [PASS][1] -> [FAIL][2] +3 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-snb7/igt@kms_plane_low...@pipe-a-tiling-x.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-snb7/igt@kms_plane_low...@pipe-a-tiling-x.html
* igt@kms_plane_lowres@pipe-a-tiling-yf:
- shard-skl: [PASS][3] -> [FAIL][4] +11 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-skl4/igt@kms_plane_low...@pipe-a-tiling-yf.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-skl1/igt@kms_plane_low...@pipe-a-tiling-yf.html
* igt@kms_plane_lowres@pipe-b-tiling-none:
- shard-iclb: NOTRUN -> [FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-iclb7/igt@kms_plane_low...@pipe-b-tiling-none.html
* igt@kms_plane_lowres@pipe-b-tiling-x:
- shard-glk: [PASS][6] -> [FAIL][7] +11 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-glk1/igt@kms_plane_low...@pipe-b-tiling-x.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-glk9/igt@kms_plane_low...@pipe-b-tiling-x.html
- shard-apl: [PASS][8] -> [FAIL][9] +10 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-apl8/igt@kms_plane_low...@pipe-b-tiling-x.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-apl3/igt@kms_plane_low...@pipe-b-tiling-x.html
* igt@kms_plane_lowres@pipe-c-tiling-none:
- shard-iclb: [PASS][10] -> [FAIL][11] +8 similar issues
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-iclb8/igt@kms_plane_low...@pipe-c-tiling-none.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-iclb4/igt@kms_plane_low...@pipe-c-tiling-none.html
- shard-hsw: [PASS][12] -> [FAIL][13] +5 similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-hsw5/igt@kms_plane_low...@pipe-c-tiling-none.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-hsw5/igt@kms_plane_low...@pipe-c-tiling-none.html
* igt@kms_plane_lowres@pipe-c-tiling-yf:
- shard-kbl: [PASS][14] -> [FAIL][15] +11 similar issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-kbl7/igt@kms_plane_low...@pipe-c-tiling-yf.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-kbl2/igt@kms_plane_low...@pipe-c-tiling-yf.html
Warnings
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][16] ([fdo#103166]) -> [FAIL][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-iclb7/igt@kms_plane_low...@pipe-a-tiling-x.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-iclb2/igt@kms_plane_low...@pipe-a-tiling-x.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_flush@basic-wb-ro-before-default:
- {shard-tglb}: [PASS][18] -> [INCOMPLETE][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-tglb6/igt@gem_exec_fl...@basic-wb-ro-before-default.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-tglb4/igt@gem_exec_fl...@basic-wb-ro-before-default.html
* igt@kms_plane_lowres@pipe-a-tiling-none:
- {shard-tglb}: [PASS][20] -> [FAIL][21] +6 similar issues
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7216/shard-tglb2/igt@kms_plane_low...@pipe-a-tiling-none.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-tglb5/igt@kms_plane_low...@pipe-a-tiling-none.html
* igt@kms_plane_lowres@pipe-d-tiling-x:
- {shard-tglb}: NOTRUN -> [FAIL][22]
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15055/shard-tglb2/igt@kms_plane_low...@pipe-d-tiling-x.html
Known issues
Here are the changes found in
[Intel-gfx] [RFC PATCH i-g-t v3] tests/gem_exec_reloc: Don't filter out invalid addresses
Commit a355b2d6eb42 ("igt/gem_exec_reloc: Filter out unavailable
addresses for !ppgtt") introduced filtering of addresses possibly
occupied by other users of shared GTT. Unfortunately, that filtering
doesn't distinguish actually occupied addresses from otherwise invalid
softpin offsets. For example, on a future hardware backing store with
a page size larger than 4 kB incorrect object alignment is assumed and
the test results are distorted as it happily skips over incorrectly
aligned objects instead of reporting the problem.
Filter out failing addresses only if not reported as invalid.
Signed-off-by: Janusz Krzysztofik
Cc: Chris Wilson
---
tests/i915/gem_exec_reloc.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index fdd9661d..1d0c791e 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -520,7 +520,7 @@ static void basic_range(int fd, unsigned flags)
uint64_t gtt_size = gem_aperture_size(fd);
const uint32_t bbe = MI_BATCH_BUFFER_END;
igt_spin_t *spin = NULL;
- int count, n;
+ int count, n, err;
igt_require(gem_has_softpin(fd));
@@ -542,8 +542,11 @@ static void basic_range(int fd, unsigned flags)
gem_write(fd, obj[n].handle, 0, , sizeof(bbe));
execbuf.buffers_ptr = to_user_pointer([n]);
execbuf.buffer_count = 1;
- if (__gem_execbuf(fd, ))
+ err = __gem_execbuf(fd, );
+ if (err) {
+ igt_assert(err != -EINVAL);
continue;
+ }
igt_debug("obj[%d] handle=%d, address=%llx\n",
n, obj[n].handle, (long long)obj[n].offset);
@@ -562,8 +565,11 @@ static void basic_range(int fd, unsigned flags)
gem_write(fd, obj[n].handle, 0, , sizeof(bbe));
execbuf.buffers_ptr = to_user_pointer([n]);
execbuf.buffer_count = 1;
- if (__gem_execbuf(fd, ))
+ err = __gem_execbuf(fd, );
+ if (err) {
+ igt_assert(err != -EINVAL);
continue;
+ }
igt_debug("obj[%d] handle=%d, address=%llx\n",
n, obj[n].handle, (long long)obj[n].offset);
--
2.21.0
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PULL] drm-misc-fixes
Hi Daniel, Dave, Here is this week's round of fixes for drm-misc. Thanks! Maxime drm-misc-fixes-2019-10-30-1: - three fixes for panfrost, one to silence a warning, one to fix runtime_pm and one to prevent bogus pointer dereferences - one fix for a memleak in v3d The following changes since commit 8ae501e295cce9bc6e0dd82d5204a1d5faef44f8: drm/komeda: Fix typos in komeda_splitter_validate (2019-10-21 14:50:51 +0100) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2019-10-30-1 for you to fetch changes up to f70744c68779c8a72a0c82294e3233b994af656d: drm/panfrost: Don't dereference bogus MMU pointers (2019-10-29 13:18:17 -0500) - three fixes for panfrost, one to silence a warning, one to fix runtime_pm and one to prevent bogus pointer dereferences - one fix for a memleak in v3d Navid Emamdoost (1): drm/v3d: Fix memory leak in v3d_submit_cl_ioctl Robin Murphy (1): drm/panfrost: Don't dereference bogus MMU pointers Tomeu Vizoso (1): panfrost: Properly undo pm_runtime_enable when deferring a probe Yi Wang (1): drm/panfrost: fix -Wmissing-prototypes warnings drivers/gpu/drm/panfrost/panfrost_drv.c | 2 +- drivers/gpu/drm/panfrost/panfrost_mmu.c | 15 --- drivers/gpu/drm/panfrost/panfrost_perfcnt.c | 1 + drivers/gpu/drm/v3d/v3d_gem.c | 5 - 4 files changed, 14 insertions(+), 9 deletions(-) signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Split detaching and removing the vma
In order to keep the assert_bind_count() valid, we need to hold the vma
page reference until after we drop the bind count. However, we must also
keep the drm_mm_remove_node() as the last action of i915_vma_unbind() so
that it serialises with the unlocked check inside i915_vma_destroy(). So
we need to split up i915_vma_remove() so that we order the detach, drop
pages and remove as required during unbind.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=112067
Signed-off-by: Chris Wilson
Cc: Matthew Auld
---
drivers/gpu/drm/i915/i915_vma.c | 37 +++--
1 file changed, 17 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index d733bcf262f0..e5512f26e20a 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -700,41 +700,35 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64
alignment, u64 flags)
GEM_BUG_ON(!drm_mm_node_allocated(>node));
GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color));
- list_add_tail(>vm_link, >vm->bound_list);
-
if (vma->obj) {
- atomic_inc(>obj->bind_count);
- assert_bind_count(vma->obj);
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ atomic_inc(>bind_count);
+ assert_bind_count(obj);
}
+ list_add_tail(>vm_link, >vm->bound_list);
return 0;
}
static void
-i915_vma_remove(struct i915_vma *vma)
+i915_vma_detach(struct i915_vma *vma)
{
GEM_BUG_ON(!drm_mm_node_allocated(>node));
GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND |
I915_VMA_LOCAL_BIND));
- list_del(>vm_link);
-
/*
-* Since the unbound list is global, only move to that list if
-* no more VMAs exist.
+* And finally now the object is completely decoupled from this
+* vma, we can drop its hold on the backing storage and allow
+* it to be reaped by the shrinker.
*/
+ list_del(>vm_link);
if (vma->obj) {
struct drm_i915_gem_object *obj = vma->obj;
- /*
-* And finally now the object is completely decoupled from this
-* vma, we can drop its hold on the backing storage and allow
-* it to be reaped by the shrinker.
-*/
- atomic_dec(>bind_count);
assert_bind_count(obj);
+ atomic_dec(>bind_count);
}
-
- drm_mm_remove_node(>node);
}
static bool try_qad_pin(struct i915_vma *vma, unsigned int flags)
@@ -929,8 +923,10 @@ int i915_vma_pin(struct i915_vma *vma, u64 size, u64
alignment, u64 flags)
GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
err_remove:
- if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK))
- i915_vma_remove(vma);
+ if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) {
+ i915_vma_detach(vma);
+ drm_mm_remove_node(>node);
+ }
err_active:
i915_active_release(>active);
err_unlock:
@@ -1187,9 +1183,10 @@ int __i915_vma_unbind(struct i915_vma *vma)
}
atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR), >flags);
+ i915_vma_detach(vma);
vma_unbind_pages(vma);
- i915_vma_remove(vma);
+ drm_mm_remove_node(>node); /* pairs with i915_vma_destroy() */
return 0;
}
--
2.24.0.rc1
___
Intel-gfx mailing list
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 03/12] drm/i915: Perform manual conversions for crtc uapi/hw split, v2.
On Wed, Oct 30, 2019 at 03:26:48PM +0100, Maarten Lankhorst wrote:
> intel_get_load_detect_pipe() needs to set uapi active,
> uapi enable is set by the call to drm_atomic_set_mode_for_crtc(),
> so we can remove it.
>
> intel_pipe_config_compare() needs to look at hw state, but I didn't
> change spatch to look at it. It's easy enough to do manually.
>
> intel_atomic_check() definitely needs to check for uapi enable,
> otherwise intel_modeset_pipe_config cannot copy uapi state to hw.
>
> Changes since v1:
> - Actually set uapi.active in get_load_detect_pipe().
>
> Signed-off-by: Maarten Lankhorst
I guess the load detection fail was something else?
Reviewed-by: Ville Syrjälä
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 42 ++--
> 1 file changed, 21 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 5bf460caf8a3..a66033e3bdfa 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11433,7 +11433,7 @@ int intel_get_load_detect_pipe(struct drm_connector
> *connector,
> goto fail;
> }
>
> - crtc_state->base.active = crtc_state->base.enable = true;
> + crtc_state->uapi.active = true;
>
> if (!mode)
> mode = _detect_mode;
> @@ -13080,19 +13080,19 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_X(output_types);
>
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hdisplay);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_htotal);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_start);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hblank_end);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_start);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_hsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_htotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_hsync_end);
>
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vdisplay);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vtotal);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_start);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vblank_end);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_start);
> - PIPE_CONF_CHECK_I(base.adjusted_mode.crtc_vsync_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vdisplay);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vtotal);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vblank_end);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_start);
> + PIPE_CONF_CHECK_I(hw.adjusted_mode.crtc_vsync_end);
>
> PIPE_CONF_CHECK_I(pixel_multiplier);
> PIPE_CONF_CHECK_I(output_format);
> @@ -13109,17 +13109,17 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>
> PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
>
> - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_INTERLACE);
>
> if (!PIPE_CONF_QUIRK(PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS)) {
> - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_PHSYNC);
> - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_NHSYNC);
> - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_PVSYNC);
> - PIPE_CONF_CHECK_FLAGS(base.adjusted_mode.flags,
> + PIPE_CONF_CHECK_FLAGS(hw.adjusted_mode.flags,
> DRM_MODE_FLAG_NVSYNC);
> }
>
> @@ -13158,7 +13158,7 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>
> bp_gamma = intel_color_get_gamma_bit_precision(pipe_config);
> if (bp_gamma)
> - PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, base.gamma_lut,
> bp_gamma);
> + PIPE_CONF_CHECK_COLOR_LUT(gamma_mode, hw.gamma_lut,
> bp_gamma);
>
> }
>
> @@ -13203,7 +13203,7 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> if (IS_G4X(dev_priv) || INTEL_GEN(dev_priv) >= 5)
> PIPE_CONF_CHECK_I(pipe_bpp);
>
> - PIPE_CONF_CHECK_CLOCK_FUZZY(base.adjusted_mode.crtc_clock);
> +
Re: [Intel-gfx] [CI 11/12] drm/i915: Complete plane hw and uapi split, v2.
On Wed, Oct 30, 2019 at 03:26:56PM +0100, Maarten Lankhorst wrote:
> Splitting plane state is easier than splitting crtc_state,
> before plane check we copy the drm properties to hw so we can
> do the same in bigjoiner later on.
>
> We copy the state after we did all the modeset handling, but fortunately
> i915 seems to be split correctly and nothing during modeset looks
> at plane_state.
>
> Changes since v1:
> - Do not clear hw state on duplication.
>
> Signed-off-by: Maarten Lankhorst
lgtm, apart from the slightly wasteful types, but we can fix those
later when fixing the core struct too.
Reviewed-by: Ville Syrjälä
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 37 ++-
> .../gpu/drm/i915/display/intel_atomic_plane.h | 2 +
> drivers/gpu/drm/i915/display/intel_display.c | 1 +
> .../drm/i915/display/intel_display_types.h| 23 +---
> 4 files changed, 57 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 18023422a34d..249fb41d78a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -93,6 +93,10 @@ intel_plane_duplicate_state(struct drm_plane *plane)
> intel_state->vma = NULL;
> intel_state->flags = 0;
>
> + /* add reference to fb */
> + if (intel_state->hw.fb)
> + drm_framebuffer_get(intel_state->hw.fb);
> +
> return _state->uapi;
> }
>
> @@ -112,6 +116,8 @@ intel_plane_destroy_state(struct drm_plane *plane,
> WARN_ON(plane_state->vma);
>
> __drm_atomic_helper_plane_destroy_state(_state->uapi);
> + if (plane_state->hw.fb)
> + drm_framebuffer_put(plane_state->hw.fb);
> kfree(plane_state);
> }
>
> @@ -176,15 +182,44 @@ bool intel_plane_calc_min_cdclk(struct
> intel_atomic_state *state,
> return false;
> }
>
> +static void intel_plane_clear_hw_state(struct intel_plane_state *plane_state)
> +{
> + if (plane_state->hw.fb)
> + drm_framebuffer_put(plane_state->hw.fb);
> +
> + memset(_state->hw, 0, sizeof(plane_state->hw));
> +}
> +
> +void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> +const struct intel_plane_state
> *from_plane_state)
> +{
> + intel_plane_clear_hw_state(plane_state);
> +
> + plane_state->hw.crtc = from_plane_state->uapi.crtc;
> + plane_state->hw.fb = from_plane_state->uapi.fb;
> + if (plane_state->hw.fb)
> + drm_framebuffer_get(plane_state->hw.fb);
> +
> + plane_state->hw.alpha = from_plane_state->uapi.alpha;
> + plane_state->hw.pixel_blend_mode =
> + from_plane_state->uapi.pixel_blend_mode;
> + plane_state->hw.rotation = from_plane_state->uapi.rotation;
> + plane_state->hw.color_encoding = from_plane_state->uapi.color_encoding;
> + plane_state->hw.color_range = from_plane_state->uapi.color_range;
> +}
> +
> int intel_plane_atomic_check_with_state(const struct intel_crtc_state
> *old_crtc_state,
> struct intel_crtc_state *new_crtc_state,
> const struct intel_plane_state
> *old_plane_state,
> struct intel_plane_state
> *new_plane_state)
> {
> struct intel_plane *plane = to_intel_plane(new_plane_state->uapi.plane);
> - const struct drm_framebuffer *fb = new_plane_state->hw.fb;
> + const struct drm_framebuffer *fb;
> int ret;
>
> + intel_plane_copy_uapi_to_hw_state(new_plane_state, new_plane_state);
> + fb = new_plane_state->hw.fb;
> +
> new_crtc_state->active_planes &= ~BIT(plane->id);
> new_crtc_state->nv12_planes &= ~BIT(plane->id);
> new_crtc_state->c8_planes &= ~BIT(plane->id);
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index e61e9a82aadf..cdb0f97d09f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -20,6 +20,8 @@ extern const struct drm_plane_helper_funcs
> intel_plane_helper_funcs;
>
> unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> +void intel_plane_copy_uapi_to_hw_state(struct intel_plane_state *plane_state,
> +const struct intel_plane_state
> *from_plane_state);
> void intel_update_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 1584421c76b9..7ee5d1f5a180 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
>
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/lmem: add the fake lmem region (rev2)
== Series Details ==
Series: drm/i915/lmem: add the fake lmem region (rev2)
URL : https://patchwork.freedesktop.org/series/68733/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7226 -> Patchwork_15075
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/index.html
Known issues
Here are the changes found in Patchwork_15075 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] /
[fdo#109100])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* igt@gem_ctx_switch@legacy-render:
- fi-icl-u2: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-icl-u2/igt@gem_ctx_swi...@legacy-render.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-icl-u2/igt@gem_ctx_swi...@legacy-render.html
- fi-bxt-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- {fi-cml-s}: [INCOMPLETE][7] ([fdo#110566]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-cml-s/igt@gem_ctx_cre...@basic-files.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-cml-s/igt@gem_ctx_cre...@basic-files.html
- {fi-icl-u4}:[INCOMPLETE][9] ([fdo#107713] / [fdo#109100]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-icl-u4/igt@gem_ctx_cre...@basic-files.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-icl-u4/igt@gem_ctx_cre...@basic-files.html
* {igt@i915_selftest@live_gt_heartbeat}:
- fi-skl-guc: [DMESG-FAIL][11] ([fdo#112096]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7226/fi-skl-guc/igt@i915_selftest@live_gt_heartbeat.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/fi-skl-guc/igt@i915_selftest@live_gt_heartbeat.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#112096]: https://bugs.freedesktop.org/show_bug.cgi?id=112096
Participating hosts (51 -> 43)
--
Missing(8): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-byt-squawks fi-bsw-cyan
fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7226 -> Patchwork_15075
CI-20190529: 20190529
CI_DRM_7226: 6190cecae6196d219ea9a19c16a81598141c68af @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5253: d46ccb32cf693e8d8253543e9a4fbe5eaef4aa41 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15075: bfc4292da9986663c424d269f76eaf7d15655c2e @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bfc4292da998 drm/i915/lmem: add the fake lmem region
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15075/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [CI 06/12] drm/i915: Complete crtc hw/uapi split, v5.
On Wed, Oct 30, 2019 at 03:26:51PM +0100, Maarten Lankhorst wrote:
> Now that we separated everything into uapi and hw, it's
> time to make the split definitive. Remove the union and
> make a copy of the hw state on modeset and fastset.
>
> Color blobs are copied in crtc atomic_check(), right
> before color management is checked.
>
> Changes since v1:
> - Copy all blobs immediately after drm_atomic_helper_check_modeset().
> - Clear crtc_state->hw on disable, instead of using clear_intel_crtc_state().
> Changes since v2:
> - Use intel_crtc_free_hw_state + clear in intel_crtc_disable_noatomic().
> - Make a intel_crtc_prepare_state() function that clears the crtc_state
> and copies hw members.
> - Remove setting uapi.adjusted_mode, we now have a direct call to
> drm_calc_timestamping_constants().
> Changes since v3:
> - Rename prefix copy_hw_to_uapi_state() with intel_crtc.
> - Copy color blobs to uapi as well.
> - Add a intel_crtc_copy_uapi_to_hw_state_nomodeset() function for clarity.
> Changes since v4:
> - Copy hw.adjusted_mode back to uapi.adjusted_mode, to shut up
> the call to drm_calc_timestamping_constants() in
> drm_atomic_helper_update_legacy_modeset_state().
> - Use drm_property_replace_blob (Ville).
>
> Signed-off-by: Maarten Lankhorst
> ---
> drivers/gpu/drm/i915/display/intel_atomic.c | 31
> drivers/gpu/drm/i915/display/intel_atomic.h | 2 +
> drivers/gpu/drm/i915/display/intel_display.c | 78 +++
> .../drm/i915/display/intel_display_types.h| 9 ++-
> 4 files changed, 103 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.c
> b/drivers/gpu/drm/i915/display/intel_atomic.c
> index 48964f33c0c1..3301c178da03 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.c
> @@ -195,6 +195,14 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>
> __drm_atomic_helper_crtc_duplicate_state(crtc, _state->uapi);
>
> + /* copy color blobs */
> + if (crtc_state->hw.degamma_lut)
> + drm_property_blob_get(crtc_state->hw.degamma_lut);
> + if (crtc_state->hw.ctm)
> + drm_property_blob_get(crtc_state->hw.ctm);
> + if (crtc_state->hw.gamma_lut)
> + drm_property_blob_get(crtc_state->hw.gamma_lut);
> +
> crtc_state->update_pipe = false;
> crtc_state->disable_lp_wm = false;
> crtc_state->disable_cxsr = false;
> @@ -208,6 +216,28 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
> return _state->uapi;
> }
>
> +static void intel_crtc_put_color_blobs(struct intel_crtc_state *crtc_state)
> +{
> + drm_property_blob_put(crtc_state->hw.degamma_lut);
> + drm_property_blob_put(crtc_state->hw.gamma_lut);
> + drm_property_blob_put(crtc_state->hw.ctm);
> +}
> +
> +void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)
> +{
> + intel_crtc_put_color_blobs(crtc_state);
> +}
> +
> +void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state)
> +{
> + drm_property_replace_blob(_state->hw.degamma_lut,
> + crtc_state->uapi.degamma_lut);
> + drm_property_replace_blob(_state->hw.gamma_lut,
> + crtc_state->uapi.gamma_lut);
> + drm_property_replace_blob(_state->hw.ctm,
> + crtc_state->uapi.ctm);
> +}
> +
> /**
> * intel_crtc_destroy_state - destroy crtc state
> * @crtc: drm crtc
> @@ -223,6 +253,7 @@ intel_crtc_destroy_state(struct drm_crtc *crtc,
> struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
>
> __drm_atomic_helper_crtc_destroy_state(_state->uapi);
> + intel_crtc_free_hw_state(crtc_state);
> kfree(crtc_state);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic.h
> b/drivers/gpu/drm/i915/display/intel_atomic.h
> index 49d5cb1b9e0a..7b49623419ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic.h
> @@ -36,6 +36,8 @@ intel_digital_connector_duplicate_state(struct
> drm_connector *connector);
> struct drm_crtc_state *intel_crtc_duplicate_state(struct drm_crtc *crtc);
> void intel_crtc_destroy_state(struct drm_crtc *crtc,
> struct drm_crtc_state *state);
> +void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state);
> +void intel_crtc_copy_color_blobs(struct intel_crtc_state *crtc_state);
> struct drm_atomic_state *intel_atomic_state_alloc(struct drm_device *dev);
> void intel_atomic_state_clear(struct drm_atomic_state *state);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 66223701ef78..e30f467eec67 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7185,6 +7185,8 @@ static void intel_crtc_disable_noatomic(struct drm_crtc
> *crtc,
> crtc->enabled = false;
>
Re: [Intel-gfx] [CI 12/12] drm/i915: Remove special case slave handling during hw programming, v3.
On Wed, Oct 30, 2019 at 03:26:57PM +0100, Maarten Lankhorst wrote:
> Now that we split plane_state which I didn't want to do yet, we can
> program the slave plane without requiring the master plane.
>
> This is useful for programming bigjoiner slave planes as well. We
> will no longer need the master's plane_state.
>
> Changes since v1:
> - set src/dst rectangles after copy_uapi_to_hw_state.
> Changes since v2:
> - Use the correct color_plane for pre-gen11 by using planar_linked_plane !=
> NULL.
> - Use drm_format_info_is_yuv_semiplanar in skl_plane_check() to fix gen11+.
>
> Signed-off-by: Maarten Lankhorst
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 30 +-
> .../gpu/drm/i915/display/intel_atomic_plane.h | 3 -
> drivers/gpu/drm/i915/display/intel_display.c | 18 ++
> .../drm/i915/display/intel_display_types.h| 6 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 57 ++-
> 5 files changed, 40 insertions(+), 74 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 249fb41d78a5..93d391ab3f75 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -348,16 +348,6 @@ void intel_update_plane(struct intel_plane *plane,
> plane->update_plane(plane, crtc_state, plane_state);
> }
>
> -void intel_update_slave(struct intel_plane *plane,
> - const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state)
> -{
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> -
> - trace_intel_update_plane(>base, crtc);
> - plane->update_slave(plane, crtc_state, plane_state);
> -}
> -
> void intel_disable_plane(struct intel_plane *plane,
>const struct intel_crtc_state *crtc_state)
> {
> @@ -390,25 +380,9 @@ void skl_update_planes_on_crtc(struct intel_atomic_state
> *state,
> struct intel_plane_state *new_plane_state =
> intel_atomic_get_new_plane_state(state, plane);
>
> - if (new_plane_state->uapi.visible) {
> + if (new_plane_state->uapi.visible ||
> + new_plane_state->planar_slave) {
> intel_update_plane(plane, new_crtc_state,
> new_plane_state);
> - } else if (new_plane_state->planar_slave) {
> - struct intel_plane *master =
> - new_plane_state->planar_linked_plane;
> -
> - /*
> - * We update the slave plane from this function because
> - * programming it from the master plane's update_plane
> - * callback runs into issues when the Y plane is
> - * reassigned, disabled or used by a different plane.
> - *
> - * The slave plane is updated with the master plane's
> - * plane_state.
> - */
> - new_plane_state =
> - intel_atomic_get_new_plane_state(state, master);
> -
> - intel_update_slave(plane, new_crtc_state,
> new_plane_state);
> } else {
> intel_disable_plane(plane, new_crtc_state);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index cdb0f97d09f9..5cedafdddb55 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -25,9 +25,6 @@ void intel_plane_copy_uapi_to_hw_state(struct
> intel_plane_state *plane_state,
> void intel_update_plane(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state);
> -void intel_update_slave(struct intel_plane *plane,
> - const struct intel_crtc_state *crtc_state,
> - const struct intel_plane_state *plane_state);
> void intel_disable_plane(struct intel_plane *plane,
>const struct intel_crtc_state *crtc_state);
> struct intel_plane *intel_plane_alloc(void);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 7ee5d1f5a180..53f9c885fc56 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11988,6 +11988,24 @@ static int icl_check_nv12_planes(struct
> intel_crtc_state *crtc_state)
> crtc_state->active_planes |= BIT(linked->id);
> crtc_state->update_planes |= BIT(linked->id);
> DRM_DEBUG_KMS("Using %s as Y plane for %s\n",
> linked->base.name, plane->base.name);
> +
> + /* Copy parameters to slave
[Intel-gfx] [PATCH v2] drm/i915/lmem: add the fake lmem region
Intended for upstream testing so that we can still exercise the LMEM
plumbing and !i915_ggtt_has_aperture paths. Smoke tested on Skull Canyon
device. This works by allocating an intel_memory_region for a reserved
portion of system memory, which we treat like LMEM. For the LMEMBAR we
steal the aperture and 1:1 it map to the stolen region.
To enable simply set the i915 modparam fake_lmem_start= on the kernel
cmdline with the start of reserved region(see memmap=). The size of the
region we can use is determined by the size of the mappable aperture, so
the size of reserved region should be >= mappable_end. For now we only
enable for the selftests. Depends on CONFIG_DRM_I915_UNSTABLE being
enabled.
eg. memmap=2G$16G i915.fake_lmem_start=0x4
v2: make fake_lmem_start an i915 modparam
Signed-off-by: Matthew Auld
Cc: Joonas Lahtinen
Cc: Abdiel Janulgue
Cc: Arkadiusz Hiler
Cc: Chris Wilson
---
drivers/gpu/drm/i915/Kconfig.unstable | 8 ++
drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 3 +
drivers/gpu/drm/i915/i915_drv.c| 15
drivers/gpu/drm/i915/i915_params.c | 7 ++
drivers/gpu/drm/i915/i915_params.h | 1 +
drivers/gpu/drm/i915/intel_memory_region.c | 3 +
drivers/gpu/drm/i915/intel_memory_region.h | 6 ++
drivers/gpu/drm/i915/intel_region_lmem.c | 92 ++
drivers/gpu/drm/i915/intel_region_lmem.h | 5 ++
9 files changed, 140 insertions(+)
diff --git a/drivers/gpu/drm/i915/Kconfig.unstable
b/drivers/gpu/drm/i915/Kconfig.unstable
index cf151a297ed7..b0e5372959a1 100644
--- a/drivers/gpu/drm/i915/Kconfig.unstable
+++ b/drivers/gpu/drm/i915/Kconfig.unstable
@@ -19,3 +19,11 @@ config DRM_I915_UNSTABLE
Recommended for driver developers _only_.
If in the slightest bit of doubt, say "N".
+
+config DRM_I915_UNSTABLE_FAKE_LMEM
+ bool "Enable the experimental fake lmem"
+ depends on DRM_I915_UNSTABLE
+ default n
+ help
+ Convert some system memory into a fake local memory region for
+ testing.
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
index 926f6c940e0d..0e2bf6b7e143 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c
@@ -24,6 +24,7 @@ i915_gem_object_lmem_io_map_page(struct drm_i915_gem_object
*obj,
resource_size_t offset;
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= obj->mm.region->region.start;
return io_mapping_map_wc(>mm.region->iomap, offset, PAGE_SIZE);
}
@@ -35,6 +36,7 @@ i915_gem_object_lmem_io_map_page_atomic(struct
drm_i915_gem_object *obj,
resource_size_t offset;
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= obj->mm.region->region.start;
return io_mapping_map_atomic_wc(>mm.region->iomap, offset);
}
@@ -49,6 +51,7 @@ i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj,
GEM_BUG_ON(!i915_gem_object_is_contiguous(obj));
offset = i915_gem_object_get_dma_address(obj, n);
+ offset -= obj->mm.region->region.start;
return io_mapping_map_wc(>mm.region->iomap, offset, size);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 21273b516dbe..480e2054f628 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1483,6 +1483,21 @@ int i915_driver_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
if (!i915_modparams.nuclear_pageflip && match_info->gen < 5)
dev_priv->drm.driver_features &= ~DRIVER_ATOMIC;
+ /*
+* Check if we support fake LMEM -- for now we only unleash this for
+* the live selftests(test-and-exit).
+*/
+ if (IS_ENABLED(CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM)) {
+ if (INTEL_GEN(dev_priv) >= 9 && i915_selftest.live < 0 &&
+ i915_modparams.fake_lmem_start) {
+ mkwrite_device_info(dev_priv)->memory_regions =
+ REGION_SMEM | REGION_LMEM | REGION_STOLEN;
+ mkwrite_device_info(dev_priv)->is_dgfx = true;
+ GEM_BUG_ON(!HAS_LMEM(dev_priv));
+ GEM_BUG_ON(!IS_DGFX(dev_priv));
+ }
+ }
+
ret = pci_enable_device(pdev);
if (ret)
goto out_fini;
diff --git a/drivers/gpu/drm/i915/i915_params.c
b/drivers/gpu/drm/i915/i915_params.c
index 3fa79adb2c1c..1dd1f3652795 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -179,6 +179,11 @@ i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host
support(default:false)");
#endif
+#if IS_ENABLED(CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM)
+i915_param_named_unsafe(fake_lmem_start, ulong, 0600,
+ "Fake LMEM start offset (default: 0)");
+#endif
+
static __always_inline void
Re: [Intel-gfx] [PATCH v2] drm/i915/lmem: add the fake lmem region
Quoting Matthew Auld (2019-10-30 17:33:20) > Intended for upstream testing so that we can still exercise the LMEM > plumbing and !i915_ggtt_has_aperture paths. Smoke tested on Skull Canyon > device. This works by allocating an intel_memory_region for a reserved > portion of system memory, which we treat like LMEM. For the LMEMBAR we > steal the aperture and 1:1 it map to the stolen region. > > To enable simply set the i915 modparam fake_lmem_start= on the kernel > cmdline with the start of reserved region(see memmap=). The size of the > region we can use is determined by the size of the mappable aperture, so > the size of reserved region should be >= mappable_end. For now we only > enable for the selftests. Depends on CONFIG_DRM_I915_UNSTABLE being > enabled. And trybot with @@ -37,6 +37,9 @@ config DRM_I915_DEBUG select DRM_I915_DEBUG_RUNTIME_PM select DRM_I915_DEBUG_MMIO select BROKEN # for prototype uAPI + select STAGING + select DRM_I915_UNSTABLE + select DRM_I915_UNSTABLE_FAKE_LMEM default n help Choose this option to turn on extra driver debugging that may affect ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PULL] topic/mst-suspend-resume-reprobe-2019-10-29-2
On Wed, 2019-10-30 at 10:21 +0100, Daniel Vetter wrote: > On Tue, Oct 29, 2019 at 11:06 PM Lyude Paul wrote: > > topic/mst-suspend-resume-reprobe-2019-10-29-2: > > UAPI Changes: > > > > Cross-subsystem Changes: > > > > Core Changes: > > * Handle UP requests asynchronously in the DP MST helpers, fixing > > hotplug notifications and allowing us to implement suspend/resume > > reprobing > > * Add basic suspend/resume reprobing to the DP MST helpers > > * Improve locking for link address reprobing and connection status > > request handling in the DP MST helpers > > * Miscellaneous refactoring in the DP MST helpers > > * Add a Kconfig option to the DP MST helpers to enable tracking of > > gets/puts for topology references for debugging purposes > > > > Driver Changes: > > * nouveau: Resume hotplug interrupts earlier, so that sideband > > messages may be transmitted during resume and thus allow > > suspend/resume reprobing for DP MST to work > > * nouveau: Avoid grabbing runtime PM references when handling short DP > > pulses, so that handling sideband messages in resume codepaths with the > > DP MST helpers doesn't deadlock us > > * i915, nouveau, amdgpu, radeon: Use detect_ctx for probing MST > > connectors, so that we can grab the topology manager's atomic lock > > > > Note: there's some amdgpu patches that I didn't realize were pushed > > upstream already when creating this topic branch. When they fail to > > apply, you can just ignore and skip them. > > The following changes since commit > > 2e79e22e092acd55da0b2db066e4826d7d152c41: > > Out of curiosity, why did you go with a topic branch here? Usually we > only do those if there's a serious cross-tree coordination problem, > that can't be solved with some acks for merging the patches through > the unusual tree. Plus then some notes in the pull requests why and > who should pull this in. These one here doesn't seem like this is > necessary, and the standard approach of stuffing it all into > drm-misc-next should be good enough. Also rule of thumb maintainers do > the topic branch stuff with merges and prep and everything. > > I'm also confused with your "when they fail to apply", topic branches > are only ever merged, not applied individually. Ah sorry, I'm still a bit new to this. The reason I didn't want to just push this into drm-misc is because without some of the nouveau and amdgpu patches coming before the suspend/resume stuff there would have been regressions, and I didn't want to push a bunch of unrelated patches into drm-misc and cause issues like what happened the last time I merged a large MST series like this. > -Daniel > > > Merge v5.4-rc4 into drm-next (2019-10-23 12:10:05 +0200) > > > > are available in the Git repository at: > > > > git://anongit.freedesktop.org/drm/drm-misc tags/topic/mst-suspend- > > resume-reprobe-2019-10-29-2 > > > > for you to fetch changes up to 12a280c7286857119cf0d88c487f695e3a1c0912: > > > > drm/dp_mst: Add topology ref history tracking for debugging (2019-10-24 > > 14:36:13 -0400) > > > > > > UAPI Changes: > > > > Cross-subsystem Changes: > > > > Core Changes: > > * Handle UP requests asynchronously in the DP MST helpers, fixing > > hotplug notifications and allowing us to implement suspend/resume > > reprobing > > * Add basic suspend/resume reprobing to the DP MST helpers > > * Improve locking for link address reprobing and connection status > > request handling in the DP MST helpers > > * Miscellaneous refactoring in the DP MST helpers > > * Add a Kconfig option to the DP MST helpers to enable tracking of > > gets/puts for topology references for debugging purposes > > > > Driver Changes: > > * nouveau: Resume hotplug interrupts earlier, so that sideband > > messages may be transmitted during resume and thus allow > > suspend/resume reprobing for DP MST to work > > * nouveau: Avoid grabbing runtime PM references when handling short DP > > pulses, so that handling sideband messages in resume codepaths with the > > DP MST helpers doesn't deadlock us > > * i915, nouveau, amdgpu, radeon: Use detect_ctx for probing MST > > connectors, so that we can grab the topology manager's atomic lock > > > > Note: there's some amdgpu patches that I didn't realize were pushed > > upstream already when creating this topic branch. When they fail to > > apply, you can just ignore and skip them. > > > > > > Lyude Paul (14): > > drm/dp_mst: Destroy MSTBs asynchronously > > drm/dp_mst: Remove PDT teardown in drm_dp_destroy_port() and > > refactor > > drm/dp_mst: Refactor pdt setup/teardown, add more locking > > drm/dp_mst: Handle UP requests asynchronously > > drm/dp_mst: Add probe_lock > > drm/dp_mst: Protect drm_dp_mst_port members with locking > > drm/dp_mst: Don't forget to update port->input in > >
Re: [Intel-gfx] [PATCH 1/2] drm/i915/uc: define GuC and HuC binaries for TGL
On 10/26/19 3:44 AM, Michal Wajdeczko wrote: On Sat, 26 Oct 2019 02:35:06 +0200, Daniele Ceraolo Spurio wrote: GuC 35.2.0 and HuC 7.0.3 are the first production releases for TGL. GuC 35.2 for gen12 is interface-compatible with 33.0 on older gens, because the differences are related to additional blocks/commands in the interface to support new Gen12 features. These parts of the interface will be added when the relevant features are enabled. Signed-off-by: Daniele Ceraolo Spurio Cc: Michal Wajdeczko Cc: Anusha Srivatsa --- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index bb4889d2346d..09201f12f5cc 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -37,8 +37,13 @@ void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, /* * List of required GuC and HuC binaries per-platform. * Must be ordered based on platform + revid, from newer to older. + * + * TGL 35.2 is interface-compatible with 33.0 for previous gens. The deltas + * between 33.0 and 35.2 are only related to new additions to support new gen12 + * features. nit: s/gen12/Gen12 (same for "gens"), here and in the commit message Reviewed-by: Michal Wajdeczko Both blobs are loading fine in CI, so fixed the typos and pushed. Thanks, Daniele Thanks, Michal ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: add support to one DP-MST stream (rev3)
== Series Details ==
Series: drm/i915/tgl: add support to one DP-MST stream (rev3)
URL : https://patchwork.freedesktop.org/series/68671/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7219_full -> Patchwork_15059_full
Summary
---
**SUCCESS**
No regressions found.
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_15059_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@gem_ctx_persistence@bcs0-mixed-process}:
- shard-skl: [PASS][1] -> [FAIL][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-skl10/igt@gem_ctx_persiste...@bcs0-mixed-process.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-skl2/igt@gem_ctx_persiste...@bcs0-mixed-process.html
* {igt@gem_ctx_persistence@vcs1-queued}:
- shard-iclb: [SKIP][3] ([fdo#109276]) -> [FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb8/igt@gem_ctx_persiste...@vcs1-queued.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb1/igt@gem_ctx_persiste...@vcs1-queued.html
* {igt@gem_ctx_persistence@vcs2-persistence}:
- {shard-tglb}: NOTRUN -> [SKIP][5] +1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-tglb5/igt@gem_ctx_persiste...@vcs2-persistence.html
* {igt@gem_ctx_persistence@vecs0-queued}:
- {shard-tglb}: NOTRUN -> [FAIL][6]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-tglb8/igt@gem_ctx_persiste...@vecs0-queued.html
* igt@gem_ctx_switch@legacy-default-heavy-queue:
- {shard-tglb}: NOTRUN -> [INCOMPLETE][7]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-tglb3/igt@gem_ctx_swi...@legacy-default-heavy-queue.html
* igt@kms_pipe_crc_basic@nonblocking-crc-pipe-a-frame-sequence:
- {shard-tglb}: [PASS][8] -> [INCOMPLETE][9] +1 similar issue
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-tglb7/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-tglb1/igt@kms_pipe_crc_ba...@nonblocking-crc-pipe-a-frame-sequence.html
Known issues
Here are the changes found in Patchwork_15059_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [PASS][10] -> [SKIP][11] ([fdo#109276] /
[fdo#112080]) +1 similar issue
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb4/igt@gem_ctx_isolat...@vcs1-clean.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb5/igt@gem_ctx_isolat...@vcs1-clean.html
* igt@gem_ctx_switch@vcs1-heavy-queue:
- shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#112080]) +10 similar
issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb4/igt@gem_ctx_swi...@vcs1-heavy-queue.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb6/igt@gem_ctx_swi...@vcs1-heavy-queue.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][14] -> [SKIP][15] ([fdo#109276]) +17 similar
issues
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb2/igt@gem_exec_sched...@independent-bsd2.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb8/igt@gem_exec_sched...@independent-bsd2.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
- shard-iclb: [PASS][16] -> [SKIP][17] ([fdo#112146]) +3 similar
issues
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb6/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb1/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html
* igt@gem_softpin@noreloc-s3:
- shard-iclb: [PASS][18] -> [DMESG-WARN][19] ([fdo#111764])
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-iclb5/igt@gem_soft...@noreloc-s3.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-iclb2/igt@gem_soft...@noreloc-s3.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-hsw: [PASS][20] -> [DMESG-WARN][21] ([fdo#111870])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7219/shard-hsw2/igt@gem_userptr_bl...@dmabuf-unsync.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15059/shard-hsw5/igt@gem_userptr_bl...@dmabuf-unsync.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-snb: [PASS][22] -> [DMESG-WARN][23] ([fdo#111870])
[22]:
Re: [Intel-gfx] [PATCH 5/5] drm/i915: Defer rc6 shutdown to suspend_late
Hi Chris,
On Wed, Oct 30, 2019 at 10:38:27AM +, Chris Wilson wrote:
> Currently we shutdown rc6 during i915_gem_resume() but this is called
> during the preparation phase (i915_drm_prepare) for all suspend paths,
> but we only want to shutdown rc6 for S3+. Move the actual shutdown to
> i915_gem_suspend_late().
>
> We then need to differentiate between suspend targets, to distinguish S0
> (s2idle) where the device is kept awake but needs to be in a low power
> mode (the same as runtime suspend) from the device suspend levels where
> we lose control of HW and so must disable any HW access to dangling
> memory.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111909
> Fixes: c113236718e8 ("drm/i915: Extract GT render sleep (rc6) management")
> Testcase: igt/gem_exec_suspend/power-S0
> Signed-off-by: Chris Wilson
> Cc: Andi Shyti
Looks OK! Thanks!
Acked-by: Andi Shyti
Andi
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH V6 6/6] docs: sample driver to demonstrate how to implement virtio-mdev framework
On 2019/10/31 上午5:23, Christoph Hellwig wrote: On Wed, Oct 30, 2019 at 02:44:44PM +0800, Jason Wang wrote: This sample driver creates mdev device that simulate virtio net device over virtio mdev transport. The device is implemented through vringh and workqueue. A device specific dma ops is to make sure HVA is used directly as the IOVA. This should be sufficient for kernel virtio driver to work. Only 'virtio' type is supported right now. I plan to add 'vhost' type on top which requires some virtual IOMMU implemented in this sample driver. Can we please submit a real driver for it? A more or less useless sample driver doesn't really qualify for our normal kernel requirements that infrastructure should have a real user. Intel posted a real driver here: https://lkml.org/lkml/2019/10/15/1226. I plan to post another driver that wire virito-pci back to mdev bus on top of this series as well. Thanks ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: drop lrc header page
Recent GuC binaries (including all the ones we're currently using)
don't require this shared area anymore, having moved the relevant
entries into the stage pool instead. i915 itself doesn't write
anything into it either, so we can safely drop it.
Signed-off-by: Daniele Ceraolo Spurio
Cc: Chris Wilson
Cc: Michal Wajdeczko
Cc: John Harrison
Cc: Matthew Brost
---
drivers/gpu/drm/i915/gt/intel_lrc.c| 22 +++--
drivers/gpu/drm/i915/gt/intel_lrc.h| 23 ++
drivers/gpu/drm/i915/gt/selftest_context.c | 3 ---
drivers/gpu/drm/i915/gvt/scheduler.c | 4 ++--
4 files changed, 7 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 6fb3def5ba16..51aef2a233cb 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -471,8 +471,7 @@ lrc_descriptor(struct intel_context *ce, struct
intel_engine_cs *engine)
if (IS_GEN(engine->i915, 8))
desc |= GEN8_CTX_L3LLC_COHERENT;
- desc |= i915_ggtt_offset(ce->state) + LRC_HEADER_PAGES * PAGE_SIZE;
- /* bits 12-31 */
+ desc |= i915_ggtt_offset(ce->state); /* bits 12-31 */
/*
* The following 32bits are copied into the OA reports (dword 2).
* Consider updating oa_get_render_ctx_id in i915_perf.c when changing
@@ -2316,7 +2315,6 @@ set_redzone(void *vaddr, const struct intel_engine_cs
*engine)
if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
return;
- vaddr += LRC_HEADER_PAGES * PAGE_SIZE;
vaddr += engine->context_size;
memset(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE);
@@ -2328,7 +2326,6 @@ check_redzone(const void *vaddr, const struct
intel_engine_cs *engine)
if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
return;
- vaddr += LRC_HEADER_PAGES * PAGE_SIZE;
vaddr += engine->context_size;
if (memchr_inv(vaddr, POISON_INUSE, I915_GTT_PAGE_SIZE))
@@ -3995,12 +3992,6 @@ populate_lr_context(struct intel_context *ce,
set_redzone(vaddr, engine);
if (engine->default_state) {
- /*
-* We only want to copy over the template context state;
-* skipping over the headers reserved for GuC communication,
-* leaving those as zero.
-*/
- const unsigned long start = LRC_HEADER_PAGES * PAGE_SIZE;
void *defaults;
defaults = i915_gem_object_pin_map(engine->default_state,
@@ -4010,7 +4001,7 @@ populate_lr_context(struct intel_context *ce,
goto err_unpin_ctx;
}
- memcpy(vaddr + start, defaults + start, engine->context_size);
+ memcpy(vaddr, defaults, engine->context_size);
i915_gem_object_unpin_map(engine->default_state);
inhibit = false;
}
@@ -4025,9 +4016,7 @@ populate_lr_context(struct intel_context *ce,
ret = 0;
err_unpin_ctx:
- __i915_gem_object_flush_map(ctx_obj,
- LRC_HEADER_PAGES * PAGE_SIZE,
- engine->context_size);
+ __i915_gem_object_flush_map(ctx_obj, 0, engine->context_size);
i915_gem_object_unpin_map(ctx_obj);
return ret;
}
@@ -4044,11 +4033,6 @@ static int __execlists_context_alloc(struct
intel_context *ce,
GEM_BUG_ON(ce->state);
context_size = round_up(engine->context_size, I915_GTT_PAGE_SIZE);
- /*
-* Before the actual start of the context image, we insert a few pages
-* for our own use and for sharing with the GuC.
-*/
- context_size += LRC_HEADER_PAGES * PAGE_SIZE;
if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
context_size += I915_GTT_PAGE_SIZE; /* for redzone */
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.h
b/drivers/gpu/drm/i915/gt/intel_lrc.h
index faa2d56c279b..04511d8ebdc1 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.h
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.h
@@ -86,31 +86,12 @@ int intel_execlists_submission_setup(struct intel_engine_cs
*engine);
int intel_execlists_submission_init(struct intel_engine_cs *engine);
/* Logical Ring Contexts */
-
-/*
- * We allocate a header at the start of the context image for our own
- * use, therefore the actual location of the logical state is offset
- * from the start of the VMA. The layout is
- *
- * | [guc] | [hwsp] [logical state] |
- * |<- our header ->|<- context image ->|
- *
- */
-/* The first page is used for sharing data with the GuC */
-#define LRC_GUCSHR_PN (0)
-#define LRC_GUCSHR_SZ (1)
/* At the start of the context image is its per-process HWS page */
-#define LRC_PPHWSP_PN (LRC_GUCSHR_PN + LRC_GUCSHR_SZ)
+#define LRC_PPHWSP_PN (0)
#define LRC_PPHWSP_SZ (1)
-/* Finally we have the logical
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: drop lrc header page
== Series Details ==
Series: series starting with [1/2] drm/i915: drop lrc header page
URL : https://patchwork.freedesktop.org/series/68800/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7228 -> Patchwork_15080
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/index.html
Known issues
Here are the changes found in Patchwork_15080 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_ctx_switch@legacy-render:
- fi-bxt-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-bxt-dsi/igt@gem_ctx_swi...@legacy-render.html
Possible fixes
* igt@gem_ctx_create@basic-files:
- fi-icl-u3: [INCOMPLETE][3] ([fdo#107713] / [fdo#109100]) ->
[PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-icl-u3/igt@gem_ctx_cre...@basic-files.html
* igt@i915_selftest@live_blt:
- fi-bsw-n3050: [DMESG-FAIL][5] ([fdo#112176]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-bsw-n3050/igt@i915_selftest@live_blt.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-bsw-n3050/igt@i915_selftest@live_blt.html
* igt@i915_selftest@live_hangcheck:
- {fi-icl-u4}:[INCOMPLETE][7] ([fdo#107713] / [fdo#108569]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-icl-u4/igt@i915_selftest@live_hangcheck.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-icl-u4/igt@i915_selftest@live_hangcheck.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-7500u: [FAIL][9] ([fdo#109483]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-kbl-7500u/igt@kms_chamel...@hdmi-edid-read.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-kbl-7500u/igt@kms_chamel...@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][11] ([fdo#111045] / [fdo#111096]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7228/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#112176]: https://bugs.freedesktop.org/show_bug.cgi?id=112176
Participating hosts (50 -> 42)
--
Additional (1): fi-kbl-soraka
Missing(9): fi-ilk-m540 fi-tgl-u fi-hsw-4200u fi-skl-6770hq
fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_7228 -> Patchwork_15080
CI-20190529: 20190529
CI_DRM_7228: 5efc505498d2612451f6230a6347f4e0e1960e50 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5253: d46ccb32cf693e8d8253543e9a4fbe5eaef4aa41 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15080: 982b71b7aea507acc41b648f1176da0befb33a65 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
982b71b7aea5 drm/i915/guc: drop guc shared area
2a18495861e0 drm/i915: drop lrc header page
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15080/index.html
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[Intel-gfx] [PATCH i-g-t] i915/gem_ctx_persistence: Sanitycheck execbuf state harder for 'queued'
And initialise fence to -1 to avoid closing stdin (fd:0)!
Signed-off-by: Chris Wilson
---
tests/i915/gem_ctx_persistence.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/tests/i915/gem_ctx_persistence.c b/tests/i915/gem_ctx_persistence.c
index 9273da159..fa6ee7516 100644
--- a/tests/i915/gem_ctx_persistence.c
+++ b/tests/i915/gem_ctx_persistence.c
@@ -363,10 +363,10 @@ static void test_nonpersistent_file(int i915)
static void test_nonpersistent_queued(int i915, unsigned int engine)
{
- int count = gem_measure_ring_inflight(i915, engine, 0);
+ const int count = gem_measure_ring_inflight(i915, engine, 0);
igt_spin_t *spin;
+ int fence = -1;
uint32_t ctx;
- int fence;
/*
* Not only must the immediate batch be cancelled, but
@@ -383,10 +383,13 @@ static void test_nonpersistent_queued(int i915, unsigned
int engine)
.flags = IGT_SPIN_FENCE_OUT);
for (int i = 0; i < count - 1; i++) {
+ spin->execbuf.rsvd2 = 0;
if (fence != -1)
close(fence);
- spin->execbuf.rsvd2 = 0;
+
+ igt_assert(spin->execbuf.flags & I915_EXEC_FENCE_OUT);
gem_execbuf_wr(i915, >execbuf);
+
igt_assert(spin->execbuf.rsvd2);
fence = spin->execbuf.rsvd2 >> 32;
}
@@ -396,8 +399,7 @@ static void test_nonpersistent_queued(int i915, unsigned
int engine)
igt_assert_eq(sync_fence_wait(fence, MSEC_PER_SEC / 5), 0);
igt_assert_eq(sync_fence_status(fence), -EIO);
- spin->handle = 0;
- igt_spin_free(-1, spin);
+ igt_spin_free(i915, spin);
}
static void sendfd(int socket, int fd)
--
2.24.0.rc1
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[Intel-gfx] linux-next: manual merge of the drm tree with the drm-intel-fixes tree
Hi all,
Today's linux-next merge of the drm tree got a conflict in:
drivers/gpu/drm/i915/i915_drv.h
between commit:
59cd826fb5e7 ("drm/i915: Fix PCH reference clock for FDI on HSW/BDW")
from the drm-intel-fixes tree and commit:
7d423af9bfb1 ("drm/i915: Implement a better i945gm vblank irq vs. C-states
workaround")
from the drm tree.
I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging. You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.
--
Cheers,
Stephen Rothwell
diff --cc drivers/gpu/drm/i915/i915_drv.h
index 953e1d12c23c,8882c0908c3b..
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@@ -1704,34 -1339,17 +1339,19 @@@ struct drm_i915_private
struct {
struct notifier_block pm_notifier;
- /**
-* We leave the user IRQ off as much as possible,
-* but this means that requests will finish and never
-* be retired once the system goes idle. Set a timer to
-* fire periodically while the ring is running. When it
-* fires, go retire requests.
-*/
- struct delayed_work retire_work;
-
- /**
-* When we detect an idle GPU, we want to turn on
-* powersaving features. So once we see that there
-* are no more requests outstanding and no more
-* arrive within a small period of time, we fire
-* off the idle_work.
-*/
- struct work_struct idle_work;
+ struct i915_gem_contexts {
+ spinlock_t lock; /* locks list */
+ struct list_head list;
+
+ struct llist_head free_list;
+ struct work_struct free_work;
+ } contexts;
} gem;
+ u8 pch_ssc_use;
+
- /* For i945gm vblank irq vs. C3 workaround */
- struct {
- struct work_struct work;
- struct pm_qos_request pm_qos;
- u8 c3_disable_latency;
- u8 enabled;
- } i945gm_vblank;
+ /* For i915gm/i945gm vblank irq workaround */
+ u8 vblank_enabled;
/* perform PHY state sanity checks? */
bool chv_phy_assert[2];
pgpRLGNWm0CzD.pgp
Description: OpenPGP digital signature
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