Re: [PATCH] i2c: i2c-stm32f7: Fix SDADEL minimum formula

[Bich HEMON]

On 3/9/19 11:50 AM, Wolfram Sang wrote:
> On Sat, Mar 09, 2019 at 11:13:40AM +0100, Wolfram Sang wrote:
>> On Wed, Mar 06, 2019 at 03:12:16PM +0000, Bich HEMON wrote:
>>> From: Nicolas Le Bayon 
>>>
>>> It conforms with Reference Manual I2C timing section.
>>>
>>> Signed-off-by: Nicolas Le Bayon 
>>> Signed-off-by: Bich Hemon 
>>
>> Applied to for-current, thanks!
> 
> Do you have a Fixes tag for this?
> 
Hi Wolfram,

Fixes: aeb068c57214858b638d5ee627bb4a831f98771e ("i2c: i2c-stm32f7: add 
driver")

Will you change the commit message or do you want me to resend the patch?

BR,

Bich

[PATCH] i2c: i2c-stm32f7: improve loopback in timing algorithm

[Bich HEMON]

From: Nicolas Le Bayon 

This avoids useless loops inside the I2C timing algorithm.
Actually, we support only one possible solution per prescaler value.
So after finding a solution with a prescaler, the algorithm can
switch directly to the next prescaler value.

Signed-off-by: Nicolas Le Bayon 
Signed-off-by: Bich Hemon 
---
 drivers/i2c/busses/i2c-stm32f7.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 4284fc9..48337be 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -476,8 +476,12 @@ static int stm32f7_i2c_compute_timing(struct 
stm32f7_i2c_dev *i2c_dev,
 
list_add_tail(>node,
  );
+   break;
}
}
+
+   if (p_prev == p)
+   break;
}
}
 
-- 
1.9.1

[PATCH 0/2] Patches for i2c-stm32 device tree bindings

[Bich HEMON]

This patchset provides dt-bindings updates for I2C.

Bich Hemon (2):
  dt-bindings: i2c-stm32: remove extra spaces
  dt-bindings: i2c-stm32: update optional properties for
stm32h7/stm32mp1

 .../devicetree/bindings/i2c/i2c-stm32.txt  | 37 +++---
 1 file changed, 19 insertions(+), 18 deletions(-)

-- 
1.9.1

[PATCH] i2c: i2c-stm32f7: Fix SDADEL minimum formula

[Bich HEMON]

From: Nicolas Le Bayon 

It conforms with Reference Manual I2C timing section.

Signed-off-by: Nicolas Le Bayon 
Signed-off-by: Bich Hemon 
---
 drivers/i2c/busses/i2c-stm32f7.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c
index 13e1213..4284fc9 100644
--- a/drivers/i2c/busses/i2c-stm32f7.c
+++ b/drivers/i2c/busses/i2c-stm32f7.c
@@ -432,7 +432,7 @@ static int stm32f7_i2c_compute_timing(struct 
stm32f7_i2c_dev *i2c_dev,
 STM32F7_I2C_ANALOG_FILTER_DELAY_MAX : 0);
dnf_delay = setup->dnf * i2cclk;
 
-   sdadel_min = setup->fall_time - i2c_specs[setup->speed].hddat_min -
+   sdadel_min = i2c_specs[setup->speed].hddat_min + setup->fall_time -
af_delay_min - (setup->dnf + 3) * i2cclk;
 
sdadel_max = i2c_specs[setup->speed].vddat_max - setup->rise_time -
-- 
1.9.1

[PATCH 2/2] dt-bindings: i2c-stm32: update optional properties for stm32h7/stm32mp1

[Bich HEMON]

Add STM32H7 and STM32MP1 in the list of compatible socs for each
optional property.

Signed-off-by: Bich Hemon 
---
 Documentation/devicetree/bindings/i2c/i2c-stm32.txt | 17 +
 1 file changed, 9 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt 
b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
index 7d054f1..f334738 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
@@ -19,18 +19,19 @@ Optional properties:
   the default 100 kHz frequency will be used.
   For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values 
are
   10 and 40.
-  For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported,
-  possible values are 10, 40 and 100.
-- i2c-scl-rising-time-ns: Only for STM32F7, I2C SCL Rising time for the board
-  (default: 25)
-- i2c-scl-falling-time-ns: Only for STM32F7, I2C SCL Falling time for the board
-  (default: 10)
+  For STM32F7, STM32H7 and STM32MP1 SoCs, Standard-mode, Fast-mode and 
Fast-mode
+  Plus are supported, possible values are 10, 40 and 100.
+- i2c-scl-rising-time-ns: I2C SCL Rising time for the board (default: 25)
+  For STM32F7, STM32H7 and STM32MP1 only.
+- i2c-scl-falling-time-ns: I2C SCL Falling time for the board (default: 10)
+  For STM32F7, STM32H7 and STM32MP1 only.
   I2C Timings are derived from these 2 values
-- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG
-  whether Fast Mode Plus speed is selected by slave.
+- st,syscfg-fmp: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
+  Plus speed is selected by slave.
1st cell: phandle to syscfg
2nd cell: register offset within SYSCFG
3rd cell: register bitmask for FMP bit
+  For STM32F7, STM32H7 and STM32MP1 only.
 
 Example:
 
-- 
1.9.1

[PATCH 1/2] dt-bindings: i2c-stm32: remove extra spaces

[Bich HEMON]

Remove extra spaces before colons.

Signed-off-by: Bich Hemon 
---
 .../devicetree/bindings/i2c/i2c-stm32.txt  | 26 +++---
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt 
b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
index 69240e1..7d054f1 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-stm32.txt
@@ -1,11 +1,11 @@
 * I2C controller embedded in STMicroelectronics STM32 I2C platform
 
-Required properties :
-- compatible : Must be one of the following
+Required properties:
+- compatible: Must be one of the following
   - "st,stm32f4-i2c"
   - "st,stm32f7-i2c"
-- reg : Offset and length of the register set for the device
-- interrupts : Must contain the interrupt id for I2C event and then the
+- reg: Offset and length of the register set for the device
+- interrupts: Must contain the interrupt id for I2C event and then the
   interrupt id for I2C error.
 - resets: Must contain the phandle to the reset controller.
 - clocks: Must contain the input clock of the I2C instance.
@@ -14,25 +14,25 @@ Required properties :
 - #address-cells = <1>;
 - #size-cells = <0>;
 
-Optional properties :
-- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
+Optional properties:
+- clock-frequency: Desired I2C bus clock frequency in Hz. If not specified,
   the default 100 kHz frequency will be used.
   For STM32F4 SoC Standard-mode and Fast-mode are supported, possible values 
are
   10 and 40.
   For STM32F7 SoC, Standard-mode, Fast-mode and Fast-mode Plus are supported,
   possible values are 10, 40 and 100.
-- i2c-scl-rising-time-ns : Only for STM32F7, I2C SCL Rising time for the board
+- i2c-scl-rising-time-ns: Only for STM32F7, I2C SCL Rising time for the board
   (default: 25)
-- i2c-scl-falling-time-ns : Only for STM32F7, I2C SCL Falling time for the 
board
+- i2c-scl-falling-time-ns: Only for STM32F7, I2C SCL Falling time for the board
   (default: 10)
   I2C Timings are derived from these 2 values
-- st,syscfg-fmp:  Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG
+- st,syscfg-fmp: Only for STM32F7, use to set Fast Mode Plus bit within SYSCFG
   whether Fast Mode Plus speed is selected by slave.
-   1st cell : phandle to syscfg
-   2nd cell : register offset within SYSCFG
-   3rd cell : register bitmask for FMP bit
+   1st cell: phandle to syscfg
+   2nd cell: register offset within SYSCFG
+   3rd cell: register bitmask for FMP bit
 
-Example :
+Example:
 
i2c@40005400 {
compatible = "st,stm32f4-i2c";
-- 
1.9.1

[PATCH 2/3] ARM: dts: stm32: add can1 sleep pins muxing

[Bich HEMON]

Add can1 pinctrl definition for low-power mode

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index c485127..9ec4694 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -246,6 +246,13 @@
};
};
 
+   m_can1_sleep_pins_a: m_can1-sleep@0 {
+   pins {
+   pinmux = , /* CAN1_TX */
+; /* CAN1_RX */
+   };
+   };
+
pwm2_pins_a: pwm2-0 {
pins {
pinmux = ; 
/* TIM2_CH4 */
-- 
1.9.1

[PATCH 3/3] ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board

[Bich HEMON]

Add pinctrl sleep state for can1 on stm32mp157c-ev1.

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 063ee8a..fdc4c92 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -124,8 +124,9 @@
 };
 
 _can1 {
-   pinctrl-names = "default";
+   pinctrl-names = "default", "sleep";
pinctrl-0 = <_can1_pins_a>;
+   pinctrl-1 = <_can1_sleep_pins_a>;
status = "okay";
 };
 
-- 
1.9.1

[PATCH 1/3] ARM: dts: stm32: change CAN RAM mapping on stm32mp157c

[Bich HEMON]

Split the 10Kbytes CAN message RAM to be able to use simultaneously
FDCAN1 and FDCAN2 instances.
First 5Kbytes are allocated to FDCAN1 and last 5Kbytes are used for
FDCAN2. To do so, set the offset to 0x1400 in mram-cfg for FDCAN2.

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 8bf1c17..ffd7457 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -684,7 +684,7 @@
 
m_can1: can@4400e000 {
compatible = "bosch,m_can";
-   reg = <0x4400e000 0x400>, <0x44011000 0x2800>;
+   reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
reg-names = "m_can", "message_ram";
interrupts = ,
 ;
@@ -704,7 +704,7 @@
interrupt-names = "int0", "int1";
clocks = < CK_HSE>, < FDCAN_K>;
clock-names = "hclk", "cclk";
-   bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
+   bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
};
 
-- 
1.9.1

[PATCH 2/3] ARM: dts: stm32: add can1 sleep pins muxing

[Bich HEMON]

Add can1 pinctrl definition for low-power mode

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index c485127..9ec4694 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -246,6 +246,13 @@
};
};
 
+   m_can1_sleep_pins_a: m_can1-sleep@0 {
+   pins {
+   pinmux = , /* CAN1_TX */
+; /* CAN1_RX */
+   };
+   };
+
pwm2_pins_a: pwm2-0 {
pins {
pinmux = ; 
/* TIM2_CH4 */
-- 
1.9.1

[PATCH 3/3] ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board

[Bich HEMON]

Add pinctrl sleep state for can1 on stm32mp157c-ev1.

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/stm32mp157c-ev1.dts 
b/arch/arm/boot/dts/stm32mp157c-ev1.dts
index 063ee8a..fdc4c92 100644
--- a/arch/arm/boot/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/boot/dts/stm32mp157c-ev1.dts
@@ -124,8 +124,9 @@
 };
 
 _can1 {
-   pinctrl-names = "default";
+   pinctrl-names = "default", "sleep";
pinctrl-0 = <_can1_pins_a>;
+   pinctrl-1 = <_can1_sleep_pins_a>;
status = "okay";
 };
 
-- 
1.9.1

[PATCH 1/3] ARM: dts: stm32: change CAN RAM mapping on stm32mp157c

[Bich HEMON]

Split the 10Kbytes CAN message RAM to be able to use simultaneously
FDCAN1 and FDCAN2 instances.
First 5Kbytes are allocated to FDCAN1 and last 5Kbytes are used for
FDCAN2. To do so, set the offset to 0x1400 in mram-cfg for FDCAN2.

Signed-off-by: Bich Hemon 
---
 arch/arm/boot/dts/stm32mp157c.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 8bf1c17..ffd7457 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -684,7 +684,7 @@
 
m_can1: can@4400e000 {
compatible = "bosch,m_can";
-   reg = <0x4400e000 0x400>, <0x44011000 0x2800>;
+   reg = <0x4400e000 0x400>, <0x44011000 0x1400>;
reg-names = "m_can", "message_ram";
interrupts = ,
 ;
@@ -704,7 +704,7 @@
interrupt-names = "int0", "int1";
clocks = < CK_HSE>, < FDCAN_K>;
clock-names = "hclk", "cclk";
-   bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
+   bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
status = "disabled";
};
 
-- 
1.9.1

[PATCH 0/3] CAN fix for stm32mp157c

[Bich HEMON]

This patchset changes the CAN RAM mapping and adds CAN sleep pins.

Bich Hemon (3):
  ARM: dts: stm32: change CAN RAM mapping on stm32mp157c
  ARM: dts: stm32: add can1 sleep pins muxing
  ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board

 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 7 +++
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 3 ++-
 arch/arm/boot/dts/stm32mp157c.dtsi| 4 ++--
 3 files changed, 11 insertions(+), 3 deletions(-)

-- 
1.9.1

[PATCH 0/3] CAN fix for stm32mp157c

[Bich HEMON]

This patchset changes the CAN RAM mapping and adds CAN sleep pins.

Bich Hemon (3):
  ARM: dts: stm32: change CAN RAM mapping on stm32mp157c
  ARM: dts: stm32: add can1 sleep pins muxing
  ARM: dts: stm32: add can1 sleep pins muxing on stm32mp157c-ev1 board

 arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 7 +++
 arch/arm/boot/dts/stm32mp157c-ev1.dts | 3 ++-
 arch/arm/boot/dts/stm32mp157c.dtsi| 4 ++--
 3 files changed, 11 insertions(+), 3 deletions(-)

-- 
1.9.1

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

Hi Olof,

I had a look at your next branch and no fix is required as you corrected 
it all by consolidating Ludovic's version with mine.

Thanks a lot!

Bich

On 11/13/18 8:02 PM, Olof Johansson wrote:
> Take a look at the patch I merged, and please follow up with any patch
> to fixup any issue you find with it.
> 
> As mentioned in my original email, I tried to consolidate the two
> versions, so a look-through and follow up with fixes would be
> appreciated. Thanks!
> 
> 
> -Olof
> 
> On Tue, Nov 13, 2018 at 2:17 AM Bich HEMON  wrote:
>>
>>
>>
>> On 11/13/18 10:24 AM, Russell King - ARM Linux wrote:
>>> On Tue, Nov 13, 2018 at 09:16:16AM +, Bich HEMON wrote:
>>>>
>>>> On 11/12/18 7:22 PM, Olof Johansson wrote:
>>>>> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
>>>>>> From: Gerald Baeza 
>>>>>>
>>>>>> This adds low-level debug support on USART1 for STM32F4
>>>>>> and STM32F7.
>>>>>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>>>>>> Enabled via 'earlyprintk' in bootargs.
>>>>>>
>>>>>> Signed-off-by: Gerald Baeza 
>>>>>> Signed-off-by: Bich Hemon 
>>>>>
>>>>> Hi,
>>>>>
>>>>> This had fallen between the chairs it seems. I have applied it to arm-soc
>>>>> next/soc now, for 4.21 merge window.
>>>>>
>>>>> It ended up being patched up manually to consolidate the version in
>>>>> Russell's patch tracker with this posted version, and I tweaked whitespace
>>>>> a bit. Let me know if I missed something.
>>>>>
>>>>>
>>>>> Thanks,
>>>>>
>>>>> -Olof
>>>>>
>>>>
>>>> Hi Olof,
>>>>
>>>> Please note that this patch has to be abandoned as Ludovic BARRE pushed
>>>> a new version of this change:
>>>> https://patchwork.codeaurora.org/patch/400563/
>>>>
>>>> You can find it in Russell's tracker here:
>>>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1
>>>
>>> And I'm not going to merge that because:
>>>
>>> 1) it's not for me to merge - it doesn't go through my tree, but through
>>>  arm-soc, which Olof and Arnd manage.
>>> 2) it's not been on the mailing list as per normal submission process.
>>>
>>> Sorry.
>>>
>>
>> Ok, thank you for the feedback.
>>
>> So Olof, can you please ignore my previous email and merge my patch as
>> you proposed it for 4.21. Ludovic's patch will be abandoned instead.
>>
>> Thanks,
>>
>> Bich

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

Hi Olof,

I had a look at your next branch and no fix is required as you corrected 
it all by consolidating Ludovic's version with mine.

Thanks a lot!

Bich

On 11/13/18 8:02 PM, Olof Johansson wrote:
> Take a look at the patch I merged, and please follow up with any patch
> to fixup any issue you find with it.
> 
> As mentioned in my original email, I tried to consolidate the two
> versions, so a look-through and follow up with fixes would be
> appreciated. Thanks!
> 
> 
> -Olof
> 
> On Tue, Nov 13, 2018 at 2:17 AM Bich HEMON  wrote:
>>
>>
>>
>> On 11/13/18 10:24 AM, Russell King - ARM Linux wrote:
>>> On Tue, Nov 13, 2018 at 09:16:16AM +, Bich HEMON wrote:
>>>>
>>>> On 11/12/18 7:22 PM, Olof Johansson wrote:
>>>>> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
>>>>>> From: Gerald Baeza 
>>>>>>
>>>>>> This adds low-level debug support on USART1 for STM32F4
>>>>>> and STM32F7.
>>>>>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>>>>>> Enabled via 'earlyprintk' in bootargs.
>>>>>>
>>>>>> Signed-off-by: Gerald Baeza 
>>>>>> Signed-off-by: Bich Hemon 
>>>>>
>>>>> Hi,
>>>>>
>>>>> This had fallen between the chairs it seems. I have applied it to arm-soc
>>>>> next/soc now, for 4.21 merge window.
>>>>>
>>>>> It ended up being patched up manually to consolidate the version in
>>>>> Russell's patch tracker with this posted version, and I tweaked whitespace
>>>>> a bit. Let me know if I missed something.
>>>>>
>>>>>
>>>>> Thanks,
>>>>>
>>>>> -Olof
>>>>>
>>>>
>>>> Hi Olof,
>>>>
>>>> Please note that this patch has to be abandoned as Ludovic BARRE pushed
>>>> a new version of this change:
>>>> https://patchwork.codeaurora.org/patch/400563/
>>>>
>>>> You can find it in Russell's tracker here:
>>>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1
>>>
>>> And I'm not going to merge that because:
>>>
>>> 1) it's not for me to merge - it doesn't go through my tree, but through
>>>  arm-soc, which Olof and Arnd manage.
>>> 2) it's not been on the mailing list as per normal submission process.
>>>
>>> Sorry.
>>>
>>
>> Ok, thank you for the feedback.
>>
>> So Olof, can you please ignore my previous email and merge my patch as
>> you proposed it for 4.21. Ludovic's patch will be abandoned instead.
>>
>> Thanks,
>>
>> Bich

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

On 11/13/18 10:24 AM, Russell King - ARM Linux wrote:
> On Tue, Nov 13, 2018 at 09:16:16AM +0000, Bich HEMON wrote:
>>
>> On 11/12/18 7:22 PM, Olof Johansson wrote:
>>> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
>>>> From: Gerald Baeza 
>>>>
>>>> This adds low-level debug support on USART1 for STM32F4
>>>> and STM32F7.
>>>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>>>> Enabled via 'earlyprintk' in bootargs.
>>>>
>>>> Signed-off-by: Gerald Baeza 
>>>> Signed-off-by: Bich Hemon 
>>>
>>> Hi,
>>>
>>> This had fallen between the chairs it seems. I have applied it to arm-soc
>>> next/soc now, for 4.21 merge window.
>>>
>>> It ended up being patched up manually to consolidate the version in
>>> Russell's patch tracker with this posted version, and I tweaked whitespace
>>> a bit. Let me know if I missed something.
>>>
>>>
>>> Thanks,
>>>
>>> -Olof
>>>
>>
>> Hi Olof,
>>
>> Please note that this patch has to be abandoned as Ludovic BARRE pushed
>> a new version of this change:
>> https://patchwork.codeaurora.org/patch/400563/
>>
>> You can find it in Russell's tracker here:
>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1
> 
> And I'm not going to merge that because:
> 
> 1) it's not for me to merge - it doesn't go through my tree, but through
> arm-soc, which Olof and Arnd manage.
> 2) it's not been on the mailing list as per normal submission process.
> 
> Sorry.
> 

Ok, thank you for the feedback.

So Olof, can you please ignore my previous email and merge my patch as 
you proposed it for 4.21. Ludovic's patch will be abandoned instead.

Thanks,

Bich

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

On 11/13/18 10:24 AM, Russell King - ARM Linux wrote:
> On Tue, Nov 13, 2018 at 09:16:16AM +0000, Bich HEMON wrote:
>>
>> On 11/12/18 7:22 PM, Olof Johansson wrote:
>>> On Thu, Jul 27, 2017 at 04:50:20PM +, Bich HEMON wrote:
>>>> From: Gerald Baeza 
>>>>
>>>> This adds low-level debug support on USART1 for STM32F4
>>>> and STM32F7.
>>>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>>>> Enabled via 'earlyprintk' in bootargs.
>>>>
>>>> Signed-off-by: Gerald Baeza 
>>>> Signed-off-by: Bich Hemon 
>>>
>>> Hi,
>>>
>>> This had fallen between the chairs it seems. I have applied it to arm-soc
>>> next/soc now, for 4.21 merge window.
>>>
>>> It ended up being patched up manually to consolidate the version in
>>> Russell's patch tracker with this posted version, and I tweaked whitespace
>>> a bit. Let me know if I missed something.
>>>
>>>
>>> Thanks,
>>>
>>> -Olof
>>>
>>
>> Hi Olof,
>>
>> Please note that this patch has to be abandoned as Ludovic BARRE pushed
>> a new version of this change:
>> https://patchwork.codeaurora.org/patch/400563/
>>
>> You can find it in Russell's tracker here:
>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1
> 
> And I'm not going to merge that because:
> 
> 1) it's not for me to merge - it doesn't go through my tree, but through
> arm-soc, which Olof and Arnd manage.
> 2) it's not been on the mailing list as per normal submission process.
> 
> Sorry.
> 

Ok, thank you for the feedback.

So Olof, can you please ignore my previous email and merge my patch as 
you proposed it for 4.21. Ludovic's patch will be abandoned instead.

Thanks,

Bich

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

On 11/12/18 7:22 PM, Olof Johansson wrote:
> On Thu, Jul 27, 2017 at 04:50:20PM +0000, Bich HEMON wrote:
>> From: Gerald Baeza 
>>
>> This adds low-level debug support on USART1 for STM32F4
>> and STM32F7.
>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>> Enabled via 'earlyprintk' in bootargs.
>>
>> Signed-off-by: Gerald Baeza 
>> Signed-off-by: Bich Hemon 
> 
> Hi,
> 
> This had fallen between the chairs it seems. I have applied it to arm-soc
> next/soc now, for 4.21 merge window.
> 
> It ended up being patched up manually to consolidate the version in
> Russell's patch tracker with this posted version, and I tweaked whitespace
> a bit. Let me know if I missed something.
> 
> 
> Thanks,
> 
> -Olof
> 

Hi Olof,

Please note that this patch has to be abandoned as Ludovic BARRE pushed 
a new version of this change:
https://patchwork.codeaurora.org/patch/400563/

You can find it in Russell's tracker here:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1

Best regards,

Bich

Re: [PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

On 11/12/18 7:22 PM, Olof Johansson wrote:
> On Thu, Jul 27, 2017 at 04:50:20PM +0000, Bich HEMON wrote:
>> From: Gerald Baeza 
>>
>> This adds low-level debug support on USART1 for STM32F4
>> and STM32F7.
>> Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
>> Enabled via 'earlyprintk' in bootargs.
>>
>> Signed-off-by: Gerald Baeza 
>> Signed-off-by: Bich Hemon 
> 
> Hi,
> 
> This had fallen between the chairs it seems. I have applied it to arm-soc
> next/soc now, for 4.21 merge window.
> 
> It ended up being patched up manually to consolidate the version in
> Russell's patch tracker with this posted version, and I tweaked whitespace
> a bit. Let me know if I missed something.
> 
> 
> Thanks,
> 
> -Olof
> 

Hi Olof,

Please note that this patch has to be abandoned as Ludovic BARRE pushed 
a new version of this change:
https://patchwork.codeaurora.org/patch/400563/

You can find it in Russell's tracker here:
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8803/1

Best regards,

Bich

[PATCH] serial: stm32: fix initialization of RS485 mode

[Bich HEMON]

Configure RS485 mode during port initialization.

Fixes: 1bcda09d291081a7732fcaa9d1745312404a4e36 ("serial: stm32: add
support for RS485 hardware control mode")

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 345fbf3..e8d7a7b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -809,6 +809,10 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->ops   = _uart_ops;
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
+   port->rs485_config = stm32_config_rs485;
+
+   stm32_init_rs485(port, pdev);
+
stm32port->wakeirq = platform_get_irq(pdev, 1);
stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
-- 
1.9.1

[PATCH] serial: stm32: fix initialization of RS485 mode

[Bich HEMON]

Configure RS485 mode during port initialization.

Fixes: 1bcda09d291081a7732fcaa9d1745312404a4e36 ("serial: stm32: add
support for RS485 hardware control mode")

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 345fbf3..e8d7a7b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -809,6 +809,10 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->ops   = _uart_ops;
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
+   port->rs485_config = stm32_config_rs485;
+
+   stm32_init_rs485(port, pdev);
+
stm32port->wakeirq = platform_get_irq(pdev, 1);
stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
-- 
1.9.1

[PATCH v2 1/2] dt-bindings: serial: stm32: add RS485 optional properties

[Bich HEMON]

Add options for enabling RS485 hardware control and configuring
Driver Enable signal:
- rs485-rts-delay
- rs485-rx-during-tx
- rs485-rts-active-low
- linux,rs485-enabled-at-boot-time

Signed-off-by: Bich Hemon <bich.he...@st.com>
Reviewed-by: Rob Herring <r...@kernel.org>
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index d150b04..9d3efed 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -15,6 +15,8 @@ Required properties:
 Optional properties:
 - pinctrl: The reference on the pins configuration
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
+- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
+  linux,rs485-enabled-at-boot-time: see rs485.txt.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
-- 
1.9.1

[PATCH v2 1/2] dt-bindings: serial: stm32: add RS485 optional properties

[Bich HEMON]

Add options for enabling RS485 hardware control and configuring
Driver Enable signal:
- rs485-rts-delay
- rs485-rx-during-tx
- rs485-rts-active-low
- linux,rs485-enabled-at-boot-time

Signed-off-by: Bich Hemon 
Reviewed-by: Rob Herring 
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index d150b04..9d3efed 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -15,6 +15,8 @@ Required properties:
 Optional properties:
 - pinctrl: The reference on the pins configuration
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
+- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
+  linux,rs485-enabled-at-boot-time: see rs485.txt.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
-- 
1.9.1

[PATCH v2 2/2] serial: stm32: add support for RS485 hardware control mode

[Bich HEMON]

Implement Driver Enable signal (DE) to activate the transmission mode
of the external transceiver.

Signed-off-by: Yves Coppeaux <yves.coppe...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 130 ++-
 drivers/tty/serial/stm32-usart.h |   3 +
 2 files changed, 132 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0fa735b..345fbf3 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -62,6 +62,113 @@ static void stm32_clr_bits(struct uart_port *port, u32 reg, 
u32 bits)
writel_relaxed(val, port->membase + reg);
 }
 
+static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,
+  u32 delay_DDE, u32 baud)
+{
+   u32 rs485_deat_dedt;
+   u32 rs485_deat_dedt_max = (USART_CR1_DEAT_MASK >> USART_CR1_DEAT_SHIFT);
+   bool over8;
+
+   *cr3 |= USART_CR3_DEM;
+   over8 = *cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   rs485_deat_dedt = delay_ADE * baud * 8;
+   else
+   rs485_deat_dedt = delay_ADE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEAT_SHIFT) &
+  USART_CR1_DEAT_MASK;
+   *cr1 |= rs485_deat_dedt;
+
+   if (over8)
+   rs485_deat_dedt = delay_DDE * baud * 8;
+   else
+   rs485_deat_dedt = delay_DDE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEDT_SHIFT) &
+  USART_CR1_DEDT_MASK;
+   *cr1 |= rs485_deat_dedt;
+}
+
+static int stm32_config_rs485(struct uart_port *port,
+ struct serial_rs485 *rs485conf)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
+   u32 usartdiv, baud, cr1, cr3;
+   bool over8;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+
+   port->rs485 = *rs485conf;
+
+   rs485conf->flags |= SER_RS485_RX_DURING_TX;
+
+   if (rs485conf->flags & SER_RS485_ENABLED) {
+   cr1 = readl_relaxed(port->membase + ofs->cr1);
+   cr3 = readl_relaxed(port->membase + ofs->cr3);
+   usartdiv = readl_relaxed(port->membase + ofs->brr);
+   usartdiv = usartdiv & GENMASK(15, 0);
+   over8 = cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   usartdiv = usartdiv | (usartdiv & GENMASK(4, 0))
+  << USART_BRR_04_R_SHIFT;
+
+   baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
+   stm32_config_reg_rs485(, ,
+  rs485conf->delay_rts_before_send,
+  rs485conf->delay_rts_after_send, baud);
+
+   if (rs485conf->flags & SER_RS485_RTS_ON_SEND) {
+   cr3 &= ~USART_CR3_DEP;
+   rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND;
+   } else {
+   cr3 |= USART_CR3_DEP;
+   rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
+   }
+
+   writel_relaxed(cr3, port->membase + ofs->cr3);
+   writel_relaxed(cr1, port->membase + ofs->cr1);
+   } else {
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DEM | USART_CR3_DEP);
+   stm32_clr_bits(port, ofs->cr1,
+  USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
+   }
+
+   stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int stm32_init_rs485(struct uart_port *port,
+   struct platform_device *pdev)
+{
+   struct serial_rs485 *rs485conf = >rs485;
+
+   rs485conf->flags = 0;
+   rs485conf->delay_rts_before_send = 0;
+   rs485conf->delay_rts_after_send = 0;
+
+   if (!pdev->dev.of_node)
+   return -ENODEV;
+
+   uart_get_rs485_mode(>dev, rs485conf);
+
+   return 0;
+}
+
 static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
bool threaded)
 {

[PATCH v2 2/2] serial: stm32: add support for RS485 hardware control mode

[Bich HEMON]

Implement Driver Enable signal (DE) to activate the transmission mode
of the external transceiver.

Signed-off-by: Yves Coppeaux 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 130 ++-
 drivers/tty/serial/stm32-usart.h |   3 +
 2 files changed, 132 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0fa735b..345fbf3 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -62,6 +62,113 @@ static void stm32_clr_bits(struct uart_port *port, u32 reg, 
u32 bits)
writel_relaxed(val, port->membase + reg);
 }
 
+static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,
+  u32 delay_DDE, u32 baud)
+{
+   u32 rs485_deat_dedt;
+   u32 rs485_deat_dedt_max = (USART_CR1_DEAT_MASK >> USART_CR1_DEAT_SHIFT);
+   bool over8;
+
+   *cr3 |= USART_CR3_DEM;
+   over8 = *cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   rs485_deat_dedt = delay_ADE * baud * 8;
+   else
+   rs485_deat_dedt = delay_ADE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEAT_SHIFT) &
+  USART_CR1_DEAT_MASK;
+   *cr1 |= rs485_deat_dedt;
+
+   if (over8)
+   rs485_deat_dedt = delay_DDE * baud * 8;
+   else
+   rs485_deat_dedt = delay_DDE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEDT_SHIFT) &
+  USART_CR1_DEDT_MASK;
+   *cr1 |= rs485_deat_dedt;
+}
+
+static int stm32_config_rs485(struct uart_port *port,
+ struct serial_rs485 *rs485conf)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
+   u32 usartdiv, baud, cr1, cr3;
+   bool over8;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+
+   port->rs485 = *rs485conf;
+
+   rs485conf->flags |= SER_RS485_RX_DURING_TX;
+
+   if (rs485conf->flags & SER_RS485_ENABLED) {
+   cr1 = readl_relaxed(port->membase + ofs->cr1);
+   cr3 = readl_relaxed(port->membase + ofs->cr3);
+   usartdiv = readl_relaxed(port->membase + ofs->brr);
+   usartdiv = usartdiv & GENMASK(15, 0);
+   over8 = cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   usartdiv = usartdiv | (usartdiv & GENMASK(4, 0))
+  << USART_BRR_04_R_SHIFT;
+
+   baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
+   stm32_config_reg_rs485(, ,
+  rs485conf->delay_rts_before_send,
+  rs485conf->delay_rts_after_send, baud);
+
+   if (rs485conf->flags & SER_RS485_RTS_ON_SEND) {
+   cr3 &= ~USART_CR3_DEP;
+   rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND;
+   } else {
+   cr3 |= USART_CR3_DEP;
+   rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
+   }
+
+   writel_relaxed(cr3, port->membase + ofs->cr3);
+   writel_relaxed(cr1, port->membase + ofs->cr1);
+   } else {
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DEM | USART_CR3_DEP);
+   stm32_clr_bits(port, ofs->cr1,
+  USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
+   }
+
+   stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int stm32_init_rs485(struct uart_port *port,
+   struct platform_device *pdev)
+{
+   struct serial_rs485 *rs485conf = >rs485;
+
+   rs485conf->flags = 0;
+   rs485conf->delay_rts_before_send = 0;
+   rs485conf->delay_rts_after_send = 0;
+
+   if (!pdev->dev.of_node)
+   return -ENODEV;
+
+   uart_get_rs485_mode(>dev, rs485conf);
+
+   return 0;
+}
+
 static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
bool threaded)
 {
@@ -498,6 +605,7 @@ static void stm32_set_termios(st

[PATCH v2 0/2] Add support for RS485

[Bich HEMON]

v2:
- Patch series rebased on gregkh/tty/tty-next

This patchset updates existing stm32 usart driver by adding support for RS485.

Bich Hemon (2):
  dt-bindings: serial: stm32: add RS485 optional properties
  serial: stm32: add support for RS485 hardware control mode

 .../devicetree/bindings/serial/st,stm32-usart.txt  |   2 +
 drivers/tty/serial/stm32-usart.c   | 130 -
 drivers/tty/serial/stm32-usart.h   |   3 +
 3 files changed, 134 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 0/2] Add support for RS485

[Bich HEMON]

v2:
- Patch series rebased on gregkh/tty/tty-next

This patchset updates existing stm32 usart driver by adding support for RS485.

Bich Hemon (2):
  dt-bindings: serial: stm32: add RS485 optional properties
  serial: stm32: add support for RS485 hardware control mode

 .../devicetree/bindings/serial/st,stm32-usart.txt  |   2 +
 drivers/tty/serial/stm32-usart.c   | 130 -
 drivers/tty/serial/stm32-usart.h   |   3 +
 3 files changed, 134 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Make sure to apply the correct pin state in suspend/resume callbacks.
Putting pins in sleep state saves power.

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/net/can/m_can/m_can.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 2594f77..a86ef69 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
*dev)
m_can_clk_stop(priv);
}
 
+   pinctrl_pm_select_sleep_state(dev);
+
priv->can.state = CAN_STATE_SLEEPING;
 
return 0;
@@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device *dev)
struct net_device *ndev = dev_get_drvdata(dev);
struct m_can_priv *priv = netdev_priv(ndev);
 
+   pinctrl_pm_select_default_state(dev);
+
m_can_init_ram(priv);
 
priv->can.state = CAN_STATE_ERROR_ACTIVE;
-- 
1.9.1

[PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Make sure to apply the correct pin state in suspend/resume callbacks.
Putting pins in sleep state saves power.

Signed-off-by: Bich Hemon 
---
 drivers/net/can/m_can/m_can.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 2594f77..a86ef69 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
*dev)
m_can_clk_stop(priv);
}
 
+   pinctrl_pm_select_sleep_state(dev);
+
priv->can.state = CAN_STATE_SLEEPING;
 
return 0;
@@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device *dev)
struct net_device *ndev = dev_get_drvdata(dev);
struct m_can_priv *priv = netdev_priv(ndev);
 
+   pinctrl_pm_select_default_state(dev);
+
m_can_init_ram(priv);
 
priv->can.state = CAN_STATE_ERROR_ACTIVE;
-- 
1.9.1

Re: [PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Hi all,

On 03/01/2018 01:29 PM, Bich HEMON wrote:
> Make sure to apply the correct pin state in suspend/resume callbacks.
> Putting pins in sleep state saves power.
> 
> Signed-off-by: Bich Hemon <bich.he...@st.com>
> ---
>   drivers/net/can/m_can/m_can.c | 4 
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
> index 2594f77..a86ef69 100644
> --- a/drivers/net/can/m_can/m_can.c
> +++ b/drivers/net/can/m_can/m_can.c
> @@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
> *dev)
>   m_can_clk_stop(priv);
>   }
>   
> + pinctrl_pm_select_sleep_state(dev);
> +
>   priv->can.state = CAN_STATE_SLEEPING;
>   
>   return 0;
> @@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device 
> *dev)
>   struct net_device *ndev = dev_get_drvdata(dev);
>   struct m_can_priv *priv = netdev_priv(ndev);
>   
> + pinctrl_pm_select_default_state(dev);
> +
>   m_can_init_ram(priv);
>   
>   priv->can.state = CAN_STATE_ERROR_ACTIVE;
> 

Sorry, my mistake. Of course this is the wrong mailing list. Please 
ignore this patch.

Best regards,

Bich

Re: [PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Hi all,

On 03/01/2018 01:29 PM, Bich HEMON wrote:
> Make sure to apply the correct pin state in suspend/resume callbacks.
> Putting pins in sleep state saves power.
> 
> Signed-off-by: Bich Hemon 
> ---
>   drivers/net/can/m_can/m_can.c | 4 
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
> index 2594f77..a86ef69 100644
> --- a/drivers/net/can/m_can/m_can.c
> +++ b/drivers/net/can/m_can/m_can.c
> @@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
> *dev)
>   m_can_clk_stop(priv);
>   }
>   
> + pinctrl_pm_select_sleep_state(dev);
> +
>   priv->can.state = CAN_STATE_SLEEPING;
>   
>   return 0;
> @@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device 
> *dev)
>   struct net_device *ndev = dev_get_drvdata(dev);
>   struct m_can_priv *priv = netdev_priv(ndev);
>   
> + pinctrl_pm_select_default_state(dev);
> +
>   m_can_init_ram(priv);
>   
>   priv->can.state = CAN_STATE_ERROR_ACTIVE;
> 

Sorry, my mistake. Of course this is the wrong mailing list. Please 
ignore this patch.

Best regards,

Bich

Re: [PATCH 0/2] Update interrupt names

[Bich HEMON]

Hi all,

On 02/28/2018 11:51 AM, Bich HEMON wrote:
> This patchset updates existing stm32 usart driver by updating interrupt
> initialization by name.
> 
> Bich Hemon (2):
>dt-bindings: serial: stm32: add wakeup option using note
>serial: stm32: update interrupt initialization
> 
>   Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
>   drivers/tty/serial/stm32-usart.c| 4 ++--
>   2 files changed, 6 insertions(+), 2 deletions(-)
> 

Please note that this patch set is abandoned. As Rob pointed that out, 
the interrupt indices are fixed, so there is no need to keep these patches.

Best regards,

Bich

Re: [PATCH 0/2] Update interrupt names

[Bich HEMON]

Hi all,

On 02/28/2018 11:51 AM, Bich HEMON wrote:
> This patchset updates existing stm32 usart driver by updating interrupt
> initialization by name.
> 
> Bich Hemon (2):
>dt-bindings: serial: stm32: add wakeup option using note
>serial: stm32: update interrupt initialization
> 
>   Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
>   drivers/tty/serial/stm32-usart.c| 4 ++--
>   2 files changed, 6 insertions(+), 2 deletions(-)
> 

Please note that this patch set is abandoned. As Rob pointed that out, 
the interrupt indices are fixed, so there is no need to keep these patches.

Best regards,

Bich

[PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Make sure to apply the correct pin state in suspend/resume callbacks.
Putting pins in sleep state saves power.

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/net/can/m_can/m_can.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 2594f77..a86ef69 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
*dev)
m_can_clk_stop(priv);
}
 
+   pinctrl_pm_select_sleep_state(dev);
+
priv->can.state = CAN_STATE_SLEEPING;
 
return 0;
@@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device *dev)
struct net_device *ndev = dev_get_drvdata(dev);
struct m_can_priv *priv = netdev_priv(ndev);
 
+   pinctrl_pm_select_default_state(dev);
+
m_can_init_ram(priv);
 
priv->can.state = CAN_STATE_ERROR_ACTIVE;
-- 
1.9.1

[PATCH] can: m_can: select pinctrl state in each suspend/resume function

[Bich HEMON]

Make sure to apply the correct pin state in suspend/resume callbacks.
Putting pins in sleep state saves power.

Signed-off-by: Bich Hemon 
---
 drivers/net/can/m_can/m_can.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
index 2594f77..a86ef69 100644
--- a/drivers/net/can/m_can/m_can.c
+++ b/drivers/net/can/m_can/m_can.c
@@ -1700,6 +1700,8 @@ static __maybe_unused int m_can_suspend(struct device 
*dev)
m_can_clk_stop(priv);
}
 
+   pinctrl_pm_select_sleep_state(dev);
+
priv->can.state = CAN_STATE_SLEEPING;
 
return 0;
@@ -1710,6 +1712,8 @@ static __maybe_unused int m_can_resume(struct device *dev)
struct net_device *ndev = dev_get_drvdata(dev);
struct m_can_priv *priv = netdev_priv(ndev);
 
+   pinctrl_pm_select_default_state(dev);
+
m_can_init_ram(priv);
 
priv->can.state = CAN_STATE_ERROR_ACTIVE;
-- 
1.9.1

[PATCH 1/2] dt-bindings: serial: stm32: add RS485 optional properties

[Bich HEMON]

Add options for enabling RS485 hardware control and configuring
Driver Enable signal:
- rs485-rts-delay
- rs485-rx-during-tx
- rs485-rts-active-low
- linux,rs485-enabled-at-boot-time

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index aaeb564..81e0011 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -16,6 +16,8 @@ Required properties:
 Optional properties:
 - pinctrl: The reference on the pins configuration
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
+- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
+  linux,rs485-enabled-at-boot-time: see rs485.txt.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 - wakeup-source: bool flag to indicate this device has wakeup capabilities
-- 
1.9.1

[PATCH 0/2] Add support for RS485

[Bich HEMON]

This patchset updates existing stm32 usart driver by adding support for RS485.

Bich Hemon (2):
  dt-bindings: serial: stm32: add RS485 optional properties
  serial: stm32: add support for RS485 hardware control mode

 .../devicetree/bindings/serial/st,stm32-usart.txt  |   2 +
 drivers/tty/serial/stm32-usart.c   | 134 -
 drivers/tty/serial/stm32-usart.h   |   3 +
 3 files changed, 138 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH 0/2] Add support for RS485

[Bich HEMON]

This patchset updates existing stm32 usart driver by adding support for RS485.

Bich Hemon (2):
  dt-bindings: serial: stm32: add RS485 optional properties
  serial: stm32: add support for RS485 hardware control mode

 .../devicetree/bindings/serial/st,stm32-usart.txt  |   2 +
 drivers/tty/serial/stm32-usart.c   | 134 -
 drivers/tty/serial/stm32-usart.h   |   3 +
 3 files changed, 138 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH 1/2] dt-bindings: serial: stm32: add RS485 optional properties

[Bich HEMON]

Add options for enabling RS485 hardware control and configuring
Driver Enable signal:
- rs485-rts-delay
- rs485-rx-during-tx
- rs485-rts-active-low
- linux,rs485-enabled-at-boot-time

Signed-off-by: Bich Hemon 
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index aaeb564..81e0011 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -16,6 +16,8 @@ Required properties:
 Optional properties:
 - pinctrl: The reference on the pins configuration
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
+- rs485-rts-delay, rs485-rx-during-tx, rs485-rts-active-low,
+  linux,rs485-enabled-at-boot-time: see rs485.txt.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 - wakeup-source: bool flag to indicate this device has wakeup capabilities
-- 
1.9.1

[PATCH 2/2] serial: stm32: add support for RS485 hardware control mode

[Bich HEMON]

Implement Driver Enable signal (DE) to activate the transmission mode
of the external transceiver.

Signed-off-by: Yves Coppeaux <yves.coppe...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 134 ++-
 drivers/tty/serial/stm32-usart.h |   3 +
 2 files changed, 136 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 5c85cbc..6d34472 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -62,6 +62,113 @@ static void stm32_clr_bits(struct uart_port *port, u32 reg, 
u32 bits)
writel_relaxed(val, port->membase + reg);
 }
 
+static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,
+  u32 delay_DDE, u32 baud)
+{
+   u32 rs485_deat_dedt;
+   u32 rs485_deat_dedt_max = (USART_CR1_DEAT_MASK >> USART_CR1_DEAT_SHIFT);
+   bool over8;
+
+   *cr3 |= USART_CR3_DEM;
+   over8 = *cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   rs485_deat_dedt = delay_ADE * baud * 8;
+   else
+   rs485_deat_dedt = delay_ADE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEAT_SHIFT) &
+  USART_CR1_DEAT_MASK;
+   *cr1 |= rs485_deat_dedt;
+
+   if (over8)
+   rs485_deat_dedt = delay_DDE * baud * 8;
+   else
+   rs485_deat_dedt = delay_DDE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEDT_SHIFT) &
+  USART_CR1_DEDT_MASK;
+   *cr1 |= rs485_deat_dedt;
+}
+
+static int stm32_config_rs485(struct uart_port *port,
+ struct serial_rs485 *rs485conf)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
+   u32 usartdiv, baud, cr1, cr3;
+   bool over8;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+
+   port->rs485 = *rs485conf;
+
+   rs485conf->flags |= SER_RS485_RX_DURING_TX;
+
+   if (rs485conf->flags & SER_RS485_ENABLED) {
+   cr1 = readl_relaxed(port->membase + ofs->cr1);
+   cr3 = readl_relaxed(port->membase + ofs->cr3);
+   usartdiv = readl_relaxed(port->membase + ofs->brr);
+   usartdiv = usartdiv & GENMASK(15, 0);
+   over8 = cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   usartdiv = usartdiv | (usartdiv & GENMASK(4, 0))
+  << USART_BRR_04_R_SHIFT;
+
+   baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
+   stm32_config_reg_rs485(, ,
+  rs485conf->delay_rts_before_send,
+  rs485conf->delay_rts_after_send, baud);
+
+   if (rs485conf->flags & SER_RS485_RTS_ON_SEND) {
+   cr3 &= ~USART_CR3_DEP;
+   rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND;
+   } else {
+   cr3 |= USART_CR3_DEP;
+   rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
+   }
+
+   writel_relaxed(cr3, port->membase + ofs->cr3);
+   writel_relaxed(cr1, port->membase + ofs->cr1);
+   } else {
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DEM | USART_CR3_DEP);
+   stm32_clr_bits(port, ofs->cr1,
+  USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
+   }
+
+   stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int stm32_init_rs485(struct uart_port *port,
+   struct platform_device *pdev)
+{
+   struct serial_rs485 *rs485conf = >rs485;
+
+   rs485conf->flags = 0;
+   rs485conf->delay_rts_before_send = 0;
+   rs485conf->delay_rts_after_send = 0;
+
+   if (!pdev->dev.of_node)
+   return -ENODEV;
+
+   uart_get_rs485_mode(>dev, rs485conf);
+
+   return 0;
+}
+
 static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
bool threaded)
 {

[PATCH 2/2] serial: stm32: add support for RS485 hardware control mode

[Bich HEMON]

Implement Driver Enable signal (DE) to activate the transmission mode
of the external transceiver.

Signed-off-by: Yves Coppeaux 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 134 ++-
 drivers/tty/serial/stm32-usart.h |   3 +
 2 files changed, 136 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 5c85cbc..6d34472 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -62,6 +62,113 @@ static void stm32_clr_bits(struct uart_port *port, u32 reg, 
u32 bits)
writel_relaxed(val, port->membase + reg);
 }
 
+static void stm32_config_reg_rs485(u32 *cr1, u32 *cr3, u32 delay_ADE,
+  u32 delay_DDE, u32 baud)
+{
+   u32 rs485_deat_dedt;
+   u32 rs485_deat_dedt_max = (USART_CR1_DEAT_MASK >> USART_CR1_DEAT_SHIFT);
+   bool over8;
+
+   *cr3 |= USART_CR3_DEM;
+   over8 = *cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   rs485_deat_dedt = delay_ADE * baud * 8;
+   else
+   rs485_deat_dedt = delay_ADE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEAT_SHIFT) &
+  USART_CR1_DEAT_MASK;
+   *cr1 |= rs485_deat_dedt;
+
+   if (over8)
+   rs485_deat_dedt = delay_DDE * baud * 8;
+   else
+   rs485_deat_dedt = delay_DDE * baud * 16;
+
+   rs485_deat_dedt = DIV_ROUND_CLOSEST(rs485_deat_dedt, 1000);
+   rs485_deat_dedt = rs485_deat_dedt > rs485_deat_dedt_max ?
+ rs485_deat_dedt_max : rs485_deat_dedt;
+   rs485_deat_dedt = (rs485_deat_dedt << USART_CR1_DEDT_SHIFT) &
+  USART_CR1_DEDT_MASK;
+   *cr1 |= rs485_deat_dedt;
+}
+
+static int stm32_config_rs485(struct uart_port *port,
+ struct serial_rs485 *rs485conf)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
+   u32 usartdiv, baud, cr1, cr3;
+   bool over8;
+   unsigned long flags;
+
+   spin_lock_irqsave(>lock, flags);
+   stm32_clr_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+
+   port->rs485 = *rs485conf;
+
+   rs485conf->flags |= SER_RS485_RX_DURING_TX;
+
+   if (rs485conf->flags & SER_RS485_ENABLED) {
+   cr1 = readl_relaxed(port->membase + ofs->cr1);
+   cr3 = readl_relaxed(port->membase + ofs->cr3);
+   usartdiv = readl_relaxed(port->membase + ofs->brr);
+   usartdiv = usartdiv & GENMASK(15, 0);
+   over8 = cr1 & USART_CR1_OVER8;
+
+   if (over8)
+   usartdiv = usartdiv | (usartdiv & GENMASK(4, 0))
+  << USART_BRR_04_R_SHIFT;
+
+   baud = DIV_ROUND_CLOSEST(port->uartclk, usartdiv);
+   stm32_config_reg_rs485(, ,
+  rs485conf->delay_rts_before_send,
+  rs485conf->delay_rts_after_send, baud);
+
+   if (rs485conf->flags & SER_RS485_RTS_ON_SEND) {
+   cr3 &= ~USART_CR3_DEP;
+   rs485conf->flags &= ~SER_RS485_RTS_AFTER_SEND;
+   } else {
+   cr3 |= USART_CR3_DEP;
+   rs485conf->flags |= SER_RS485_RTS_AFTER_SEND;
+   }
+
+   writel_relaxed(cr3, port->membase + ofs->cr3);
+   writel_relaxed(cr1, port->membase + ofs->cr1);
+   } else {
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DEM | USART_CR3_DEP);
+   stm32_clr_bits(port, ofs->cr1,
+  USART_CR1_DEDT_MASK | USART_CR1_DEAT_MASK);
+   }
+
+   stm32_set_bits(port, ofs->cr1, BIT(cfg->uart_enable_bit));
+   spin_unlock_irqrestore(>lock, flags);
+
+   return 0;
+}
+
+static int stm32_init_rs485(struct uart_port *port,
+   struct platform_device *pdev)
+{
+   struct serial_rs485 *rs485conf = >rs485;
+
+   rs485conf->flags = 0;
+   rs485conf->delay_rts_before_send = 0;
+   rs485conf->delay_rts_after_send = 0;
+
+   if (!pdev->dev.of_node)
+   return -ENODEV;
+
+   uart_get_rs485_mode(>dev, rs485conf);
+
+   return 0;
+}
+
 static int stm32_pending_rx(struct uart_port *port, u32 *sr, int *last_res,
bool threaded)
 {
@@ -498,6 +605,7 @@ static void stm32_set_termios(st

[PATCH 2/2] serial: stm32: update interrupt initialization

[Bich HEMON]

For each port, get each IRQ using its specific name instead of its index.

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0fa735b..5c85cbc 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -680,8 +680,8 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->flags = UPF_BOOT_AUTOCONF;
port->ops   = _uart_ops;
port->dev   = >dev;
-   port->irq   = platform_get_irq(pdev, 0);
-   stm32port->wakeirq = platform_get_irq(pdev, 1);
+   port->irq   = platform_get_irq_byname(pdev, "event");
+   stm32port->wakeirq = platform_get_irq_byname(pdev, "wakeup");
stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- 
1.9.1

[PATCH 2/2] serial: stm32: update interrupt initialization

[Bich HEMON]

For each port, get each IRQ using its specific name instead of its index.

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0fa735b..5c85cbc 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -680,8 +680,8 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->flags = UPF_BOOT_AUTOCONF;
port->ops   = _uart_ops;
port->dev   = >dev;
-   port->irq   = platform_get_irq(pdev, 0);
-   stm32port->wakeirq = platform_get_irq(pdev, 1);
+   port->irq   = platform_get_irq_byname(pdev, "event");
+   stm32port->wakeirq = platform_get_irq_byname(pdev, "wakeup");
stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- 
1.9.1

[PATCH 1/2] dt-bindings: serial: stm32: add wakeup option using note

[Bich HEMON]

Update bindings with interrupt-names and wakeup-source information

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index d150b04..aaeb564 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -10,6 +10,7 @@ Required properties:
 - interrupts:
   - The interrupt line for the USART instance,
   - An optional wake-up interrupt.
+- interrupt-names: Contains "event" for the USART interrupt line.
 - clocks: The input clock of the USART instance
 
 Optional properties:
@@ -17,6 +18,9 @@ Optional properties:
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
+- wakeup-source: bool flag to indicate this device has wakeup capabilities
+- interrupt-names : Should contain "wakeup" if optional wake-up interrupt is
+  used.
 
 Examples:
 usart4: serial@40004c00 {
-- 
1.9.1

[PATCH 1/2] dt-bindings: serial: stm32: add wakeup option using note

[Bich HEMON]

Update bindings with interrupt-names and wakeup-source information

Signed-off-by: Bich Hemon 
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index d150b04..aaeb564 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -10,6 +10,7 @@ Required properties:
 - interrupts:
   - The interrupt line for the USART instance,
   - An optional wake-up interrupt.
+- interrupt-names: Contains "event" for the USART interrupt line.
 - clocks: The input clock of the USART instance
 
 Optional properties:
@@ -17,6 +18,9 @@ Optional properties:
 - st,hw-flow-ctrl: bool flag to enable hardware flow control.
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
+- wakeup-source: bool flag to indicate this device has wakeup capabilities
+- interrupt-names : Should contain "wakeup" if optional wake-up interrupt is
+  used.
 
 Examples:
 usart4: serial@40004c00 {
-- 
1.9.1

[PATCH 0/2] Update interrupt names

[Bich HEMON]

This patchset updates existing stm32 usart driver by updating interrupt
initialization by name.

Bich Hemon (2):
  dt-bindings: serial: stm32: add wakeup option using note
  serial: stm32: update interrupt initialization

 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
 drivers/tty/serial/stm32-usart.c| 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

-- 
1.9.1

[PATCH 0/2] Update interrupt names

[Bich HEMON]

This patchset updates existing stm32 usart driver by updating interrupt
initialization by name.

Bich Hemon (2):
  dt-bindings: serial: stm32: add wakeup option using note
  serial: stm32: update interrupt initialization

 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 4 
 drivers/tty/serial/stm32-usart.c| 4 ++--
 2 files changed, 6 insertions(+), 2 deletions(-)

-- 
1.9.1

[PATCH] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 72c0ec1..b16e7e7 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -203,7 +203,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

Re: [PATCH 4/9] serial: stm32: fix pio transmit timeout

[Bich HEMON]

Hi Greg,

On 07/30/2017 04:32 PM, Greg Kroah-Hartman wrote:
> On Thu, Jul 13, 2017 at 03:08:28PM +0000, Bich HEMON wrote:
>> From: Gerald Baeza <gerald.ba...@st.com>
>>
>> 100µs was too short for low speed transmission
>> (9600bps)
>>
>> Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
>> Signed-off-by: Bich Hemon <bich.he...@st.com>
>> ---
>>   drivers/tty/serial/stm32-usart.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> This patch did not apply :(
> 

I have rebased the patch on top of your tty-next branch . Please drop 
this patch as I will send you a new version.

Thx,

Bich

[PATCH] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Gerald Baeza 

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 72c0ec1..b16e7e7 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -203,7 +203,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

Re: [PATCH 4/9] serial: stm32: fix pio transmit timeout

[Bich HEMON]

Hi Greg,

On 07/30/2017 04:32 PM, Greg Kroah-Hartman wrote:
> On Thu, Jul 13, 2017 at 03:08:28PM +0000, Bich HEMON wrote:
>> From: Gerald Baeza 
>>
>> 100µs was too short for low speed transmission
>> (9600bps)
>>
>> Signed-off-by: Gerald Baeza 
>> Signed-off-by: Bich Hemon 
>> ---
>>   drivers/tty/serial/stm32-usart.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> This patch did not apply :(
> 

I have rebased the patch on top of your tty-next branch . Please drop 
this patch as I will send you a new version.

Thx,

Bich

[PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

This adds low-level debug support on USART1 for STM32F4
and STM32F7.
Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
Enabled via 'earlyprintk' in bootargs.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 arch/arm/Kconfig.debug | 27 +++
 arch/arm/include/debug/stm32.S | 41 +
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/include/debug/stm32.S

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 447629d..0b6e61e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1126,6 +1126,28 @@ choice
 
  If unsure, say N.
 
+   config STM32F4_DEBUG_UART
+   bool "Use STM32F4 UART for low-level debug"
+   depends on ARCH_STM32
+   select DEBUG_STM32_UART
+   help
+ Say Y here if you want kernel low-level debugging support
+ on STM32F4 based platforms, which default UART is wired on
+ USART1.
+
+ If unsure, say N.
+
+   config STM32F7_DEBUG_UART
+   bool "Use STM32F7 UART for low-level debug"
+   depends on ARCH_STM32
+   select DEBUG_STM32_UART
+   help
+ Say Y here if you want kernel low-level debugging support
+ on STM32F7 based platforms, which default UART is wired on
+ USART1.
+
+ If unsure, say N.
+
config TEGRA_DEBUG_UART_AUTO_ODMDATA
bool "Kernel low-level debugging messages via Tegra UART via 
ODMDATA"
depends on ARCH_TEGRA
@@ -1410,6 +1432,10 @@ config DEBUG_STI_UART
bool
depends on ARCH_STI
 
+config DEBUG_STM32_UART
+   bool
+   depends on ARCH_STM32
+
 config DEBUG_SIRFSOC_UART
bool
depends on ARCH_SIRF
@@ -1457,6 +1483,7 @@ config DEBUG_LL_INCLUDE
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
+   default "debug/stm32.S" if DEBUG_STM32_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT
diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
new file mode 100644
index 000..1e060a5
--- /dev/null
+++ b/arch/arm/include/debug/stm32.S
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author:   Gerald Baeza <gerald.ba...@st.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#define STM32_UART_BASE0x40011000  /* USART1 */
+
+#ifdef CONFIG_STM32F4_DEBUG_UART
+#define STM32_USART_SR_OFF 0x00
+#define STM32_USART_TDR_OFF0x04
+#endif
+
+#ifdef CONFIG_STM32F7_DEBUG_UART
+#define STM32_USART_SR_OFF 0x1C
+#define STM32_USART_TDR_OFF0x28
+#endif
+
+#define STM32_USART_TC (1 << 6)/* Tx complete   */
+#define STM32_USART_TXE(1 << 7)/* Tx data reg 
empty */
+
+   .macro  addruart, rp, rv, tmp
+   ldr \rp,  =STM32_UART_BASE  @ physical base
+   ldr \rv,  =STM32_UART_BASE  @ virt base /* NoMMU */
+   .endm
+
+   .macro  senduart,rd,rx
+   strb\rd, [\rx, #STM32_USART_TDR_OFF]
+   .endm
+
+   .macro  waituart,rd,rx
+1001:  ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
+   tst \rd, #STM32_USART_TXE   @ TXE = 1 = tx empty
+   beq 1001b
+   .endm
+
+   .macro  busyuart,rd,rx
+1001:  ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
+   tst \rd, #STM32_USART_TC@ TC = 1 = tx complete
+   beq 1001b
+   .endm
-- 
1.9.1

[PATCH] ARM: stm32: debug: add low-level debug support

[Bich HEMON]

From: Gerald Baeza 

This adds low-level debug support on USART1 for STM32F4
and STM32F7.
Compiled via 'CONFIG_DEBUG_LL' and 'CONFIG_EARLY_PRINTK'.
Enabled via 'earlyprintk' in bootargs.

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 arch/arm/Kconfig.debug | 27 +++
 arch/arm/include/debug/stm32.S | 41 +
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/include/debug/stm32.S

diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 447629d..0b6e61e 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -1126,6 +1126,28 @@ choice
 
  If unsure, say N.
 
+   config STM32F4_DEBUG_UART
+   bool "Use STM32F4 UART for low-level debug"
+   depends on ARCH_STM32
+   select DEBUG_STM32_UART
+   help
+ Say Y here if you want kernel low-level debugging support
+ on STM32F4 based platforms, which default UART is wired on
+ USART1.
+
+ If unsure, say N.
+
+   config STM32F7_DEBUG_UART
+   bool "Use STM32F7 UART for low-level debug"
+   depends on ARCH_STM32
+   select DEBUG_STM32_UART
+   help
+ Say Y here if you want kernel low-level debugging support
+ on STM32F7 based platforms, which default UART is wired on
+ USART1.
+
+ If unsure, say N.
+
config TEGRA_DEBUG_UART_AUTO_ODMDATA
bool "Kernel low-level debugging messages via Tegra UART via 
ODMDATA"
depends on ARCH_TEGRA
@@ -1410,6 +1432,10 @@ config DEBUG_STI_UART
bool
depends on ARCH_STI
 
+config DEBUG_STM32_UART
+   bool
+   depends on ARCH_STM32
+
 config DEBUG_SIRFSOC_UART
bool
depends on ARCH_SIRF
@@ -1457,6 +1483,7 @@ config DEBUG_LL_INCLUDE
default "debug/s5pv210.S" if DEBUG_S5PV210_UART
default "debug/sirf.S" if DEBUG_SIRFSOC_UART
default "debug/sti.S" if DEBUG_STI_UART
+   default "debug/stm32.S" if DEBUG_STM32_UART
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT
diff --git a/arch/arm/include/debug/stm32.S b/arch/arm/include/debug/stm32.S
new file mode 100644
index 000..1e060a5
--- /dev/null
+++ b/arch/arm/include/debug/stm32.S
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author:   Gerald Baeza 
+ * License terms:  GNU General Public License (GPL), version 2
+ */
+
+#define STM32_UART_BASE0x40011000  /* USART1 */
+
+#ifdef CONFIG_STM32F4_DEBUG_UART
+#define STM32_USART_SR_OFF 0x00
+#define STM32_USART_TDR_OFF0x04
+#endif
+
+#ifdef CONFIG_STM32F7_DEBUG_UART
+#define STM32_USART_SR_OFF 0x1C
+#define STM32_USART_TDR_OFF0x28
+#endif
+
+#define STM32_USART_TC (1 << 6)/* Tx complete   */
+#define STM32_USART_TXE(1 << 7)/* Tx data reg 
empty */
+
+   .macro  addruart, rp, rv, tmp
+   ldr \rp,  =STM32_UART_BASE  @ physical base
+   ldr \rv,  =STM32_UART_BASE  @ virt base /* NoMMU */
+   .endm
+
+   .macro  senduart,rd,rx
+   strb\rd, [\rx, #STM32_USART_TDR_OFF]
+   .endm
+
+   .macro  waituart,rd,rx
+1001:  ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
+   tst \rd, #STM32_USART_TXE   @ TXE = 1 = tx empty
+   beq 1001b
+   .endm
+
+   .macro  busyuart,rd,rx
+1001:  ldr \rd, [\rx, #(STM32_USART_SR_OFF)]   @ Read Status Register
+   tst \rd, #STM32_USART_TC@ TC = 1 = tx complete
+   beq 1001b
+   .endm
-- 
1.9.1

[PATCH] Add support for low-level debug on STM32

[Bich HEMON]

This patch adds low-level debug support on USART1 for STM32F4 and STM32F7.

Gerald Baeza (1):
  ARM: stm32: debug: add low-level debug support

 arch/arm/Kconfig.debug | 27 +++
 arch/arm/include/debug/stm32.S | 41 +
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/include/debug/stm32.S

-- 
1.9.1

[PATCH] Add support for low-level debug on STM32

[Bich HEMON]

This patch adds low-level debug support on USART1 for STM32F4 and STM32F7.

Gerald Baeza (1):
  ARM: stm32: debug: add low-level debug support

 arch/arm/Kconfig.debug | 27 +++
 arch/arm/include/debug/stm32.S | 41 +
 2 files changed, 68 insertions(+)
 create mode 100644 arch/arm/include/debug/stm32.S

-- 
1.9.1

[PATCH 6/9] serial: stm32: fix error handling in probe

[Bich HEMON]

From: Fabrice Gasnier <fabrice.gasn...@st.com>

Disable clock properly in case of error.

Signed-off-by: Fabrice Gasnier <fabrice.gasn...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 9158d31..413ff49 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -678,8 +678,10 @@ static int stm32_init_port(struct stm32_port *stm32port,
return ret;
 
stm32port->port.uartclk = clk_get_rate(stm32port->clk);
-   if (!stm32port->port.uartclk)
+   if (!stm32port->port.uartclk) {
+   clk_disable_unprepare(stm32port->clk);
ret = -EINVAL;
+   }
 
return ret;
 }
@@ -865,7 +867,7 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
ret = uart_add_one_port(_usart_driver, >port);
if (ret)
-   return ret;
+   goto err_uninit;
 
ret = stm32_of_dma_rx_probe(stm32port, pdev);
if (ret)
@@ -878,6 +880,11 @@ static int stm32_serial_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, >port);
 
return 0;
+
+err_uninit:
+   clk_disable_unprepare(stm32port->clk);
+
+   return ret;
 }
 
 static int stm32_serial_remove(struct platform_device *pdev)
-- 
1.9.1

[PATCH 8/9] serial: stm32: add wakeup mechanism

[Bich HEMON]

From: Fabrice Gasnier <fabrice.gasn...@st.com>

Add support for wake-up from low power modes. This extends stm32f7.
Introduce new compatible for stm32h7 to manage wake-up capability.

Signed-off-by: Fabrice Gasnier <fabrice.gasn...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 90 +++-
 drivers/tty/serial/stm32-usart.h | 29 +
 2 files changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 413ff49..684cbe3 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -326,6 +327,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 
sr = readl_relaxed(port->membase + ofs->isr);
 
+   if ((sr & USART_SR_WUF) && (ofs->icr != UNDEF_REG))
+   writel_relaxed(USART_ICR_WUCF,
+  port->membase + ofs->icr);
+
if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
stm32_receive_chars(port, false);
 
@@ -442,6 +447,7 @@ static int stm32_startup(struct uart_port *port)
 {
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
const char *name = to_platform_device(port->dev)->name;
u32 val;
int ret;
@@ -452,6 +458,15 @@ static int stm32_startup(struct uart_port *port)
if (ret)
return ret;
 
+   if (cfg->has_wakeup && stm32_port->wakeirq >= 0) {
+   ret = dev_pm_set_dedicated_wake_irq(port->dev,
+   stm32_port->wakeirq);
+   if (ret) {
+   free_irq(port->irq, port);
+   return ret;
+   }
+   }
+
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
stm32_set_bits(port, ofs->cr1, val);
 
@@ -469,6 +484,7 @@ static void stm32_shutdown(struct uart_port *port)
val |= BIT(cfg->uart_enable_bit);
stm32_clr_bits(port, ofs->cr1, val);
 
+   dev_pm_clear_wake_irq(port->dev);
free_irq(port->irq, port);
 }
 
@@ -659,6 +675,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->ops   = _uart_ops;
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
+   stm32port->wakeirq = platform_get_irq(pdev, 1);
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(>dev, res);
@@ -716,6 +733,8 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
{ .compatible = "st,stm32-uart", .data = _info},
{ .compatible = "st,stm32f7-usart", .data = _info},
{ .compatible = "st,stm32f7-uart", .data = _info},
+   { .compatible = "st,stm32h7-usart", .data = _info},
+   { .compatible = "st,stm32h7-uart", .data = _info},
{},
 };
 
@@ -865,9 +884,15 @@ static int stm32_serial_probe(struct platform_device *pdev)
if (ret)
return ret;
 
+   if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0) {
+   ret = device_init_wakeup(>dev, true);
+   if (ret)
+   goto err_uninit;
+   }
+
ret = uart_add_one_port(_usart_driver, >port);
if (ret)
-   goto err_uninit;
+   goto err_nowup;
 
ret = stm32_of_dma_rx_probe(stm32port, pdev);
if (ret)
@@ -881,6 +906,10 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
return 0;
 
+err_nowup:
+   if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0)
+   device_init_wakeup(>dev, false);
+
 err_uninit:
clk_disable_unprepare(stm32port->clk);
 
@@ -892,6 +921,7 @@ static int stm32_serial_remove(struct platform_device *pdev)
struct uart_port *port = platform_get_drvdata(pdev);
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
@@ -913,6 +943,9 @@ static int stm32_serial_remove(struct platform_device *pdev)
  TX_BUF_L, stm32_port->tx_buf,
  stm32_port->tx_dma_buf);
 
+   if (cfg->has_wakeup && stm32_port->wakeirq >= 0)
+   device_init_wakeup(>dev, false);
+
clk_disable_unprepare(stm32_port->clk);
 
   

[PATCH 6/9] serial: stm32: fix error handling in probe

[Bich HEMON]

From: Fabrice Gasnier 

Disable clock properly in case of error.

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 9158d31..413ff49 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -678,8 +678,10 @@ static int stm32_init_port(struct stm32_port *stm32port,
return ret;
 
stm32port->port.uartclk = clk_get_rate(stm32port->clk);
-   if (!stm32port->port.uartclk)
+   if (!stm32port->port.uartclk) {
+   clk_disable_unprepare(stm32port->clk);
ret = -EINVAL;
+   }
 
return ret;
 }
@@ -865,7 +867,7 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
ret = uart_add_one_port(_usart_driver, >port);
if (ret)
-   return ret;
+   goto err_uninit;
 
ret = stm32_of_dma_rx_probe(stm32port, pdev);
if (ret)
@@ -878,6 +880,11 @@ static int stm32_serial_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, >port);
 
return 0;
+
+err_uninit:
+   clk_disable_unprepare(stm32port->clk);
+
+   return ret;
 }
 
 static int stm32_serial_remove(struct platform_device *pdev)
-- 
1.9.1

[PATCH 8/9] serial: stm32: add wakeup mechanism

[Bich HEMON]

From: Fabrice Gasnier 

Add support for wake-up from low power modes. This extends stm32f7.
Introduce new compatible for stm32h7 to manage wake-up capability.

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 90 +++-
 drivers/tty/serial/stm32-usart.h | 29 +
 2 files changed, 118 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 413ff49..684cbe3 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -26,6 +26,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -326,6 +327,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 
sr = readl_relaxed(port->membase + ofs->isr);
 
+   if ((sr & USART_SR_WUF) && (ofs->icr != UNDEF_REG))
+   writel_relaxed(USART_ICR_WUCF,
+  port->membase + ofs->icr);
+
if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
stm32_receive_chars(port, false);
 
@@ -442,6 +447,7 @@ static int stm32_startup(struct uart_port *port)
 {
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
const char *name = to_platform_device(port->dev)->name;
u32 val;
int ret;
@@ -452,6 +458,15 @@ static int stm32_startup(struct uart_port *port)
if (ret)
return ret;
 
+   if (cfg->has_wakeup && stm32_port->wakeirq >= 0) {
+   ret = dev_pm_set_dedicated_wake_irq(port->dev,
+   stm32_port->wakeirq);
+   if (ret) {
+   free_irq(port->irq, port);
+   return ret;
+   }
+   }
+
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
stm32_set_bits(port, ofs->cr1, val);
 
@@ -469,6 +484,7 @@ static void stm32_shutdown(struct uart_port *port)
val |= BIT(cfg->uart_enable_bit);
stm32_clr_bits(port, ofs->cr1, val);
 
+   dev_pm_clear_wake_irq(port->dev);
free_irq(port->irq, port);
 }
 
@@ -659,6 +675,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->ops   = _uart_ops;
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
+   stm32port->wakeirq = platform_get_irq(pdev, 1);
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(>dev, res);
@@ -716,6 +733,8 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
{ .compatible = "st,stm32-uart", .data = _info},
{ .compatible = "st,stm32f7-usart", .data = _info},
{ .compatible = "st,stm32f7-uart", .data = _info},
+   { .compatible = "st,stm32h7-usart", .data = _info},
+   { .compatible = "st,stm32h7-uart", .data = _info},
{},
 };
 
@@ -865,9 +884,15 @@ static int stm32_serial_probe(struct platform_device *pdev)
if (ret)
return ret;
 
+   if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0) {
+   ret = device_init_wakeup(>dev, true);
+   if (ret)
+   goto err_uninit;
+   }
+
ret = uart_add_one_port(_usart_driver, >port);
if (ret)
-   goto err_uninit;
+   goto err_nowup;
 
ret = stm32_of_dma_rx_probe(stm32port, pdev);
if (ret)
@@ -881,6 +906,10 @@ static int stm32_serial_probe(struct platform_device *pdev)
 
return 0;
 
+err_nowup:
+   if (stm32port->info->cfg.has_wakeup && stm32port->wakeirq >= 0)
+   device_init_wakeup(>dev, false);
+
 err_uninit:
clk_disable_unprepare(stm32port->clk);
 
@@ -892,6 +921,7 @@ static int stm32_serial_remove(struct platform_device *pdev)
struct uart_port *port = platform_get_drvdata(pdev);
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   struct stm32_usart_config *cfg = _port->info->cfg;
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
@@ -913,6 +943,9 @@ static int stm32_serial_remove(struct platform_device *pdev)
  TX_BUF_L, stm32_port->tx_buf,
  stm32_port->tx_dma_buf);
 
+   if (cfg->has_wakeup && stm32_port->wakeirq >= 0)
+   device_init_wakeup(>dev, false);
+
clk_disable_unprepare(stm32_port->clk);
 
return uart_remove_one_port(_usart_driver, port);
@@ -1018,11 +1051,

[PATCH 7/9] dt-bindings: serial: add compatible for stm32h7

[Bich HEMON]

From: Fabrice Gasnier <fabrice.gasn...@st.com>

Introduce new compatibles for "st,stm32h7-usart" and "st,stm32h7-uart".
This new compatible allow to use optional wake-up interrupt.

Signed-off-by: Fabrice Gasnier <fabrice.gasn...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 .../devicetree/bindings/serial/st,stm32-usart.txt   | 17 -
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 85ec5f2..3657f9f 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -1,12 +1,19 @@
 * STMicroelectronics STM32 USART
 
 Required properties:
-- compatible: Can be either "st,stm32-usart", "st,stm32-uart",
-"st,stm32f7-usart" or "st,stm32f7-uart" depending on whether
-the device supports synchronous mode and is compatible with
-stm32(f4) or stm32f7.
+- compatible: can be either:
+  - "st,stm32-usart",
+  - "st,stm32-uart",
+  - "st,stm32f7-usart",
+  - "st,stm32f7-uart",
+  - "st,stm32h7-usart"
+  - "st,stm32h7-uart".
+  depending on whether the device supports synchronous mode
+  and is compatible with stm32(f4), stm32f7 or stm32h7.
 - reg: The address and length of the peripheral registers space
-- interrupts: The interrupt line of the USART instance
+- interrupts:
+  - The interrupt line for the USART instance,
+  - An optional wake-up interrupt.
 - clocks: The input clock of the USART instance
 
 Optional properties:
-- 
1.9.1

[PATCH 1/9] serial: stm32: fix copyright

[Bich HEMON]

Fix missing copyright for STMicroelectronics

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 1 +
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0338562..ebc49e4 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
  * Authors:  Maxime Coquelin <mcoquelin.st...@gmail.com>
  *  Gerald Baeza <gerald.ba...@st.com>
  * License terms:  GNU General Public License (GPL), version 2
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cd97ceb..0532b2f 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
  * Authors:  Maxime Coquelin <mcoquelin.st...@gmail.com>
  *  Gerald Baeza <gerald_ba...@yahoo.fr>
  * License terms:  GNU General Public License (GPL), version 2
-- 
1.9.1

[PATCH 7/9] dt-bindings: serial: add compatible for stm32h7

[Bich HEMON]

From: Fabrice Gasnier 

Introduce new compatibles for "st,stm32h7-usart" and "st,stm32h7-uart".
This new compatible allow to use optional wake-up interrupt.

Signed-off-by: Fabrice Gasnier 
Signed-off-by: Bich Hemon 
---
 .../devicetree/bindings/serial/st,stm32-usart.txt   | 17 -
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 85ec5f2..3657f9f 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -1,12 +1,19 @@
 * STMicroelectronics STM32 USART
 
 Required properties:
-- compatible: Can be either "st,stm32-usart", "st,stm32-uart",
-"st,stm32f7-usart" or "st,stm32f7-uart" depending on whether
-the device supports synchronous mode and is compatible with
-stm32(f4) or stm32f7.
+- compatible: can be either:
+  - "st,stm32-usart",
+  - "st,stm32-uart",
+  - "st,stm32f7-usart",
+  - "st,stm32f7-uart",
+  - "st,stm32h7-usart"
+  - "st,stm32h7-uart".
+  depending on whether the device supports synchronous mode
+  and is compatible with stm32(f4), stm32f7 or stm32h7.
 - reg: The address and length of the peripheral registers space
-- interrupts: The interrupt line of the USART instance
+- interrupts:
+  - The interrupt line for the USART instance,
+  - An optional wake-up interrupt.
 - clocks: The input clock of the USART instance
 
 Optional properties:
-- 
1.9.1

[PATCH 1/9] serial: stm32: fix copyright

[Bich HEMON]

Fix missing copyright for STMicroelectronics

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 1 +
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 2 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0338562..ebc49e4 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
  * Authors:  Maxime Coquelin 
  *  Gerald Baeza 
  * License terms:  GNU General Public License (GPL), version 2
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cd97ceb..0532b2f 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -1,5 +1,6 @@
 /*
  * Copyright (C) Maxime Coquelin 2015
+ * Copyright (C) STMicroelectronics SA 2017
  * Authors:  Maxime Coquelin 
  *  Gerald Baeza 
  * License terms:  GNU General Public License (GPL), version 2
-- 
1.9.1

[PATCH 3/9] serial: stm32: Increase maximum number of ports

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

Increase max number of ports for stm32h7
which supports up to 8 uart and usart instances.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 65b4ffa..6092789 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -206,7 +206,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_ICR_CMCF BIT(17) /* F7 */
 
 #define STM32_SERIAL_NAME "ttyS"
-#define STM32_MAX_PORTS 6
+#define STM32_MAX_PORTS 8
 
 #define RX_BUF_L 200/* dma rx buffer length */
 #define RX_BUF_P RX_BUF_L   /* dma rx buffer period */
-- 
1.9.1

[PATCH 3/9] serial: stm32: Increase maximum number of ports

[Bich HEMON]

From: Gerald Baeza 

Increase max number of ports for stm32h7
which supports up to 8 uart and usart instances.

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 65b4ffa..6092789 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -206,7 +206,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_ICR_CMCF BIT(17) /* F7 */
 
 #define STM32_SERIAL_NAME "ttyS"
-#define STM32_MAX_PORTS 6
+#define STM32_MAX_PORTS 8
 
 #define RX_BUF_L 200/* dma rx buffer length */
 #define RX_BUF_P RX_BUF_L   /* dma rx buffer period */
-- 
1.9.1

[PATCH 9/9] serial: stm32: add fifo support

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

This patch adds fifo mode support for rx and tx.

A fifo configuration is set in each port structure.
Add has_fifo flag to usart configuration to use fifo only when possible.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 7 +++
 drivers/tty/serial/stm32-usart.h | 4 
 2 files changed, 11 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 684cbe3..b16e7e7 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -468,6 +468,8 @@ static int stm32_startup(struct uart_port *port)
}
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -482,6 +484,8 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
dev_pm_clear_wake_irq(port->dev);
@@ -512,6 +516,8 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
+   if (stm32_port->fifoen)
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
@@ -676,6 +682,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
stm32port->wakeirq = platform_get_irq(pdev, 1);
+   stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(>dev, res);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 5984a66..ffc0c52 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -26,6 +26,7 @@ struct stm32_usart_config {
u8 uart_enable_bit; /* USART_CR1_UE */
bool has_7bits_data;
bool has_wakeup;
+   bool has_fifo;
 };
 
 struct stm32_usart_info {
@@ -94,6 +95,7 @@ struct stm32_usart_info stm32h7_info = {
.uart_enable_bit = 0,
.has_7bits_data = true,
.has_wakeup = true,
+   .has_fifo = true,
}
 };
 
@@ -159,6 +161,7 @@ struct stm32_usart_info stm32h7_info = {
 #define USART_CR1_EOBIEBIT(27) /* F7 */
 #define USART_CR1_M1   BIT(28) /* F7 */
 #define USART_CR1_IE_MASK  (GENMASK(8, 4) | BIT(14) | BIT(26) | BIT(27))
+#define USART_CR1_FIFOEN   BIT(29) /* H7 */
 
 /* USART_CR2 */
 #define USART_CR2_ADD_MASK GENMASK(3, 0)   /* F4 */
@@ -253,6 +256,7 @@ struct stm32_port {
int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
+   bool fifoen;
int wakeirq;
 };
 
-- 
1.9.1

[PATCH 9/9] serial: stm32: add fifo support

[Bich HEMON]

From: Gerald Baeza 

This patch adds fifo mode support for rx and tx.

A fifo configuration is set in each port structure.
Add has_fifo flag to usart configuration to use fifo only when possible.

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 7 +++
 drivers/tty/serial/stm32-usart.h | 4 
 2 files changed, 11 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 684cbe3..b16e7e7 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -468,6 +468,8 @@ static int stm32_startup(struct uart_port *port)
}
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -482,6 +484,8 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
dev_pm_clear_wake_irq(port->dev);
@@ -512,6 +516,8 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
+   if (stm32_port->fifoen)
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
@@ -676,6 +682,7 @@ static int stm32_init_port(struct stm32_port *stm32port,
port->dev   = >dev;
port->irq   = platform_get_irq(pdev, 0);
stm32port->wakeirq = platform_get_irq(pdev, 1);
+   stm32port->fifoen = stm32port->info->cfg.has_fifo;
 
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
port->membase = devm_ioremap_resource(>dev, res);
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 5984a66..ffc0c52 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -26,6 +26,7 @@ struct stm32_usart_config {
u8 uart_enable_bit; /* USART_CR1_UE */
bool has_7bits_data;
bool has_wakeup;
+   bool has_fifo;
 };
 
 struct stm32_usart_info {
@@ -94,6 +95,7 @@ struct stm32_usart_info stm32h7_info = {
.uart_enable_bit = 0,
.has_7bits_data = true,
.has_wakeup = true,
+   .has_fifo = true,
}
 };
 
@@ -159,6 +161,7 @@ struct stm32_usart_info stm32h7_info = {
 #define USART_CR1_EOBIEBIT(27) /* F7 */
 #define USART_CR1_M1   BIT(28) /* F7 */
 #define USART_CR1_IE_MASK  (GENMASK(8, 4) | BIT(14) | BIT(26) | BIT(27))
+#define USART_CR1_FIFOEN   BIT(29) /* H7 */
 
 /* USART_CR2 */
 #define USART_CR2_ADD_MASK GENMASK(3, 0)   /* F4 */
@@ -253,6 +256,7 @@ struct stm32_port {
int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
+   bool fifoen;
int wakeirq;
 };
 
-- 
1.9.1

[PATCH 5/9] serial: stm32: add RTS support

[Bich HEMON]

Implement support of RTS in USART control register

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ca61bfe..9158d31 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -518,7 +518,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
if (cflag & CRTSCTS) {
port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
-   cr3 |= USART_CR3_CTSE;
+   cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;
}
 
usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud);
-- 
1.9.1

[PATCH 5/9] serial: stm32: add RTS support

[Bich HEMON]

Implement support of RTS in USART control register

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ca61bfe..9158d31 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -518,7 +518,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
if (cflag & CRTSCTS) {
port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
-   cr3 |= USART_CR3_CTSE;
+   cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;
}
 
usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud);
-- 
1.9.1

[PATCH 2/9] serial: stm32: fix multi-ports management

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

Correct management of multi-ports. Each port has
its own last residue value and its own alias.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 12 +++-
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ebc49e4..a12d79c 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -111,14 +111,13 @@ static void stm32_receive_chars(struct uart_port *port, 
bool threaded)
unsigned long c;
u32 sr;
char flag;
-   static int last_res = RX_BUF_L;
 
if (port->irq_wake)
pm_wakeup_event(tport->tty->dev, 0);
 
-   while (stm32_pending_rx(port, , _res, threaded)) {
+   while (stm32_pending_rx(port, , _port->last_res, threaded)) {
sr |= USART_SR_DUMMY_RX;
-   c = stm32_get_char(port, , _res);
+   c = stm32_get_char(port, , _port->last_res);
flag = TTY_NORMAL;
port->icount.rx++;
 
@@ -694,8 +693,10 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
return NULL;
 
id = of_alias_get_id(np, "serial");
-   if (id < 0)
-   id = 0;
+   if (id < 0) {
+   dev_err(>dev, "failed to get alias id, errno %d\n", id);
+   return NULL;
+   }
 
if (WARN_ON(id >= STM32_MAX_PORTS))
return NULL;
@@ -703,6 +704,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].hw_flow_control = of_property_read_bool(np,
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
+   stm32_ports[id].last_res = RX_BUF_L;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 0532b2f..65b4ffa 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -222,6 +222,7 @@ struct stm32_port {
struct dma_chan *tx_ch;  /* dma tx channel*/
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
+   int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
 };
-- 
1.9.1

[PATCH 2/9] serial: stm32: fix multi-ports management

[Bich HEMON]

From: Gerald Baeza 

Correct management of multi-ports. Each port has
its own last residue value and its own alias.

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 12 +++-
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ebc49e4..a12d79c 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -111,14 +111,13 @@ static void stm32_receive_chars(struct uart_port *port, 
bool threaded)
unsigned long c;
u32 sr;
char flag;
-   static int last_res = RX_BUF_L;
 
if (port->irq_wake)
pm_wakeup_event(tport->tty->dev, 0);
 
-   while (stm32_pending_rx(port, , _res, threaded)) {
+   while (stm32_pending_rx(port, , _port->last_res, threaded)) {
sr |= USART_SR_DUMMY_RX;
-   c = stm32_get_char(port, , _res);
+   c = stm32_get_char(port, , _port->last_res);
flag = TTY_NORMAL;
port->icount.rx++;
 
@@ -694,8 +693,10 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
return NULL;
 
id = of_alias_get_id(np, "serial");
-   if (id < 0)
-   id = 0;
+   if (id < 0) {
+   dev_err(>dev, "failed to get alias id, errno %d\n", id);
+   return NULL;
+   }
 
if (WARN_ON(id >= STM32_MAX_PORTS))
return NULL;
@@ -703,6 +704,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].hw_flow_control = of_property_read_bool(np,
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
+   stm32_ports[id].last_res = RX_BUF_L;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 0532b2f..65b4ffa 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -222,6 +222,7 @@ struct stm32_port {
struct dma_chan *tx_ch;  /* dma tx channel*/
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
+   int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
 };
-- 
1.9.1

[PATCH 0/9] Add support for STM32H7 serial

[Bich HEMON]

This patchset updates existing stm32 usart driver:
- Misc fixes: copyright, mutliport management and timeout issue
- Add support for STM32H7
- Add support for wake-up and fifo management (for STM32H7)

Bich Hemon (2):
  serial: stm32: fix copyright
  serial: stm32: add RTS support

Fabrice Gasnier (3):
  serial: stm32: fix error handling in probe
  dt-bindings: serial: add compatible for stm32h7
  serial: stm32: add wakeup mechanism

Gerald Baeza (4):
  serial: stm32: fix multi-ports management
  serial: stm32: Increase maximum number of ports
  serial: stm32: fix pio transmit timeout
  serial: stm32: add fifo support

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  17 ++-
 drivers/tty/serial/stm32-usart.c   | 123 +++--
 drivers/tty/serial/stm32-usart.h   |  37 ++-
 3 files changed, 162 insertions(+), 15 deletions(-)

-- 
1.9.1

[PATCH 0/9] Add support for STM32H7 serial

[Bich HEMON]

This patchset updates existing stm32 usart driver:
- Misc fixes: copyright, mutliport management and timeout issue
- Add support for STM32H7
- Add support for wake-up and fifo management (for STM32H7)

Bich Hemon (2):
  serial: stm32: fix copyright
  serial: stm32: add RTS support

Fabrice Gasnier (3):
  serial: stm32: fix error handling in probe
  dt-bindings: serial: add compatible for stm32h7
  serial: stm32: add wakeup mechanism

Gerald Baeza (4):
  serial: stm32: fix multi-ports management
  serial: stm32: Increase maximum number of ports
  serial: stm32: fix pio transmit timeout
  serial: stm32: add fifo support

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  17 ++-
 drivers/tty/serial/stm32-usart.c   | 123 +++--
 drivers/tty/serial/stm32-usart.h   |  37 ++-
 3 files changed, 162 insertions(+), 15 deletions(-)

-- 
1.9.1

[PATCH 4/9] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Gerald Baeza <gerald.ba...@st.com>

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a12d79c..ca61bfe 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -202,7 +202,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

[PATCH 4/9] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Gerald Baeza 

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza 
Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a12d79c..ca61bfe 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -202,7 +202,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

RE: [PATCH 00/20] Update STM32 usart driver

[Bich HEMON]

Dear all,

Please, do not take into account this patchset. A newer version is currently 
being prepared with typo/format corrections and will be sent later. The 
previous version has to be abandoned.

Sorry for the inconvenience,

Bich HEMON



-Original Message-
From: Bich HEMON 
Sent: lundi 26 juin 2017 14:49
To: Greg Kroah-Hartman <gre...@linuxfoundation.org>; Rob Herring 
<robh...@kernel.org>; Mark Rutland <mark.rutl...@arm.com>; Maxime Coquelin 
<mcoquelin.st...@gmail.com>; Alexandre TORGUE <alexandre.tor...@st.com>; Jiri 
Slaby <jsl...@suse.com>; linux-ser...@vger.kernel.org; 
devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
linux-kernel@vger.kernel.org
Cc: Bich HEMON <bich.he...@st.com>
Subject: [PATCH 00/20] Update STM32 usart driver

From: Bich Hemon <bich.he...@st.com>

This patchset updates the stm32 usart driver. It mainly adds support for fifo, 
dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c   | 310 ++---
 drivers/tty/serial/stm32-usart.h   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

--
1.9.1

RE: [PATCH 00/20] Update STM32 usart driver

[Bich HEMON]

Dear all,

Please, do not take into account this patchset. A newer version is currently 
being prepared with typo/format corrections and will be sent later. The 
previous version has to be abandoned.

Sorry for the inconvenience,

Bich HEMON



-Original Message-
From: Bich HEMON 
Sent: lundi 26 juin 2017 14:49
To: Greg Kroah-Hartman ; Rob Herring 
; Mark Rutland ; Maxime Coquelin 
; Alexandre TORGUE ; Jiri 
Slaby ; linux-ser...@vger.kernel.org; 
devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
linux-kernel@vger.kernel.org
Cc: Bich HEMON 
Subject: [PATCH 00/20] Update STM32 usart driver

From: Bich Hemon 

This patchset updates the stm32 usart driver. It mainly adds support for fifo, 
dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c   | 310 ++---
 drivers/tty/serial/stm32-usart.h   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

--
1.9.1

RE: [PATCH 00/20] Update STM32 usart driver -> ABANDONED

[Bich HEMON]

Dear all,

Please, do not take into account this patchset. A newer version is currently 
being prepared with typo/format corrections and will be sent later. The 
previous version has to be abandoned.

Sorry for the inconvenience,

Bich HEMON



-Original Message-
From: Bich HEMON 
Sent: lundi 26 juin 2017 14:49
To: Greg Kroah-Hartman <gre...@linuxfoundation.org>; Rob Herring 
<robh...@kernel.org>; Mark Rutland <mark.rutl...@arm.com>; Maxime Coquelin 
<mcoquelin.st...@gmail.com>; Alexandre TORGUE <alexandre.tor...@st.com>; Jiri 
Slaby <jsl...@suse.com>; linux-ser...@vger.kernel.org; 
devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
linux-kernel@vger.kernel.org
Cc: Bich HEMON <bich.he...@st.com>
Subject: [PATCH 00/20] Update STM32 usart driver

From: Bich Hemon <bich.he...@st.com>

This patchset updates the stm32 usart driver. It mainly adds support for fifo, 
dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c   | 310 ++---
 drivers/tty/serial/stm32-usart.h   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

--
1.9.1

RE: [PATCH 00/20] Update STM32 usart driver -> ABANDONED

[Bich HEMON]

Dear all,

Please, do not take into account this patchset. A newer version is currently 
being prepared with typo/format corrections and will be sent later. The 
previous version has to be abandoned.

Sorry for the inconvenience,

Bich HEMON



-Original Message-
From: Bich HEMON 
Sent: lundi 26 juin 2017 14:49
To: Greg Kroah-Hartman ; Rob Herring 
; Mark Rutland ; Maxime Coquelin 
; Alexandre TORGUE ; Jiri 
Slaby ; linux-ser...@vger.kernel.org; 
devicet...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; 
linux-kernel@vger.kernel.org
Cc: Bich HEMON 
Subject: [PATCH 00/20] Update STM32 usart driver

From: Bich Hemon 

This patchset updates the stm32 usart driver. It mainly adds support for fifo, 
dma, debugfs anf fixes various bugs.

Bich Hemon (20):
  serial: stm32: adding fifo support
  dt-bindings: serial: each stm32 usart needs an alias
  serial: stm32: fix multi ports management
  serial: stm32: make fifoen as property for each port
  serial: stm32: add debugfs
  serial: stm32: fix pio transmit timeout
  serial: stm32: less messages on dma alloc error
  serial: stm32: timeout interrupt using with dma
  serial: stm32: fix end of transfer
  serial: stm32: fix dma receive
  serial: stm32: add RTS support
  serial: stm32: fix last_res value
  serial: stm32: fix error handling in probe
  dt-bindings: serial: document option wake-up interrupt for STM32 USART
  serial: stm32: Add wakeup mechanism
  serial: stm32: fix fifo usage
  dt-bindings: serial: stm32: add dma using note
  serial: stm32: update dma buffers length
  serial: stm32: add dma rx callback
  serial: stm32: fix rx interrupt handling in startup

 .../devicetree/bindings/serial/st,stm32-usart.txt  |  55 +++-
 drivers/tty/serial/stm32-usart.c   | 310 ++---
 drivers/tty/serial/stm32-usart.h   |  51 +++-
 3 files changed, 375 insertions(+), 41 deletions(-)

--
1.9.1

[PATCH 02/20] dt-bindings: serial: each stm32 usart needs an alias

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Each usart controller should have an alias correctly
numbered in "aliases" node.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 85ec5f2..a229b14 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -15,14 +15,23 @@ Optional properties:
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
+Note: Each usart controller should have an alias correctly numbered
+in "aliases" node.
+
 Examples:
-usart4: serial@40004c00 {
+aliases {
+   serial0 = 
+   serial1 = 
+   serial3 = 
+};
+
+uart4: serial@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
interrupts = <52>;
clocks = <_pclk1>;
pinctrl-names = "default";
-   pinctrl-0 = <_usart4>;
+   pinctrl-0 = <_uart4>;
 };
 
 usart2: serial@40004400 {
-- 
1.9.1

[PATCH 02/20] dt-bindings: serial: each stm32 usart needs an alias

[Bich HEMON]

From: Bich Hemon 

Each usart controller should have an alias correctly
numbered in "aliases" node.

Signed-off-by: Gerald Baeza 
---
 Documentation/devicetree/bindings/serial/st,stm32-usart.txt | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt 
b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
index 85ec5f2..a229b14 100644
--- a/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
+++ b/Documentation/devicetree/bindings/serial/st,stm32-usart.txt
@@ -15,14 +15,23 @@ Optional properties:
 - dmas: phandle(s) to DMA controller node(s). Refer to stm32-dma.txt
 - dma-names: "rx" and/or "tx"
 
+Note: Each usart controller should have an alias correctly numbered
+in "aliases" node.
+
 Examples:
-usart4: serial@40004c00 {
+aliases {
+   serial0 = 
+   serial1 = 
+   serial3 = 
+};
+
+uart4: serial@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
interrupts = <52>;
clocks = <_pclk1>;
pinctrl-names = "default";
-   pinctrl-0 = <_usart4>;
+   pinctrl-0 = <_uart4>;
 };
 
 usart2: serial@40004400 {
-- 
1.9.1

[PATCH 05/20] serial: stm32: add debugfs

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Adding debugfs infrastructure and one virtual
file allowing to change fifoen value.
This value change is taken into account on next
port setup or enabling.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 49 
 drivers/tty/serial/stm32-usart.h |  3 +++
 2 files changed, 52 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 34e31d1..3ce0f7a 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -34,6 +34,51 @@
 
 #include "stm32-usart.h"
 
+#ifdef CONFIG_DEBUG_FS
+#include 
+#include 
+#include 
+#include 
+
+static struct dentry *stm32_debugfs_root;
+static atomic_t stm32_debugfs_cnt = ATOMIC_INIT(0);
+
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+phys_addr_t phys_addr)
+{
+   struct device *dev = stm32port->port.dev;
+
+   if (!stm32_debugfs_root)
+   stm32_debugfs_root = debugfs_create_dir("usart-stm32", NULL);
+
+   stm32port->debugfs_dir = debugfs_create_dir(dev_name(dev),
+   stm32_debugfs_root);
+
+   debugfs_create_bool("fifoen", 0644,
+   stm32port->debugfs_dir, >fifoen);
+
+   atomic_inc(_debugfs_cnt);
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+   debugfs_remove_recursive(stm32port->debugfs_dir);
+   if (atomic_dec_and_test(_debugfs_cnt)) {
+   debugfs_remove_recursive(stm32_debugfs_root);
+   stm32_debugfs_root = NULL;
+   }
+}
+#else
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+phys_addr_t phys_addr)
+{
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+}
+#endif
+
 static void stm32_stop_tx(struct uart_port *port);
 static void stm32_transmit_chars(struct uart_port *port);
 
@@ -672,6 +717,8 @@ static int stm32_init_port(struct stm32_port *stm32port,
return PTR_ERR(port->membase);
port->mapbase = res->start;
 
+   stm32_serial_debugfs(stm32port, res->start);
+
spin_lock_init(>lock);
 
stm32port->clk = devm_clk_get(>dev, NULL);
@@ -914,6 +961,8 @@ static int stm32_serial_remove(struct platform_device *pdev)
 
clk_disable_unprepare(stm32_port->clk);
 
+   stm32_serial_debugfs_rm(stm32_port);
+
return uart_remove_one_port(_usart_driver, port);
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 9429baf..a8999a1 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -216,6 +216,9 @@ struct stm32_port {
struct uart_port port;
struct clk *clk;
struct stm32_usart_info *info;
+#ifdef CONFIG_DEBUG_FS
+   struct dentry *debugfs_dir;
+#endif
struct dma_chan *rx_ch;  /* dma rx channel*/
dma_addr_t rx_dma_buf;   /* dma rx buffer bus address */
unsigned char *rx_buf;   /* dma rx buffer cpu address */
-- 
1.9.1

[PATCH 05/20] serial: stm32: add debugfs

[Bich HEMON]

From: Bich Hemon 

Adding debugfs infrastructure and one virtual
file allowing to change fifoen value.
This value change is taken into account on next
port setup or enabling.

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 49 
 drivers/tty/serial/stm32-usart.h |  3 +++
 2 files changed, 52 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 34e31d1..3ce0f7a 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -34,6 +34,51 @@
 
 #include "stm32-usart.h"
 
+#ifdef CONFIG_DEBUG_FS
+#include 
+#include 
+#include 
+#include 
+
+static struct dentry *stm32_debugfs_root;
+static atomic_t stm32_debugfs_cnt = ATOMIC_INIT(0);
+
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+phys_addr_t phys_addr)
+{
+   struct device *dev = stm32port->port.dev;
+
+   if (!stm32_debugfs_root)
+   stm32_debugfs_root = debugfs_create_dir("usart-stm32", NULL);
+
+   stm32port->debugfs_dir = debugfs_create_dir(dev_name(dev),
+   stm32_debugfs_root);
+
+   debugfs_create_bool("fifoen", 0644,
+   stm32port->debugfs_dir, >fifoen);
+
+   atomic_inc(_debugfs_cnt);
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+   debugfs_remove_recursive(stm32port->debugfs_dir);
+   if (atomic_dec_and_test(_debugfs_cnt)) {
+   debugfs_remove_recursive(stm32_debugfs_root);
+   stm32_debugfs_root = NULL;
+   }
+}
+#else
+static void stm32_serial_debugfs(struct stm32_port *stm32port,
+phys_addr_t phys_addr)
+{
+}
+
+static void stm32_serial_debugfs_rm(struct stm32_port *stm32port)
+{
+}
+#endif
+
 static void stm32_stop_tx(struct uart_port *port);
 static void stm32_transmit_chars(struct uart_port *port);
 
@@ -672,6 +717,8 @@ static int stm32_init_port(struct stm32_port *stm32port,
return PTR_ERR(port->membase);
port->mapbase = res->start;
 
+   stm32_serial_debugfs(stm32port, res->start);
+
spin_lock_init(>lock);
 
stm32port->clk = devm_clk_get(>dev, NULL);
@@ -914,6 +961,8 @@ static int stm32_serial_remove(struct platform_device *pdev)
 
clk_disable_unprepare(stm32_port->clk);
 
+   stm32_serial_debugfs_rm(stm32_port);
+
return uart_remove_one_port(_usart_driver, port);
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 9429baf..a8999a1 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -216,6 +216,9 @@ struct stm32_port {
struct uart_port port;
struct clk *clk;
struct stm32_usart_info *info;
+#ifdef CONFIG_DEBUG_FS
+   struct dentry *debugfs_dir;
+#endif
struct dma_chan *rx_ch;  /* dma rx channel*/
dma_addr_t rx_dma_buf;   /* dma rx buffer bus address */
unsigned char *rx_buf;   /* dma rx buffer cpu address */
-- 
1.9.1

[PATCH 06/20] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 3ce0f7a..79ac167 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -247,7 +247,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

[PATCH 06/20] serial: stm32: fix pio transmit timeout

[Bich HEMON]

From: Bich Hemon 

100µs was too short for low speed transmission
(9600bps)

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 3ce0f7a..79ac167 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -247,7 +247,7 @@ static void stm32_transmit_chars_pio(struct uart_port *port)
ret = readl_relaxed_poll_timeout_atomic(port->membase + ofs->isr,
isr,
(isr & USART_SR_TXE),
-   10, 100);
+   10, 10);
 
if (ret)
dev_err(port->dev, "tx empty not set\n");
-- 
1.9.1

[PATCH 04/20] serial: stm32: make fifoen as property for each port

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 10 +++---
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index c6ae4fd..34e31d1 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,7 +453,8 @@ static int stm32_startup(struct uart_port *port)
return ret;
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
-   val |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -468,7 +469,8 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
-   val |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
free_irq(port->irq, port);
@@ -498,7 +500,8 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
-   cr1 |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
@@ -707,6 +710,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].hw_flow_control = of_property_read_bool(np,
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
+   stm32_ports[id].fifoen = true;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 33f1320..9429baf 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -224,6 +224,7 @@ struct stm32_port {
unsigned char *tx_buf;   /* dma tx buffer cpu address */
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
+   bool fifoen;
 };
 
 static struct stm32_port stm32_ports[STM32_MAX_PORTS];
-- 
1.9.1

[PATCH 04/20] serial: stm32: make fifoen as property for each port

[Bich HEMON]

From: Bich Hemon 

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 10 +++---
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index c6ae4fd..34e31d1 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,7 +453,8 @@ static int stm32_startup(struct uart_port *port)
return ret;
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
-   val |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -468,7 +469,8 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
-   val |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
free_irq(port->irq, port);
@@ -498,7 +500,8 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
-   cr1 |= USART_CR1_FIFOEN;
+   if (stm32_port->fifoen)
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
@@ -707,6 +710,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].hw_flow_control = of_property_read_bool(np,
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
+   stm32_ports[id].fifoen = true;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index 33f1320..9429baf 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -224,6 +224,7 @@ struct stm32_port {
unsigned char *tx_buf;   /* dma tx buffer cpu address */
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
+   bool fifoen;
 };
 
 static struct stm32_port stm32_ports[STM32_MAX_PORTS];
-- 
1.9.1

[PATCH 08/20] serial: stm32: timeout interrupt using with dma

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 25 +++--
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index dcc6d1e..ed2025b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -371,6 +371,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 
sr = readl_relaxed(port->membase + ofs->isr);
 
+   if ((sr & USART_SR_RTOF) && (ofs->icr != UNDEF_REG))
+   writel_relaxed(USART_ICR_RTOCF,
+  port->membase + ofs->icr);
+
if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
stm32_receive_chars(port, false);
 
@@ -453,7 +457,7 @@ static void stm32_throttle(struct uart_port *port)
unsigned long flags;
 
spin_lock_irqsave(>lock, flags);
-   stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -465,7 +469,7 @@ static void stm32_unthrottle(struct uart_port *port)
unsigned long flags;
 
spin_lock_irqsave(>lock, flags);
-   stm32_set_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_set_bits(port, ofs->cr1, stm32_port->rx_irq);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -475,7 +479,7 @@ static void stm32_stop_rx(struct uart_port *port)
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
 
-   stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
 }
 
 /* Handle breaks - ignored by us */
@@ -497,7 +501,7 @@ static int stm32_startup(struct uart_port *port)
if (ret)
return ret;
 
-   val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val = stm32_port->rx_irq | USART_CR1_TE | USART_CR1_RE;
if (stm32_port->fifoen)
val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
@@ -512,7 +516,8 @@ static void stm32_shutdown(struct uart_port *port)
struct stm32_usart_config *cfg = _port->info->cfg;
u32 val;
 
-   val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val = USART_CR1_TXEIE | USART_CR1_TE;
+   val |= stm32_port->rx_irq | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
if (stm32_port->fifoen)
val |= USART_CR1_FIFOEN;
@@ -543,7 +548,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
/* Stop serial port and reset value */
writel_relaxed(0, port->membase + ofs->cr1);
 
-   cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
+   cr1 = USART_CR1_TE | USART_CR1_RE;
cr1 |= BIT(cfg->uart_enable_bit);
if (stm32_port->fifoen)
cr1 |= USART_CR1_FIFOEN;
@@ -553,6 +558,13 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
if (cflag & CSTOPB)
cr2 |= USART_CR2_STOP_2B;
 
+   if ((ofs->rtor != UNDEF_REG) && (stm32_port->rx_ch)) {
+   stm32_port->rx_irq = USART_CR1_RTOIE;
+   writel_relaxed(baud, port->membase + ofs->rtor);
+   cr2 |= USART_CR2_RTOEN;
+   }
+   cr1 |= stm32_port->rx_irq;
+
if (cflag & PARENB) {
cr1 |= USART_CR1_PCE;
if ((cflag & CSIZE) == CS8) {
@@ -758,6 +770,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
stm32_ports[id].fifoen = true;
+   stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index a8999a1..f9fe15b 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -225,6 +225,7 @@ struct stm32_port {
struct dma_chan *tx_ch;  /* dma tx channel*/
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
+   u32 rx_irq;  /* USART_CR1_RXNEIE or RTOIE */
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
bool fifoen;
-- 
1.9.1

[PATCH 08/20] serial: stm32: timeout interrupt using with dma

[Bich HEMON]

From: Bich Hemon 

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 25 +++--
 drivers/tty/serial/stm32-usart.h |  1 +
 2 files changed, 20 insertions(+), 6 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index dcc6d1e..ed2025b 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -371,6 +371,10 @@ static irqreturn_t stm32_interrupt(int irq, void *ptr)
 
sr = readl_relaxed(port->membase + ofs->isr);
 
+   if ((sr & USART_SR_RTOF) && (ofs->icr != UNDEF_REG))
+   writel_relaxed(USART_ICR_RTOCF,
+  port->membase + ofs->icr);
+
if ((sr & USART_SR_RXNE) && !(stm32_port->rx_ch))
stm32_receive_chars(port, false);
 
@@ -453,7 +457,7 @@ static void stm32_throttle(struct uart_port *port)
unsigned long flags;
 
spin_lock_irqsave(>lock, flags);
-   stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -465,7 +469,7 @@ static void stm32_unthrottle(struct uart_port *port)
unsigned long flags;
 
spin_lock_irqsave(>lock, flags);
-   stm32_set_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_set_bits(port, ofs->cr1, stm32_port->rx_irq);
spin_unlock_irqrestore(>lock, flags);
 }
 
@@ -475,7 +479,7 @@ static void stm32_stop_rx(struct uart_port *port)
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
 
-   stm32_clr_bits(port, ofs->cr1, USART_CR1_RXNEIE);
+   stm32_clr_bits(port, ofs->cr1, stm32_port->rx_irq);
 }
 
 /* Handle breaks - ignored by us */
@@ -497,7 +501,7 @@ static int stm32_startup(struct uart_port *port)
if (ret)
return ret;
 
-   val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val = stm32_port->rx_irq | USART_CR1_TE | USART_CR1_RE;
if (stm32_port->fifoen)
val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
@@ -512,7 +516,8 @@ static void stm32_shutdown(struct uart_port *port)
struct stm32_usart_config *cfg = _port->info->cfg;
u32 val;
 
-   val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val = USART_CR1_TXEIE | USART_CR1_TE;
+   val |= stm32_port->rx_irq | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
if (stm32_port->fifoen)
val |= USART_CR1_FIFOEN;
@@ -543,7 +548,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
/* Stop serial port and reset value */
writel_relaxed(0, port->membase + ofs->cr1);
 
-   cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
+   cr1 = USART_CR1_TE | USART_CR1_RE;
cr1 |= BIT(cfg->uart_enable_bit);
if (stm32_port->fifoen)
cr1 |= USART_CR1_FIFOEN;
@@ -553,6 +558,13 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
if (cflag & CSTOPB)
cr2 |= USART_CR2_STOP_2B;
 
+   if ((ofs->rtor != UNDEF_REG) && (stm32_port->rx_ch)) {
+   stm32_port->rx_irq = USART_CR1_RTOIE;
+   writel_relaxed(baud, port->membase + ofs->rtor);
+   cr2 |= USART_CR2_RTOEN;
+   }
+   cr1 |= stm32_port->rx_irq;
+
if (cflag & PARENB) {
cr1 |= USART_CR1_PCE;
if ((cflag & CSIZE) == CS8) {
@@ -758,6 +770,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
"st,hw-flow-ctrl");
stm32_ports[id].port.line = id;
stm32_ports[id].fifoen = true;
+   stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index a8999a1..f9fe15b 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -225,6 +225,7 @@ struct stm32_port {
struct dma_chan *tx_ch;  /* dma tx channel*/
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
+   u32 rx_irq;  /* USART_CR1_RXNEIE or RTOIE */
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
bool fifoen;
-- 
1.9.1

[PATCH 01/20] serial: stm32: adding fifo support

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

This patch adds fifo mode support for rx and tx.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 3 +++
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0338562..50948f6 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,6 +453,7 @@ static int stm32_startup(struct uart_port *port)
return ret;
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -467,6 +468,7 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
free_irq(port->irq, port);
@@ -496,6 +498,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cd97ceb..9f0d0e8 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -134,6 +134,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_CR1_EOBIEBIT(27) /* F7 */
 #define USART_CR1_M1   BIT(28) /* F7 */
 #define USART_CR1_IE_MASK  (GENMASK(8, 4) | BIT(14) | BIT(26) | BIT(27))
+#define USART_CR1_FIFOEN   BIT(29) /* H7 */
 
 /* USART_CR2 */
 #define USART_CR2_ADD_MASK GENMASK(3, 0)   /* F4 */
-- 
1.9.1

[PATCH 01/20] serial: stm32: adding fifo support

[Bich HEMON]

From: Bich Hemon 

This patch adds fifo mode support for rx and tx.

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 3 +++
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 0338562..50948f6 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -453,6 +453,7 @@ static int stm32_startup(struct uart_port *port)
return ret;
 
val = USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
+   val |= USART_CR1_FIFOEN;
stm32_set_bits(port, ofs->cr1, val);
 
return 0;
@@ -467,6 +468,7 @@ static void stm32_shutdown(struct uart_port *port)
 
val = USART_CR1_TXEIE | USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE;
val |= BIT(cfg->uart_enable_bit);
+   val |= USART_CR1_FIFOEN;
stm32_clr_bits(port, ofs->cr1, val);
 
free_irq(port->irq, port);
@@ -496,6 +498,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
 
cr1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE;
cr1 |= BIT(cfg->uart_enable_bit);
+   cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
cr3 = 0;
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index cd97ceb..9f0d0e8 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -134,6 +134,7 @@ struct stm32_usart_info stm32f7_info = {
 #define USART_CR1_EOBIEBIT(27) /* F7 */
 #define USART_CR1_M1   BIT(28) /* F7 */
 #define USART_CR1_IE_MASK  (GENMASK(8, 4) | BIT(14) | BIT(26) | BIT(27))
+#define USART_CR1_FIFOEN   BIT(29) /* H7 */
 
 /* USART_CR2 */
 #define USART_CR2_ADD_MASK GENMASK(3, 0)   /* F4 */
-- 
1.9.1

[PATCH 09/20] serial: stm32: fix end of transfer

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

tx_empty: poll TC (PIO mode) or DMAT (DMA mode) bit.
flush_buffer: terminate on going DMA tx transfer.
remove: terminate DMA rx and tx transfers.

Signed-off-by: Gerald Baeza <gerald.ba...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 37 ++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ed2025b..266dc4f 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -408,8 +408,14 @@ static unsigned int stm32_tx_empty(struct uart_port *port)
 {
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   int ret;
+
+   if (!stm32_port->tx_ch)
+   ret = readl_relaxed(port->membase + ofs->isr) & USART_SR_TC;
+   else
+   ret = readl_relaxed(port->membase + ofs->cr3) & USART_CR3_DMAT;
 
-   return readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE;
+   return ret;
 }
 
 static void stm32_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -449,6 +455,26 @@ static void stm32_start_tx(struct uart_port *port)
stm32_transmit_chars(port);
 }
 
+/* Flush the transmit buffer. */
+static void stm32_flush_buffer(struct uart_port *port)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+
+   if (stm32_port->tx_ch) {
+   spin_lock(>lock);
+   dmaengine_terminate_all(stm32_port->tx_ch);
+   spin_unlock(>lock);
+   if (ofs->icr == UNDEF_REG)
+   stm32_clr_bits(port, ofs->isr, USART_SR_TC);
+   else
+   stm32_set_bits(port, ofs->icr, USART_CR_TC);
+
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
+   stm32_port->tx_dma_busy = false;
+   }
+}
+
 /* Throttle the remote when input buffer is about to overflow. */
 static void stm32_throttle(struct uart_port *port)
 {
@@ -701,6 +727,7 @@ static void stm32_pm(struct uart_port *port, unsigned int 
state,
.break_ctl  = stm32_break_ctl,
.startup= stm32_startup,
.shutdown   = stm32_shutdown,
+   .flush_buffer   = stm32_flush_buffer,
.set_termios= stm32_set_termios,
.pm = stm32_pm,
.type   = stm32_type,
@@ -950,8 +977,10 @@ static int stm32_serial_remove(struct platform_device 
*pdev)
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
-   if (stm32_port->rx_ch)
+   if (stm32_port->rx_ch) {
+   dmaengine_terminate_all(stm32_port->rx_ch);
dma_release_channel(stm32_port->rx_ch);
+   }
 
if (stm32_port->rx_dma_buf)
dma_free_coherent(>dev,
@@ -960,8 +989,10 @@ static int stm32_serial_remove(struct platform_device 
*pdev)
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
 
-   if (stm32_port->tx_ch)
+   if (stm32_port->tx_ch) {
+   dmaengine_terminate_all(stm32_port->tx_ch);
dma_release_channel(stm32_port->tx_ch);
+   }
 
if (stm32_port->tx_dma_buf)
dma_free_coherent(>dev,
-- 
1.9.1

[PATCH 11/20] serial: stm32: add RTS support

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 13fc520..a7401b0 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -617,7 +617,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
if (cflag & CRTSCTS) {
port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
-   cr3 |= USART_CR3_CTSE;
+   cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;
}
 
usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud);
-- 
1.9.1

[PATCH 20/20] serial: stm32: fix rx interrupt handling in startup

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

When stm32 dma is used, Data register has to be read in order
to clear the RXNE interrupt in case we received data before
usart probe.

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 06a92c8..b1f3aab 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -568,9 +568,18 @@ static int stm32_startup(struct uart_port *port)
struct stm32_usart_offsets *ofs = _port->info->ofs;
struct stm32_usart_config *cfg = _port->info->cfg;
const char *name = to_platform_device(port->dev)->name;
-   u32 val;
+   u32 val, sr, dr;
int ret;
 
+   sr = readl_relaxed(port->membase + ofs->isr);
+
+   if ((sr & USART_SR_RXNE) && (stm32_port->rx_ch))
+   ret = readl_relaxed_poll_timeout_atomic(port->membase +
+   ofs->rdr,
+   dr,
+   !(sr & USART_SR_RXNE),
+   10, 10);
+
ret = request_threaded_irq(port->irq, stm32_interrupt,
   stm32_threaded_interrupt,
   IRQF_NO_SUSPEND, name, port);
-- 
1.9.1

[PATCH 09/20] serial: stm32: fix end of transfer

[Bich HEMON]

From: Bich Hemon 

tx_empty: poll TC (PIO mode) or DMAT (DMA mode) bit.
flush_buffer: terminate on going DMA tx transfer.
remove: terminate DMA rx and tx transfers.

Signed-off-by: Gerald Baeza 
---
 drivers/tty/serial/stm32-usart.c | 37 ++---
 1 file changed, 34 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index ed2025b..266dc4f 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -408,8 +408,14 @@ static unsigned int stm32_tx_empty(struct uart_port *port)
 {
struct stm32_port *stm32_port = to_stm32_port(port);
struct stm32_usart_offsets *ofs = _port->info->ofs;
+   int ret;
+
+   if (!stm32_port->tx_ch)
+   ret = readl_relaxed(port->membase + ofs->isr) & USART_SR_TC;
+   else
+   ret = readl_relaxed(port->membase + ofs->cr3) & USART_CR3_DMAT;
 
-   return readl_relaxed(port->membase + ofs->isr) & USART_SR_TXE;
+   return ret;
 }
 
 static void stm32_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -449,6 +455,26 @@ static void stm32_start_tx(struct uart_port *port)
stm32_transmit_chars(port);
 }
 
+/* Flush the transmit buffer. */
+static void stm32_flush_buffer(struct uart_port *port)
+{
+   struct stm32_port *stm32_port = to_stm32_port(port);
+   struct stm32_usart_offsets *ofs = _port->info->ofs;
+
+   if (stm32_port->tx_ch) {
+   spin_lock(>lock);
+   dmaengine_terminate_all(stm32_port->tx_ch);
+   spin_unlock(>lock);
+   if (ofs->icr == UNDEF_REG)
+   stm32_clr_bits(port, ofs->isr, USART_SR_TC);
+   else
+   stm32_set_bits(port, ofs->icr, USART_CR_TC);
+
+   stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
+   stm32_port->tx_dma_busy = false;
+   }
+}
+
 /* Throttle the remote when input buffer is about to overflow. */
 static void stm32_throttle(struct uart_port *port)
 {
@@ -701,6 +727,7 @@ static void stm32_pm(struct uart_port *port, unsigned int 
state,
.break_ctl  = stm32_break_ctl,
.startup= stm32_startup,
.shutdown   = stm32_shutdown,
+   .flush_buffer   = stm32_flush_buffer,
.set_termios= stm32_set_termios,
.pm = stm32_pm,
.type   = stm32_type,
@@ -950,8 +977,10 @@ static int stm32_serial_remove(struct platform_device 
*pdev)
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAR);
 
-   if (stm32_port->rx_ch)
+   if (stm32_port->rx_ch) {
+   dmaengine_terminate_all(stm32_port->rx_ch);
dma_release_channel(stm32_port->rx_ch);
+   }
 
if (stm32_port->rx_dma_buf)
dma_free_coherent(>dev,
@@ -960,8 +989,10 @@ static int stm32_serial_remove(struct platform_device 
*pdev)
 
stm32_clr_bits(port, ofs->cr3, USART_CR3_DMAT);
 
-   if (stm32_port->tx_ch)
+   if (stm32_port->tx_ch) {
+   dmaengine_terminate_all(stm32_port->tx_ch);
dma_release_channel(stm32_port->tx_ch);
+   }
 
if (stm32_port->tx_dma_buf)
dma_free_coherent(>dev,
-- 
1.9.1

[PATCH 11/20] serial: stm32: add RTS support

[Bich HEMON]

From: Bich Hemon 

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 13fc520..a7401b0 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -617,7 +617,7 @@ static void stm32_set_termios(struct uart_port *port, 
struct ktermios *termios,
port->status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS);
if (cflag & CRTSCTS) {
port->status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS;
-   cr3 |= USART_CR3_CTSE;
+   cr3 |= USART_CR3_CTSE | USART_CR3_RTSE;
}
 
usartdiv = DIV_ROUND_CLOSEST(port->uartclk, baud);
-- 
1.9.1

[PATCH 20/20] serial: stm32: fix rx interrupt handling in startup

[Bich HEMON]

From: Bich Hemon 

When stm32 dma is used, Data register has to be read in order
to clear the RXNE interrupt in case we received data before
usart probe.

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 06a92c8..b1f3aab 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -568,9 +568,18 @@ static int stm32_startup(struct uart_port *port)
struct stm32_usart_offsets *ofs = _port->info->ofs;
struct stm32_usart_config *cfg = _port->info->cfg;
const char *name = to_platform_device(port->dev)->name;
-   u32 val;
+   u32 val, sr, dr;
int ret;
 
+   sr = readl_relaxed(port->membase + ofs->isr);
+
+   if ((sr & USART_SR_RXNE) && (stm32_port->rx_ch))
+   ret = readl_relaxed_poll_timeout_atomic(port->membase +
+   ofs->rdr,
+   dr,
+   !(sr & USART_SR_RXNE),
+   10, 10);
+
ret = request_threaded_irq(port->irq, stm32_interrupt,
   stm32_threaded_interrupt,
   IRQF_NO_SUSPEND, name, port);
-- 
1.9.1

[PATCH 12/20] serial: stm32: fix last_res value

[Bich HEMON]

From: Bich Hemon <bich.he...@st.com>

Set last_res value in each port

Signed-off-by: Bich Hemon <bich.he...@st.com>
---
 drivers/tty/serial/stm32-usart.c | 6 +++---
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a7401b0..c54b89d 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -155,14 +155,13 @@ static void stm32_receive_chars(struct uart_port *port, 
bool threaded)
unsigned long c;
u32 sr;
char flag;
-   static int last_res = RX_BUF_L;
 
if (port->irq_wake)
pm_wakeup_event(tport->tty->dev, 0);
 
-   while (stm32_pending_rx(port, , _res, threaded)) {
+   while (stm32_pending_rx(port, , _port->last_res, threaded)) {
sr |= USART_SR_DUMMY_RX;
-   c = stm32_get_char(port, , _res);
+   c = stm32_get_char(port, , _port->last_res);
flag = TTY_NORMAL;
port->icount.rx++;
 
@@ -808,6 +807,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].port.line = id;
stm32_ports[id].fifoen = true;
stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
+   stm32_ports[id].last_res = RX_BUF_L;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index f9fe15b..056a837 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -226,6 +226,7 @@ struct stm32_port {
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
u32 rx_irq;  /* USART_CR1_RXNEIE or RTOIE */
+   int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
bool fifoen;
-- 
1.9.1

[PATCH 12/20] serial: stm32: fix last_res value

[Bich HEMON]

From: Bich Hemon 

Set last_res value in each port

Signed-off-by: Bich Hemon 
---
 drivers/tty/serial/stm32-usart.c | 6 +++---
 drivers/tty/serial/stm32-usart.h | 1 +
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index a7401b0..c54b89d 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -155,14 +155,13 @@ static void stm32_receive_chars(struct uart_port *port, 
bool threaded)
unsigned long c;
u32 sr;
char flag;
-   static int last_res = RX_BUF_L;
 
if (port->irq_wake)
pm_wakeup_event(tport->tty->dev, 0);
 
-   while (stm32_pending_rx(port, , _res, threaded)) {
+   while (stm32_pending_rx(port, , _port->last_res, threaded)) {
sr |= USART_SR_DUMMY_RX;
-   c = stm32_get_char(port, , _res);
+   c = stm32_get_char(port, , _port->last_res);
flag = TTY_NORMAL;
port->icount.rx++;
 
@@ -808,6 +807,7 @@ static struct stm32_port *stm32_of_get_stm32_port(struct 
platform_device *pdev)
stm32_ports[id].port.line = id;
stm32_ports[id].fifoen = true;
stm32_ports[id].rx_irq = USART_CR1_RXNEIE;
+   stm32_ports[id].last_res = RX_BUF_L;
return _ports[id];
 }
 
diff --git a/drivers/tty/serial/stm32-usart.h b/drivers/tty/serial/stm32-usart.h
index f9fe15b..056a837 100644
--- a/drivers/tty/serial/stm32-usart.h
+++ b/drivers/tty/serial/stm32-usart.h
@@ -226,6 +226,7 @@ struct stm32_port {
dma_addr_t tx_dma_buf;   /* dma tx buffer bus address */
unsigned char *tx_buf;   /* dma tx buffer cpu address */
u32 rx_irq;  /* USART_CR1_RXNEIE or RTOIE */
+   int last_res;
bool tx_dma_busy;/* dma tx busy   */
bool hw_flow_control;
bool fifoen;
-- 
1.9.1