Re: [PATCH 3/5] phy: exynos5-usbdrd: Add facility for VBUS-BOOST-5V supply
Hi Felipe,
On Fri, Aug 29, 2014 at 12:46 AM, Felipe Balbi ba...@ti.com wrote:
hi,
On Thu, Aug 28, 2014 at 01:31:58PM +0530, Vivek Gautam wrote:
@@ -457,11 +458,19 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
clk_prepare_enable(phy_drd-ref_clk);
/* Enable VBUS supply */
+ if (phy_drd-vbus_boost) {
+ ret = regulator_enable(phy_drd-vbus_boost);
+ if (ret) {
+ dev_err(phy_drd-dev,
+ Failed to enable VBUS boost supply\n);
+ goto fail_vbus;
+ }
+ }
really this is nitpicking, but can you add a blank line here just make
my inner child happy ? :-)
Sure will add an extra line here and similar instances of this change.
@@ -470,6 +479,9 @@ static int exynos5_usbdrd_phy_power_on(struct phy *phy)
return 0;
+fail_vbus_boost:
+ if (phy_drd-vbus_boost)
+ regulator_disable(phy_drd-vbus_boost);
same here
--
balbi
--
Best Regards
Vivek Gautam
Samsung RD Institute, Bangalore
India
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Re: [PATCH 5/5] phy: exynos5-usbdrd: Adding Kconfig dependency for Exynos7
On Thu, Aug 28, 2014 at 8:36 PM, Daniele Forsi dfo...@gmail.com wrote: 2014-08-28 10:02 GMT+02:00 Vivek Gautam: This USB 3.0 PHY controller is also present on Exynos7 platform, so adding the dependency on ARCH_EXYNOS7 for this driver. +++ b/drivers/phy/Kconfig @@ -186,7 +186,7 @@ config PHY_EXYNOS5250_USB2 config PHY_EXYNOS5_USBDRD tristate Exynos5 SoC series USB DRD PHY driver - depends on ARCH_EXYNOS5 OF + depends on (ARCH_EXYNOS5 || ARCH_EXYNOS7) OF shouldn't that prompt and its help text be updated to mention also Exynos7? Right, even that has to be updated accordingly. Will update the same in next version of the patch. Thanks for pointing this. -- Best Regards Vivek Gautam Samsung RD Institute, Bangalore India -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH] mfd: palmas: Add support for optional wakeup
On Fri, 29 Aug 2014, Nishanth Menon wrote:
On 08/29/2014 05:56 AM, Lee Jones wrote:
On Tue, 19 Aug 2014, Nishanth Menon wrote:
With the recent pinctrl-single changes, omaps can treat wake-up events
from deeper idle states as interrupts.
Let's add support for the optional second interrupt for wake-up
events. And then SoC can wakeup and handle the event using it's
regular handler.
Finally, to pass the wake-up interrupt in the dts file,
interrupts-extended property needs to be passed.
This is similar in approach to commit 2a0b965cfb6e (serial: omap: Add
support for optional wake-up)
Signed-off-by: Nishanth Menon n...@ti.com
---
Documentation/devicetree/bindings/mfd/palmas.txt | 20
DT Ack please.
Please read Documentation/devicetree/bindings/submittingpatches.txt
drivers/mfd/palmas.c | 59
++
include/linux/mfd/palmas.h |2 +
3 files changed, 81 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/palmas.txt
b/Documentation/devicetree/bindings/mfd/palmas.txt
index eda8989..2627842 100644
--- a/Documentation/devicetree/bindings/mfd/palmas.txt
+++ b/Documentation/devicetree/bindings/mfd/palmas.txt
@@ -51,3 +51,23 @@ palmas {
};
}
+
+Example: with interrupts extended
+ See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
+ Use pinmux 0x418 as wakeup interrupt and gpio1_0 as interrupt source
+
+palmas {
Should this be 'palmas@40 {'?
I might have preferred that as well.. I kept the existing style in the
documentation. Would you like me to change existing doc style too?
Yes please. Although you can do this subseqently.
[...]
+static irqreturn_t palmas_wake_irq(int irq, void *_palmas)
+{
+ /*
+ * Return Not handled so that interrupt is disabled.
+ * Level event ensures that the event is eventually handled
+ * by the appropriate chip handler already registered
+ */
This looks okay to me, but could do with a second opinion from someone
who is a little more familier with this kind of h/w.
How does this differ from threading IRQs?
I could try with an example:
consider a GPIO block 7 gpio 4 connected to a pinctrl pin 234 as the
interrupt source for palmas.
When the system is active, the GPIO block 7, gpio 4 happily functions
as the interrupt source. However, the SoC might not capable of
achieving SoC wide deepsleep when GPIO block 7 is active, So we have
to power off GPIO block 7. However on achieving low power, the system
needs to be capable of waking backup, for this, SoC uses the hardware
at the pin itself(TI calls it control module, others have other names,
lets for the discussion, call it pinctrl), on going to sleep the
action of enabling the pinctrl irq - enables the wakeup capability of
the pin, and disabling it disabled the wakeup capability. when the
wakeup event does take place, in some cases, it might be a edge event,
where by the time we have recofigured GPIO block, the interrupt event
is long gone - to support this, pinctrl invokes the driver interrupt
handler to ensure this functions. in our case(palmas), we are level
event and can depend on GPIO block to handle it when it is configured.
Basically two interrupt sources when SoC is in deep sleep(1 to exit
from deepsleep, and other from the module handling the actual event) -
Example: powerbutton press OR palmas RTC wakeup OR Palmas GPIO
generated wakeup.
However, this is not the same as threading IRQ as the wakeup event is
involved only during suspend path.
commit 2a0b965cfb6e (serial: omap: Add support for optional wake-up)
is a good reference from serial port handling perspective.
Thanks for the explanation. This makes sense now.
--
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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Re: [PATCH v2 19/26] irqchip: atmel-aic: convert to handle_domain_irq
On 26/08/2014 12:03, Marc Zyngier : Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Booting okay: Acked-by: Nicolas Ferre nicolas.fe...@atmel.com --- drivers/irqchip/irq-atmel-aic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c index a82869e..9a2cf3c 100644 --- a/drivers/irqchip/irq-atmel-aic.c +++ b/drivers/irqchip/irq-atmel-aic.c @@ -68,12 +68,10 @@ aic_handle(struct pt_regs *regs) irqnr = irq_reg_readl(gc-reg_base + AT91_AIC_IVR); irqstat = irq_reg_readl(gc-reg_base + AT91_AIC_ISR); - irqnr = irq_find_mapping(aic_domain, irqnr); - if (!irqstat) irq_reg_writel(0, gc-reg_base + AT91_AIC_EOICR); else - handle_IRQ(irqnr, regs); + handle_domain_irq(aic_domain, irqnr, regs); } static int aic_retrigger(struct irq_data *d) -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 20/26] irqchip: atmel-aic5: convert to handle_domain_irq
On 26/08/2014 12:03, Marc Zyngier : Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Ok, thanks: Acked-by: Nicolas Ferre nicolas.fe...@atmel.com --- drivers/irqchip/irq-atmel-aic5.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c index edb2270..04fe2c1 100644 --- a/drivers/irqchip/irq-atmel-aic5.c +++ b/drivers/irqchip/irq-atmel-aic5.c @@ -78,12 +78,10 @@ aic5_handle(struct pt_regs *regs) irqnr = irq_reg_readl(gc-reg_base + AT91_AIC5_IVR); irqstat = irq_reg_readl(gc-reg_base + AT91_AIC5_ISR); - irqnr = irq_find_mapping(aic5_domain, irqnr); - if (!irqstat) irq_reg_writel(0, gc-reg_base + AT91_AIC5_EOICR); else - handle_IRQ(irqnr, regs); + handle_domain_irq(aic5_domain, irqnr, regs); } static void aic5_mask(struct irq_data *d) -- Nicolas Ferre -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 20/26] irqchip: atmel-aic5: convert to handle_domain_irq
On Tue, 26 Aug 2014 11:03:35 +0100 Marc Zyngier marc.zyng...@arm.com wrote: Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Acked-by: Boris Brezillon boris.brezil...@free-electrons.com --- drivers/irqchip/irq-atmel-aic5.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c index edb2270..04fe2c1 100644 --- a/drivers/irqchip/irq-atmel-aic5.c +++ b/drivers/irqchip/irq-atmel-aic5.c @@ -78,12 +78,10 @@ aic5_handle(struct pt_regs *regs) irqnr = irq_reg_readl(gc-reg_base + AT91_AIC5_IVR); irqstat = irq_reg_readl(gc-reg_base + AT91_AIC5_ISR); - irqnr = irq_find_mapping(aic5_domain, irqnr); - if (!irqstat) irq_reg_writel(0, gc-reg_base + AT91_AIC5_EOICR); else - handle_IRQ(irqnr, regs); + handle_domain_irq(aic5_domain, irqnr, regs); } static void aic5_mask(struct irq_data *d) -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 19/26] irqchip: atmel-aic: convert to handle_domain_irq
On Tue, 26 Aug 2014 11:03:34 +0100 Marc Zyngier marc.zyng...@arm.com wrote: Use the new handle_domain_irq method to handle interrupts. Signed-off-by: Marc Zyngier marc.zyng...@arm.com Acked-by: Boris Brezillon boris.brezil...@free-electrons.com --- drivers/irqchip/irq-atmel-aic.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c index a82869e..9a2cf3c 100644 --- a/drivers/irqchip/irq-atmel-aic.c +++ b/drivers/irqchip/irq-atmel-aic.c @@ -68,12 +68,10 @@ aic_handle(struct pt_regs *regs) irqnr = irq_reg_readl(gc-reg_base + AT91_AIC_IVR); irqstat = irq_reg_readl(gc-reg_base + AT91_AIC_ISR); - irqnr = irq_find_mapping(aic_domain, irqnr); - if (!irqstat) irq_reg_writel(0, gc-reg_base + AT91_AIC_EOICR); else - handle_IRQ(irqnr, regs); + handle_domain_irq(aic_domain, irqnr, regs); } static int aic_retrigger(struct irq_data *d) -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 05/15] tty: serial: Add 8250-core based omap driver
On 08/18/2014 03:46 PM, Heikki Krogerus wrote:
On Fri, Aug 15, 2014 at 07:42:33PM +0200, Sebastian Andrzej Siewior wrote:
diff --git a/drivers/tty/serial/8250/8250_core.c
b/drivers/tty/serial/8250/8250_core.c
index cc90c19..ab003b6 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -264,6 +264,12 @@ static const struct serial8250_config uart_config[] = {
.fcr= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags = UART_CAP_FIFO | UART_CAP_AFE,
},
+[PORT_OMAP_16750] = {
+.name = OMAP,
+.fifo_size = 64,
+.tx_loadsz = 64,
+.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
+},
I don't think you need this. Reasons below...
For those it works. However I have to this value to something because
it can't stay PORT_UNKNOWN. So for now I took PORT_8250 because it is
not used anywhere in the code. The only side effect of this is that I
can't specify the name. I can live with this…
[PORT_TEGRA] = {
.name = Tegra,
.fifo_size = 32,
@@ -1390,6 +1396,8 @@ static void serial8250_stop_rx(struct uart_port *port)
serial8250_rpm_get(up);
up-ier = ~UART_IER_RLSI;
+if (port-type == PORT_OMAP_16750)
+up-ier = ~UART_IER_RDI;
I don't see any reason why this could not be always cleared regardless
of the type:
up-ier = ~(UART_IER_RLSI | UART_IRE_RDI);
I remember you brought that up recently asking Alan if it is okay doing
so. Since it looks sane to revert that bit on RX-stop, I will drop that
omap check here.
[cut]
Since you are not calling serial8250_do_set_termios, 8250_core.c newer
overrides the FCR set in this driver. However, if the FCR is a
problem, since Yoshihiro added the member for it to struct
uart_8250_port (commit aef9a7bd9), just make it possible for the probe
drivers to provide also it's value:
static int
So instead of using PORT_OMAP_16750:
up.port.type = PORT_16750;
up.capabilities = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP;
and the fcr if needed.
up.fcr = ...
That fcr value looks nice so I can't drop my private copy of it. But
this FCR works different for RX trigger (the way it is used). Which
means to support user configurable RX-level I would need to overwrite
that callback. However since PORT_8250 does not supply any FCR values,
I can just ignore it for now.
+up.port.iotype = UPIO_MEM32;
+up.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_FIXED_TYPE |
+UPF_SOFT_FLOW | UPF_HARD_FLOW;
+up.port.private_data = priv;
+
+up.port.regshift = 2;
+up.port.fifosize = 64;
You don't need to set the fifosize unless you want to replace the
value you get from uart_config array.
Since you made me drop my uart_config array entry I keep this and add
the other values, too
+up.port.set_termios = omap_8250_set_termios;
+up.port.pm = omap_8250_pm;
+up.port.startup = omap_8250_startup;
+up.port.shutdown = omap_8250_shutdown;
+up.port.throttle = omap_8250_throttle;
+up.port.unthrottle = omap_8250_unthrottle;
+
+if (pdev-dev.of_node) {
+up.port.line = of_alias_get_id(pdev-dev.of_node, serial);
+of_property_read_u32(pdev-dev.of_node, clock-frequency,
+up.port.uartclk);
+priv-wakeirq = irq_of_parse_and_map(pdev-dev.of_node, 1);
+} else {
+up.port.line = pdev-id;
+}
+
+if (up.port.line 0) {
+dev_err(pdev-dev, failed to get alias/pdev id, errno %d\n,
+up.port.line);
+return -ENODEV;
+}
+if (!up.port.uartclk) {
+up.port.uartclk = DEFAULT_CLK_SPEED;
+dev_warn(pdev-dev,
+No clock speed specified: using default: %d\n,
+DEFAULT_CLK_SPEED);
+}
+
+#ifdef CONFIG_PM_RUNTIME
+up.capabilities |= UART_CAP_RPM;
+#endif
By setting this here, you will not get the capabilities from the
uart_config[type].flags if runtime PM is enabled in any case, right?
Yes. It was not plan to behave like this and is fixed, thanks.
[cut]
diff --git a/drivers/tty/serial/8250/Makefile
b/drivers/tty/serial/8250/Makefile
index 36d68d0..4bac392 100644
--- a/drivers/tty/serial/8250/Makefile
+++ b/drivers/tty/serial/8250/Makefile
@@ -20,3 +20,4 @@ obj-$(CONFIG_SERIAL_8250_HUB6) += 8250_hub6.o
obj-$(CONFIG_SERIAL_8250_FSL) += 8250_fsl.o
obj-$(CONFIG_SERIAL_8250_DW)+= 8250_dw.o
obj-$(CONFIG_SERIAL_8250_EM)+= 8250_em.o
+obj-$(CONFIG_SERIAL_8250_OMAP) += 8250_omap.o
diff --git a/include/uapi/linux/serial_core.h
b/include/uapi/linux/serial_core.h
index 5820269..74f9b11 100644
---
Re: [PATCH 06/15] tty: serial: 8250_dma: handle error on TX submit
On 08/18/2014 03:57 PM, Heikki Krogerus wrote:
On Fri, Aug 15, 2014 at 07:42:34PM +0200, Sebastian Andrzej Siewior wrote:
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index b161eee..02e82dc 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -85,6 +85,7 @@ struct uart_8250_port {
unsigned char mcr_force; /* mask of forced bits */
unsigned char cur_iotype; /* Running I/O type */
unsigned char rpm_tx_active;
+unsigned char dma_tx_err;
Why not make this member of uart_8250_dma instead?
Why not indeed. Fixed.
Sebastian
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Re: [PATCH 03/15] tty: serial: 8250_core: add run time pm
On 08/20/2014 11:39 AM, Frans Klaver wrote:
static int serial8250_get_poll_char(struct uart_port *port)
{
- unsigned char lsr = serial_port_in(port, UART_LSR);
+ unsigned char lsr;
+ int status;
+
+ serial8250_rpm_get(up);
or up won't be defined below. You probably need
Obviously I meant to say that 'up' won't be defined here.
Good catch, thanks. However I wouldn't bet my money it that won't be
defined here. The semaphore code provides up() and down() so it is
makes it kind of defined :) But it doesn't compile due to wrong pointer
types which is good (I run into this myself and looked confused at
first).
I didn't notice this at all because only kgdb uses this
CONFIG_CONSOLE_POLL which I had off. Once again, thank you.
+struct uart_8250_port *up = up_to_u8250p(port);
somewhere in there.
Sebastian
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Re: [PATCH v2 01/26] genirq: add irq_domain-aware core IRQ handler
On Tue, Aug 26, 2014 at 11:46:38AM -0700, Stephen Boyd wrote: Ah ok. This is the multi-irq handler case? Has this been broken since v3.2 at least for the gic users? Now that we call irq_enter()/irq_exit() a lot more code runs, including things like updating jiffies when interrupts arrive and invoking softirq? Do we only call irq_exit() on the IPI path otherwise? Are there any plans to send this back to stable trees? Not calling irq_enter()/irq_exit() when we get an interrupt seems like a big problem. gic_handle_irq() calls handle_IRQ() which has the irq_enter()..irq_exit() wrappers. If we didn't have irq_exit(), then softirq's would be totally broken on all gic-based platforms. -- FTTC broadband for 0.8mile line: currently at 9.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: PROBLEM: bindings for drivers/mfd/twl4030-power.c
Hi, Am 25.08.2014 um 23:26 schrieb Tony Lindgren: * Dr. H. Nikolaus Schaller h...@goldelico.com [140817 08:46]: I am trying to make ti,use_poweroff work on 3.17-rc1 for the GTA04 board. Poweroff was broken for a while and I found that the driver isn't loaded at all. It appears to me that commit e7cd1d1eb16fcdf53001b926187a82f1f3e1a7e6 did rename the compatible entry from ti,twl4030-power to ti,twl4030-power-reset but this was not documented in the bindings and of course our DT does not match. Even your commit message talks about ti,twl4030-power although I can't find it in the code. Hmm sorry did I accidentally remove ti,twl4030-power? If so, that should be added back for sure. Do you have a patch for that already? No, I have only updated our device tree because I don't know if it really should be added back or not. As you say the ti,twl4030-power does not configure anything. So what is it good for? Are ti,twl4030-power and ti,twl4030-power-reset doing the same? No, they are separate where ti,twl4030-power does not configure the twl4030 in any way where ti,twl4030-power-reset configures the warm reset sequence. Yes, that is what I deduced because our old setting of ti,twl4030-power did no longer configure the power-off and not even load the driver. For gta04, what you really want is to use ti,twl4030-power-idle or even ti,twl4030-power-idle-osc-off if the board is wired to support cutting off the oscillator. Ok, I see (but must admit that I don't understand the details even after reading the bindings.txt). Currently we develop without taking care of suspend (the DT migration was much more troublesome work than anticipated) but that should be changed soon. And you probably also want to configure some wake-up interrupts at least for the the UARTs in the board specific .dts file, see for example the UART3 in the existing board files that have: interrupts-extended = intc 74 omap3_pmx_core OMAP3_UART3_RX; thanks for the hint! BR, Nikolaus -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 15/15] tty: serial: 8250: omap: add dma support
On 08/29/2014 06:12 PM, Tony Lindgren wrote: Looks like the paste bug is there for sure, doing off idle and pasting 240 characters to the console can hang the UART RX after few attempts, and pasting 16 charactes won't show up at all if the system is idling. So you may want to play with that too a bit :) One character wakes it up. After that you can send 16, 64 and you see them. Right away. No delay. If you send a lot data in one-go it takes approx 152 characters until the first one is displayed properly at 115200,8N1. That is approx 13ms. Could it take that long to get up and be ready? Comparing it with serial-omap I see the same thing: I takes approx the same amount of data until the first one is displayed. After a lot of long writes which wake the chip up from idle I manage to freeze both, the serial-omap driver and mine driver. One thing that is probably a dumb idea is that printk in omap_8250_mdr1_errataset(). Would it be possible that when I hit a printk in the resume path that I may deadlock and box will freeze? Regards, Tony Sebastian -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 09/26] ARM: OMAP2+: CM: add common APIs for cm_module_enable/disable
Adds a generic CM driver API for enabling/disabling modules.
The SoC specific implementations are registered through cm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm.h |6 ++
arch/arm/mach-omap2/cm33xx.c | 11 +++
arch/arm/mach-omap2/cm33xx.h | 17 -
arch/arm/mach-omap2/cm_common.c | 24
arch/arm/mach-omap2/cminst44xx.c | 11 +--
arch/arm/mach-omap2/cminst44xx.h |4
arch/arm/mach-omap2/omap_hwmod.c | 21 +++--
7 files changed, 49 insertions(+), 45 deletions(-)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index fb7da5f..2eb21c5 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -46,6 +46,8 @@ extern void omap2_set_globals_cm(void __iomem *cm, void
__iomem *cm2);
* @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
* @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
* @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
+ * @module_enable: ptr to the SoC CM-specific module_enable impl
+ * @module_disable: ptr to the SoC CM-specific module_disable impl
*/
struct cm_ll_data {
int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -54,6 +56,8 @@ struct cm_ll_data {
u8 idlest_shift);
int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
u8 idlest_shift);
+ void (*module_enable)(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+ void (*module_disable)(u8 part, u16 inst, u16 clkctrl_offs);
};
extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
@@ -61,6 +65,8 @@ extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16
*prcm_inst,
int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
u8 idlest_shift);
int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8
idlest_shift);
+int cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs);
+int cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ffdcb7a..b9ad463 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -277,13 +277,14 @@ static int am33xx_cm_wait_module_idle(u8 part, s16 inst,
u16 clkctrl_offs,
/**
* am33xx_cm_module_enable - Enable the modulemode inside CLKCTRL
* @mode: Module mode (SW or HW)
+ * @part: CM partition, ignored for AM33xx
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* No return value.
*/
-void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_enable(u8 mode, u8 part, u16 inst,
+ u16 clkctrl_offs)
{
u32 v;
@@ -295,13 +296,13 @@ void am33xx_cm_module_enable(u8 mode, u16 inst, s16
cdoffs, u16 clkctrl_offs)
/**
* am33xx_cm_module_disable - Disable the module inside CLKCTRL
+ * @part: CM partition, ignored for AM33xx
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* No return value.
*/
-void am33xx_cm_module_disable(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static void am33xx_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
{
u32 v;
@@ -368,6 +369,8 @@ struct clkdm_ops am33xx_clkdm_operations = {
static struct cm_ll_data am33xx_cm_ll_data = {
.wait_module_ready = am33xx_cm_wait_module_ready,
.wait_module_idle = am33xx_cm_wait_module_idle,
+ .module_enable = am33xx_cm_module_enable,
+ .module_disable = am33xx_cm_module_disable,
};
int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 78a61e5..046b4b2 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -375,22 +375,5 @@
#ifndef __ASSEMBLER__
int am33xx_cm_init(void);
-
-#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
- u16 clkctrl_offs);
-extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
- u16 clkctrl_offs);
-#else
-static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
- u16 clkctrl_offs)
-{
-}
-static inline void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
- u16 clkctrl_offs)
-{
-}
-#endif
-
#endif /* ASSEMBLER */
#endif
diff
[PATCH 04/26] ARM: AM33xx/OMAP4+: CM: remove cdoffs parameter from wait_module_idle/ready
This is not needed for anything. This also eases the consolidation of
the wait_module_ready / wait_module_idle calls behind a generic CM
driver API by reducing the number of needed parameters.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm33xx.c | 18 +++---
arch/arm/mach-omap2/cm33xx.h | 13 +
arch/arm/mach-omap2/cminst44xx.c | 19 +++
arch/arm/mach-omap2/cminst44xx.h |5 ++---
arch/arm/mach-omap2/omap_hwmod.c |4
5 files changed, 21 insertions(+), 38 deletions(-)
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index b3f99e9..ef9e9018 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -96,13 +96,12 @@ static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16
idx, u32 mask)
/**
* _clkctrl_idlest - read a CM_*_CLKCTRL register; mask shift IDLEST bitfield
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to
* bit 0.
*/
-static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static u32 _clkctrl_idlest(u16 inst, u16 clkctrl_offs)
{
u32 v = am33xx_cm_read_reg(inst, clkctrl_offs);
v = AM33XX_IDLEST_MASK;
@@ -113,17 +112,16 @@ static u32 _clkctrl_idlest(u16 inst, s16 cdoffs, u16
clkctrl_offs)
/**
* _is_module_ready - can module registers be accessed without causing an
abort?
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either
* *FUNCTIONAL or *INTERFACE_IDLE; false otherwise.
*/
-static bool _is_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+static bool _is_module_ready(u16 inst, u16 clkctrl_offs)
{
u32 v;
- v = _clkctrl_idlest(inst, cdoffs, clkctrl_offs);
+ v = _clkctrl_idlest(inst, clkctrl_offs);
return (v == CLKCTRL_IDLEST_FUNCTIONAL ||
v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
@@ -229,7 +227,6 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
/**
* am33xx_cm_wait_module_ready - wait for a module to be in 'func' state
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* Wait for the module IDLEST to be functional. If the idle state is in any
@@ -237,11 +234,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
* sysconfig cannot be accessed and will probably lead to an imprecise
* external abort
*/
-int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_ready(u16 inst, u16 clkctrl_offs)
{
int i = 0;
- omap_test_timeout(_is_module_ready(inst, cdoffs, clkctrl_offs),
+ omap_test_timeout(_is_module_ready(inst, clkctrl_offs),
MAX_MODULE_READY_TIME, i);
return (i MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
@@ -251,21 +248,20 @@ int am33xx_cm_wait_module_ready(u16 inst, s16 cdoffs, u16
clkctrl_offs)
* am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
* state
* @inst: CM instance register offset (*_INST macro)
- * @cdoffs: Clockdomain register offset (*_CDOFFS macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
*
* Wait for the module IDLEST to be disabled. Some PRCM transition,
* like reset assertion or parent clock de-activation must wait the
* module to be fully disabled.
*/
-int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs, u16 clkctrl_offs)
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
{
int i = 0;
if (!clkctrl_offs)
return 0;
- omap_test_timeout((_clkctrl_idlest(inst, cdoffs, clkctrl_offs) ==
+ omap_test_timeout((_clkctrl_idlest(inst, clkctrl_offs) ==
CLKCTRL_IDLEST_DISABLED),
MAX_MODULE_READY_TIME, i);
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index bd24417..1771fc1 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -381,17 +381,14 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-extern int am33xx_cm_wait_module_idle(u16 inst, s16 cdoffs,
- u16 clkctrl_offs);
+int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
u16 clkctrl_offs);
extern void
[PATCH 11/26] ARM: AM33xx: hwmod: remove am33xx specific module SoC opts
These are now identical with the OMAP4 implementations, so use the OMAP4
versions and remove the AM33xx ones.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 104 ++
1 file changed, 3 insertions(+), 101 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index a47cd17..0267af5 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -984,25 +984,6 @@ static void _omap4_enable_module(struct omap_hwmod *oh)
}
/**
- * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Enables the PRCM module mode related to the hwmod @oh.
- * No return value.
- */
-static void _am33xx_enable_module(struct omap_hwmod *oh)
-{
- if (!oh-clkdm || !oh-prcm.omap4.modulemode)
- return;
-
- pr_debug(omap_hwmod: %s: %s: %d\n,
-oh-name, __func__, oh-prcm.omap4.modulemode);
-
- cm_module_enable(oh-prcm.omap4.modulemode, 0, oh-clkdm-cm_inst,
-oh-prcm.omap4.clkctrl_offs);
-}
-
-/**
* _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
* @oh: struct omap_hwmod *
*
@@ -1028,30 +1009,6 @@ static int _omap4_wait_target_disable(struct omap_hwmod
*oh)
}
/**
- * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to enter slave idle. Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully enters
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_idle() function.
- */
-static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
-{
- if (!oh)
- return -EINVAL;
-
- if (oh-_int_flags _HWMOD_NO_MPU_PORT)
- return 0;
-
- if (oh-flags HWMOD_NO_IDLEST)
- return 0;
-
- return cm_wait_module_idle(0, oh-clkdm-cm_inst,
- oh-prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
* _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
* @oh: struct omap_hwmod *oh
*
@@ -1865,35 +1822,6 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
}
/**
- * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
- * @oh: struct omap_hwmod *
- *
- * Disable the PRCM module mode related to the hwmod @oh.
- * Return EINVAL if the modulemode is not supported and 0 in case of success.
- */
-static int _am33xx_disable_module(struct omap_hwmod *oh)
-{
- int v;
-
- if (!oh-clkdm || !oh-prcm.omap4.modulemode)
- return -EINVAL;
-
- pr_debug(omap_hwmod: %s: %s\n, oh-name, __func__);
-
- if (_are_any_hardreset_lines_asserted(oh))
- return 0;
-
- cm_module_disable(0, oh-clkdm-cm_inst, oh-prcm.omap4.clkctrl_offs);
-
- v = _am33xx_wait_target_disable(oh);
- if (v)
- pr_warn(omap_hwmod: %s: _wait_target_disable failed\n,
- oh-name);
-
- return 0;
-}
-
-/**
* _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
* @oh: struct omap_hwmod *
*
@@ -2968,32 +2896,6 @@ static int _omap4_wait_target_ready(struct omap_hwmod
*oh)
}
/**
- * _am33xx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle. Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
-{
- if (!oh || !oh-clkdm)
- return -EINVAL;
-
- if (oh-flags HWMOD_NO_IDLEST)
- return 0;
-
- if (!_find_mpu_rt_port(oh))
- return 0;
-
- /* XXX check module SIDLEMODE, hardreset status */
-
- return cm_wait_module_ready(0, oh-clkdm-cm_inst,
- oh-prcm.omap4.clkctrl_offs, 0);
-}
-
-/**
* _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
* @oh: struct omap_hwmod * to assert hardreset
* @ohri: hardreset line data
@@ -4218,9 +4120,9 @@ void __init omap_hwmod_init(void)
soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
soc_ops.init_clkdm = _init_clkdm;
} else if (soc_is_am33xx()) {
- soc_ops.enable_module = _am33xx_enable_module;
- soc_ops.disable_module = _am33xx_disable_module;
- soc_ops.wait_target_ready = _am33xx_wait_target_ready;
+ soc_ops.enable_module = _omap4_enable_module;
+ soc_ops.disable_module = _omap4_disable_module;
+ soc_ops.wait_target_ready = _omap4_wait_target_ready;
soc_ops.assert_hardreset = _am33xx_assert_hardreset;
[PATCH 12/26] ARM: AM43xx: hwmod: use OMAP4 hardreset ops instead of the AM33xx version
AM43xx is using OMAP4+ PRM driver, so it should be using the corresponding
hardreset ops from the hwmod also.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 0267af5..c52dc4c 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -4115,9 +4115,9 @@ void __init omap_hwmod_init(void)
soc_ops.enable_module = _omap4_enable_module;
soc_ops.disable_module = _omap4_disable_module;
soc_ops.wait_target_ready = _omap4_wait_target_ready;
- soc_ops.assert_hardreset = _am33xx_assert_hardreset;
- soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
- soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
+ soc_ops.assert_hardreset = _omap4_assert_hardreset;
+ soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
+ soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
soc_ops.init_clkdm = _init_clkdm;
} else if (soc_is_am33xx()) {
soc_ops.enable_module = _omap4_enable_module;
--
1.7.9.5
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[PATCH 02/26] ARM: AM43XX: PRM: use OMAP4 PRM driver
AM43xx will be re-using OMAP4 PRM driver, thus call its init function. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/io.c |1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 5d0667c..5c2c71a 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -608,6 +608,7 @@ void __init am43xx_init_early(void) omap_cm_base_init(); omap3xxx_check_revision(); am33xx_check_features(); + omap44xx_prm_init(); am43xx_powerdomains_init(); am43xx_clockdomains_init(); am43xx_hwmod_init(); -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 00/26] ARM: OMAP2+: PRCM cleanups for 3.18 merge window
Hi, This set contains PRCM related cleanups meant for 3.18 merge window. These are based on top of 3.17-rc1 + the PRM set from Nishanth Menon (http://article.gmane.org/gmane.linux.ports.arm.kernel/350305.) Nishanth's set is used as basis to avoid merge issues. Purpose of this work is to eventually convert the PRCM code into a separate driver, but this is done in incremental parts as the amount of changes is substantial. Expected conclusion of this work is 3.19 if everything goes fine. This part of the work mostly moves some of the SoC specific PRCM driver calls under generic version of the same, and adds SoC-ops to support these on the driver level. Working branch posted here: tree: https://github.com/t-kristo/linux-pm.git branch: for-v3.18/prcm-cleanup Testing done: am335x-evm: boot am335x-bone: boot am335x-boneblack: boot am3517-evm: boot am437x-gp-evm: boot omap3-beagle-xm: boot omap3-beagle: boot suspend/resume (ret/off) dra7-evm: boot (with additional clock patches to fix boot issues) omap3-n900: boot omap5-uevm: boot omap4-panda-es: boot suspend/resume (ret) omap2430-sdp: boot -Tero -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 10/26] ARM: OMAP2/3: CM: make cm_split_idlest_reg SoC calls static
CM driver has a generic API which calls the SoC specific split function
through cm_ll_data, so there is no need for the SoC specific functions to
be publicly available.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm2xxx.c |5 +++--
arch/arm/mach-omap2/cm2xxx.h |2 --
arch/arm/mach-omap2/cm3xxx.c |5 +++--
arch/arm/mach-omap2/cm3xxx.h |3 ---
4 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 365df9e..a96d901 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -204,8 +204,9 @@ void omap2xxx_cm_apll96_disable(void)
* XXX This function is only needed until absolute register addresses are
* removed from the OMAP struct clk records.
*/
-int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-u8 *idlest_reg_id)
+static int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst,
+ u8 *idlest_reg_id)
{
unsigned long offs;
u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index a14094b..c89502b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -56,8 +56,6 @@ extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
u8 idlest_shift);
-extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
- s16 *prcm_inst, u8 *idlest_reg_id);
extern int omap2xxx_cm_fclks_active(void);
extern int omap2xxx_cm_mpu_retention_allowed(void);
extern u32 omap2xxx_cm_get_core_clk_src(void);
diff --git a/arch/arm/mach-omap2/cm3xxx.c b/arch/arm/mach-omap2/cm3xxx.c
index a29c2bf..c6622b7 100644
--- a/arch/arm/mach-omap2/cm3xxx.c
+++ b/arch/arm/mach-omap2/cm3xxx.c
@@ -118,8 +118,9 @@ static int omap3xxx_cm_wait_module_ready(u8 part, s16
prcm_mod, u16 idlest_id,
* XXX This function is only needed until absolute register addresses are
* removed from the OMAP struct clk records.
*/
-int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
-u8 *idlest_reg_id)
+static int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
+ s16 *prcm_inst,
+ u8 *idlest_reg_id)
{
unsigned long offs;
u8 idlest_offs;
diff --git a/arch/arm/mach-omap2/cm3xxx.h b/arch/arm/mach-omap2/cm3xxx.h
index 33491c7..734a858 100644
--- a/arch/arm/mach-omap2/cm3xxx.h
+++ b/arch/arm/mach-omap2/cm3xxx.h
@@ -68,9 +68,6 @@
#ifndef __ASSEMBLER__
-extern int omap3xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
- s16 *prcm_inst, u8 *idlest_reg_id);
-
extern void omap3_cm_save_context(void);
extern void omap3_cm_restore_context(void);
extern void omap3_cm_save_scratchpad_contents(u32 *ptr);
--
1.7.9.5
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[PATCH 08/26] ARM: OMAP2+: CM: make clkdm_hwsup operations static
These are not accessed outside the cm*.c files themselves, so make them
static.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm2xxx.c |6 +++---
arch/arm/mach-omap2/cm2xxx.h |4
arch/arm/mach-omap2/cm33xx.c | 10 +-
arch/arm/mach-omap2/cm33xx.h |5 -
arch/arm/mach-omap2/cm3xxx.c | 10 +-
arch/arm/mach-omap2/cm3xxx.h |7 ---
arch/arm/mach-omap2/cminst44xx.c | 10 +-
arch/arm/mach-omap2/cminst44xx.h |5 -
8 files changed, 18 insertions(+), 39 deletions(-)
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index f913efb..365df9e 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -53,7 +53,7 @@ static void _write_clktrctrl(u8 c, s16 module, u32 mask)
omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL);
}
-bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
+static bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
{
u32 v;
@@ -64,12 +64,12 @@ bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask)
return (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0;
}
-void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask)
{
_write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask);
}
-void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
+static void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask)
{
_write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask);
}
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 2526a8f..a14094b 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -46,9 +46,6 @@
#ifndef __ASSEMBLER__
-extern void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask);
-extern void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask);
-
extern void omap2xxx_cm_set_dpll_disable_autoidle(void);
extern void omap2xxx_cm_set_dpll_auto_low_power_stop(void);
@@ -57,7 +54,6 @@ extern void omap2xxx_cm_set_apll54_auto_low_power_stop(void);
extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
-extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
u8 idlest_shift);
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index d57fa5f..ffdcb7a 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -156,7 +156,7 @@ static void _clktrctrl_write(u8 c, u16 inst, u16 cdoffs)
* Returns true if the clockdomain referred to by (@inst, @cdoffs)
* is in hardware-supervised idle mode, or 0 otherwise.
*/
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
+static bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
{
u32 v;
@@ -175,7 +175,7 @@ bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs)
* Put a clockdomain referred to by (@inst, @cdoffs) into
* hardware-supervised idle mode. No return value.
*/
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, inst, cdoffs);
}
@@ -189,7 +189,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs)
* software-supervised idle mode, i.e., controlled manually by the
* Linux OMAP clockdomain code. No return value.
*/
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, inst, cdoffs);
}
@@ -202,7 +202,7 @@ void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs)
* Put a clockdomain referred to by (@inst, @cdoffs) into idle
* No return value.
*/
-void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, inst, cdoffs);
}
@@ -215,7 +215,7 @@ void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs)
* Take a clockdomain referred to by (@inst, @cdoffs) out of idle,
* waking it up. No return value.
*/
-void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
+static void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs)
{
_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, inst, cdoffs);
}
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index a0daea8..78a61e5 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -374,11 +374,6 @@
#ifndef __ASSEMBLER__
-bool am33xx_cm_is_clkdm_in_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
-void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
-void
[PATCH 19/26] ARM: OMAP4+: CM: remove omap4_cm1/cm2_* functions
These are not used for anything, so remove both the implementations and
header file references.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/Makefile |2 +-
arch/arm/mach-omap2/cm1_44xx.h |2 --
arch/arm/mach-omap2/cm1_54xx.h |2 --
arch/arm/mach-omap2/cm1_7xx.h |2 --
arch/arm/mach-omap2/cm2_44xx.h |2 --
arch/arm/mach-omap2/cm2_54xx.h |2 --
arch/arm/mach-omap2/cm2_7xx.h |2 --
arch/arm/mach-omap2/cm44xx.c | 49
arch/arm/mach-omap2/cm_44xx_54xx.h | 36 --
9 files changed, 1 insertion(+), 98 deletions(-)
delete mode 100644 arch/arm/mach-omap2/cm44xx.c
delete mode 100644 arch/arm/mach-omap2/cm_44xx_54xx.h
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 69bbcba..759da02 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -110,7 +110,7 @@ obj-y += prm_common.o
cm_common.o
obj-$(CONFIG_ARCH_OMAP2) += prm2xxx_3xxx.o prm2xxx.o cm2xxx.o
obj-$(CONFIG_ARCH_OMAP3) += prm2xxx_3xxx.o prm3xxx.o cm3xxx.o
obj-$(CONFIG_ARCH_OMAP3) += vc3xxx_data.o vp3xxx_data.o
-omap-prcm-4-5-common = cminst44xx.o cm44xx.o prm44xx.o \
+omap-prcm-4-5-common = cminst44xx.o prm44xx.o \
prcm_mpu44xx.o prminst44xx.o \
vc44xx_data.o vp44xx_data.o
obj-$(CONFIG_ARCH_OMAP4) += $(omap-prcm-4-5-common)
diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h
index 5ae8fe3..a594992 100644
--- a/arch/arm/mach-omap2/cm1_44xx.h
+++ b/arch/arm/mach-omap2/cm1_44xx.h
@@ -25,8 +25,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
#define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
-#include cm_44xx_54xx.h
-
/* CM1 base address */
#define OMAP4430_CM1_BASE 0x4a004000
diff --git a/arch/arm/mach-omap2/cm1_54xx.h b/arch/arm/mach-omap2/cm1_54xx.h
index 90b3348..fd245df 100644
--- a/arch/arm/mach-omap2/cm1_54xx.h
+++ b/arch/arm/mach-omap2/cm1_54xx.h
@@ -22,8 +22,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
#define __ARCH_ARM_MACH_OMAP2_CM1_54XX_H
-#include cm_44xx_54xx.h
-
/* CM1 base address */
#define OMAP54XX_CM_CORE_AON_BASE 0x4a004000
diff --git a/arch/arm/mach-omap2/cm1_7xx.h b/arch/arm/mach-omap2/cm1_7xx.h
index ca6fa1f..2f1c09e 100644
--- a/arch/arm/mach-omap2/cm1_7xx.h
+++ b/arch/arm/mach-omap2/cm1_7xx.h
@@ -23,8 +23,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
#define __ARCH_ARM_MACH_OMAP2_CM1_7XX_H
-#include cm_44xx_54xx.h
-
/* CM1 base address */
#define DRA7XX_CM_CORE_AON_BASE0x4a005000
diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h
index ee5136d..7521abf 100644
--- a/arch/arm/mach-omap2/cm2_44xx.h
+++ b/arch/arm/mach-omap2/cm2_44xx.h
@@ -25,8 +25,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
#define __ARCH_ARM_MACH_OMAP2_CM2_44XX_H
-#include cm_44xx_54xx.h
-
/* CM2 base address */
#define OMAP4430_CM2_BASE 0x4a008000
diff --git a/arch/arm/mach-omap2/cm2_54xx.h b/arch/arm/mach-omap2/cm2_54xx.h
index 2683231..ff4040c 100644
--- a/arch/arm/mach-omap2/cm2_54xx.h
+++ b/arch/arm/mach-omap2/cm2_54xx.h
@@ -21,8 +21,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
#define __ARCH_ARM_MACH_OMAP2_CM2_54XX_H
-#include cm_44xx_54xx.h
-
/* CM2 base address */
#define OMAP54XX_CM_CORE_BASE 0x4a008000
diff --git a/arch/arm/mach-omap2/cm2_7xx.h b/arch/arm/mach-omap2/cm2_7xx.h
index e966e3a..ce63fdb 100644
--- a/arch/arm/mach-omap2/cm2_7xx.h
+++ b/arch/arm/mach-omap2/cm2_7xx.h
@@ -22,8 +22,6 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
#define __ARCH_ARM_MACH_OMAP2_CM2_7XX_H
-#include cm_44xx_54xx.h
-
/* CM2 base address */
#define DRA7XX_CM_CORE_BASE0x4a008000
diff --git a/arch/arm/mach-omap2/cm44xx.c b/arch/arm/mach-omap2/cm44xx.c
deleted file mode 100644
index fe5cc7b..000
--- a/arch/arm/mach-omap2/cm44xx.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * OMAP4 CM1, CM2 module low-level functions
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * These functions are intended to be used only by the cminst44xx.c file.
- * XXX Perhaps we should just move them there and make them static.
- */
-
-#include linux/kernel.h
-#include linux/types.h
-#include linux/errno.h
-#include linux/err.h
-#include linux/io.h
-
-#include cm.h
-#include cm1_44xx.h
-#include cm2_44xx.h
-
-/* CM1 hardware module low-level functions */
-
-/* Read a register in CM1 */
-u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
-{
- return readl_relaxed(cm_base + inst + reg);
-}
-
-/* Write into a register in
[PATCH 18/26] ARM: OMAP4: CM: make cminst direct register access functions static
These shall not be accessed outside the CM driver. This also removes the
need for the cminst44xx.h header.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cminst44xx.c | 20 ++--
arch/arm/mach-omap2/cminst44xx.h | 29 -
2 files changed, 10 insertions(+), 39 deletions(-)
delete mode 100644 arch/arm/mach-omap2/cminst44xx.h
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index ac03410..95a8cff 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -26,7 +26,6 @@
#include cm1_44xx.h
#include cm2_44xx.h
#include cm44xx.h
-#include cminst44xx.h
#include cm-regbits-34xx.h
#include prcm44xx.h
#include prm44xx.h
@@ -74,6 +73,8 @@ void omap_cm_base_init(void)
/* Private functions */
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
+
/**
* _clkctrl_idlest - read a CM_*_CLKCTRL register; mask shift IDLEST bitfield
* @part: PRCM partition ID that the CM_CLKCTRL register exists in
@@ -110,10 +111,8 @@ static bool _is_module_ready(u8 part, u16 inst, u16
clkctrl_offs)
v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false;
}
-/* Public functions */
-
/* Read a register in a CM instance */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
+static u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
{
BUG_ON(part = OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -122,7 +121,7 @@ u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx)
}
/* Write into a register in a CM instance */
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
+static void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx)
{
BUG_ON(part = OMAP4_MAX_PRCM_PARTITIONS ||
part == OMAP4430_INVALID_PRCM_PARTITION ||
@@ -131,8 +130,8 @@ void omap4_cminst_write_inst_reg(u32 val, u8 part, u16
inst, u16 idx)
}
/* Read-modify-write a register in CM1. Caller must lock */
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16 inst,
- s16 idx)
+static u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, u16
inst,
+ s16 idx)
{
u32 v;
@@ -144,17 +143,18 @@ u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8
part, u16 inst,
return v;
}
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
{
return omap4_cminst_rmw_inst_reg_bits(bits, bits, part, inst, idx);
}
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, s16 idx)
+static u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
+ s16 idx)
{
return omap4_cminst_rmw_inst_reg_bits(bits, 0x0, part, inst, idx);
}
-u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask)
+static u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32
mask)
{
u32 v;
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
deleted file mode 100644
index 3ef3bf6..000
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * OMAP4 Clock Management (CM) function prototypes
- *
- * Copyright (C) 2010 Nokia Corporation
- * Paul Walmsley
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-#define __ARCH_ASM_MACH_OMAP2_CMINST44XX_H
-
-/*
- * In an ideal world, we would not export these low-level functions,
- * but this will probably take some time to fix properly
- */
-u32 omap4_cminst_read_inst_reg(u8 part, u16 inst, u16 idx);
-void omap4_cminst_write_inst_reg(u32 val, u8 part, u16 inst, u16 idx);
-u32 omap4_cminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
- u16 inst, s16 idx);
-u32 omap4_cminst_set_inst_reg_bits(u32 bits, u8 part, u16 inst,
- s16 idx);
-u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst,
-s16 idx);
-extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx,
- u32 mask);
-
-#endif
--
1.7.9.5
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[PATCH 01/26] ARM: DRA7: PRM: add voltage processor check behind a prm_feature flag
This is done in attempt to get rid of cpu_is_X calls from the PRM core.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm.h |1 +
arch/arm/mach-omap2/prm44xx.c | 10 ++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 48480d5..9f4d747 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -29,6 +29,7 @@ int of_prcm_init(void);
* PRM_HAS_VOLTAGE: has voltage domains
*/
#define PRM_HAS_IO_WAKEUP (1 0)
+#define PRM_HAS_VOLTAGE(1 1)
/*
* MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 0958d07..76e75aa 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -652,11 +652,10 @@ static int omap4_pwrdm_wait_transition(struct powerdomain
*pwrdm)
static int omap4_check_vcvp(void)
{
- /* No VC/VP on dra7xx devices */
- if (soc_is_dra7xx())
- return 0;
+ if (prm_features PRM_HAS_VOLTAGE)
+ return 1;
- return 1;
+ return 0;
}
struct pwrdm_ops omap4_pwrdm_operations = {
@@ -696,6 +695,9 @@ int __init omap44xx_prm_init(void)
if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx())
prm_features |= PRM_HAS_IO_WAKEUP;
+ if (!soc_is_dra7xx())
+ prm_features |= PRM_HAS_VOLTAGE;
+
return prm_register(omap44xx_prm_ll_data);
}
--
1.7.9.5
--
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[PATCH 03/26] ARM: OMAP2/3: hwmod: merge wait_target_ready functions for omap2/3
The implementation on these is identical, so no need to have them separate.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 35 ---
1 file changed, 4 insertions(+), 31 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 6c074f3..1bb6d07 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2923,7 +2923,7 @@ static int __init _alloc_linkspace(struct
omap_hwmod_ocp_if **ois)
/* Static functions intended only for use in soc_ops field function pointers */
/**
- * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
+ * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle
* @oh: struct omap_hwmod *
*
* Wait for a module @oh to leave slave idle. Returns 0 if the module
@@ -2931,7 +2931,7 @@ static int __init _alloc_linkspace(struct
omap_hwmod_ocp_if **ois)
* slave idle; otherwise, pass along the return value of the
* appropriate *_cm*_wait_module_ready() function.
*/
-static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
+static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh)
{
if (!oh)
return -EINVAL;
@@ -2950,33 +2950,6 @@ static int _omap2xxx_wait_target_ready(struct omap_hwmod
*oh)
}
/**
- * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
- * @oh: struct omap_hwmod *
- *
- * Wait for a module @oh to leave slave idle. Returns 0 if the module
- * does not have an IDLEST bit or if the module successfully leaves
- * slave idle; otherwise, pass along the return value of the
- * appropriate *_cm*_wait_module_ready() function.
- */
-static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
-{
- if (!oh)
- return -EINVAL;
-
- if (oh-flags HWMOD_NO_IDLEST)
- return 0;
-
- if (!_find_mpu_rt_port(oh))
- return 0;
-
- /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
-
- return omap3xxx_cm_wait_module_ready(oh-prcm.omap2.module_offs,
-oh-prcm.omap2.idlest_reg_id,
-oh-prcm.omap2.idlest_idle_bit);
-}
-
-/**
* _omap4_wait_target_ready - wait for a module to leave slave idle
* @oh: struct omap_hwmod *
*
@@ -4227,12 +4200,12 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int
pad_idx, int irq_idx)
void __init omap_hwmod_init(void)
{
if (cpu_is_omap24xx()) {
- soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
+ soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
soc_ops.assert_hardreset = _omap2_assert_hardreset;
soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
} else if (cpu_is_omap34xx()) {
- soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
+ soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready;
soc_ops.assert_hardreset = _omap2_assert_hardreset;
soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
--
1.7.9.5
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[PATCH 13/26] ARM: AM33xx: PRM: add support for prm_init
Added support for prm_init for AM33xx SoC. This is needed to register
SoC specific prm_ll_data for these devices.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/io.c |2 ++
arch/arm/mach-omap2/prm33xx.c | 13 +
arch/arm/mach-omap2/prm33xx.h |2 ++
3 files changed, 17 insertions(+)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 26055d9..f1db801 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -53,6 +53,7 @@
#include cminst44xx.h
#include prm2xxx.h
#include prm3xxx.h
+#include prm33xx.h
#include prm44xx.h
#include opp2xxx.h
@@ -583,6 +584,7 @@ void __init am33xx_init_early(void)
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
am33xx_check_features();
+ am33xx_prm_init();
am33xx_cm_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 62709cd..f149e7c 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -342,3 +342,16 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_wait_transition = am33xx_pwrdm_wait_transition,
.pwrdm_has_voltdm = am33xx_check_vcvp,
};
+
+static struct prm_ll_data am33xx_prm_ll_data;
+
+int __init am33xx_prm_init(void)
+{
+ return prm_register(am33xx_prm_ll_data);
+}
+
+static void __exit am33xx_prm_exit(void)
+{
+ prm_unregister(am33xx_prm_ll_data);
+}
+__exitcall(am33xx_prm_exit);
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 9b9918d..5cdfdc0 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -127,5 +127,7 @@ extern int am33xx_prm_is_hardreset_asserted(u8 shift, s16
inst,
extern int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs);
extern int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, s16 inst,
u16 rstctrl_offs, u16 rstst_offs);
+int am33xx_prm_init(void);
+
#endif /* ASSEMBLER */
#endif
--
1.7.9.5
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[PATCH 17/26] ARM: OMAP4: CM: move public definitions from cminst44xx.h to cm44xx.h
cminst44xx.h will be removed, thus move the public APIs to cm44xx.h header. Signed-off-by: Tero Kristo t-kri...@ti.com --- arch/arm/mach-omap2/cm44xx.h |3 +++ arch/arm/mach-omap2/cminst44xx.h |3 --- arch/arm/mach-omap2/io.c |2 +- arch/arm/mach-omap2/omap_hwmod.c |1 - 4 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h index 3380bee..728d06a 100644 --- a/arch/arm/mach-omap2/cm44xx.h +++ b/arch/arm/mach-omap2/cm44xx.h @@ -23,4 +23,7 @@ #define OMAP4_CM_CLKSTCTRL 0x #define OMAP4_CM_STATICDEP 0x0004 +void omap_cm_base_init(void); +int omap4_cm_init(void); + #endif diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h index ffbd721..3ef3bf6 100644 --- a/arch/arm/mach-omap2/cminst44xx.h +++ b/arch/arm/mach-omap2/cminst44xx.h @@ -26,7 +26,4 @@ u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, u16 inst, extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, u32 mask); -extern void omap_cm_base_init(void); -int omap4_cm_init(void); - #endif diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index f1db801..cdbf337 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -46,11 +46,11 @@ #include cm2xxx.h #include cm3xxx.h #include cm33xx.h +#include cm44xx.h #include prm.h #include cm.h #include prcm_mpu44xx.h #include prminst44xx.h -#include cminst44xx.h #include prm2xxx.h #include prm3xxx.h #include prm33xx.h diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 24d9599..1de87a7 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -153,7 +153,6 @@ #include powerdomain.h #include cm2xxx.h #include cm3xxx.h -#include cminst44xx.h #include cm33xx.h #include prm.h #include prm3xxx.h -- 1.7.9.5 -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 16/26] ARM: OMAP2+: PRM: add generic API for checking hardreset status
PRM driver now has a generic API for checking hardreset status. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 18 +-
arch/arm/mach-omap2/prm.h |3 +++
arch/arm/mach-omap2/prm2xxx.c |1 +
arch/arm/mach-omap2/prm2xxx_3xxx.c |6 --
arch/arm/mach-omap2/prm2xxx_3xxx.h |2 +-
arch/arm/mach-omap2/prm33xx.c |9 ++---
arch/arm/mach-omap2/prm33xx.h |2 --
arch/arm/mach-omap2/prm3xxx.c |1 +
arch/arm/mach-omap2/prm44xx.c |1 +
arch/arm/mach-omap2/prm_common.c | 20
10 files changed, 46 insertions(+), 17 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 57ff628..24d9599 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2946,8 +2946,8 @@ static int _omap2_deassert_hardreset(struct omap_hwmod
*oh,
static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return omap2_prm_is_hardreset_asserted(oh-prcm.omap2.module_offs,
- ohri-st_shift);
+ return prm_is_hardreset_asserted(ohri-st_shift, 0,
+oh-prcm.omap2.module_offs, 0);
}
/**
@@ -3019,10 +3019,10 @@ static int _omap4_is_hardreset_asserted(struct
omap_hwmod *oh,
if (!oh-clkdm)
return -EINVAL;
- return omap4_prminst_is_hardreset_asserted(ohri-rst_shift,
- oh-clkdm-pwrdm.ptr-prcm_partition,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs);
+ return prm_is_hardreset_asserted(ohri-rst_shift,
+oh-clkdm-pwrdm.ptr-prcm_partition,
+oh-clkdm-pwrdm.ptr-prcm_offs,
+oh-prcm.omap4.rstctrl_offs);
}
/**
@@ -3082,9 +3082,9 @@ static int _am33xx_deassert_hardreset(struct omap_hwmod
*oh,
static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return am33xx_prm_is_hardreset_asserted(ohri-rst_shift,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs);
+ return prm_is_hardreset_asserted(ohri-rst_shift, 0,
+oh-clkdm-pwrdm.ptr-prcm_offs,
+oh-prcm.omap4.rstctrl_offs);
}
/* Public functions */
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 790bb22..0dd8d83 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -142,6 +142,8 @@ struct prm_ll_data {
int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
u16 offset, u16 st_offset);
+ int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
+u16 offset);
};
extern int prm_register(struct prm_ll_data *pld);
@@ -150,6 +152,7 @@ extern int prm_unregister(struct prm_ll_data *pld);
int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
u16 offset, u16 st_offset);
+int prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 343fc73..54ae555 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -214,6 +214,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
.read_reset_sources = omap2xxx_prm_read_reset_sources,
.assert_hardreset = omap2_prm_assert_hardreset,
.deassert_hardreset = omap2_prm_deassert_hardreset,
+ .is_hardreset_asserted = omap2_prm_is_hardreset_asserted,
};
int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 9466b1e..cc3341f 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -24,14 +24,16 @@
/**
* omap2_prm_is_hardreset_asserted - read the HW reset line state of
* submodules contained in the hwmod module
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
* @shift: register bit shift corresponding to the reset line to check
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset:
[PATCH 05/26] ARM: OMAP4/AM33xx: add cm_init / cm_exit calls for AM33xx and OMAP4+
This is needed for expanding the generic CM driver API to include
AM33xx and OMAP4 also.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm33xx.c | 13 +
arch/arm/mach-omap2/cm33xx.h |1 +
arch/arm/mach-omap2/cminst44xx.c | 13 +
arch/arm/mach-omap2/cminst44xx.h |1 +
arch/arm/mach-omap2/io.c |6 ++
5 files changed, 34 insertions(+)
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index ef9e9018..e02988f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -358,3 +358,16 @@ struct clkdm_ops am33xx_clkdm_operations = {
.clkdm_clk_enable = am33xx_clkdm_clk_enable,
.clkdm_clk_disable = am33xx_clkdm_clk_disable,
};
+
+static struct cm_ll_data am33xx_cm_ll_data;
+
+int __init am33xx_cm_init(void)
+{
+ return cm_register(am33xx_cm_ll_data);
+}
+
+static void __exit am33xx_cm_exit(void)
+{
+ cm_unregister(am33xx_cm_ll_data);
+}
+__exitcall(am33xx_cm_exit);
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index 1771fc1..1d3cde7 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -379,6 +379,7 @@ void am33xx_cm_clkdm_enable_hwsup(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_disable_hwsup(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_force_sleep(u16 inst, u16 cdoffs);
void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
+int am33xx_cm_init(void);
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c
index 7e6970a..695e71e 100644
--- a/arch/arm/mach-omap2/cminst44xx.c
+++ b/arch/arm/mach-omap2/cminst44xx.c
@@ -505,3 +505,16 @@ struct clkdm_ops am43xx_clkdm_operations = {
.clkdm_clk_enable = omap4_clkdm_clk_enable,
.clkdm_clk_disable = omap4_clkdm_clk_disable,
};
+
+static struct cm_ll_data omap4xxx_cm_ll_data;
+
+int __init omap4_cm_init(void)
+{
+ return cm_register(omap4xxx_cm_ll_data);
+}
+
+static void __exit omap4_cm_exit(void)
+{
+ cm_unregister(omap4xxx_cm_ll_data);
+}
+__exitcall(omap4_cm_exit);
diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h
index 67a05f9..cc3c913 100644
--- a/arch/arm/mach-omap2/cminst44xx.h
+++ b/arch/arm/mach-omap2/cminst44xx.h
@@ -38,5 +38,6 @@ extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst,
s16 idx,
u32 mask);
extern void omap_cm_base_init(void);
+int omap4_cm_init(void);
#endif
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 5c2c71a..26055d9 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -45,6 +45,7 @@
#include sram.h
#include cm2xxx.h
#include cm3xxx.h
+#include cm33xx.h
#include prm.h
#include cm.h
#include prcm_mpu44xx.h
@@ -582,6 +583,7 @@ void __init am33xx_init_early(void)
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
am33xx_check_features();
+ am33xx_cm_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
am33xx_hwmod_init();
@@ -609,6 +611,7 @@ void __init am43xx_init_early(void)
omap3xxx_check_revision();
am33xx_check_features();
omap44xx_prm_init();
+ omap4_cm_init();
am43xx_powerdomains_init();
am43xx_clockdomains_init();
am43xx_hwmod_init();
@@ -638,6 +641,7 @@ void __init omap4430_init_early(void)
omap_cm_base_init();
omap4xxx_check_revision();
omap4xxx_check_features();
+ omap4_cm_init();
omap4_pm_init_early();
omap44xx_prm_init();
omap44xx_voltagedomains_init();
@@ -672,6 +676,7 @@ void __init omap5_init_early(void)
omap_cm_base_init();
omap44xx_prm_init();
omap5xxx_check_revision();
+ omap4_cm_init();
omap54xx_voltagedomains_init();
omap54xx_powerdomains_init();
omap54xx_clockdomains_init();
@@ -700,6 +705,7 @@ void __init dra7xx_init_early(void)
omap_cm_base_init();
omap44xx_prm_init();
dra7xxx_check_revision();
+ omap4_cm_init();
dra7xx_powerdomains_init();
dra7xx_clockdomains_init();
dra7xx_hwmod_init();
--
1.7.9.5
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[PATCH 07/26] ARM: OMAP4+/AM33xx: CM: add common API for cm_wait_module_idle
Adds a generic CM driver API for waiting module to enter idle / standby.
The SoC specific implementations are registered through cm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/cm.h |4
arch/arm/mach-omap2/cm33xx.c |6 +-
arch/arm/mach-omap2/cm33xx.h |5 -
arch/arm/mach-omap2/cm_common.c | 25 +
arch/arm/mach-omap2/cminst44xx.c |5 -
arch/arm/mach-omap2/cminst44xx.h |1 -
arch/arm/mach-omap2/omap_hwmod.c | 10 +-
7 files changed, 43 insertions(+), 13 deletions(-)
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index c845bf9..fb7da5f 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -45,18 +45,22 @@ extern void omap2_set_globals_cm(void __iomem *cm, void
__iomem *cm2);
* struct cm_ll_data - fn ptrs to per-SoC CM function implementations
* @split_idlest_reg: ptr to the SoC CM-specific split_idlest_reg impl
* @wait_module_ready: ptr to the SoC CM-specific wait_module_ready impl
+ * @wait_module_idle: ptr to the SoC CM-specific wait_module_idle impl
*/
struct cm_ll_data {
int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
u8 idlest_shift);
+ int (*wait_module_idle)(u8 part, s16 prcm_mod, u16 idlest_reg,
+ u8 idlest_shift);
};
extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
u8 idlest_shift);
+int cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg, u8
idlest_shift);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e022a8d..d57fa5f 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++ b/arch/arm/mach-omap2/cm33xx.c
@@ -250,14 +250,17 @@ static int am33xx_cm_wait_module_ready(u8 part, s16 inst,
u16 clkctrl_offs,
/**
* am33xx_cm_wait_module_idle - wait for a module to be in 'disabled'
* state
+ * @part: CM partition, ignored for AM33xx
* @inst: CM instance register offset (*_INST macro)
* @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro)
+ * @bit_shift: bit shift for the register, ignored for AM33xx
*
* Wait for the module IDLEST to be disabled. Some PRCM transition,
* like reset assertion or parent clock de-activation must wait the
* module to be fully disabled.
*/
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
+static int am33xx_cm_wait_module_idle(u8 part, s16 inst, u16 clkctrl_offs,
+ u8 bit_shift)
{
int i = 0;
@@ -364,6 +367,7 @@ struct clkdm_ops am33xx_clkdm_operations = {
static struct cm_ll_data am33xx_cm_ll_data = {
.wait_module_ready = am33xx_cm_wait_module_ready,
+ .wait_module_idle = am33xx_cm_wait_module_idle,
};
int __init am33xx_cm_init(void)
diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h
index fbbedf2..a0daea8 100644
--- a/arch/arm/mach-omap2/cm33xx.h
+++ b/arch/arm/mach-omap2/cm33xx.h
@@ -382,16 +382,11 @@ void am33xx_cm_clkdm_force_wakeup(u16 inst, u16 cdoffs);
int am33xx_cm_init(void);
#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
-int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs);
extern void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
u16 clkctrl_offs);
extern void am33xx_cm_module_disable(u16 inst, s16 cdoffs,
u16 clkctrl_offs);
#else
-static inline int am33xx_cm_wait_module_idle(u16 inst, u16 clkctrl_offs)
-{
- return 0;
-}
static inline void am33xx_cm_module_enable(u8 mode, u16 inst, s16 cdoffs,
u16 clkctrl_offs)
{
diff --git a/arch/arm/mach-omap2/cm_common.c b/arch/arm/mach-omap2/cm_common.c
index db2bb6c..6dbbe54 100644
--- a/arch/arm/mach-omap2/cm_common.c
+++ b/arch/arm/mach-omap2/cm_common.c
@@ -96,6 +96,31 @@ int cm_wait_module_ready(u8 part, s16 prcm_mod, u16
idlest_reg, u8 idlest_shift)
idlest_shift);
}
+/*
+ * cm_wait_module_idle - wait for a module to enter idle or standby
+ * @part: PRCM partition
+ * @prcm_mod: PRCM module offset
+ * @idlest_reg: CM_IDLESTx register
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * Wait for the PRCM to indicate that the module identified by
+ * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return
+ * 0 upon success, -EBUSY if the module doesn't enable in time, or
+ * -EINVAL if no per-SoC wait_module_idle() function pointer has been
+ * registered or if
[PATCH 14/26] ARM: OMAP2+: PRM: add generic API for asserting hardware reset
PRM driver now has a generic API for asserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 18 +-
arch/arm/mach-omap2/prm.h |3 +++
arch/arm/mach-omap2/prm2xxx.c |1 +
arch/arm/mach-omap2/prm2xxx_3xxx.c |6 --
arch/arm/mach-omap2/prm2xxx_3xxx.h |3 ++-
arch/arm/mach-omap2/prm33xx.c |8 ++--
arch/arm/mach-omap2/prm33xx.h |1 -
arch/arm/mach-omap2/prm3xxx.c |1 +
arch/arm/mach-omap2/prm44xx.c |1 +
arch/arm/mach-omap2/prm_common.c | 20
10 files changed, 47 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index c52dc4c..9044ec2 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2909,8 +2909,8 @@ static int _omap4_wait_target_ready(struct omap_hwmod *oh)
static int _omap2_assert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return omap2_prm_assert_hardreset(oh-prcm.omap2.module_offs,
- ohri-rst_shift);
+ return prm_assert_hardreset(ohri-rst_shift, 0,
+ oh-prcm.omap2.module_offs, 0);
}
/**
@@ -2969,10 +2969,10 @@ static int _omap4_assert_hardreset(struct omap_hwmod
*oh,
if (!oh-clkdm)
return -EINVAL;
- return omap4_prminst_assert_hardreset(ohri-rst_shift,
- oh-clkdm-pwrdm.ptr-prcm_partition,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs);
+ return prm_assert_hardreset(ohri-rst_shift,
+ oh-clkdm-pwrdm.ptr-prcm_partition,
+ oh-clkdm-pwrdm.ptr-prcm_offs,
+ oh-prcm.omap4.rstctrl_offs);
}
/**
@@ -3042,9 +3042,9 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return am33xx_prm_assert_hardreset(ohri-rst_shift,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs);
+ return prm_assert_hardreset(ohri-rst_shift, 0,
+ oh-clkdm-pwrdm.ptr-prcm_offs,
+ oh-prcm.omap4.rstctrl_offs);
}
/**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9f4d747..6eea160 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -128,6 +128,7 @@ struct prm_reset_src_map {
* @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
* @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
* @late_init: ptr to the late init function
+ * @assert_hardreset: ptr to the SoC PRM hardreset assert impl
*
* XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
* deprecated.
@@ -137,11 +138,13 @@ struct prm_ll_data {
bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
int (*late_init)(void);
+ int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
};
extern int prm_register(struct prm_ll_data *pld);
extern int prm_unregister(struct prm_ll_data *pld);
+int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 8695805..fa4448b 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -212,6 +212,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
static struct prm_ll_data omap2xxx_prm_ll_data = {
.read_reset_sources = omap2xxx_prm_read_reset_sources,
+ .assert_hardreset = omap2_prm_assert_hardreset,
};
int __init omap2xxx_prm_init(void)
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c
b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index c13b4e2..8758cd6 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -39,8 +39,10 @@ int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift)
/**
* omap2_prm_assert_hardreset - assert the HW reset line of a submodule
- * @prm_mod: PRM submodule base (e.g. CORE_MOD)
* @shift: register bit shift corresponding to the reset line to assert
+ * @part: PRM partition, ignored for OMAP2
+ * @prm_mod: PRM submodule base (e.g. CORE_MOD)
+ * @offset: register offset, ignored for OMAP2
*
* Some IPs like dsp or iva contain processors that require an HW
* reset line to be asserted /
[PATCH 06/26] ARM: OMAP2+: CM: add common API for cm_wait_module_ready
This patch consolidates the parameters provided for the SoC specific
cm_*_wait_module_ready calls, adds the missing cm_ll_data function
pointers and uses the now generic call from the mach-omap2 board code.
SoC specific *_wait_module_ready calls are also made static so they
can only be accessed through the generic CM driver API only.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/clock.c |2 +-
arch/arm/mach-omap2/cm.h |6 --
arch/arm/mach-omap2/cm2xxx.c |6 --
arch/arm/mach-omap2/cm2xxx.h |4 ++--
arch/arm/mach-omap2/cm33xx.c |9 +++--
arch/arm/mach-omap2/cm33xx.h |6 --
arch/arm/mach-omap2/cm3xxx.c |4 +++-
arch/arm/mach-omap2/cm3xxx.h |2 --
arch/arm/mach-omap2/cm_common.c |8 +---
arch/arm/mach-omap2/cminst44xx.c |8 ++--
arch/arm/mach-omap2/cminst44xx.h |1 -
arch/arm/mach-omap2/omap_hwmod.c | 16
12 files changed, 40 insertions(+), 32 deletions(-)
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 500530d..9425230 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -171,7 +171,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap
*clk)
_wait_idlest_generic(clk, idlest_reg, (1 idlest_bit),
idlest_val, __clk_get_name(clk-hw.clk));
} else {
- cm_wait_module_ready(prcm_mod, idlest_reg_id, idlest_bit);
+ cm_wait_module_ready(0, prcm_mod, idlest_reg_id, idlest_bit);
};
}
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 93473f9..c845bf9 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -49,12 +49,14 @@ extern void omap2_set_globals_cm(void __iomem *cm, void
__iomem *cm2);
struct cm_ll_data {
int (*split_idlest_reg)(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
- int (*wait_module_ready)(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+ int (*wait_module_ready)(u8 part, s16 prcm_mod, u16 idlest_reg,
+u8 idlest_shift);
};
extern int cm_split_idlest_reg(void __iomem *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id);
-extern int cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift);
+int cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
+u8 idlest_shift);
extern int cm_register(struct cm_ll_data *cld);
extern int cm_unregister(struct cm_ll_data *cld);
diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c
index 8be6ea5..f913efb 100644
--- a/arch/arm/mach-omap2/cm2xxx.c
+++ b/arch/arm/mach-omap2/cm2xxx.c
@@ -150,7 +150,7 @@ static int _omap2xxx_apll_enable(u8 enable_bit, u8
status_bit)
v |= m;
omap2_cm_write_mod_reg(v, PLL_MOD, CM_CLKEN);
- omap2xxx_cm_wait_module_ready(PLL_MOD, 1, status_bit);
+ omap2xxx_cm_wait_module_ready(0, PLL_MOD, 1, status_bit);
/*
* REVISIT: Should we return an error code if
@@ -238,6 +238,7 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst,
/**
* omap2xxx_cm_wait_module_ready - wait for a module to leave idle or standby
+ * @part: PRCM partition, ignored for OMAP2
* @prcm_mod: PRCM module offset
* @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
* @idlest_shift: shift of the bit in the CM_IDLEST* register to check
@@ -246,7 +247,8 @@ int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst,
* (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
* success or -EBUSY if the module doesn't enable in time.
*/
-int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+ u8 idlest_shift)
{
int ena = 0, i = 0;
u8 cm_idlest_reg;
diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h
index 891d81c..2526a8f 100644
--- a/arch/arm/mach-omap2/cm2xxx.h
+++ b/arch/arm/mach-omap2/cm2xxx.h
@@ -58,8 +58,8 @@ extern void omap2xxx_cm_set_apll96_disable_autoidle(void);
extern void omap2xxx_cm_set_apll96_auto_low_power_stop(void);
extern bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask);
-extern int omap2xxx_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
-u8 idlest_shift);
+int omap2xxx_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_id,
+ u8 idlest_shift);
extern int omap2xxx_cm_split_idlest_reg(void __iomem *idlest_reg,
s16 *prcm_inst, u8 *idlest_reg_id);
extern int omap2xxx_cm_fclks_active(void);
diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c
index e02988f..e022a8d 100644
--- a/arch/arm/mach-omap2/cm33xx.c
+++
[PATCH 26/26] ARM: OMAP2+: PRM: provide generic API for system reset
This patch combines the various prm_warm_reset calls under a common
API prm_reset_system, and adds the SoC specific implementation under
prm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/am33xx-restart.c |5 ++---
arch/arm/mach-omap2/omap2-restart.c |4 ++--
arch/arm/mach-omap2/omap3-restart.c |6 ++
arch/arm/mach-omap2/omap4-restart.c |4 ++--
arch/arm/mach-omap2/prm.h|2 ++
arch/arm/mach-omap2/prm2xxx.c|3 ++-
arch/arm/mach-omap2/prm2xxx.h|1 -
arch/arm/mach-omap2/prm33xx.c|3 ++-
arch/arm/mach-omap2/prm33xx.h|1 -
arch/arm/mach-omap2/prm3xxx.c|3 ++-
arch/arm/mach-omap2/prm3xxx.h|2 --
arch/arm/mach-omap2/prm44xx.c|1 +
arch/arm/mach-omap2/prm_common.c | 16
13 files changed, 33 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-omap2/am33xx-restart.c
b/arch/arm/mach-omap2/am33xx-restart.c
index 7286389..89f14af 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -9,8 +9,7 @@
#include linux/reboot.h
#include common.h
-#include prm-regbits-33xx.h
-#include prm33xx.h
+#include prm.h
/**
* am3xx_restart - trigger a software restart of the SoC
@@ -24,5 +23,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
{
/* TODO: Handle mode and cmd if necessary */
- am33xx_prm_global_warm_sw_reset();
+ prm_reset_system();
}
diff --git a/arch/arm/mach-omap2/omap2-restart.c
b/arch/arm/mach-omap2/omap2-restart.c
index 68423e2..4e4f48e 100644
--- a/arch/arm/mach-omap2/omap2-restart.c
+++ b/arch/arm/mach-omap2/omap2-restart.c
@@ -15,7 +15,7 @@
#include soc.h
#include common.h
-#include prm2xxx.h
+#include prm.h
/*
* reset_virt_prcm_set_ck, reset_sys_ck: pointers to the virt_prcm_set
@@ -40,7 +40,7 @@ void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
/* XXX Should save the cmd argument for use after the reboot */
- omap2xxx_prm_dpll_reset(); /* never returns */
+ prm_reset_system();
while (1);
}
diff --git a/arch/arm/mach-omap2/omap3-restart.c
b/arch/arm/mach-omap2/omap3-restart.c
index 5de2a0c..ce0afb6 100644
--- a/arch/arm/mach-omap2/omap3-restart.c
+++ b/arch/arm/mach-omap2/omap3-restart.c
@@ -14,10 +14,8 @@
#include linux/init.h
#include linux/reboot.h
-#include iomap.h
-#include common.h
#include control.h
-#include prm3xxx.h
+#include prm.h
/* Global address base setup code */
@@ -32,6 +30,6 @@
void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
{
omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0));
- omap3xxx_prm_dpll3_reset(); /* never returns */
+ prm_reset_system();
while (1);
}
diff --git a/arch/arm/mach-omap2/omap4-restart.c
b/arch/arm/mach-omap2/omap4-restart.c
index 41dfd7d..f19f9db 100644
--- a/arch/arm/mach-omap2/omap4-restart.c
+++ b/arch/arm/mach-omap2/omap4-restart.c
@@ -9,7 +9,7 @@
#include linux/types.h
#include linux/reboot.h
-#include prminst44xx.h
+#include prm.h
/**
* omap44xx_restart - trigger a software restart of the SoC
@@ -22,7 +22,7 @@
void omap44xx_restart(enum reboot_mode mode, const char *cmd)
{
/* XXX Should save 'cmd' into scratchpad for use after reboot */
- omap4_prminst_global_warm_sw_reset(); /* never returns */
+ prm_reset_system();
while (1)
;
}
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 7efe14c..a0d36fd 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -144,6 +144,7 @@ struct prm_ll_data {
u16 offset, u16 st_offset);
int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
u16 offset);
+ void (*reset_system)(void);
};
extern int prm_register(struct prm_ll_data *pld);
@@ -156,6 +157,7 @@ int prm_is_hardreset_asserted(u8 shift, u8 part, s16
prm_mod, u16 offset);
extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
+void prm_reset_system(void);
void prm_reconfigure_io_chain(void);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index 54ae555..af0f152 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -106,7 +106,7 @@ static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
* Set the DPLL reset bit, which should reboot the SoC. This is the
* recommended way to restart the SoC. No return value.
*/
-void omap2xxx_prm_dpll_reset(void)
+static void omap2xxx_prm_dpll_reset(void)
{
omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
OMAP2_RM_RSTCTRL);
@@ -215,6 +215,7 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
.assert_hardreset =
[PATCH 21/26] ARM: AM33xx: PRM: make direct register access functions static
These should not be accessed outside driver, thus removed the APIs
from the header file and made the implementation static.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm33xx.c |6 +++---
arch/arm/mach-omap2/prm33xx.h |3 ---
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 03960bc..4a843f7 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -28,19 +28,19 @@
#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 0)
/* Read a register in a PRM instance */
-u32 am33xx_prm_read_reg(s16 inst, u16 idx)
+static u32 am33xx_prm_read_reg(s16 inst, u16 idx)
{
return readl_relaxed(prm_base + inst + idx);
}
/* Write into a register in a PRM instance */
-void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
+static void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx)
{
writel_relaxed(val, prm_base + inst + idx);
}
/* Read-modify-write a register in PRM. Caller must lock */
-u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
+static u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx)
{
u32 v;
diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h
index 49ad5b8..937d56e 100644
--- a/arch/arm/mach-omap2/prm33xx.h
+++ b/arch/arm/mach-omap2/prm33xx.h
@@ -118,9 +118,6 @@
#define AM33XX_PM_CEFUSE_PWRSTST
AM33XX_PRM_REGADDR(AM33XX_PRM_CEFUSE_MOD, 0x0004)
#ifndef __ASSEMBLER__
-extern u32 am33xx_prm_read_reg(s16 inst, u16 idx);
-extern void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx);
-extern u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
extern void am33xx_prm_global_warm_sw_reset(void);
int am33xx_prm_init(void);
--
1.7.9.5
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[PATCH 20/26] ARM: AM33xx: PRM: move global warm reset implementation to driver
Moved the implementation from am33xx-restart.c to the prm33xx.c file to
isolate the PRM register accesses to be private for PRM driver.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/am33xx-restart.c |9 +
arch/arm/mach-omap2/prm33xx.c| 21 +
2 files changed, 22 insertions(+), 8 deletions(-)
diff --git a/arch/arm/mach-omap2/am33xx-restart.c
b/arch/arm/mach-omap2/am33xx-restart.c
index c88d8df7..7286389 100644
--- a/arch/arm/mach-omap2/am33xx-restart.c
+++ b/arch/arm/mach-omap2/am33xx-restart.c
@@ -24,12 +24,5 @@ void am33xx_restart(enum reboot_mode mode, const char *cmd)
{
/* TODO: Handle mode and cmd if necessary */
- am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
- AM33XX_RST_GLOBAL_WARM_SW_MASK,
- AM33XX_PRM_DEVICE_MOD,
- AM33XX_PRM_RSTCTRL_OFFSET);
-
- /* OCP barrier */
- (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
- AM33XX_PRM_RSTCTRL_OFFSET);
+ am33xx_prm_global_warm_sw_reset();
}
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 3cbfb78..03960bc 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -23,6 +23,10 @@
#include prm33xx.h
#include prm-regbits-33xx.h
+#define AM33XX_PRM_RSTCTRL_OFFSET 0x
+
+#define AM33XX_RST_GLOBAL_WARM_SW_MASK (1 0)
+
/* Read a register in a PRM instance */
u32 am33xx_prm_read_reg(s16 inst, u16 idx)
{
@@ -332,6 +336,23 @@ static int am33xx_check_vcvp(void)
return 0;
}
+/**
+ * am33xx_prm_global_warm_sw_reset - reboot the device via warm reset
+ *
+ * Immediately reboots the device through warm reset.
+ */
+void am33xx_prm_global_warm_sw_reset(void)
+{
+ am33xx_prm_rmw_reg_bits(AM33XX_RST_GLOBAL_WARM_SW_MASK,
+ AM33XX_RST_GLOBAL_WARM_SW_MASK,
+ AM33XX_PRM_DEVICE_MOD,
+ AM33XX_PRM_RSTCTRL_OFFSET);
+
+ /* OCP barrier */
+ (void)am33xx_prm_read_reg(AM33XX_PRM_DEVICE_MOD,
+ AM33XX_PRM_RSTCTRL_OFFSET);
+}
+
struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
--
1.7.9.5
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[PATCH 15/26] ARM: OMAP2+: PRM: add generic API for deasserting hardware reset
PRM driver now has a generic API for deasserting hardware resets. SoC
specific support functions are registered through the prm_ll_data.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c | 22 ++
arch/arm/mach-omap2/prm.h |5 +
arch/arm/mach-omap2/prm2xxx.c |1 +
arch/arm/mach-omap2/prm2xxx_3xxx.c |7 ++-
arch/arm/mach-omap2/prm2xxx_3xxx.h |4 +++-
arch/arm/mach-omap2/prm33xx.c |8 ++--
arch/arm/mach-omap2/prm33xx.h |2 --
arch/arm/mach-omap2/prm3xxx.c |1 +
arch/arm/mach-omap2/prm44xx.c |1 +
arch/arm/mach-omap2/prm_common.c | 24
arch/arm/mach-omap2/prminst44xx.c | 10 +++---
arch/arm/mach-omap2/prminst44xx.h |5 +++--
12 files changed, 67 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 9044ec2..57ff628 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -2927,9 +2927,8 @@ static int _omap2_assert_hardreset(struct omap_hwmod *oh,
static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return omap2_prm_deassert_hardreset(oh-prcm.omap2.module_offs,
- ohri-rst_shift,
- ohri-st_shift);
+ return prm_deassert_hardreset(ohri-rst_shift, ohri-st_shift, 0,
+ oh-prcm.omap2.module_offs, 0, 0);
}
/**
@@ -2996,10 +2995,10 @@ static int _omap4_deassert_hardreset(struct omap_hwmod
*oh,
if (ohri-st_shift)
pr_err(omap_hwmod: %s: %s: hwmod data error: OMAP4 does not
support st_shift\n,
oh-name, ohri-name);
- return omap4_prminst_deassert_hardreset(ohri-rst_shift,
- oh-clkdm-pwrdm.ptr-prcm_partition,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs);
+ return prm_deassert_hardreset(ohri-rst_shift, 0,
+ oh-clkdm-pwrdm.ptr-prcm_partition,
+ oh-clkdm-pwrdm.ptr-prcm_offs,
+ oh-prcm.omap4.rstctrl_offs, 0);
}
/**
@@ -3062,11 +3061,10 @@ static int _am33xx_assert_hardreset(struct omap_hwmod
*oh,
static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
struct omap_hwmod_rst_info *ohri)
{
- return am33xx_prm_deassert_hardreset(ohri-rst_shift,
- ohri-st_shift,
- oh-clkdm-pwrdm.ptr-prcm_offs,
- oh-prcm.omap4.rstctrl_offs,
- oh-prcm.omap4.rstst_offs);
+ return prm_deassert_hardreset(ohri-rst_shift, ohri-st_shift, 0,
+ oh-clkdm-pwrdm.ptr-prcm_offs,
+ oh-prcm.omap4.rstctrl_offs,
+ oh-prcm.omap4.rstst_offs);
}
/**
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 6eea160..790bb22 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -129,6 +129,7 @@ struct prm_reset_src_map {
* @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
* @late_init: ptr to the late init function
* @assert_hardreset: ptr to the SoC PRM hardreset assert impl
+ * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl
*
* XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
* deprecated.
@@ -139,12 +140,16 @@ struct prm_ll_data {
void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
int (*late_init)(void);
int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
+ int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+ u16 offset, u16 st_offset);
};
extern int prm_register(struct prm_ll_data *pld);
extern int prm_unregister(struct prm_ll_data *pld);
int prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
+int prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
+ u16 offset, u16 st_offset);
extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index fa4448b..343fc73 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -213,6 +213,7 @@ struct pwrdm_ops omap2_pwrdm_operations = {
static struct prm_ll_data omap2xxx_prm_ll_data = {
.read_reset_sources = omap2xxx_prm_read_reset_sources,
.assert_hardreset =
[PATCH 24/26] ARM: OMAP4: PRM: make PRCM interrupt handler related functions static
These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm44xx.c | 13 +
arch/arm/mach-omap2/prm44xx_54xx.h |6 --
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 15b4646..bfcc356 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -32,6 +32,11 @@
/* Static data */
+static void omap44xx_prm_read_pending_irqs(unsigned long *events);
+static void omap44xx_prm_ocp_barrier(void);
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+
static const struct omap_prcm_irq omap4_prcm_irqs[] = {
OMAP_PRCM_IRQ(io, 9, 1),
};
@@ -207,7 +212,7 @@ static inline u32 _read_pending_irq_reg(u16 irqen_offs, u16
irqst_offs)
* MPU IRQs, and store the result into the two u32s pointed to by @events.
* No return value.
*/
-void omap44xx_prm_read_pending_irqs(unsigned long *events)
+static void omap44xx_prm_read_pending_irqs(unsigned long *events)
{
events[0] = _read_pending_irq_reg(OMAP4_PRM_IRQENABLE_MPU_OFFSET,
OMAP4_PRM_IRQSTATUS_MPU_OFFSET);
@@ -224,7 +229,7 @@ void omap44xx_prm_read_pending_irqs(unsigned long *events)
* block, to avoid race conditions after acknowledging or clearing IRQ
* bits. No return value.
*/
-void omap44xx_prm_ocp_barrier(void)
+static void omap44xx_prm_ocp_barrier(void)
{
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_REVISION_PRM_OFFSET);
@@ -241,7 +246,7 @@ void omap44xx_prm_ocp_barrier(void)
* interrupts reaches the PRM before returning; otherwise, spurious
* interrupts might occur. No return value.
*/
-void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
{
saved_mask[0] =
omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
@@ -270,7 +275,7 @@ void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
* No OCP barrier should be needed here; any pending PRM interrupts will fire
* once the writes reach the PRM. No return value.
*/
-void omap44xx_prm_restore_irqen(u32 *saved_mask)
+static void omap44xx_prm_restore_irqen(u32 *saved_mask)
{
omap4_prm_write_inst_reg(saved_mask[0], OMAP4430_PRM_OCP_SOCKET_INST,
OMAP4_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h
b/arch/arm/mach-omap2/prm44xx_54xx.h
index 96477e7..faa7411 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -47,12 +47,6 @@ static inline void omap44xx_prm_reconfigure_io_chain(void)
}
#endif
-/* PRM interrupt-related functions */
-extern void omap44xx_prm_read_pending_irqs(unsigned long *events);
-extern void omap44xx_prm_ocp_barrier(void);
-extern void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap44xx_prm_restore_irqen(u32 *saved_mask);
-
extern int __init omap44xx_prm_init(void);
extern u32 omap44xx_prm_get_reset_sources(void);
--
1.7.9.5
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[PATCH 25/26] ARM: OMAP3+: PRM: add generic API for reconfiguring I/O chain
This adds a generic API for reconfiguring the I/O chain. The implementation
will call the SoC specific function registered during init time. The SoC
specific reconfigure functions are also made static, as they don't need
to be accessed outside the PRM driver itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/omap_hwmod.c |5 +
arch/arm/mach-omap2/prm.h |2 ++
arch/arm/mach-omap2/prm3xxx.c |3 ++-
arch/arm/mach-omap2/prm3xxx.h |8
arch/arm/mach-omap2/prm44xx.c |3 ++-
arch/arm/mach-omap2/prm44xx_54xx.h |9 -
arch/arm/mach-omap2/prm_common.c | 16
7 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 1de87a7..1bfc504 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1983,10 +1983,7 @@ static void _reconfigure_io_chain(void)
spin_lock_irqsave(io_chain_lock, flags);
- if (cpu_is_omap34xx() omap3_has_io_chain_ctrl())
- omap3xxx_prm_reconfigure_io_chain();
- else if (cpu_is_omap44xx())
- omap44xx_prm_reconfigure_io_chain();
+ prm_reconfigure_io_chain();
spin_unlock_irqrestore(io_chain_lock, flags);
}
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 0dd8d83..7efe14c 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -157,6 +157,8 @@ extern u32 prm_read_reset_sources(void);
extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx);
extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx);
+void prm_reconfigure_io_chain(void);
+
#endif
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index f21fd76..1a739de 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -34,6 +34,7 @@ static void omap3xxx_prm_read_pending_irqs(unsigned long
*events);
static void omap3xxx_prm_ocp_barrier(void);
static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+static void omap3xxx_prm_reconfigure_io_chain(void);
static const struct omap_prcm_irq omap3_prcm_irqs[] = {
OMAP_PRCM_IRQ(wkup, 0, 0),
@@ -383,7 +384,7 @@ void __init omap3_prm_init_pm(bool has_uart4, bool has_iva)
* deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit. No
* return value.
*/
-void omap3xxx_prm_reconfigure_io_chain(void)
+static void omap3xxx_prm_reconfigure_io_chain(void)
{
int i = 0;
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index 5d993d2..321568b 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -144,14 +144,6 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
extern void omap3_prm_vcvp_write(u32 val, u8 offset);
extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
-#ifdef CONFIG_ARCH_OMAP3
-void omap3xxx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap3xxx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
extern void omap3xxx_prm_dpll3_reset(void);
extern int __init omap3xxx_prm_init(void);
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index bfcc356..e7ac7e2 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -36,6 +36,7 @@ static void omap44xx_prm_read_pending_irqs(unsigned long
*events);
static void omap44xx_prm_ocp_barrier(void);
static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask);
static void omap44xx_prm_restore_irqen(u32 *saved_mask);
+static void omap44xx_prm_reconfigure_io_chain(void);
static const struct omap_prcm_irq omap4_prcm_irqs[] = {
OMAP_PRCM_IRQ(io, 9, 1),
@@ -292,7 +293,7 @@ static void omap44xx_prm_restore_irqen(u32 *saved_mask)
* deasserting WUCLKIN and waiting for WUCLKOUT to be deasserted.
* No return value. XXX Are the final two steps necessary?
*/
-void omap44xx_prm_reconfigure_io_chain(void)
+static void omap44xx_prm_reconfigure_io_chain(void)
{
int i = 0;
s32 inst = omap4_prmst_get_prm_dev_inst();
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h
b/arch/arm/mach-omap2/prm44xx_54xx.h
index faa7411..f751251 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -38,15 +38,6 @@ extern u32 omap4_prm_vcvp_read(u8 offset);
extern void omap4_prm_vcvp_write(u32 val, u8 offset);
extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
-#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
- defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
-void omap44xx_prm_reconfigure_io_chain(void);
-#else
-static inline void omap44xx_prm_reconfigure_io_chain(void)
-{
-}
-#endif
-
extern int __init omap44xx_prm_init(void);
extern u32 omap44xx_prm_get_reset_sources(void);
diff --git a/arch/arm/mach-omap2/prm_common.c
[PATCH 23/26] ARM: OMAP3: PRM: make PRCM interrupt handler related functions static
These are not needed outside the PRM driver, so make them static and
remove the prototypes from the public header.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm3xxx.c | 13 +
arch/arm/mach-omap2/prm3xxx.h |6 --
2 files changed, 9 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 5c1bb25..f21fd76 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -30,6 +30,11 @@
#include cm3xxx.h
#include cm-regbits-34xx.h
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events);
+static void omap3xxx_prm_ocp_barrier(void);
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask);
+
static const struct omap_prcm_irq omap3_prcm_irqs[] = {
OMAP_PRCM_IRQ(wkup, 0, 0),
OMAP_PRCM_IRQ(io, 9, 1),
@@ -147,7 +152,7 @@ void omap3xxx_prm_dpll3_reset(void)
* MPU IRQs, and store the result into the u32 pointed to by @events.
* No return value.
*/
-void omap3xxx_prm_read_pending_irqs(unsigned long *events)
+static void omap3xxx_prm_read_pending_irqs(unsigned long *events)
{
u32 mask, st;
@@ -166,7 +171,7 @@ void omap3xxx_prm_read_pending_irqs(unsigned long *events)
* block, to avoid race conditions after acknowledging or clearing IRQ
* bits. No return value.
*/
-void omap3xxx_prm_ocp_barrier(void)
+static void omap3xxx_prm_ocp_barrier(void)
{
omap2_prm_read_mod_reg(OCP_MOD, OMAP3_PRM_REVISION_OFFSET);
}
@@ -182,7 +187,7 @@ void omap3xxx_prm_ocp_barrier(void)
* returning; otherwise, spurious interrupts might occur. No return
* value.
*/
-void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
+static void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
{
saved_mask[0] = omap2_prm_read_mod_reg(OCP_MOD,
OMAP3_PRM_IRQENABLE_MPU_OFFSET);
@@ -202,7 +207,7 @@ void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask)
* barrier should be needed here; any pending PRM interrupts will fire
* once the writes reach the PRM. No return value.
*/
-void omap3xxx_prm_restore_irqen(u32 *saved_mask)
+static void omap3xxx_prm_restore_irqen(u32 *saved_mask)
{
omap2_prm_write_mod_reg(saved_mask[0], OCP_MOD,
OMAP3_PRM_IRQENABLE_MPU_OFFSET);
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index bc37d42..5d993d2 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -152,12 +152,6 @@ static inline void omap3xxx_prm_reconfigure_io_chain(void)
}
#endif
-/* PRM interrupt-related functions */
-extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
-extern void omap3xxx_prm_ocp_barrier(void);
-extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
-extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
-
extern void omap3xxx_prm_dpll3_reset(void);
extern int __init omap3xxx_prm_init(void);
--
1.7.9.5
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[PATCH 22/26] ARM: OMAP4: PRM: make omap4_prm_read/write_inst_reg calls static
These are not (and should not be) used by anybody outside the PRM
driver itself.
Signed-off-by: Tero Kristo t-kri...@ti.com
---
arch/arm/mach-omap2/prm44xx.c |6 +++---
arch/arm/mach-omap2/prm44xx_54xx.h |4
2 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index d357ca9..15b4646 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -80,19 +80,19 @@ static struct prm_reset_src_map
omap44xx_prm_reset_src_map[] = {
/* PRM low-level functions */
/* Read a register in a CM/PRM instance in the PRM module */
-u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
+static u32 omap4_prm_read_inst_reg(s16 inst, u16 reg)
{
return readl_relaxed(prm_base + inst + reg);
}
/* Write into a register in a CM/PRM instance in the PRM module */
-void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
+static void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 reg)
{
writel_relaxed(val, prm_base + inst + reg);
}
/* Read-modify-write a register in a PRM module. Caller must lock */
-u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
+static u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg)
{
u32 v;
diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h
b/arch/arm/mach-omap2/prm44xx_54xx.h
index 8d95aa5..96477e7 100644
--- a/arch/arm/mach-omap2/prm44xx_54xx.h
+++ b/arch/arm/mach-omap2/prm44xx_54xx.h
@@ -26,10 +26,6 @@
/* Function prototypes */
#ifndef __ASSEMBLER__
-extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx);
-extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx);
-extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx);
-
/* OMAP4/OMAP5-specific VP functions */
u32 omap4_prm_vp_check_txdone(u8 vp_id);
void omap4_prm_vp_clear_txdone(u8 vp_id);
--
1.7.9.5
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Re: [PATCH] mfd: palmas: Add support for optional wakeup
On 09/01/2014 04:32 AM, Lee Jones wrote: On Fri, 29 Aug 2014, Nishanth Menon wrote: On 08/29/2014 05:56 AM, Lee Jones wrote: On Tue, 19 Aug 2014, Nishanth Menon wrote: With the recent pinctrl-single changes, omaps can treat wake-up events from deeper idle states as interrupts. Let's add support for the optional second interrupt for wake-up events. And then SoC can wakeup and handle the event using it's regular handler. Finally, to pass the wake-up interrupt in the dts file, interrupts-extended property needs to be passed. This is similar in approach to commit 2a0b965cfb6e (serial: omap: Add support for optional wake-up) Signed-off-by: Nishanth Menon n...@ti.com --- Documentation/devicetree/bindings/mfd/palmas.txt | 20 DT Ack please. Please read Documentation/devicetree/bindings/submittingpatches.txt I assume you wanted me to note the following: The Documentation/ portion of the patch should be a separate patch. Many maintainers prefer that when the bindings for the device is new, and when additional properties are added, they prefer it part of same patch.. Anyways.. if the above is what you prefer, I can follow that. In short, I assume you'd like three patches: a) fix up style of current documentation - palmas to palmas@40 b) Split documentation for interrupt-extended from the current patch into it's own patch. c) remainder of this patch as is.. Does that sound right? --- Regards, Nishanth Menon -- To unsubscribe from this list: send the line unsubscribe linux-omap in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 15/15] tty: serial: 8250: omap: add dma support
Hi, On Mon, Sep 01, 2014 at 07:47:53PM +0200, Sebastian Andrzej Siewior wrote: On 08/29/2014 06:12 PM, Tony Lindgren wrote: Looks like the paste bug is there for sure, doing off idle and pasting 240 characters to the console can hang the UART RX after few attempts, and pasting 16 charactes won't show up at all if the system is idling. So you may want to play with that too a bit :) One character wakes it up. After that you can send 16, 64 and you see them. Right away. No delay. If you send a lot data in one-go it takes approx 152 characters until the first one is displayed properly at 115200,8N1. That is approx 13ms. Could it take that long to get up and be ready? I noticed the same behaviour when I tested the runtime PM stuff on my N900 with the existing serial-omap driver and I also assumed, that the chip needs that long to get up. Comparing it with serial-omap I see the same thing: I takes approx the same amount of data until the first one is displayed. After a lot of long writes which wake the chip up from idle I manage to freeze both, the serial-omap driver and mine driver. One thing that is probably a dumb idea is that printk in omap_8250_mdr1_errataset(). Would it be possible that when I hit a printk in the resume path that I may deadlock and box will freeze? -- Sebastian signature.asc Description: Digital signature
