Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Tomasz,
On 05/09/2014 05:01 PM, Tomasz Figa wrote:
> On 09.05.2014 08:49, Chanwoo Choi wrote:
>> Hi Tomasz,
>>
>> On 04/26/2014 08:38 PM, Tomasz Figa wrote:
>>> On 26.04.2014 02:51, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
> From: Tomasz Figa
>
> This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
> Cortex-A7
> dual core and includes following dt nodes:
>
> - GIC interrupt controller
> - Pinctrl to control GPIOs
> - Clock controller
> - CPU information (Cortex-A7 dual core)
> - UART to support serial port
> - MCT (Multi Core Timer)
> - ADC (Analog Digital Converter)
> - I2C/SPI bus
> - Power domain
> - PMU (Performance Monitoring Unit)
> - MSHC (Mobile Storage Host Controller)
> - PWM (Pluse Width Modulation)
> - AMBA bus
>
> Signed-off-by: Tomasz Figa
> Signed-off-by: Chanwoo Choi
> Signed-off-by: Kyungmin Park
> Signed-off-by: Inki Dae
> Signed-off-by: Hyunhee Kim
> Signed-off-by: Jaehoon Chung
> Signed-off-by: Bartlomiej Zolnierkiewicz
> Cc: Ben Dooks
> Cc: Kukjin Kim
> Cc: Rob Herring
> Cc: Pawel Moll
> Cc: Mark Rutland
> Cc: Ian Campbell
> Cc: Kumar Gala
> Cc: Russell King
> Cc: devicet...@vger.kernel.org
> ---
> arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
> arch/arm/boot/dts/exynos3250.dtsi | 405 +
> arch/arm/boot/dts/exynos4212-tizenw.dts | 926
> ++
> 3 files changed, 1808 insertions(+)
> create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
> create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
> create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
>
> diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
> b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
> new file mode 100644
> index 000..976490b
> --- /dev/null
> +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
> @@ -0,0 +1,477 @@
> +/*
> + * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
> + *
> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
> + *http://www.samsung.com
> + *
> + * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are
> listed as device
> + * tree nodes are listed in this file.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +/ {
> +pinctrl@1140 {
Could you use references instead of re-specifying the whole tree
hierarchy in every file a node is used?
Instead of
/ {
pinctrl@1140 {
};
};
one may simply use
&pinctrl_0 {
};
You might just need to change the location of #include
"exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
>>>
>>> Oh, well, you also should move all nodes of on-SoC devices under a
>>> simple-bus node called soc. You can see the patch adding dts file for
>>> Exynos5260 for an example [1].
>>>
>>> [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29360/focus=29361
>>
>>
>> OK, I'll move nodes dependent on SoC under 'soc' dt node as example patch[1]
>> except for 'amba-bus' dt node.
>
> I don't see any reason why amba-bus node shouldn't be under soc node as
> well. Any on-chip devices should be.
I didn't understand the correct meaning of 'simple-bus'.
OK, I'll move 'amba-bus' dt node under 'soc' dt node.
Best Regards,
Chanwoo Choi
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
On 09.05.2014 09:10, Chanwoo Choi wrote:
> Hi Tomasz,
>
> On 05/09/2014 02:02 PM, Tomasz Figa wrote:
>> Hi Chanwoo,
>>
>> On 09.05.2014 03:06, Chanwoo Choi wrote:
>>> On 04/26/2014 09:51 AM, Tomasz Figa wrote:
On 25.04.2014 03:16, Chanwoo Choi wrote:
>>
>> [snip]
>>
> +cpus {
> +#address-cells = <1>;
> +#size-cells = <0>;
> +
> +cpu@0 {
> +device_type = "cpu";
> +compatible = "arm,cortex-a7";
> +reg = <0>;
> +clock-frequency = <10>;
> +};
Why only one CPU? I believe Exynos3250 is dual core.
>>>
>>> I'll add cpu1 information.
>>>
Also are physical IDs of the cores really 0 and 1? On Exynos4210 for
example they are 0x900 and 0x901, while on Exynos4212 they are 0xa00 and
0xa01. Please check this.
>>>
>>> The 'reg' property means only hardware id(hwid) of CPU.
>>> You can check it on arm_dt_init_cpu_maps() in arch/arm/kernel/devtree.c.h.
>>> or Documentation/devicetree/bindings/arm/cpus.txt.
>>>
>>
>> Well, as described in Documentation/devicetree/bindings/arm/cpus.txt, on
>> 32-bit ARM v7 or later CPUs the "reg" property should be equal to the lower
>> 24-bits of MPIDR value of given CPU, which in addition to core ID includes
>> also cluster ID, which can be non-zero, even on single cluster SoCs (like it
>> is on Exynos4210 and 4x12).
>
> I checked the lower 24-bit of MPIDR value for Exynos3250 in
> arm_dt_init_cpu_maps().
> - the lower 24-bit of MPIDR for CPU0 is '0x0'.
Fair enough. Thanks.
Best regards,
Tomasz
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
On 09.05.2014 08:49, Chanwoo Choi wrote:
> Hi Tomasz,
>
> On 04/26/2014 08:38 PM, Tomasz Figa wrote:
>> On 26.04.2014 02:51, Tomasz Figa wrote:
>>> Hi Chanwoo,
>>>
>>> On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
Cortex-A7
dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
Signed-off-by: Tomasz Figa
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
Signed-off-by: Inki Dae
Signed-off-by: Hyunhee Kim
Signed-off-by: Jaehoon Chung
Signed-off-by: Bartlomiej Zolnierkiewicz
Cc: Ben Dooks
Cc: Kukjin Kim
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Russell King
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
arch/arm/boot/dts/exynos3250.dtsi | 405 +
arch/arm/boot/dts/exynos4212-tizenw.dts | 926
++
3 files changed, 1808 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
new file mode 100644
index 000..976490b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -0,0 +1,477 @@
+/*
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *http://www.samsung.com
+ *
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are
listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+pinctrl@1140 {
>>>
>>> Could you use references instead of re-specifying the whole tree
>>> hierarchy in every file a node is used?
>>>
>>> Instead of
>>>
>>> / {
>>> pinctrl@1140 {
>>>
>>> };
>>> };
>>>
>>> one may simply use
>>>
>>> &pinctrl_0 {
>>>
>>> };
>>>
>>> You might just need to change the location of #include
>>> "exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
>>
>> Oh, well, you also should move all nodes of on-SoC devices under a
>> simple-bus node called soc. You can see the patch adding dts file for
>> Exynos5260 for an example [1].
>>
>> [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29360/focus=29361
>
>
> OK, I'll move nodes dependent on SoC under 'soc' dt node as example patch[1]
> except for 'amba-bus' dt node.
I don't see any reason why amba-bus node shouldn't be under soc node as
well. Any on-chip devices should be.
Best regards,
Tomasz
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Tomasz,
On 05/09/2014 02:02 PM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 09.05.2014 03:06, Chanwoo Choi wrote:
>> On 04/26/2014 09:51 AM, Tomasz Figa wrote:
>>> On 25.04.2014 03:16, Chanwoo Choi wrote:
>
> [snip]
>
+cpus {
+#address-cells = <1>;
+#size-cells = <0>;
+
+cpu@0 {
+device_type = "cpu";
+compatible = "arm,cortex-a7";
+reg = <0>;
+clock-frequency = <10>;
+};
>>>
>>> Why only one CPU? I believe Exynos3250 is dual core.
>>
>> I'll add cpu1 information.
>>
>>> Also are physical IDs of the cores really 0 and 1? On Exynos4210 for
>>> example they are 0x900 and 0x901, while on Exynos4212 they are 0xa00 and
>>> 0xa01. Please check this.
>>
>> The 'reg' property means only hardware id(hwid) of CPU.
>> You can check it on arm_dt_init_cpu_maps() in arch/arm/kernel/devtree.c.h.
>> or Documentation/devicetree/bindings/arm/cpus.txt.
>>
>
> Well, as described in Documentation/devicetree/bindings/arm/cpus.txt, on
> 32-bit ARM v7 or later CPUs the "reg" property should be equal to the lower
> 24-bits of MPIDR value of given CPU, which in addition to core ID includes
> also cluster ID, which can be non-zero, even on single cluster SoCs (like it
> is on Exynos4210 and 4x12).
I checked the lower 24-bit of MPIDR value for Exynos3250 in
arm_dt_init_cpu_maps().
- the lower 24-bit of MPIDR for CPU0 is '0x0'.
>
+};
+
+fixed-rate-clocks {
+compatible = "simple-bus";
+#address-cells = <1>;
+#size-cells = <0>;
>
> [snip]
>
+cmu: clock-controller@1003 {
+compatible = "samsung,exynos3250-cmu";
+reg = <0x1003 0x2>;
+#clock-cells = <1>;
+};
+
+rtc@1007 {
>>>
>>> Please add label to the node, so it can be referenced from board dts files
>>> added later (using the method I explained above).
>>
>> OK, I'll add lable as following:
>>
>> rtc_0: rtc@1007 {
>
> There is no need to suffix the RTC with _0, as there is just one RTC in the
> SoC. So in this case rtc: rtc@1007 will be enough.
OK, I'll modify it without prefix('_0).
Best Regards,
Chanwoo Choi
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Tomasz,
On 04/26/2014 08:38 PM, Tomasz Figa wrote:
> On 26.04.2014 02:51, Tomasz Figa wrote:
>> Hi Chanwoo,
>>
>> On 25.04.2014 03:16, Chanwoo Choi wrote:
>>> From: Tomasz Figa
>>>
>>> This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
>>> Cortex-A7
>>> dual core and includes following dt nodes:
>>>
>>> - GIC interrupt controller
>>> - Pinctrl to control GPIOs
>>> - Clock controller
>>> - CPU information (Cortex-A7 dual core)
>>> - UART to support serial port
>>> - MCT (Multi Core Timer)
>>> - ADC (Analog Digital Converter)
>>> - I2C/SPI bus
>>> - Power domain
>>> - PMU (Performance Monitoring Unit)
>>> - MSHC (Mobile Storage Host Controller)
>>> - PWM (Pluse Width Modulation)
>>> - AMBA bus
>>>
>>> Signed-off-by: Tomasz Figa
>>> Signed-off-by: Chanwoo Choi
>>> Signed-off-by: Kyungmin Park
>>> Signed-off-by: Inki Dae
>>> Signed-off-by: Hyunhee Kim
>>> Signed-off-by: Jaehoon Chung
>>> Signed-off-by: Bartlomiej Zolnierkiewicz
>>> Cc: Ben Dooks
>>> Cc: Kukjin Kim
>>> Cc: Rob Herring
>>> Cc: Pawel Moll
>>> Cc: Mark Rutland
>>> Cc: Ian Campbell
>>> Cc: Kumar Gala
>>> Cc: Russell King
>>> Cc: devicet...@vger.kernel.org
>>> ---
>>> arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
>>> arch/arm/boot/dts/exynos3250.dtsi | 405 +
>>> arch/arm/boot/dts/exynos4212-tizenw.dts | 926
>>> ++
>>> 3 files changed, 1808 insertions(+)
>>> create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>>> create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
>>> create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
>>>
>>> diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>>> b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>>> new file mode 100644
>>> index 000..976490b
>>> --- /dev/null
>>> +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>>> @@ -0,0 +1,477 @@
>>> +/*
>>> + * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
>>> + *
>>> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
>>> + *http://www.samsung.com
>>> + *
>>> + * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are
>>> listed as device
>>> + * tree nodes are listed in this file.
>>> + *
>>> + * This program is free software; you can redistribute it and/or modify
>>> + * it under the terms of the GNU General Public License version 2 as
>>> + * published by the Free Software Foundation.
>>> +*/
>>> +
>>> +/ {
>>> +pinctrl@1140 {
>>
>> Could you use references instead of re-specifying the whole tree
>> hierarchy in every file a node is used?
>>
>> Instead of
>>
>> / {
>> pinctrl@1140 {
>>
>> };
>> };
>>
>> one may simply use
>>
>> &pinctrl_0 {
>>
>> };
>>
>> You might just need to change the location of #include
>> "exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
>
> Oh, well, you also should move all nodes of on-SoC devices under a simple-bus
> node called soc. You can see the patch adding dts file for Exynos5260 for an
> example [1].
>
> [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29360/focus=29361
OK, I'll move nodes dependent on SoC under 'soc' dt node as example patch[1]
except for 'amba-bus' dt node.
Thanks,
Chanwoo Choi
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Chanwoo,
On 09.05.2014 03:06, Chanwoo Choi wrote:
On 04/26/2014 09:51 AM, Tomasz Figa wrote:
On 25.04.2014 03:16, Chanwoo Choi wrote:
[snip]
+cpus {
+#address-cells = <1>;
+#size-cells = <0>;
+
+cpu@0 {
+device_type = "cpu";
+compatible = "arm,cortex-a7";
+reg = <0>;
+clock-frequency = <10>;
+};
Why only one CPU? I believe Exynos3250 is dual core.
I'll add cpu1 information.
Also are physical IDs of the cores really 0 and 1? On Exynos4210 for example
they are 0x900 and 0x901, while on Exynos4212 they are 0xa00 and 0xa01. Please
check this.
The 'reg' property means only hardware id(hwid) of CPU.
You can check it on arm_dt_init_cpu_maps() in arch/arm/kernel/devtree.c.h.
or Documentation/devicetree/bindings/arm/cpus.txt.
Well, as described in Documentation/devicetree/bindings/arm/cpus.txt, on
32-bit ARM v7 or later CPUs the "reg" property should be equal to the
lower 24-bits of MPIDR value of given CPU, which in addition to core ID
includes also cluster ID, which can be non-zero, even on single cluster
SoCs (like it is on Exynos4210 and 4x12).
+};
+
+fixed-rate-clocks {
+compatible = "simple-bus";
+#address-cells = <1>;
+#size-cells = <0>;
[snip]
+cmu: clock-controller@1003 {
+compatible = "samsung,exynos3250-cmu";
+reg = <0x1003 0x2>;
+#clock-cells = <1>;
+};
+
+rtc@1007 {
Please add label to the node, so it can be referenced from board dts files
added later (using the method I explained above).
OK, I'll add lable as following:
rtc_0: rtc@1007 {
There is no need to suffix the RTC with _0, as there is just one RTC in
the SoC. So in this case rtc: rtc@1007 will be enough.
+compatible = "samsung,s3c6410-rtc";
+reg = <0x1007 0x100>;
+interrupts = <0 73 0>, <0 74 0>;
+status = "disabled";
+};
[snip]
+adc: adc@126C {
+compatible = "samsung,exynos-adc-v3";
+reg = <0x126C 0x100>, <0x10020718 0x4>;
+interrupts = <0 137 0>;
+clock-names = "adc", "sclk_tsadc";
+clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
+#io-channel-cells = <1>;
+io-channel-ranges;
+status = "disabled";
+};
+
+serial@1380 {
Please add label.
OK, I'll add lable as following:
serial_0: serial@1380 {
OK. In this case there are multiple instances of serial controller
available so the _0 suffix is fine.
+compatible = "samsung,exynos4210-uart";
+reg = <0x1380 0x100>;
+interrupts = <0 109 0>;
+clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
+clock-names = "uart", "clk_uart_baud0";
+status = "disabled";
+};
+
+serial@1381 {
OK, I'll add lable as following:
serial_1: serial@1380 {
OK.
Thanks for your review.
You're welcome. Thanks for addressing my comments.
Best regards,
Tomasz
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Tomasz,
On 04/26/2014 09:51 AM, Tomasz Figa wrote:
> Hi Chanwoo,
>
> On 25.04.2014 03:16, Chanwoo Choi wrote:
>> From: Tomasz Figa
>>
>> This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
>> Cortex-A7
>> dual core and includes following dt nodes:
>>
>> - GIC interrupt controller
>> - Pinctrl to control GPIOs
>> - Clock controller
>> - CPU information (Cortex-A7 dual core)
>> - UART to support serial port
>> - MCT (Multi Core Timer)
>> - ADC (Analog Digital Converter)
>> - I2C/SPI bus
>> - Power domain
>> - PMU (Performance Monitoring Unit)
>> - MSHC (Mobile Storage Host Controller)
>> - PWM (Pluse Width Modulation)
>> - AMBA bus
>>
>> Signed-off-by: Tomasz Figa
>> Signed-off-by: Chanwoo Choi
>> Signed-off-by: Kyungmin Park
>> Signed-off-by: Inki Dae
>> Signed-off-by: Hyunhee Kim
>> Signed-off-by: Jaehoon Chung
>> Signed-off-by: Bartlomiej Zolnierkiewicz
>> Cc: Ben Dooks
>> Cc: Kukjin Kim
>> Cc: Rob Herring
>> Cc: Pawel Moll
>> Cc: Mark Rutland
>> Cc: Ian Campbell
>> Cc: Kumar Gala
>> Cc: Russell King
>> Cc: devicet...@vger.kernel.org
>> ---
>> arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
>> arch/arm/boot/dts/exynos3250.dtsi | 405 +
>> arch/arm/boot/dts/exynos4212-tizenw.dts | 926
>> ++
>> 3 files changed, 1808 insertions(+)
>> create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>> create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
>> create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
>>
>> diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>> b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>> new file mode 100644
>> index 000..976490b
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
>> @@ -0,0 +1,477 @@
>> +/*
>> + * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
>> + *
>> + * Copyright (c) 2014 Samsung Electronics Co., Ltd.
>> + *http://www.samsung.com
>> + *
>> + * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as
>> device
>> + * tree nodes are listed in this file.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> +*/
>> +
>> +/ {
>> +pinctrl@1140 {
>
> Could you use references instead of re-specifying the whole tree hierarchy in
> every file a node is used?
>
> Instead of
>
> / {
> pinctrl@1140 {
>
> };
> };
>
> one may simply use
>
> &pinctrl_0 {
>
> };
>
> You might just need to change the location of #include
> "exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
>
OK, I'll change it.
>> +gpa0: gpa0 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpa1: gpa1 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpb: gpb {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpc0: gpc0 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpc1: gpc1 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpd0: gpd0 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +gpd1: gpd1 {
>> +gpio-controller;
>> +#gpio-cells = <2>;
>> +
>> +interrupt-controller;
>> +#interrupt-cells = <2>;
>> +};
>> +
>> +uart0_data: uart0-data {
>> +samsung,pins = "gpa0-0", "gpa0-1";
>> +samsung,pin-function = <0x2>;
>> +samsung,pin-pud = <0>;
>> +samsung,pin-drv = <0>;
>> +};
>> +
>> +uart0_fctl: uart0-fctl {
>> +samsung,pins = "gpa0-2", "gpa0-3";
>> +samsung,pin-function = <2>;
>> +samsung,pin-pud = <0>;
>> +samsung,pin-drv = <0>;
>> +};
>> +
>> +uart1_data: uart1-data {
>> +samsung,pins = "gpa0-4", "gpa0-5";
>> +samsung,pin-function = <2>;
>> +samsung,pin-pud = <0>;
>> +samsung,pin-drv = <0>;
>> +};
>> +
>> +uart1_fctl: uart1-fctl {
>> +samsung,pins = "gpa0-6", "gpa0-7";
>> +samsung,pin-function = <2>;
>> +samsung,pin-pud = <0>;
>> +
Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
On 26.04.2014 02:51, Tomasz Figa wrote:
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on
Cortex-A7
dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
Signed-off-by: Tomasz Figa
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
Signed-off-by: Inki Dae
Signed-off-by: Hyunhee Kim
Signed-off-by: Jaehoon Chung
Signed-off-by: Bartlomiej Zolnierkiewicz
Cc: Ben Dooks
Cc: Kukjin Kim
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Russell King
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
arch/arm/boot/dts/exynos3250.dtsi | 405 +
arch/arm/boot/dts/exynos4212-tizenw.dts | 926
++
3 files changed, 1808 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
new file mode 100644
index 000..976490b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -0,0 +1,477 @@
+/*
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ *http://www.samsung.com
+ *
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are
listed as device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+pinctrl@1140 {
Could you use references instead of re-specifying the whole tree
hierarchy in every file a node is used?
Instead of
/ {
pinctrl@1140 {
};
};
one may simply use
&pinctrl_0 {
};
You might just need to change the location of #include
"exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
Oh, well, you also should move all nodes of on-SoC devices under a
simple-bus node called soc. You can see the patch adding dts file for
Exynos5260 for an example [1].
[1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/29360/focus=29361
Best regards,
Tomasz
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Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
Hi Chanwoo,
On 25.04.2014 03:16, Chanwoo Choi wrote:
From: Tomasz Figa
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on Cortex-A7
dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
Signed-off-by: Tomasz Figa
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
Signed-off-by: Inki Dae
Signed-off-by: Hyunhee Kim
Signed-off-by: Jaehoon Chung
Signed-off-by: Bartlomiej Zolnierkiewicz
Cc: Ben Dooks
Cc: Kukjin Kim
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Russell King
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
arch/arm/boot/dts/exynos3250.dtsi | 405 +
arch/arm/boot/dts/exynos4212-tizenw.dts | 926 ++
3 files changed, 1808 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
new file mode 100644
index 000..976490b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -0,0 +1,477 @@
+/*
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as
device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+ pinctrl@1140 {
Could you use references instead of re-specifying the whole tree
hierarchy in every file a node is used?
Instead of
/ {
pinctrl@1140 {
};
};
one may simply use
&pinctrl_0 {
};
You might just need to change the location of #include
"exynos3250-pinctrl.dtsi" from top of exynos3250.dtsi to bottom of it.
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ uart0_data: uart0-data {
+ samsung,pins = "gpa0-0", "gpa0-1";
+ samsung,pin-function = <0x2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart0_fctl: uart0-fctl {
+ samsung,pins = "gpa0-2", "gpa0-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_data: uart1-data {
+ samsung,pins = "gpa0-4", "gpa0-5";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_fctl: uart1-fctl {
+ samsung,pins = "gpa0-6", "gpa0-7";
+ samsung,pin-f
Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
On 04/25/2014 01:38 PM, Tushar Behera wrote: > On 04/25/2014 06:46 AM, Chanwoo Choi wrote: >> From: Tomasz Figa >> >> This patch add new exynos3250.dtsi to support Exynos3250 SoC based on >> Cortex-A7 >> dual core and includes following dt nodes: >> > > [ ... ] > >> --- >> arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++ >> arch/arm/boot/dts/exynos3250.dtsi | 405 + >> arch/arm/boot/dts/exynos4212-tizenw.dts | 926 >> ++ > > exynos4412-tizenw.dts related changes are unrelated. Right, It is may mistake. I'll resend this patch. Thanks, Chanwoo Choi -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
On 04/25/2014 06:46 AM, Chanwoo Choi wrote: > From: Tomasz Figa > > This patch add new exynos3250.dtsi to support Exynos3250 SoC based on > Cortex-A7 > dual core and includes following dt nodes: > [ ... ] > --- > arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++ > arch/arm/boot/dts/exynos3250.dtsi | 405 + > arch/arm/boot/dts/exynos4212-tizenw.dts | 926 > ++ exynos4412-tizenw.dts related changes are unrelated. -- Tushar Behera -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCHv4 7/7] ARM: dts: Add device tree sources for Exynos3250
From: Tomasz Figa
This patch add new exynos3250.dtsi to support Exynos3250 SoC based on Cortex-A7
dual core and includes following dt nodes:
- GIC interrupt controller
- Pinctrl to control GPIOs
- Clock controller
- CPU information (Cortex-A7 dual core)
- UART to support serial port
- MCT (Multi Core Timer)
- ADC (Analog Digital Converter)
- I2C/SPI bus
- Power domain
- PMU (Performance Monitoring Unit)
- MSHC (Mobile Storage Host Controller)
- PWM (Pluse Width Modulation)
- AMBA bus
Signed-off-by: Tomasz Figa
Signed-off-by: Chanwoo Choi
Signed-off-by: Kyungmin Park
Signed-off-by: Inki Dae
Signed-off-by: Hyunhee Kim
Signed-off-by: Jaehoon Chung
Signed-off-by: Bartlomiej Zolnierkiewicz
Cc: Ben Dooks
Cc: Kukjin Kim
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: Russell King
Cc: devicet...@vger.kernel.org
---
arch/arm/boot/dts/exynos3250-pinctrl.dtsi | 477 +++
arch/arm/boot/dts/exynos3250.dtsi | 405 +
arch/arm/boot/dts/exynos4212-tizenw.dts | 926 ++
3 files changed, 1808 insertions(+)
create mode 100644 arch/arm/boot/dts/exynos3250-pinctrl.dtsi
create mode 100644 arch/arm/boot/dts/exynos3250.dtsi
create mode 100644 arch/arm/boot/dts/exynos4212-tizenw.dts
diff --git a/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
new file mode 100644
index 000..976490b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos3250-pinctrl.dtsi
@@ -0,0 +1,477 @@
+/*
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
+ *
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as
device
+ * tree nodes are listed in this file.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/ {
+ pinctrl@1140 {
+ gpa0: gpa0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpa1: gpa1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpb: gpb {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc0: gpc0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpc1: gpc1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd0: gpd0 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpd1: gpd1 {
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ uart0_data: uart0-data {
+ samsung,pins = "gpa0-0", "gpa0-1";
+ samsung,pin-function = <0x2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart0_fctl: uart0-fctl {
+ samsung,pins = "gpa0-2", "gpa0-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_data: uart1-data {
+ samsung,pins = "gpa0-4", "gpa0-5";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ uart1_fctl: uart1-fctl {
+ samsung,pins = "gpa0-6", "gpa0-7";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ i2c2_bus: i2c2-bus {
+ samsung,pins = "gpa0-6", "gpa0-7";
+ samsung,pin-function = <3>;
+ samsung,pin-pud = <3>;
+ samsung,pin-drv = <0>;
+ };
+
+
