Re: [PATCH 1/4] ARM: dts: exynos4: add port sub-nodes to exynos usb host modules
On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski m.szyprow...@samsung.com wrote: This patch adds port sub-nodes to exynos4 ehci and ohci modules, which are required by recently merged new exynos4 usb2 phy support. Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com I checked this against the DT binding documentation for the samsung,exynos4210-ohci and samsung,exynos4210-ehci nodes, and also the usb2 phy binding docs. Looks fine. Also tested on ODROID-U2, seems to be working: ehci-exynos: EHCI EXYNOS driver exynos-ehci 1258.ehci: EHCI Host Controller exynos-ehci 1258.ehci: new USB bus registered, assigned bus number 1 exynos-ehci 1258.ehci: irq 102, io mem 0x1258 exynos-ehci 1258.ehci: USB 2.0 started, EHCI 1.00 ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ohci-exynos: OHCI EXYNOS driver ...and the onboard USB (EHCI) ethernet adapter works. Nice. The only thing I don't quite understand is the relationship between EHCI and OHCI controllers, one being at 1258 and the other at 1259000; the SoC docs (which I have not studied in detail) don't make this very clear to me - no registers listed at base address 1259? Anyway, Reviewed-by: Daniel Drake dr...@endlessm.com -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 1/4] ARM: dts: exynos4: add port sub-nodes to exynos usb host modules
On 19.06.2014 13:44, Daniel Drake wrote: On Tue, Jun 17, 2014 at 10:25 AM, Marek Szyprowski m.szyprow...@samsung.com wrote: This patch adds port sub-nodes to exynos4 ehci and ohci modules, which are required by recently merged new exynos4 usb2 phy support. Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com I checked this against the DT binding documentation for the samsung,exynos4210-ohci and samsung,exynos4210-ehci nodes, and also the usb2 phy binding docs. Looks fine. Also tested on ODROID-U2, seems to be working: Thanks for testing. ehci-exynos: EHCI EXYNOS driver exynos-ehci 1258.ehci: EHCI Host Controller exynos-ehci 1258.ehci: new USB bus registered, assigned bus number 1 exynos-ehci 1258.ehci: irq 102, io mem 0x1258 exynos-ehci 1258.ehci: USB 2.0 started, EHCI 1.00 ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver ohci-exynos: OHCI EXYNOS driver ...and the onboard USB (EHCI) ethernet adapter works. Nice. The only thing I don't quite understand is the relationship between EHCI and OHCI controllers, one being at 1258 and the other at 1259000; the SoC docs (which I have not studied in detail) don't make this very clear to me - no registers listed at base address 1259? Anyway, Well, that's exactly the same relationship as on PCs, where you have both EHCI and UHCI/OHCI and depending on what kind of device you connect the proper controller will pick it up. AFAIK the base address is good, but I believe it was already tested anyway. Best regards, Tomasz -- To unsubscribe from this list: send the line unsubscribe linux-samsung-soc in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
[PATCH 1/4] ARM: dts: exynos4: add port sub-nodes to exynos usb host modules
This patch adds port sub-nodes to exynos4 ehci and ohci modules, which
are required by recently merged new exynos4 usb2 phy support.
Signed-off-by: Marek Szyprowski m.szyprow...@samsung.com
---
arch/arm/boot/dts/exynos4.dtsi | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index b8ece4be41ca..c91284441694 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -322,6 +322,23 @@
clocks = clock CLK_USB_HOST;
clock-names = usbhost;
status = disabled;
+ #address-cells = 1;
+ #size-cells = 0;
+ port@0 {
+ reg = 0;
+ phys = exynos_usbphy 1;
+ status = disabled;
+ };
+ port@1 {
+ reg = 1;
+ phys = exynos_usbphy 2;
+ status = disabled;
+ };
+ port@2 {
+ reg = 2;
+ phys = exynos_usbphy 3;
+ status = disabled;
+ };
};
ohci@1259 {
@@ -331,6 +348,13 @@
clocks = clock CLK_USB_HOST;
clock-names = usbhost;
status = disabled;
+ #address-cells = 1;
+ #size-cells = 0;
+ port@0 {
+ reg = 0;
+ phys = exynos_usbphy 1;
+ status = disabled;
+ };
};
i2s1: i2s@1396 {
--
1.9.2
--
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