Re: [Mesa-dev] [PATCH] radeon/uvd: get the target buffer pitch correct for different format

[Christian König]

Am 18.08.2017 um 18:31 schrieb Leo Liu:

Signed-off-by: Leo Liu 


Reviewed-by: Christian König 


---
  src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6..dd8c0e0eb0 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1397,7 +1397,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
switch (type) {
default:
case RUVD_SURFACE_TYPE_LEGACY:
-   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x;
+   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * 
luma->blk_w;
switch (luma->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
@@ -1435,7 +1435,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
msg->body.decode.dt_surf_tile_config |= 
RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
break;
case RUVD_SURFACE_TYPE_GFX9:
-   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->bpe;
+   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * 
luma->blk_w;
/* SWIZZLE LINEAR MODE */
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;



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[Mesa-dev] [PATCH] radeon/uvd: get the target buffer pitch correct for different format

[Leo Liu]

Signed-off-by: Leo Liu 
---
 src/gallium/drivers/radeon/radeon_uvd.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c 
b/src/gallium/drivers/radeon/radeon_uvd.c
index d5352d9de6..dd8c0e0eb0 100644
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -1397,7 +1397,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
switch (type) {
default:
case RUVD_SURFACE_TYPE_LEGACY:
-   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x;
+   msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * 
luma->blk_w;
switch (luma->u.legacy.level[0].mode) {
case RADEON_SURF_MODE_LINEAR_ALIGNED:
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
@@ -1435,7 +1435,7 @@ void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct 
radeon_surf *luma,
msg->body.decode.dt_surf_tile_config |= 
RUVD_MACRO_TILE_ASPECT_RATIO(macro_tile_aspect(luma->u.legacy.mtilea));
break;
case RUVD_SURFACE_TYPE_GFX9:
-   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * luma->bpe;
+   msg->body.decode.dt_pitch = luma->u.gfx9.surf_pitch * 
luma->blk_w;
/* SWIZZLE LINEAR MODE */
msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;
msg->body.decode.dt_array_mode = RUVD_ARRAY_MODE_LINEAR;
-- 
2.11.0

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