Re: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

2020-02-11 Thread Rasmus Villemoes 
On 06/02/2020 05.14, Y.b. Lu wrote:
>> -Original Message-
>> From: Peng Fan 
>> Sent: Wednesday, February 5, 2020 3:08 PM
>> To: Rasmus Villemoes ; u-boot@lists.denx.de;
>> Y.b. Lu 
>> Cc: Mario Six 
>> Subject: RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
>> mpc830x
>>
>>> Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
>> mpc830x
>>
>> + Y.b
>>
>> Are you ok with this patch?
> 
> The mpc830x is old Freescale PowerPC platforms I don't have.
> But I agree the fix-up.
> 
> Reviewed-by: Yangbo Lu 

Thanks. Any chance this could make it to master before the 2020.04 release?

Rasmus

RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

2020-02-05 Thread Y.b. Lu 
> -Original Message-
> From: Peng Fan 
> Sent: Wednesday, February 5, 2020 3:08 PM
> To: Rasmus Villemoes ; u-boot@lists.denx.de;
> Y.b. Lu 
> Cc: Mario Six 
> Subject: RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
> mpc830x
> 
> > Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on
> mpc830x
> 
> + Y.b
> 
> Are you ok with this patch?

The mpc830x is old Freescale PowerPC platforms I don't have.
But I agree the fix-up.

Reviewed-by: Yangbo Lu 

> 
> Thanks,
> Peng.
> 
> >
> > The reference manuals for MPC8308 and MPC8309 both say that the
> esdhcctl
> > aka DMA Control Register "is implemented as SDHCCR" in the System
> > configuration registers. Unfortunately, that doesn't mean that the registers
> are
> > just mirrors of each other - any write to esdhcctl is simply ignored. So to
> > actually enable cache snooping, we unfortunately have to add a little
> > ifdeffery.
> >
> > There is, naturally, no description of the bit fields of esdhcctl in the 
> > MPC8309
> > manual, but comparing the description of esdhcctl from the LS1021A
> > reference manual to the description of the sdhccr in MPC8309, one also finds
> > that the fields are bit-reversed, so the bit to set is
> > 0x0200 rather than 0x0040 - this is also what board_mmc_init()
> > uses in the two gdsys/mpc8308/ boards.
> >
> > Signed-off-by: Rasmus Villemoes 
> > ---
> >  drivers/mmc/fsl_esdhc.c | 15 +--
> >  1 file changed, 13 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> > 1e7d606cd8..34e5bd270f 100644
> > --- a/drivers/mmc/fsl_esdhc.c
> > +++ b/drivers/mmc/fsl_esdhc.c
> > @@ -577,6 +577,18 @@ static int esdhc_set_ios_common(struct
> > fsl_esdhc_priv *priv, struct mmc *mmc)
> > return 0;
> >  }
> >
> > +static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs) {
> > +#ifdef CONFIG_ARCH_MPC830X
> > +   immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> > +   sysconf83xx_t *sysconf = >sysconf;
> > +
> > +   setbits_be32(>sdhccr, 0x0200); #else
> > +   esdhc_write32(>esdhcctl, 0x0040); #endif }
> > +
> >  static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc
> *mmc)
> > {
> > struct fsl_esdhc *regs = priv->esdhc_regs; @@ -592,8 +604,7 @@ static
> > int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
> > return -ETIMEDOUT;
> > }
> >
> > -   /* Enable cache snooping */
> > -   esdhc_write32(>esdhcctl, 0x0040);
> > +   esdhc_enable_cache_snooping(regs);
> >
> > esdhc_setbits32(>sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
> >
> > --
> > 2.23.0

RE: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

2020-02-04 Thread Peng Fan 
> Subject: [PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

+ Y.b

Are you ok with this patch?

Thanks,
Peng.

> 
> The reference manuals for MPC8308 and MPC8309 both say that the esdhcctl
> aka DMA Control Register "is implemented as SDHCCR" in the System
> configuration registers. Unfortunately, that doesn't mean that the registers 
> are
> just mirrors of each other - any write to esdhcctl is simply ignored. So to
> actually enable cache snooping, we unfortunately have to add a little
> ifdeffery.
> 
> There is, naturally, no description of the bit fields of esdhcctl in the 
> MPC8309
> manual, but comparing the description of esdhcctl from the LS1021A
> reference manual to the description of the sdhccr in MPC8309, one also finds
> that the fields are bit-reversed, so the bit to set is
> 0x0200 rather than 0x0040 - this is also what board_mmc_init()
> uses in the two gdsys/mpc8308/ boards.
> 
> Signed-off-by: Rasmus Villemoes 
> ---
>  drivers/mmc/fsl_esdhc.c | 15 +--
>  1 file changed, 13 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index
> 1e7d606cd8..34e5bd270f 100644
> --- a/drivers/mmc/fsl_esdhc.c
> +++ b/drivers/mmc/fsl_esdhc.c
> @@ -577,6 +577,18 @@ static int esdhc_set_ios_common(struct
> fsl_esdhc_priv *priv, struct mmc *mmc)
>   return 0;
>  }
> 
> +static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs) {
> +#ifdef CONFIG_ARCH_MPC830X
> + immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
> + sysconf83xx_t *sysconf = >sysconf;
> +
> + setbits_be32(>sdhccr, 0x0200); #else
> + esdhc_write32(>esdhcctl, 0x0040); #endif }
> +
>  static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
> {
>   struct fsl_esdhc *regs = priv->esdhc_regs; @@ -592,8 +604,7 @@ static
> int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
>   return -ETIMEDOUT;
>   }
> 
> - /* Enable cache snooping */
> - esdhc_write32(>esdhcctl, 0x0040);
> + esdhc_enable_cache_snooping(regs);
> 
>   esdhc_setbits32(>sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
> 
> --
> 2.23.0

[PATCH] mmc: fsl_esdhc: actually enable cache snooping on mpc830x

2020-01-30 Thread Rasmus Villemoes 
The reference manuals for MPC8308 and MPC8309 both say that the
esdhcctl aka DMA Control Register "is implemented as SDHCCR" in the
System configuration registers. Unfortunately, that doesn't mean that
the registers are just mirrors of each other - any write to esdhcctl
is simply ignored. So to actually enable cache snooping, we
unfortunately have to add a little ifdeffery.

There is, naturally, no description of the bit fields of esdhcctl in
the MPC8309 manual, but comparing the description of esdhcctl from the
LS1021A reference manual to the description of the sdhccr in MPC8309,
one also finds that the fields are bit-reversed, so the bit to set is
0x0200 rather than 0x0040 - this is also what board_mmc_init()
uses in the two gdsys/mpc8308/ boards.

Signed-off-by: Rasmus Villemoes 
---
 drivers/mmc/fsl_esdhc.c | 15 +--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 1e7d606cd8..34e5bd270f 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -577,6 +577,18 @@ static int esdhc_set_ios_common(struct fsl_esdhc_priv 
*priv, struct mmc *mmc)
return 0;
 }
 
+static void esdhc_enable_cache_snooping(struct fsl_esdhc *regs)
+{
+#ifdef CONFIG_ARCH_MPC830X
+   immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
+   sysconf83xx_t *sysconf = >sysconf;
+
+   setbits_be32(>sdhccr, 0x0200);
+#else
+   esdhc_write32(>esdhcctl, 0x0040);
+#endif
+}
+
 static int esdhc_init_common(struct fsl_esdhc_priv *priv, struct mmc *mmc)
 {
struct fsl_esdhc *regs = priv->esdhc_regs;
@@ -592,8 +604,7 @@ static int esdhc_init_common(struct fsl_esdhc_priv *priv, 
struct mmc *mmc)
return -ETIMEDOUT;
}
 
-   /* Enable cache snooping */
-   esdhc_write32(>esdhcctl, 0x0040);
+   esdhc_enable_cache_snooping(regs);
 
esdhc_setbits32(>sysctl, SYSCTL_HCKEN | SYSCTL_IPGEN);
 
-- 
2.23.0