[PATCH 00/10] DC Patches Aug 23, 2021

This DC patchset brings improvements in multiple areas. In summary, we highlight: - DC version 3.2.150 - FW promotion 0.0.80 - Add missing ABM register offsets - Fix in swizzle mode mapping - Emulated sink support for freesync - Improvoments in max target bpp --- Alvin Lee (1): dr

[PATCH 08/10] drm/amd/display: Update swizzle mode enums

From: Alvin Lee [Why] Swizzle mode enum for DC_SW_VAR_R_X was existing, but not mapped correctly. [How] Update mapping and conversion for DC_SW_VAR_R_X. Reviewed-by: XiangBing Foo Reviewed-by: Martin Leung Acked-by: Qingqing Zhuo Signed-off-by: Alvin Lee Cc: sta...@vger.kernel.org

[PATCH 01/10] drm/amd/display: add missing ABM register offsets

they exist. [How] Add the missing ABM register offsets to DCN 3.02+ Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo Signed-off-by: Josip Pavic --- drivers/gpu/drm/amd/display/dc/dce/dce_abm.h | 16 .../drm/amd/display/dc/dcn302/dcn302_resource.c | 2 +- .../drm/amd/display

[PATCH 06/10] drm/amd/display: Add emulated sink support for updating FS

emulated sink when available. If both the normal and emulated sink are not available, set all freesync parameters to 0. Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo Signed-off-by: Aurabindo Pillai --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 +++ 1 file changed

[PATCH 03/10] drm/amd/display: Set min dcfclk if pipe count is 0

lue during validation if pipe count is 0 Reviewed-by: Eric Yang Acked-by: Qingqing Zhuo Signed-off-by: Michael Strauss --- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +- .../drm/amd/display/dc/dcn30/dcn30_resource.h | 7 +++ .../drm/amd/display/dc/dcn31/dcn31_resource.c | 63

[PATCH 07/10] drm/amd/display: Initialize GSP1 SDP header

From: Wyatt Wood [Why + How] Initialize GSP1 SDP header for use in DMCUB FW. Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo Signed-off-by: Wyatt Wood --- .../drm/amd/display/dc/dcn10/dcn10_stream_encoder.c| 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm

[PATCH 04/10] drm/amd/display: Use max target bpp override option

From: Roman Li [Why] Max target bpp override is an option for working around DSC issues. It is supported on DC level, but was not used in DM. [How] Use actual option value instead of 0. Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo Signed-off-by: Roman Li --- drivers/gpu/drm/amd

[PATCH 05/10] drm/amd/display: Limit max DSC target bpp for specific monitors

From: Roman Li [Why] Some monitors exhibit corruption at 16bpp DSC. [How] - Add helpers for patching edid caps. - Use it for limiting DSC target bitrate to 15bpp for known monitors Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo Signed-off-by: Roman Li Cc: sta...@vger.kernel.org

[PATCH 02/10] drm/amd/display: Support for DMUB HPD interrupt handling

) Added DMUB HPD handling in dmub_srv_stat_get_notification(). HPD handling callback function and wake up the DMUB thread. Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo Signed-off-by: Jude Shih --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 171 +- .../gpu/drm/amd

[PATCH 10/10] drm/amd/display: 3.2.150

From: Aric Cyr This version brings along following fixes: - FW promotion 0.0.80 - Add missing ABM register offsets - Fix in swizzle mode mapping - Emulated sink support for freesync - Improvoments in max target bpp Acked-by: Qingqing Zhuo Signed-off-by: Aric Cyr --- drivers/gpu/drm/amd

[PATCH 09/10] drm/amd/display: [FW Promotion] Release 0.0.80

From: Anthony Koo - Add volatile to avoid incomplete flushing of data in rb Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo Signed-off-by: Anthony Koo --- .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 29 --- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a

[PATCH] drm/amd/display: move FPU associated DSC code to DML folder

: Harry Wentland Cc: Rodrigo Siqueira Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dml/Makefile | 3 + .../amd/display/dc/{ => dml}/dsc/qp_tables.h | 0 .../drm/amd/display/dc/dml/dsc/rc_calc_fpu.c | 287 ++ .../drm/amd/display/dc/dml/dsc/rc_calc_fp

[PATCH v2] drm/amd/display: move FPU associated DSC code to DML folder

/Makefile Cc: Anson Jacob Cc: Christian König Cc: Hersen Wu Cc: Harry Wentland Cc: Rodrigo Siqueira Signed-off-by: Qingqing Zhuo --- dc/dml/dsc/rc_calc_fpu.c | 291 ++ dc/dml/dsc/rc_calc_fpu.h | 98 ++ drivers/gpu/drm/amd/display/dc/dml

[PATCH v3] drm/amd/display: move FPU associated DSC code to DML folder

/Makefile v3: fix messed up diff. Cc: Anson Jacob Cc: Christian König Cc: Hersen Wu Cc: Harry Wentland Cc: Rodrigo Siqueira Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dml/Makefile | 3 + .../amd/display/dc/{ => dml}/dsc/qp_tables.h | 0 .../drm/amd/display/dc/dml/

[PATCH] drm/amd/display: move FPU associated DCN301 code to DML folder

[Why & How] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN301 to DML, where all FPU code should locate. Cc: Christian König Cc: Harry Wentland Cc: Rodrigo Siqueira Tested-by: Zhan Liu Signed-off-by: Qing

[PATCH 00/16] DC Patches November 22nd, 2021

This DC patchset brings improvements in multiple areas. In summary, we highlight: - DC 3.2.163 - FW promotion to 0.0.94 - Enable seamless boot for DCN301 - Improvements in bandwidth validation - Fixes in flags update, link encoder assignments, DSC, ODM combine and more Thank you, Lillian --- An

[PATCH 02/16] drm/amd/display: based on flag reset z10 function pointer

From: Charlene Liu [Why & How] Per hardware requirements, add a flag to control z10 enable/disable. Reviewed-by: Sung joon Kim Acked-by: Qingqing Zhuo Signed-off-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 + 1 file changed, 5 insertions(+) diff --g

[PATCH 01/16] drm/amd/display: Fix DPIA outbox timeout after GPU reset

er DC interrupts. Fixes: 81927e2808be ("drm/amd/display: Support for DMUB AUX") Reviewed-by: Jude Shih Acked-by: Qingqing Zhuo Signed-off-by: Nicholas Kazlauskas --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/

[PATCH 03/16] drm/amd/display: Run full global validation in dc_commit_state

y Wentland Acked-by: Qingqing Zhuo Signed-off-by: Nicholas Kazlauskas --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 19 +-- drivers/gpu/drm/amd/display/dc/core/dc.c | 13 + 2 files changed, 14 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/a

[PATCH 05/16] drm/amd/display: Set plane update flags for all planes in reset

ream index - it's a 1:1 mapping. Fixes: cdaae8371aa9 ("drm/amd/display: Handle GPU reset for DC block") Reviewed-by: Harry Wentland Acked-by: Qingqing Zhuo Signed-off-by: Nicholas Kazlauskas --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2 i

[PATCH 04/16] drm/amd/display: enable seamless boot for DCN301

From: Zhan Liu [Why] DCN301 is capable of running seamless boot if keep_stolen_vga_memory is not set. [How] Add a helper to check whether an ASIC can support seamless boot and set it based on base driver flags. Reviewed-by: Charlene Liu Acked-by: Qingqing Zhuo Signed-off-by: Zhan Liu

[PATCH 07/16] drm/amd/display: Reset link encoder assignments for GPU reset

ssignments are *not* valid when committing a state, so as a workaround it needs to be cleared before passing it back into DC. Fixes: 1a80a0d88ac5 ("drm/amd/display: Fix dynamic encoder reassignment") Reviewed-by: Harry Wentland Acked-by: Qingqing Zhuo Signed-off-by: Nicholas Kazlauskas

[PATCH 06/16] drm/amd/display: fixed an error related to 4:2:0/4:2:2 DSC

From: "Guo, Bing" [Why] OPTC_BYTES_PER_PIXEL calculation for 4:2:2 and 4:2:0 could have error. [How] Change to use following formula: OPTC_DSC_BYTES_PER_PIXEL = ceiling((chunk size * 2^28) / slice width) Reviewed-by: Wenjing Liu Acked-by: Qingqing Zhuo Signed-off-by: Bing Guo --

[PATCH 08/16] drm/amd/display: Rename dcn_validate_bandwidth to dcn10_validate_bandwidth

From: Zhan Liu [Why] Rename function name so it aligns with other resource function names being used by dcn10. [How] Rename function name for consistency. Reviewed-by: Ahmad Othman Acked-by: Qingqing Zhuo Signed-off-by: Zhan Liu --- drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c

[PATCH 09/16] drm/amd/display: retain/release at proper places in link_enc assignment

From: Sung Joon Kim [why] Need to keep track of number of references to stream pointer. [how] Call stream retain/release whenever necessary in link_enc table assignment sequence. Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo Signed-off-by: Sung Joon Kim --- drivers/gpu/drm/amd/display/dc

[PATCH 10/16] drm/amd/display: fix accidental casting enum to bool

From: Mikita Lipski [why/how] Fixing -Wint-in-bool-context Clang Build Failure Reviewed-by: Nicholas Choi Acked-by: Qingqing Zhuo Signed-off-by: Mikita Lipski --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a

[PATCH 13/16] drm/amd/display: Fix ODM combine issue with fast boot

. Reviewed-by: Dmytro Laktyushkin Acked-by: Qingqing Zhuo Signed-off-by: Danny Wang --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core

[PATCH 12/16] drm/amd/display: Fixed DSC would not PG after removing DSC stream

From: Yi-Ling Chen [WHY] Due to pass the wrong parameter down to the enable_stream_gating(), it would cause the DSC of the removing stream would not be PG. [HOW] To pass the correct parameter down th the enable_stream_gating(). Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo Signed-off-by

[PATCH 11/16] drm/amd/display: Display object info table changes

: ATOM_CONNECTOR_CAP_RECORD_TYPE, ATOM_CONNECTOR_SPEED_UPTO and ATOM_BRACKET_LAYOUT_V2_RECORD_TYPE. Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo Signed-off-by: Nevenko Stupar --- drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH 14/16] drm/amd/display: add else to avoid double destroy clk_mgr

From: Martin Leung [Why & How] when changing some code we accidentally changed else if-> if. reverting that. Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo Signed-off-by: Martin Leung --- drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 3 +-- 1 file changed, 1 insertion(+), 2 de

[PATCH 15/16] drm/amd/display: [FW Promotion] Release 0.0.94

From: Anthony Koo [Why & How] - Remove tick count definition since it can be different per HW revision Acked-by: Qingqing Zhuo Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 11 ++- 1 file changed, 2 insertions(+), 9 deletions(-) diff --g

[PATCH 16/16] drm/amd/display: 3.2.163

From: Aric Cyr This version brings along the following: - FW promotion to 0.0.94 - Enable seamless boot for DCN301 - Improvements in bandwidth validation - Fixes in flags update, link encoder assignments, DSC, ODM combine and more Acked-by: Qingqing Zhuo Signed-off-by: Aric Cyr --- drivers

[PATCH 00/21] DC Patches April 5, 2021

edge based on master's vsync Nicholas Kazlauskas (1): drm/amd/display: Cleanup DML DSC input bpc validation Qingqing Zhuo (1): drm/amd/display: Add missing mask for DCN3 Robin Singh (1): drm/amd/display: add NULL check to avoid kernel crash in DC. Victor Lu (1): drm/amd/display

[PATCH 02/21] drm/amd/display: Retry getting PSR state if command times out

From: Wyatt Wood [Why] GPINT command to get PSR state from FW times out. [How] Add retry to get valid PSR state. Signed-off-by: Wyatt Wood Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc_types.h | 3 +- drivers/gpu/drm/amd/display/dc/dce

[PATCH 01/21] drm/amd/display: Fix 32 bit compilation of dmub_srv.c

From: Anson Jacob [Why/How] Fix cast from pointer to integer of different size error from dmub/src/dmub_srv.c Signed-off-by: Anson Jacob Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 03/21] drm/amd/display: Add delay in dmub_srv_send_gpint_command

Wyatt Wood Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c index e36e89157703..1cbb125b4

[PATCH 04/21] drm/amd/display: use MST downstream AUX to dump DPRX CRCs

From: "David (Dingchen) Zhang" [why] In MST setup, we'd use MST downstream AUX to dump the DPRX CRCs from sink device. [how] Assign the mst_port->aux to read DPCD registers. Signed-off-by: David (Dingchen) Zhang Reviewed-by: Harry Wentland Acked-by: Qingqing

[PATCH 05/21] drm/amd/display: add NULL check to avoid kernel crash in DC.

pipe_ctx->plane_state occurs and result in kernel crash. We need to avoid that. [how] add pointer check for the dc_plane_state of the pipe context in the call of committing planes for stream in DC component. Signed-off-by: Robin Singh Reviewed-by: Harry Wentland Acked-by: Qingqing Zhuo --- driv

[PATCH 06/21] drm/amd/display: Move vupdate keepout programming from DCN20 to DCN10

From: Leo Li [Why] The OTG_VUPDATE_KEEPOUT register and fields is available on DCN10, and named the same in DCN20. [How] Move register definition and programming function to dcn10 optc. There is no functional change. Signed-off-by: Leo Li Reviewed-by: Harry Wentland Acked-by: Qingqing

[PATCH 08/21] drm/amd/display: Added dc_edp_id_count to dc_context

From: Jake Wang [Why] We need to keep track of the number of eDP links to properly enumerate edp panel control instance. [How] Added dc_edp_id_count to dc_context to keep track of number of eDP links. Signed-off-by: Jake Wang Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo

[PATCH 09/21] drm/amd/display: Add debug prints for SMU messages

From: Harry Wentland [Why&How] Add debug prints for SMU messages with regard to versions, clocks, and more. Signed-off-by: Harry Wentland Reviewed-by: Harry Wentland Reviewed-by: Robin Singh Acked-by: Qingqing Zhuo --- .../display/dc/clk_mgr/dcn301/dcn301_smu.c

[PATCH 07/21] drm/amd/display: Add debugfs entry for LTTPR register status

From: Aurabindo Pillai [Why] Functionality of LTTPR is reporter through the DPCD register [How] Expose a interface in debugfs to read the current status of LTTPR as reported from the device's DPCD register Signed-off-by: Aurabindo Pillai Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing

[PATCH 10/21] drm/amd/display: Add dc_debug flag to disable min fclk

From: Harry Wentland [Why&How] Add debug flag for an option to disable min fclk. Signed-off-by: Harry Wentland Reviewed-by: Harry Wentland Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/vg_clk_mgr.c | 4 ++-- drivers/gpu/drm/amd/display/dc/

[PATCH 12/21] drm/amd/display: Set initial value to a divider

: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c index b2b6e26f160a..29bc2874f6a7 100644 --- a/drivers/gpu/drm/amd

[PATCH 13/21] drm/amd/display: Tweak the kernel doc for crc_rd_wrk

.h:398: warning: Incorrect use of kernel-doc format: * @crc_rd_wrk [How] Tweak the kernel doc for crc_rd_wrk. Signed-off-by: Wayne Lin Reviewed-by: Rodrigo Siqueira Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 2 +- 1 file changed, 1 insertion(+), 1 de

[PATCH 16/21] drm/amd/display: Add MST capability to trigger_hotplug interface

t DPCD 600h power states to 2(power down mode)before disable MST topology. Signed-off-by: Mikita Lipski Reviewed-by: Mikita Lipski Reviewed-by: Sun peng Li Acked-by: Qingqing Zhuo --- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 71 ++- 1 file changed, 70 inser

[PATCH 17/21] drm/amd/display: Determine synchronization edge based on master's vsync

onization edge: Negative - Falling Edge Positive - Rising Edge Signed-off-by: Mikita Lipski Reviewed-by: Mikita Lipski Reviewed-by: Sun peng Li Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +

[PATCH 18/21] drm/amd/display: Fixed corruption on 4K tvs

: Harry VanZyllDeJong Reviewed-by: Tony Cheng Acked-by: Anthony Koo Acked-by: Jun Lei Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/modules/freesync

[PATCH 11/21] drm/amd/display: Add function and debugfs to dump DCC_EN bit

: Victor Lu Reviewed-by: Harry Wentland Acked-by: Qingqing Zhuo --- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 66 +++ .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 16 + .../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 4 +- .../gpu/drm/amd/display/dc/dcn10/dcn10_init.c

[PATCH 14/21] drm/amd/display: Add missing mask for DCN3

[Why] DCN3 is not reusing DCN1 mask_sh_list, causing SURFACE_FLIP_INT_MASK missing in the mapping. [How] Add the corresponding entry to DCN3 list. Signed-off-by: Qingqing Zhuo Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hubp.h | 1

[PATCH 15/21] drm/amd/display: Directly retrain link from debugfs

From: Mikita Lipski [why/how] Skip logic that sets preffered link settings and just retrain with new link_settings from Debugfs Signed-off-by: Mikita Lipski Reviewed-by: Mikita Lipski Acked-by: Harry Wentland Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm

[PATCH 19/21] drm/amd/display: Cleanup DML DSC input bpc validation

t to max. Rename output_bpc to dsc_input_bpc to reflect what the field is actually used for. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Dmytro Laktyushkin Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +- drivers/gpu/drm/amd/display/dc

[PATCH 21/21] drm/amd/display: 3.2.130

: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index cf5abcb74601..8108b82bac60 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h

[PATCH 20/21] drm/amd/display: [FW Promotion] Release 0.0.59

From: Anthony Koo [How&Why] add params to send FEC status to firmware Signed-off-by: Anthony Koo Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 17 +++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --g

[PATCH] Revert "drm/amdgpu: Ensure that the modifier requested is supported by plane."

landscape Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c| 13 - .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 18 +++--- 2 files changed, 3 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b

[PATCH 1/2] drm/amd/display: Update modifier list for gfx10_3

[Why] Current list only includes modifiers where DCC_MAX_COMPRESSED_BLOCK is set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B is also supported and used by userspace. [How] Add AMD_FMT_MOD_DCC_BLOCK_64B to modifiers with DCC supported. Signed-off-by: Qingqing Zhuo --- .../gpu

[PATCH 2/2] Revert "Revert "drm/amdgpu: Ensure that the modifier requested is supported by plane.""

This reverts commit bc3e72b3c3f20ab1583a8464e64f1a68169a28c5. The regression caused by the original patch has been cleared, thus introduce back the change. Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c| 13 + .../gpu/drm/amd/display/amdgpu_dm

[PATCH v2] drm/amd/display: Update modifier list for gfx10_3

("drm/amd/display: Expose modifiers") Signed-off-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/a

[PATCH 00/15] DC Patches May 24th, 2021

Determination Policy Jake Wang (1): drm/amd/display: Added support for individual control for multiple back-light instances. Jimmy Kizito (2): drm/amd/display: Update DP link configuration. drm/amd/display: Expand DP module clock recovery API. Qingqing Zhuo (1): Revert "drm/amd/di

[PATCH 01/15] drm/amd/display: Added support for individual control for multiple back-light instances.

From: Jake Wang [Why & How] Added support for individual control for multiple back-light instances. Signed-off-by: Jake Wang Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 26 +++ drivers/gpu/drm/amd/display/dc/dc_li

[PATCH 03/15] drm/amd/display: Retrieve DSC Branch Decoder Caps

meaningful when DSC decoding at a MST BU without virtual DPCD or at a DSC capable MST endpoint. Signed-off-by: Fangzhi Zuo Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 10 -- 1 file changed, 8 insertions(+), 2 deletions

[PATCH 04/15] drm/amd/display: Update DP link configuration.

From: Jimmy Kizito [Why & How] - Update application of training settings for links whose encoders are assigned dynamically. - Add functionality useful for DP link configuration to public interface. Signed-off-by: Jimmy Kizito Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- .../gpu/drm

[PATCH 08/15] drm/amd/display: Implement INBOX0 usage in driver

From: Alvin Lee [Why] Start using INBOX0 for HW Lock command [How] - Implement initial interface for INBOX0 HW lock message Signed-off-by: Alvin Lee Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 9 + drivers/gpu/drm/amd

[PATCH 07/15] drm/amd/display: Fix potential memory leak in DMUB hw_init

o need to reallocate it on suspend/resume. Signed-off-by: Lang Yu Signed-off-by: Roman Li Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/

[PATCH 06/15] drm/amd/display: Remove redundant safeguards for dmub-srv destroy()

From: Roman Li [Why] dc_dmub_srv_destroy() has internal null-check and null assignment. No need to duplicate them externally. [How] Remove redundant safeguards. Signed-off-by: Lang Yu Signed-off-by: Roman Li Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd

[PATCH 10/15] drm/amd/display: isolate 8b 10b link training sequence into its own function

From: Wenjing Liu [how] 1. move 8b 10 link trianing into its own function 2. make link status check after a link success link as part of dp transition to video idle sequence. Signed-off-by: Wenjing Liu Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/dc/core

[PATCH 05/15] drm/amd/display: Expand DP module clock recovery API.

From: Jimmy Kizito [Why & How] Add functionality useful for DP clock recovery phase of link training to public interface. Signed-off-by: Jimmy Kizito Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 79 +-- .../gpu/drm

[PATCH 12/15] drm/amd/display: Refactor SST DSC Determination Policy

From: Fangzhi Zuo [Why & How] SST dsc determination policy becomes bigger when more scenarios are introduced. Take it out to make it clean and readable. Signed-off-by: Fangzhi Zuo Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_

[PATCH 11/15] drm/amd/display: Add Log for SST DSC Determination Policy

From: Fangzhi Zuo [Why & How] To facilitate DSC debugging purpose Signed-off-by: Fangzhi Zuo Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu

[PATCH 09/15] drm/amd/display: add exit training mode and update channel coding in LT

From: Wenjing Liu [why] As recommended by DP specs, source needs to make sure DPRX exits previous LT mode before configuring new LT params Nofity what channel coding mode we will use for current link training. Signed-off-by: Wenjing Liu Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo

[PATCH 14/15] drm/amd/display: 3.2.137

Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 7da5e7a2e88d..1b923172244e 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b

[PATCH 15/15] Revert "drm/amd/display: Refactor and add visual confirm for HW Flip Queue"

This reverts commit 5791d219561cb661c991332a4f0bca6a8c8db080. Recent visual confirm changes are regressing the driver, causing a black screen on boot in some green sardine configs, or visual confirm is not updated at all. Signed-off-by: Qingqing Zhuo Acked-by: Qingqing Zhuo --- .../amd

[PATCH 13/15] drm/amd/display: fix odm scaling

ratios and recout to derrive the required offset and size. Signed-off-by: Dmytro Laktyushkin Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/dc/core/dc_resource.c | 568 +++--- drivers/gpu/drm/amd/display/dc/dc_types.h | 5 - .../drm/amd/display/dc/dcn10

[PATCH 02/15] drm/amd/display: disable desktop VRR when using older flip model

changes until a mode change. Signed-off-by: Harry VanZyllDeJong Reviewed-by: Jun Lei Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc_stream.h| 3 ++ .../amd/display/modules/freesync/freesync.c | 29 --- 2 files changed, 22 insertions(+), 10 deletions

[PATCH 5/9] drm/amd/display: Fix LFC multiplier changing erratically

ed-by: Aric Cyr Acked-by: Qingqing Zhuo --- .../amd/display/modules/freesync/freesync.c | 36 +++ 1 file changed, 29 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c ind

[PATCH 3/9] drm/amd/display: Revert regression

From: Alvin Lee [Why] Caused pipe split regression Signed-off-by: Alvin Lee Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/core/dc.c | 10 -- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 114 -- .../drm/amd/display/dc/dcn20

[PATCH 8/9] drm/amd/display: Fix EDID parsing after resume from suspend

drm_connector_update_edid_property() to fully parse EDID and update display info. Cc: sta...@vger.kernel.org Signed-off-by: Stylon Wang Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 + 1 file changed, 1 insertion(+) diff --git a

[PATCH 9/9] drm/amd/display: Blank stream before destroying HDCP session

. Audio will also be muted by blanking the stream. Cc: sta...@vger.kernel.org Signed-off-by: Jaehyun Chung Reviewed-by: Alvin Lee Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd

[PATCH 4/9] drm/amd/display: mpcc black color should not be impacted by pixel encoding format

From: Xiaodong Yan [Why] The format in MPCC should be 444 [How] do not modify the mpcc black color according to pixel encoding format Signed-off-by: Xiaodong Yan Reviewed-by: Eric Yang Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 8 1

[PATCH 0/9] DC Patches August 10th, 2020

This DC patchset brings improvements in multiple areas. In summary, we highlight: * Fixes on LFC, pipe split, register mapping and others. * Code clean-up. Alvin Lee (2): drm/amd/display: Revert regression drm/amd/display: Disconnect pipe separetely when disable pipe split Anthony Koo (2):

[PATCH 7/9] drm/amd/display: Disconnect pipe separetely when disable pipe split

ent this. [How] Move MPCC disconnect into separate operation than the rest of the pipe programming. Signed-off-by: Alvin Lee Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++ .../amd/display/dc/dcn10/dcn10_hw_sequencer

[PATCH 1/9] drm/amd/display: Adjust static-ness of resource functions

future use - remove duplicate function definition Signed-off-by: Joshua Aberback Reviewed-by: Nicholas Kazlauskas Acked-by: Qingqing Zhuo --- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 1 - .../drm/amd/display/dc/dcn30/dcn30_resource.c | 27 ++- .../drm/amd/display/dc

[PATCH 6/9] drm/amd/display: Switch to immediate mode for updating infopackets

] Switch to using IMMEDIATE_UPDATE mode Signed-off-by: Anthony Koo Reviewed-by: Ashley Thomas Acked-by: Qingqing Zhuo --- .../amd/display/dc/dcn10/dcn10_stream_encoder.c | 16 .../amd/display/dc/dcn10/dcn10_stream_encoder.h | 14 ++ 2 files changed, 22 insertions

[PATCH 2/9] drm/amd/display: Fix incorrect backlight register offset for DCN

From: Aric Cyr [Why] Typo in backlight refactor inctroduced wrong register offset. [How] Change DCE to DCN register map for PWRSEQ_REF_DIV Cc: sta...@vger.kernel.org Signed-off-by: Aric Cyr Reviewed-by: Ashley Thomas Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dce

[PATCH 15/15] drm/amd/display: 3.2.104

From: Aric Cyr Signed-off-by: Aric Cyr Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index d65483483d05

[PATCH 00/15] DC Patches September 21, 2020

This DC patchset brings improvements in multiple areas. In summary, we have: * DC version 3.2.104. * DMUB Firmware release 0.0.34. * Improve on HDMI fallback mechanism. * Enable DP YCbCr420 mode support for DCN10 ASICs. * Bug fixes for backlight, ODM, eDP and others. -- Anthony Koo (2): dr

[PATCH 11/15] drm/amd/display: Implement PSR wait for enable/disable

From: Wyatt Wood [Why] For DMUB implementation of PSR, the 'wait' parameter, used to determine if driver should wait for PSR enable/disable, is not implemented correctly. [How] Implement wait for PSR enable/disable. Signed-off-by: Wyatt Wood Reviewed-by: Anthony Koo Acked-by: Qin

[PATCH 10/15] drm/amd/display: allow DP RX to use more cr aux rd interval delay

aux rd interval logic as before. Signed-off-by: Wenjing Liu Reviewed-by: George Shen Acked-by: Qingqing Zhuo --- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 19 ++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

[PATCH 05/15] drm/amd/display: Bug in dce_is_panel_backlight_on()

From: Peikang Zhang [Why] dce_is_panel_backlight_on() will return wrong value if LVTMA_BLON_OVRD is 0 [How] When LVTMA_BLON_OVRD is 0, read LVTMA_PWRSEQ_TARGET_STATE instead Signed-off-by: Peikang Zhang Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dce

[PATCH 07/15] drm/amd/display: Fix ODM policy implementation

From: Wesley Chalmers [WHY] Only the leftmost ODM pipe should be offset when scaling. A previous code change was intended to implement this policy, but a section of code was overlooked. Signed-off-by: Wesley Chalmers Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo Cc: --- drivers/gpu/drm/amd

[PATCH 01/15] drm/amd/display: Fix incorrect backlight register offset for DCN

From: David Galiffi [Why] Typo in backlight refactor introduced wrong register offset. [How] SR(BIOS_SCRATCH_2) to NBIO_SR(BIOS_SCRATCH_2). Signed-off-by: David Galiffi Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo Cc: --- drivers/gpu/drm/amd/display/dc/dce/dce_panel_cntl.h | 2 +- 1

[PATCH 12/15] drm/amd/display: Check for flip pending before locking pipes.

potentially apply a flip on the incorrect pipe. [How] Check that any pending flips are cleared before locking any pipes to ensure flips are applied on the correct pipes. Signed-off-by: Taimur Hassan Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/core/dc.c

[PATCH 09/15] drm/amd/display: Enable DP YCbCr420 mode support for DCN10

From: Gary Li [WHY] In DCN10 when a panel with YCbCr420 capability is connected via USB-C to HDMI active dongle, no YCbCr420 option is listed in Radeon settings. [HOW] Enable DP YCbCr420 mode support for DCN10 Signed-off-by: Gary Li Reviewed-by: Eric Yang Acked-by: Qingqing Zhuo

[PATCH 08/15] drm/amd/display: Increase timeout for DP Disable

: Aric Cyr Acked-by: Qingqing Zhuo Cc: --- drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c

[PATCH 06/15] drm/amd/display: eDP intermittent black screen during PnP

From: Peikang Zhang [Why] We dont's turn off backlight before power off eDP (VDD), which is a violation of eDP specs. [How] Power off eDP backlight before power off eDP Signed-off-by: Peikang Zhang Reviewed-by: Anthony Koo Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc

[PATCH 03/15] drm/amd/display: 3.2.103

From: Aric Cyr Signed-off-by: Aric Cyr Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index d9b22d6a985a

[PATCH 04/15] drm/amd/display: Replace msleep with udelay while read edid return defer.

Reviewed-by: Wenjing Liu Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dc/dce/dce_aux.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c b/drivers/gpu/drm/amd/display/dc/dce/dce_aux.c index 743042d5905a..cdcad82765e0

[PATCH 02/15] drm/amd/display: [FW Promotion] Release 0.0.33

From: Anthony Koo Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd

[PATCH 14/15] drm/amd/display: [FW Promotion] Release 0.0.34

From: Anthony Koo [Header Changes] - Add new SCRATCH0 status bits for detecting restore state Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 11 --- 1 file changed, 8 insertions(+), 3 deletions

[PATCH 13/15] drm/amd/display: TMDS Fallback transition

mechanism. Signed-off-by: Chris Park Reviewed-by: Aric Cyr Acked-by: Qingqing Zhuo --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 13 + drivers/gpu/drm/amd/display/dc/dc_link.h| 2 ++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/amd/display

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