RKSimon wrote:
@aniplcc Are you still wanting to work on this? Otherwise I'd like to
commandeer and complete the patch to get it into trunk.
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
ping - any thoughts on this?
https://github.com/llvm/llvm-project/pull/109577
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RKSimon wrote:
@aniplcc reverse ping?
https://github.com/llvm/llvm-project/pull/94161
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109577
>From 250338c42d61cb6870015679453e726aa0342b9e Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Sun, 22 Sep 2024 15:00:03 +0100
Subject: [PATCH 1/2] [clang][x86] Add constexpr support for BMI/TBM BEXTR
intrin
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109577
This is an initial patch for constexpr handling of the BEXTR intrinsics - the
plan is to support all x86 bit manipulation intrinsics eventually (and then
SSE/AVX intrinsics), but I wanted to treat this as an in
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109405
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109405
>From 657f1c0369a2befecdca26235f231bfd9ab55e9b Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 20 Sep 2024 12:36:27 +0100
Subject: [PATCH 1/2] [clang][wasm] Replace the target integer sub saturate
intri
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109405
Remove the Intrinsic::wasm_sub_sat_signed/wasm_sub_sat_unsigned entries and
just use sub_sat_s/sub_sat_u directly
>From a2d179a10a5a0c9eb1baa7fba82ec0944622619e Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Dat
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109269
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https://github.com/llvm/llvm-project/pull/109259
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https://github.com/llvm/llvm-project/pull/109269
>From 97dd8d7e892203e6073ebab271967e743fe194fa Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 19 Sep 2024 11:37:46 +0100
Subject: [PATCH] [clang][wasm] Replace the target integer add saturate
intrinsic
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109259
Noticed while working on #109160
>From 8b909be1991bcace334149ace393cf3e679f856b Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Wed, 18 Sep 2024 22:19:19 +0100
Subject: [PATCH] [clang][wasm] Replace the targ
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From 3b9c6daf70ab26224d619f4beede2aaf94ed19bd Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109269
Noticed while working on #109160
I've left out the sub_sat intrinsics for now - not sure about the history
behind them using Intrinsic::wasm_sub_sat_* instead of Intrinsic::*sub_sat
>From 59827162bac77248118ec
RKSimon wrote:
Officially we don't guarantee target intrinsics at all - but I can add a
release note if it will help?
https://github.com/llvm/llvm-project/pull/109160
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RKSimon wrote:
@nemanjai Are you OK with the PPC changes?
https://github.com/llvm/llvm-project/pull/109160
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@@ -23,7 +23,7 @@
static __inline__ __m512i __DEFAULT_FN_ATTRS
_mm512_popcnt_epi16(__m512i __A)
{
- return (__m512i) __builtin_ia32_vpopcntw_512((__v32hi) __A);
+ return (__m512i)__builtin_elementwise_popcount((__v32hi)__A);
RKSimon wrote:
I've updated all t
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon ready_for_review
https://github.com/llvm/llvm-project/pull/109160
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From dcbe496df1ce109167e07136d2a7e8f65232f812 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/109160
>From aee207dd6246128e3f532cbf9b36f4ea9b5a1a5a Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 12 Sep 2024 10:39:26 +0100
Subject: [PATCH] [clang][powerpc][wasm][systemz][x86] Replace target vector
popc
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/109160
Now that we have the C++ `__builtin_elementwise_popcount` intrinsic (#108121) -
replace custom target intrinsics that just immediately map to Intrinsic::ctpop
so use the generic intrinsic for simplicity.
>From
https://github.com/RKSimon approved this pull request.
LGTM after @farzonl minors have been addressed - once this is committed I'm
intending to use `__builtin_elementwise_popcount` to simplify a number of C++
target intrinsics that do the same thing.
https://github.com/llvm/llvm-project/pull/1
@@ -0,0 +1,137 @@
+//===--- BuiltinsX86.td - X86 Builtin function database -*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
RKSimon wrote:
@ganeshgit @tru This looks to be a PR into main and not release/19.x ?
https://github.com/llvm/llvm-project/pull/108801
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https://github.com/RKSimon demilestoned
https://github.com/llvm/llvm-project/pull/107964
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RKSimon wrote:
@ganeshgit OK to commit?
https://github.com/llvm/llvm-project/pull/107964
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RKSimon wrote:
It would be messy, but could we not place the CK_ZNVER5 enum entry at the end
of the enum list just for 19.x and then fix the sorting in trunk?
https://github.com/llvm/llvm-project/pull/107964
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RKSimon wrote:
@ganeshgit Ignore what I said earlier about waiting for the tuning patches :)
Please can we get this committed to trunk, we'll let it brew for a few days and
then cherry pick for 19.x - if you can create PRs for the tuning changes as
soon as possible we can review them for 19.x
RKSimon wrote:
@tru This patch at the very least needs to make it for 19.x but I was hoping
we'd get some of the tuning improvements in as well - should we wait for those
PRs or just get this committed and cherry picked straight away?
https://github.com/llvm/llvm-project/pull/107964
__
@@ -505,6 +505,27 @@ void test_builtin_elementwise_log2(int i, float f, double
d, float4 v, int3 iv,
// expected-error@-1 {{1st argument must be a floating point type (was
'unsigned4' (vector of 4 'unsigned int' values))}}
}
+void test_builtin_elementwise_popcount(int i, f
https://github.com/RKSimon commented:
Please can you fix the clang-format warnings?
https://github.com/llvm/llvm-project/pull/108121
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RKSimon wrote:
I'd recommend you add it to the "C++ Language Changes" section.
https://github.com/llvm/llvm-project/pull/108121
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RKSimon wrote:
@ganeshgit Can you address the clang-format warnings please?
https://github.com/llvm/llvm-project/pull/107964
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https://github.com/RKSimon approved this pull request.
LGTM as a base patch (znver4 + extra isas) - we should hold off from cherry
picking into 19.x until we see the scope of the follow up patches.
https://github.com/llvm/llvm-project/pull/107964
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Author: Simon Pilgrim
Date: 2024-09-08T14:07:38+01:00
New Revision: 0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217
URL:
https://github.com/llvm/llvm-project/commit/0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217
DIFF:
https://github.com/llvm/llvm-project/commit/0f1bc5dbf3c51a1ee33d6037a6a169f0b0fbe217.diff
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/107075
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RKSimon wrote:
@aniplcc reverse ping
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
@philnik777 Is this part of a larger scheme covering other targets?
https://github.com/llvm/llvm-project/pull/106005
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/106766
>From a4a531a089980c602bc1e7e10e3774186b5b6268 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
---
cl
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/106766
>From 64f9eecea8e3b5cbdd53b0a6f494e1a7c9f7c781 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
---
cl
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/106766
None
>From 6567d4b48c492a054fcbbfb0f0826d32bbb29404 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Fri, 30 Aug 2024 18:34:27 +0100
Subject: [PATCH] [WIP] Add initial support for arc hyperbolic intrinsics
-
Author: Simon Pilgrim
Date: 2024-08-20T11:51:29+01:00
New Revision: 6dcce422ca06601f2b00e85cc18c745ede245ca6
URL:
https://github.com/llvm/llvm-project/commit/6dcce422ca06601f2b00e85cc18c745ede245ca6
DIFF:
https://github.com/llvm/llvm-project/commit/6dcce422ca06601f2b00e85cc18c745ede245ca6.diff
Author: Simon Pilgrim
Date: 2024-08-20T11:51:28+01:00
New Revision: 3b49d274e6f16d1c8db5f4557eb7866a4bafffa5
URL:
https://github.com/llvm/llvm-project/commit/3b49d274e6f16d1c8db5f4557eb7866a4bafffa5
DIFF:
https://github.com/llvm/llvm-project/commit/3b49d274e6f16d1c8db5f4557eb7866a4bafffa5.diff
https://github.com/RKSimon commented:
Would it be possible to split this into PRs per subproject please
(bolt/clang/lld/llvm/mlir)?
https://github.com/llvm/llvm-project/pull/102707
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@@ -3332,6 +3331,13 @@ OMPClause *Parser::ParseOpenMPClause(OpenMPDirectiveKind
DKind,
? ParseOpenMPSimpleClause(CKind, WrongDirective)
: ParseOpenMPClause(CKind, WrongDirective);
break;
+ case OMPC_num_teams:
+if (!FirstClause) {
+
@@ -0,0 +1,327 @@
+/*===-- avx10_2_512satcvtintrin.h - AVX10_2_512SATCVT intrinsics ---===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apac
RKSimon wrote:
@aniplcc reverse ping
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
GCC thread (for reference):
https://gcc.gnu.org/pipermail/gcc-patches/2024-July/657957.html
https://github.com/llvm/llvm-project/pull/99691
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@@ -159,6 +159,20 @@ AMDGPU Support
X86 Support
^^^
+- The MMX vector intrinsic functions from ``*mmintrin.h`` which
+ operate on `__m64` vectors, such as ``_mm_add_pi8``, have been
+ reimplemented to use the SSE2 instruction-set and XMM registers
+ unconditionally.
@@ -49,12 +49,10 @@ typedef __bf16 __m128bh __attribute__((__vector_size__(16),
__aligned__(16)));
#endif
/* Define the default attributes for the functions in this file. */
-#define __DEFAULT_FN_ATTRS
\
- __attribute__((_
@@ -159,6 +159,20 @@ AMDGPU Support
X86 Support
^^^
+- The MMX vector intrinsic functions from ``*mmintrin.h`` which
+ operate on `__m64` vectors, such as ``_mm_add_pi8``, have been
+ reimplemented to use the SSE2 instruction-set and XMM registers
+ unconditionally.
https://github.com/RKSimon approved this pull request.
LGTM with a couple of minors
https://github.com/llvm/llvm-project/pull/96540
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https://github.com/llvm/llvm-project/pull/96540
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@@ -43,6 +43,7 @@ typedef unsigned short __mmask16;
/* Rounding mode macros. */
#define _MM_FROUND_TO_NEAREST_INT 0x00
+#define _MM_FROUND_TIES_TO_EVEN 0x00
RKSimon wrote:
(very pedantic) but _MM_FROUND_TO_NEAREST_TIES_EVEN would more closely keep to
https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/99352
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@@ -171,14 +171,14 @@ constexpr FeatureBitset FeaturesClearwaterforest =
// Geode Processor.
constexpr FeatureBitset FeaturesGeode =
-FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA;
RKSimon wrote:
I think we should add the defin
@@ -171,14 +171,14 @@ constexpr FeatureBitset FeaturesClearwaterforest =
// Geode Processor.
constexpr FeatureBitset FeaturesGeode =
-FeatureX87 | FeatureCMPXCHG8B | FeatureMMX | Feature3DNOW | Feature3DNOWA;
RKSimon wrote:
Do we need to add a FeaturePREF
https://github.com/RKSimon deleted
https://github.com/llvm/llvm-project/pull/98505
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@@ -57594,6 +57599,86 @@ static SDValue combinePDEP(SDNode *N, SelectionDAG
&DAG,
return SDValue();
}
+// Fixup the MMX intrinsics' types: in IR they are expressed with <1 x i64>,
RKSimon wrote:
<1 x i64> makes more sense to me to avoid i64 legalization is
@@ -1301,7 +1301,7 @@ defm : Zn3WriteResXMMPair; // Key Gener
// Carry-less multiplication instructions.
defm : Zn3WriteResXMMPair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/llvm/llvm-project/pull/96246
@@ -7,7 +7,7 @@
define <2 x i32> @test_pswapdsi(<2 x i32> %a) nounwind readnone {
RKSimon wrote:
update test title
https://github.com/llvm/llvm-project/pull/96246
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@@ -1341,7 +1341,7 @@ defm : Zn4WriteResXMMPair; // Key Gener
// Carry-less multiplication instructions.
defm : Zn4WriteResXMMPair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/llvm/llvm-project/pull/96246
_
@@ -936,6 +936,24 @@ X86 Support
^^^
- Remove knl/knm specific ISA supports: AVX512PF, AVX512ER, PREFETCHWT1
+- Support has been removed for the AMD "3DNow!" instruction-set.
+ Neither modern AMD CPUs, nor any Intel CPUs implement these
+ instructions, and they were
@@ -481,7 +481,7 @@ defm WriteAESKeyGen : X86SchedWritePair;
// Key Generation.
// Carry-less multiplication instructions.
defm WriteCLMul : X86SchedWritePair;
-// EMMS/FEMMS
RKSimon wrote:
keep these - FEMMS still uses this sched class
https://github.com/l
https://github.com/RKSimon approved this pull request.
LGTM with a few minors
https://github.com/llvm/llvm-project/pull/96246
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https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/96860
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RKSimon wrote:
> > How easy would it be to add an option for this to update inline asm? I'm
> > not asking you to do this here, I just want to know if this approach would
> > make it straightforward to add in the future.
>
> Should we touch the inline asm? (GCC doesn't https://godbolt.org/z/o9
RKSimon wrote:
How easy would it be to add an option for this to update inline asm? I'm not
asking you to do this here, I just want to know if this approach would make it
straightforward to add in the future.
https://github.com/llvm/llvm-project/pull/96860
_
https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/95904
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https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/95904
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https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/97721
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@@ -749,6 +749,11 @@ def TuningUseGLMDivSqrtCosts
: SubtargetFeature<"use-glm-div-sqrt-costs", "UseGLMDivSqrtCosts", "true",
"Use Goldmont specific floating point div/sqrt costs">;
+// Starting with Redwood Cove architecture, the branch has branch taken hint
+// (i
https://github.com/RKSimon commented:
SGTM with a few minors
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
RKSimon wrote:
X86WinFixupBufferSecurityCheck.cpp
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,248 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check Call
RKSimon wrote:
Fix filename and '===// 'comment overflow
https://github.com/llvm/llvm-project/pull/95904
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@@ -48,6 +48,7 @@ set(sources
X86AvoidStoreForwardingBlocks.cpp
X86DynAllocaExpander.cpp
X86FixupSetCC.cpp
+ X86WinFixupBufferSecurityCheck.cpp
RKSimon wrote:
(style) alpha sorting
https://github.com/llvm/llvm-project/pull/95904
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RKSimon wrote:
Cheers - I'll push this (without the assert) in a moment - that shouldn't get
in the way of working out why they aren't always paired.
https://github.com/llvm/llvm-project/pull/96888
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/96888
>From 7f6614d8df9a5ed2027f90d813695bc43f1044b2 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 27 Jun 2024 11:09:32 +0100
Subject: [PATCH] [Sema] LambdaScopeForCallOperatorInstantiationRAII - fix typo
in
@@ -2834,7 +2834,7 @@ ABIArgInfo
X86_64ABIInfo::classifyRegCallStructTypeImpl(QualType Ty, unsigned &NeededInt,
unsigned &NeededSSE,
unsigned &MaxVectorWidth) const {
- auto RT = Ty->getA
Author: Simon Pilgrim
Date: 2024-06-27T13:09:48+01:00
New Revision: 4d167fb28b8c8b2e278fb09b1c435db6d6393d56
URL:
https://github.com/llvm/llvm-project/commit/4d167fb28b8c8b2e278fb09b1c435db6d6393d56
DIFF:
https://github.com/llvm/llvm-project/commit/4d167fb28b8c8b2e278fb09b1c435db6d6393d56.diff
RKSimon wrote:
It would probably explain why the typo hasn't caused regression - I'm going off
static analysis reports here, not crash reports.
https://github.com/llvm/llvm-project/pull/96888
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htt
Author: Simon Pilgrim
Date: 2024-06-27T12:29:55+01:00
New Revision: 286955caa32b5b9fd959176c85ffb925e8093a0d
URL:
https://github.com/llvm/llvm-project/commit/286955caa32b5b9fd959176c85ffb925e8093a0d
DIFF:
https://github.com/llvm/llvm-project/commit/286955caa32b5b9fd959176c85ffb925e8093a0d.diff
@@ -82,6 +94,8 @@ define void @tailcall_unrelated_frame() sspreq {
; LINUX-NEXT: .LBB1_2: # %CallStackCheckFailBlk
; LINUX-NEXT:.cfi_def_cfa_offset 16
; LINUX-NEXT:callq __stack_chk_fail@PLT
+
+
RKSimon wrote:
superfluous
https://github.com/llvm/llvm
@@ -114,250 +25,93 @@ return:; preds = %entry
declare void @escape(ptr)
define void @test_vla(i32 %n) nounwind ssp {
-; MSVC-X86-LABEL: test_vla:
-; MSVC-X86: # %bb.0:
-; MSVC-X86-NEXT:pushl %ebp
-; MSVC-X86-NEXT:movl %esp, %ebp
-; MSVC-X86-NEXT:pushl %ea
@@ -9,95 +9,6 @@
@"\01LC" = internal constant [11 x i8] c"buf == %s\0A\00"; [#uses=1]
define void @test(ptr %a) nounwind ssp {
-; MSVC-X86-LABEL: test:
RKSimon wrote:
where did the test checks go?
https://github.com/llvm/llvm-project/pull/95904
https://github.com/RKSimon created
https://github.com/llvm/llvm-project/pull/96888
We should be checking for a failed dyn_cast on the ParentFD result - not the
loop invariant FD root value.
Seems to have been introduced in #65193
Noticed by static analyser (I have no specific test case).
>Fr
RKSimon wrote:
> > So can we get all the mmx patches done in time for the 19.0 branch?
>
> Maybe? Depends on how the discussion on the other PR goes -- whether that
> proposal is acceptable, or if a different transition strategy is desired.
Apart from #96540 how many more patches do you envisi
@@ -21,10 +21,29 @@ typedef int __v2si __attribute__((__vector_size__(8)));
typedef short __v4hi __attribute__((__vector_size__(8)));
typedef char __v8qi __attribute__((__vector_size__(8)));
RKSimon wrote:
Add a deprecation message if SSE2 is not defined or j
@@ -614,12 +623,15 @@ _mm_shuffle_epi8(__m128i __a, __m128i __b)
///1: Clear the corresponding byte in the destination. \n
///0: Copy the selected source byte to the corresponding byte in the
///destination. \n
-///Bits [3:0] select the source byte to be copied.
RKSimon wrote:
@mahesh-attarde please can you rebase against trunk - I've cleaned up the test
checks to help with the codegen diff
https://github.com/llvm/llvm-project/pull/95904
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@@ -1825,32 +1818,32 @@ def : ProcModel;
-def : Proc<"k6-2", [FeatureX87, FeatureCX8, Feature3DNow],
+def : Proc<"k6-2", [FeatureX87, FeatureCX8, FeatureMMX],
RKSimon wrote:
I think the best we can do is add FeaturePRFCHW as well?
https://github.com/llvm/llvm-pr
Author: Simon Pilgrim
Date: 2024-06-21T17:42:00+01:00
New Revision: 35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28
URL:
https://github.com/llvm/llvm-project/commit/35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28
DIFF:
https://github.com/llvm/llvm-project/commit/35bfbb3b21e9874d03b730e8ce4eb98b1dcd2d28.diff
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