On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Only several SSPP blocks support such features as YUV output or scaling,
thus different DRM planes have different features. Properly utilizing
all planes requires the attention of the compositor, who should
prefer simpler planes to YUV-supporting
On 6/5/2024 4:32 PM, Dmitry Baryshkov wrote:
On Thu, 6 Jun 2024 at 02:19, Abhinav Kumar wrote:
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Split dpu_plane_atomic_check() function into two pieces:
dpu_plane_atomic_check_nopipe() performing generic checks on the pstate,
without
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Move a call to dpu_plane_check_inline_rotation() to the
dpu_plane_atomic_check_pipe() function, so that the rot90 constraints
are checked for both pipes. Also move rotation field from struct
dpu_plane_state to struct dpu_sw_pipe_cfg.
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Split dpu_plane_atomic_check() function into two pieces:
dpu_plane_atomic_check_nopipe() performing generic checks on the pstate,
without touching the associated pipe,
and
dpu_plane_atomic_check_pipes(), which takes into account used pipes.
ge the function to use pm_runtime_resume_and_get() and return an
> error if resume fails.
>
> [...]
Applied, thanks!
[1/1] drm/msm/dp: fix runtime_pm handling in dp_wait_hpd_asserted
https://gitlab.freedesktop.org/abhinavk/msm-next/-/commit/3e40e281afa0
Best regards,
--
Abhinav Kumar
nks!
[1/1] drm/msm/dpu: fix encoder irq wait skip
https://gitlab.freedesktop.org/abhinavk/msm-next/-/commit/8dfe802d4a7c
Best regards,
--
Abhinav Kumar
.org/abhinavk/msm-next/-/commit/6e301821c28d
Best regards,
--
Abhinav Kumar
ray_find_format(formats, format)' failed.
>
>
> [...]
Applied, thanks!
[1/1] drm/msm/dpu: drop duplicate drm formats from wb2_formats arrays
https://gitlab.freedesktop.org/abhinavk/msm-next/-/commit/3788ddf084b7
Best regards,
--
Abhinav Kumar
ent devcoredump for a7xx")
Suggested-by: Rob Clark
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.
Hi Nathan
On 6/5/2024 11:05 AM, Nathan Chancellor wrote:
Hi Abhinav,
Just a drive by style comment.
On Tue, Jun 04, 2024 at 05:38:28PM -0700, Abhinav Kumar wrote:
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
b/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
index 0a7717a4fc2f
- Fix the warnings in the commit text
- Use __attribute((__unused__)) instead of local assignment
changes in v3:
- drop the Link from the auto add
Fixes: 64d6255650d4 ("drm/msm: More fully implement devcoredump for a7xx")
Suggested-by: Rob Clark
Signed-off-by: Abhinav Kumar
- Fix the warnings in the commit text
- Use __attribute((__unused__)) instead of local assignment
Fixes: 64d6255650d4 ("drm/msm: More fully implement devcoredump for a7xx")
Suggested-by: Rob Clark
Signed-off-by: Abhinav Kumar
Link:
https://lore.kernel.org/r/20240604215105.
On 6/4/2024 4:58 PM, Dmitry Baryshkov wrote:
On Tue, Jun 04, 2024 at 02:51:04PM -0700, Abhinav Kumar wrote:
GCC diagnostic pragma method throws below warnings in some of the versions
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c:16:9: warning: unknown option after
'#pragma GCC diagnostic
es.
Fixes: 64d6255650d4 ("drm/msm: More fully implement devcoredump for a7xx")
Suggested-by: Rob Clark
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 13 -
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gp
On 6/4/2024 8:36 AM, Krzysztof Kozlowski wrote:
On 04/06/2024 17:32, Dmitry Baryshkov wrote:
On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
On 04/06/2024 17:14, Dmitry Baryshkov wrote:
I didnt follow why this is a link property. Sorry , I didnt follow the
split part.
To make patchwork happy, I am re-adding the tags this patch for
previously as they got lost.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
limits in drm_mode_config.
Hence,
Reviewed-by: Abhinav Kumar
On 6/3/2024 2:16 PM, Dmitry Baryshkov wrote:
On Mon, 3 Jun 2024 at 23:57, Abhinav Kumar wrote:
On 6/2/2024 2:39 PM, Dmitry Baryshkov wrote:
Check in _dpu_crtc_setup_lm_bounds() that CRTC width is not overflowing
LM requirements.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm
()?
Also, prior to this change, we never had a bounds check for each LM
which we should have had . Does this qualify for a Fixes tag?
With those two questions addressed,
Reviewed-by: Abhinav Kumar
{
struct dpu_crtc_state *cstate = to_dpu_crtc_state(state);
struct drm_display_mode
(-)
Reviewed-by: Abhinav Kumar
++--
1 file changed, 6 insertions(+), 6 deletions(-)
Reviewed-by: Abhinav Kumar
On 4/22/2024 5:22 AM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 07:37:44PM -0700, Abhinav Kumar wrote:
On 4/19/2024 6:34 PM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 05:14:01PM -0700, Abhinav Kumar wrote:
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote:
Move a call
end, you can fix it up while applying if no other changes
in other patches.
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 19 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 3 +++
2 files changed, 7 inserti
/dpu1/dpu_formats.h | 16 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 1 -
drivers/gpu/drm/msm/msm_kms.h | 6
4 files changed, 66 deletions(-)
Reviewed-by: Abhinav Kumar
On 4/22/2024 4:06 AM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 07:32:35PM -0700, Abhinav Kumar wrote:
On 4/19/2024 6:26 PM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 04:43:20PM -0700, Abhinav Kumar wrote:
On 3/19/2024 6:21 AM, Dmitry Baryshkov wrote:
The msm_kms_funcs
On 5/31/2024 1:16 AM, Dmitry Baryshkov wrote:
On Fri, 31 May 2024 at 04:02, Abhinav Kumar wrote:
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Max upscale / downscale factors are constant between platforms. In
preparation to adding support for virtual planes and allocating SSPP
blocks
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Max upscale / downscale factors are constant between platforms. In
preparation to adding support for virtual planes and allocating SSPP
blocks on demand move max scaling factors out of the HW catalog and
handle them in the dpu_plane directly. If
fields now.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 8
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4
2 files changed, 12 deletions(-)
Reviewed-by: Abhinav Kumar
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
In preparation for virtualized planes support, move pstate->pipe
initialization from dpu_plane_reset() to dpu_plane_atomic_check(). In
case of virtual planes the plane's pipe will not be known up to the
point of atomic_check() callback.
On 3/13/2024 5:02 PM, Dmitry Baryshkov wrote:
Use the drm_rect_fp_to_int() helper instead of using the hand-written
code.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
Reviewed-by: Abhinav
/disp/dpu1/dpu_plane.c | 12
1 file changed, 12 insertions(+)
Reviewed-by: Abhinav Kumar
On 5/29/2024 5:02 PM, Dmitry Baryshkov wrote:
On Thu, 30 May 2024 at 00:57, Abhinav Kumar wrote:
On 5/23/2024 2:58 AM, Dmitry Baryshkov wrote:
On Thu, 23 May 2024 at 02:57, Abhinav Kumar wrote:
On 5/22/2024 1:05 PM, Dmitry Baryshkov wrote:
On Wed, 22 May 2024 at 21:38, Abhinav
On 5/24/2024 1:22 PM, Dmitry Baryshkov wrote:
On Fri, May 24, 2024 at 12:58:53PM -0700, Abhinav Kumar wrote:
On 5/22/2024 3:24 AM, Dmitry Baryshkov wrote:
In the DPU driver blank IRQ handling is called from a vblank worker and
can happen outside of the irq_enable / irq_disable pair. Using
On 5/22/2024 12:59 PM, Dmitry Baryshkov wrote:
On Wed, 22 May 2024 at 21:39, Abhinav Kumar wrote:
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command-mode DSI panels need to signal the display controlller when
vsync happens, so that the device can start sending the next frame. Some
+
drivers/gpu/drm/msm/dsi/dsi_host.c| 11 +++
drivers/gpu/drm/msm/dsi/dsi_manager.c | 5 +
drivers/gpu/drm/msm/msm_drv.h | 6 ++
4 files changed, 23 insertions(+)
Reviewed-by: Abhinav Kumar
On 5/23/2024 2:58 AM, Dmitry Baryshkov wrote:
On Thu, 23 May 2024 at 02:57, Abhinav Kumar wrote:
On 5/22/2024 1:05 PM, Dmitry Baryshkov wrote:
On Wed, 22 May 2024 at 21:38, Abhinav Kumar wrote:
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command mode panels provide TE signal
On 5/29/2024 2:48 AM, Vignesh Raman wrote:
Hi Dmitry,
On 29/05/24 13:39, Dmitry Baryshkov wrote:
On Wed, May 29, 2024 at 08:10:47AM +0530, Vignesh Raman wrote:
test-list.txt and test-list-full.txt are not generated for
cross-builds and they are required by drm-ci for testing
arm32 targets.
On 5/22/2024 3:24 AM, Dmitry Baryshkov wrote:
In the DPU driver blank IRQ handling is called from a vblank worker and
can happen outside of the irq_enable / irq_disable pair. Using the
worker makes that completely asynchronous with the rest of the code.
Revert commit d13f638c9b88
Hello
On 5/24/2024 12:55 PM, Paul E. McKenney wrote:
Hello!
I get the following allmodconfig build error on x86 in next-20240523:
Traceback (most recent call last):
File "drivers/gpu/drm/msm/registers/gen_header.py", line 970, in
main()
File
ormat arrays
for rgb and yuv")
Fixes: 53324b99bd7b ("drm/msm/dpu: add writeback blocks to the sm8250
DPU catalog")
Reviewed-by: Abhinav Kumar
(pls ignore the line breaks in the fixes line, I will fix it while applying)
On 5/22/2024 1:01 PM, Dmitry Baryshkov wrote:
On Wed, 22 May 2024 at 21:41, Abhinav Kumar wrote:
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Add enum dpu_vsync_source instead of a series of defines. Use this enum
to pass vsync information.
Signed-off-by: Dmitry Baryshkov
On 5/22/2024 1:05 PM, Dmitry Baryshkov wrote:
On Wed, 22 May 2024 at 21:38, Abhinav Kumar wrote:
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command mode panels provide TE signal back to the DSI host to signal
that the frame display has completed and update of the image will not
cause
-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 5 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 5 ++---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 ++
3 files changed, 5 insertions(+), 7 deletions(-)
Reviewed-by: Abhinav Kumar
/dpu_encoder.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Abhinav Kumar
-
1 file changed, 37 deletions(-)
Reviewed-by: Abhinav Kumar
IMER_015
+enum dpu_vsync_source {
+ DPU_VSYNC_SOURCE_GPIO_0,
+ DPU_VSYNC_SOURCE_GPIO_1,
+ DPU_VSYNC_SOURCE_GPIO_2,
+ DPU_VSYNC_SOURCE_INTF_0 = 3,
Do we need this assignment to 3?
Rest LGTM,
Reviewed-by: Abhinav Kumar
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command-mode DSI panels need to signal the display controlller when
vsync happens, so that the device can start sending the next frame. Some
devices (Google Pixel 3) use a non-default pin, so additional
configuration is required. Add a way to
On 5/20/2024 5:12 AM, Dmitry Baryshkov wrote:
Command mode panels provide TE signal back to the DSI host to signal
that the frame display has completed and update of the image will not
cause tearing. Usually it is connected to the first GPIO with the
mdp_vsync function, which is the default.
faults.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/msm_kms.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers/gpu/drm/msm/msm_kms.c
index af6a6fcb1173..62c8e6163e81 100644
--- a/drivers/gpu/drm/msm/msm_kms.c
+++ b
In preparation of registering a separate fault handler for
display, lets rename the existing msm_fault_handler to
msm_gpu_fault_handler.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/msm_iommu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/msm
Introduce a new API msm_iommu_disp_new() for display use-cases.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/msm_iommu.c | 28
drivers/gpu/drm/msm/msm_mmu.h | 1 +
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers
Switch msm_kms to use msm_iommu_disp_new() so that the newly
registered fault handler will kick-in during any mmu faults.
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/msm_kms.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers
To debug display mmu faults, this series introduces a display fault
handler similar to the gpu one.
This is only compile tested at the moment, till a suitable method
to trigger the fault is found and see if this handler does the needful
on the device.
Abhinav Kumar (4):
drm/msm: register
On 5/14/2024 12:56 AM, Dmitry Baryshkov wrote:
In the DPU driver blank IRQ handling is called from a vblank worker and
can happen outside of the irq_enable / irq_disable pair. Revert commit
d13f638c9b88 ("drm/msm/dpu: drop dpu_encoder_phys_ops.atomic_mode_set")
to fix vblank IRQ assignment
(+)
Reviewed-by: Abhinav Kumar
functional change, so you could have retained by R-b, but here it is
again,
Reviewed-by: Abhinav Kumar
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index 119f3ea50a7c..cf7d769ab3b9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encod
/drm/msm/disp/dpu1/dpu_encoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
I think we also need
Fixes: 5a9d50150c2c ("drm/msm/dpu: shift IRQ indices by 1")
With that,
Reviewed-by: Abhinav Kumar
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/dr
On 5/9/2024 10:52 AM, Barnabás Czémán wrote:
CTLs on older qualcomm SOCs like msm8953 and msm8996 has not got interrupts,
so better to skip CTL irq callback register/unregister
make dpu_ctl_cfg be able to define without intr_start.
Thanks for the patch.
Have msm8953 and msm8996 migrated
== ===
Is it really optional - can you build the driver without it?
True, we cannot build the driver now without it. So we should be
dropping the optional tag.
With that addressed,
Reviewed-by: Abhinav Kumar
On 5/8/2024 3:41 PM, Doug Anderson wrote:
Hi,
On Fri, May 3, 2024 at 11:15 AM Dmitry Baryshkov
wrote:
@@ -941,6 +948,7 @@ def main():
parser = argparse.ArgumentParser()
parser.add_argument('--rnn', type=str, required=True)
parser.add_argument('--xml', type=str,
On 5/8/2024 1:43 AM, Jani Nikula wrote:
On Tue, 07 May 2024, Abhinav Kumar wrote:
Since commit 5acf49119630 ("drm/msm: import gen_header.py script from Mesa"),
compilation is broken on machines having python versions older than 3.9
due to dependency on argparse.BooleanOpti
On 5/8/2024 2:17 AM, Jon Hunter wrote:
Building the kernel with python3 versions earlier than v3.9 fails with ...
Traceback (most recent call last):
File "drivers/gpu/drm/msm/registers/gen_header.py", line 970, in
main()
File "drivers/gpu/drm/msm/registers/gen_header.py",
cf49119630 ("drm/msm: import gen_header.py script from Mesa")
Signed-off-by: Abhinav Kumar
---
drivers/gpu/drm/msm/registers/gen_header.py | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/registers/gen_header.py
b/drivers/gpu/drm/msm/registers
On 5/3/2024 5:02 PM, Dmitry Baryshkov wrote:
On Sat, 4 May 2024 at 01:38, Abhinav Kumar wrote:
On 5/3/2024 1:20 PM, Dmitry Baryshkov wrote:
On Fri, 3 May 2024 at 22:42, Abhinav Kumar wrote:
On 5/3/2024 11:15 AM, Dmitry Baryshkov wrote:
In order to validate drm/msm register
On 5/3/2024 1:20 PM, Dmitry Baryshkov wrote:
On Fri, 3 May 2024 at 22:42, Abhinav Kumar wrote:
On 5/3/2024 11:15 AM, Dmitry Baryshkov wrote:
In order to validate drm/msm register definition files against schema,
reuse the nodebugfs build step. The validation entry is guarded
On 5/3/2024 11:15 AM, Dmitry Baryshkov wrote:
In order to validate drm/msm register definition files against schema,
reuse the nodebugfs build step. The validation entry is guarded by
the EXPERT Kconfig option and we don't want to enable that option for
all the builds.
Signed-off-by: Dmitry
/gen_header.py | 14 +++---
3 files changed, 27 insertions(+), 4 deletions(-)
Looks reasonable to me, only developers need to worry about or fix the
xml files
Reviewed-by: Abhinav Kumar
changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Abhinav Kumar
/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 3 ---
1 file changed, 3 deletions(-)
Yes, I agree with this, even though I did think earlier that intf master
flush was sufficient , I cross-checked the docs and this is the right way.
Reviewed-by: Abhinav Kumar
On 4/19/2024 7:33 PM, Dmitry Baryshkov wrote:
Since commit 3c74682637e6 ("drm/msm/mdp4: move resource allocation to
the _probe function") the mdp4_kms data is allocated during probe. It is
an error to destroy it during mdp4_kms_init(), as the data is still
referenced by the drivers's data and
On 4/21/2024 3:35 PM, Dmitry Baryshkov wrote:
On Sat, Apr 20, 2024 at 04:02:00PM -0700, Abhinav Kumar wrote:
On 4/19/2024 7:33 PM, Dmitry Baryshkov wrote:
MSM display drivers provide kms structure allocated during probe().
Don't clean up priv->kms field in case of an error. Otherw
On 4/21/2024 3:35 PM, Dmitry Baryshkov wrote:
On Sat, Apr 20, 2024 at 04:02:00PM -0700, Abhinav Kumar wrote:
On 4/19/2024 7:33 PM, Dmitry Baryshkov wrote:
MSM display drivers provide kms structure allocated during probe().
Don't clean up priv->kms field in case of an error. Otherw
oder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Indeed ! I should have caught this during review :(
Reviewed-by: Abhinav Kumar
On 4/19/2024 7:33 PM, Dmitry Baryshkov wrote:
MSM display drivers provide kms structure allocated during probe().
Don't clean up priv->kms field in case of an error. Otherwise probe
functions might fail after KMS probe deferral.
So just to understand this more, this will happen when master
| 2 +
11 files changed, 571 insertions(+), 708 deletions(-)
Reviewed-by: Abhinav Kumar
| 6 +-
drivers/gpu/drm/msm/disp/mdp_format.h | 39
drivers/gpu/drm/msm/disp/mdp_kms.h | 4 +-
drivers/gpu/drm/msm/msm_drv.h | 4 --
9 files changed, 109 insertions(+), 89 deletions(-)
Reviewed-by: Abhinav Kumar
On 4/19/2024 8:06 PM, Dmitry Baryshkov wrote:
On Sat, 20 Apr 2024 at 06:05, Abhinav Kumar wrote:
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote:
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c.
Signed-off-by: Dmitry Baryshkov
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote:
Lift mode_config limits set by the DPU driver to the actual FB limits as
handled by the dpu_plane.c.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
| 3 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 4 ++--
3 files changed, 4 insertions(+), 7 deletions(-)
Reviewed-by: Abhinav Kumar
On 4/19/2024 6:34 PM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 05:14:01PM -0700, Abhinav Kumar wrote:
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote:
Move a call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported
On 4/19/2024 6:26 PM, Dmitry Baryshkov wrote:
On Fri, Apr 19, 2024 at 04:43:20PM -0700, Abhinav Kumar wrote:
On 3/19/2024 6:21 AM, Dmitry Baryshkov wrote:
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.
Signed-off-by: Dmitry Baryshkov
(layout->plane_pitch[0] << 16) &
494 0x);
495 ystride1 = (ystride1 & 0x) |
496 ((layout->plane_pitch[2] << 16) &
497 0x);
498 }
Seems correct, but was just curious
Reviewed-by: Abhinav Kumar
On 3/19/2024 6:22 AM, Dmitry Baryshkov wrote:
Move a call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early as
possible.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12
+++---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.h| 8 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 12 --
4 files changed, 45 insertions(+), 27 deletions(-)
Reviewed-by: Abhinav Kumar
| 19 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 3 +++
2 files changed, 7 insertions(+), 15 deletions(-)
Reviewed-by: Abhinav Kumar
On 3/19/2024 6:21 AM, Dmitry Baryshkov wrote:
The msm_kms_funcs::check_modified_format() callback is not used by the
driver. Drop it completely.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 45 -
On 4/19/2024 2:21 PM, Dmitry Baryshkov wrote:
On Sat, 20 Apr 2024 at 00:06, Abhinav Kumar wrote:
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
MDP4 and MDP5 drivers enumerate supported formats each time the plane is
created. In preparation to merger of MDP DPU format databases, define
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
MDP4 and MDP5 drivers enumerate supported formats each time the plane is
created. In preparation to merger of MDP DPU format databases, define
precise formats list, so that changes to the database do not cause the
driver to add unsupported format
On 4/10/2024 7:38 PM, Dmitry Baryshkov wrote:
On Thu, 11 Apr 2024 at 02:54, Abhinav Kumar wrote:
On 4/10/2024 2:12 PM, Dmitry Baryshkov wrote:
On Wed, Apr 10, 2024 at 01:18:42PM -0700, Abhinav Kumar wrote:
On 4/10/2024 1:16 PM, Dmitry Baryshkov wrote:
On Wed, 10 Apr 2024 at 23:00
-
drivers/gpu/drm/msm/msm_fb.c | 2 +-
drivers/gpu/drm/msm/msm_kms.h| 4
8 files changed, 4 insertions(+), 11 deletions(-)
Reviewed-by: Abhinav Kumar
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
Finally remove duplication between DPU and generic MDP code by merging
DPU format lists to the MDP format database.
Signed-off-by: Dmitry Baryshkov
---
.../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 2 +-
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
Instead of having a bool field alpha_enable, convert it to the
flag, this save space in the tables and allows us to handle all booleans
in the same way.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 12
| 12 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c | 2 +-
drivers/gpu/drm/msm/msm_drv.h | 4 ++--
4 files changed, 6 insertions(+), 14 deletions(-)
Reviewed-by: Abhinav Kumar
++---
drivers/gpu/drm/msm/msm_drv.h | 4 +-
7 files changed, 41 insertions(+), 47 deletions(-)
Reviewed-by: Abhinav Kumar
,\
- .chroma_sample = cs, \
Minor nit:
These two lines are only moving the locations of assignment so
unnecessary change?
Rest LGTM,
Reviewed-by: Abhinav Kumar
For validation, are you relying mostly on the CI here OR also other
internal
On 4/11/2024 11:41 AM, Abhinav Kumar wrote:
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
In preparation to merger of formats databases, pull format flag
definitions to msm_drv.h header, so that they are visibile to both dpu
and mdp drivers.
Signed-off-by: Dmitry Baryshkov
---
drivers
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
In preparation to merger of formats databases, pull format flag
definitions to msm_drv.h header, so that they are visibile to both dpu
and mdp drivers.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 98
On 4/10/2024 2:12 PM, Dmitry Baryshkov wrote:
On Wed, Apr 10, 2024 at 01:18:42PM -0700, Abhinav Kumar wrote:
On 4/10/2024 1:16 PM, Dmitry Baryshkov wrote:
On Wed, 10 Apr 2024 at 23:00, Abhinav Kumar wrote:
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
Instead of having DPU-specific
/drm/msm/disp/dpu1/dpu_hw_mdss.h | 16 +++-
2 files changed, 16 insertions(+), 18 deletions(-)
Reviewed-by: Abhinav Kumar
On 4/10/2024 1:16 PM, Dmitry Baryshkov wrote:
On Wed, 10 Apr 2024 at 23:00, Abhinav Kumar wrote:
On 12/2/2023 1:40 PM, Dmitry Baryshkov wrote:
Instead of having DPU-specific defines, switch to the definitions from
the mdp_common.xml.h file. This is the preparation for merged of DPU
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