Hi Saurabh,
On 9/18/24 21:53, Saurabh Jha wrote:
Hi Wilco,
Thanks for the patch. This mostly looks good. Just added a couple
clarifications.
On 9/18/2024 8:17 PM, Wilco Dijkstra wrote:
v2: Add more testcase fixes.
The current copysign pattern has a mismatch in the predicates and
constrain
rm_mve.h" false
+
+int32x4_t h(void *p) { return vldrwq_s32(p); }
void g(int32x4_t);
void f(int, int, int, short, int *p) {
int *bias = p;
I hope that's simple enough not to need a v2 of the patch series if
everything else is OK?
Thanks,
Christophe
On 9/16/24 11:38, Christophe Lyon wro
Alfie Richards
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vld1q_impl): Add support
for predicated version.
(vst1q_impl): Likewise.
(vstrq_impl): New class.
(vldrq_impl): New class.
(vldrbq): New.
(vldrhq
From: Alfie Richards
The tests for vst* instrinsics use functions which return a void
expression which can generate a warning. This hasn't come up previously
as the inlining presumably prevents the warning.
This change removed the uneccessary and incorrect returns.
2024-09-11 Alfie Richards
From: Alfie Richards
This patch adds the load_extending and store_truncating function bases
for MVE intrinsics.
The constructors have parameters describing the memory element
type/width which is part of the function base name (e.g. "h" in
vldrhq).
2024-09-11 Alfie Richards
gcc/
From: Alfie Richards
This patch adds the extending load shape.
It also adds/fixes comments for the load and store shapes.
2024-09-11 Alfie Richards
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc:
(load_ext): New.
* config/arm/arm
From: Alfie Richards
This patch extends
function_expander::use_contiguous_load_insn and
function_expander::use_contiguous_store_insn functions to
support predicated versions.
2024-09-11 Alfie Richards
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins.cc
From: Alfie Richards
Hi,
This patch series refactors the MVE vst and vld intrinsics to use the builtins
framework.
This is a prerequisite for a later patch which adds gimple folding which in
turn enables some optimisations that were being missed.
I have crosscompiled on an x64 machine and reg
ping?
On Tue, 30 Jul 2024 at 23:41, Christophe Lyon wrote:
>
> Hi,
>
> v4 of patch 2/2 fixes a small mistake in 3 testcases, by relaxing the
> expected q0 as result register into q[0-9]+ to account for codegen
> differences depending on if the test is compiled with
>
On 9/6/24 11:17, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-14?
Changes since v1:
- Corrected changelog entry for pac-15.c
- Added a tab before all the asm instructions in the pac-*.c and bti-*.c tests
- Corrected the expected number of bti instructions for bti-2.c as it
previou
Implement vsbcq vsbciq using the new MVE builtins framework.
We re-use most of the code introduced by the previous patches.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vadc_vsbc_impl): Add
support for vsbciq and vsbcq.
(vadciq
Factorize vadc/vsbc and vadci/vsbci so that they use the same
parameterized names.
2024-08-28 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VADCIQ_M_S, VADCIQ_M_U,
VADCIQ_U, VADCIQ_S, VADCQ_M_S, VADCQ_M_U, VADCQ_S, VADCQ_U,
VSBCIQ_M_S
Implement vadcq using the new MVE builtins framework.
We re-use most of the code introduced by the previous patch to support
vadciq: we just need to initialize carry from the input parameter.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vadcq_vsbc
Since we rewrote the implementation of vshlcq intrinsics, we no longer
need these expanders.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-builtins.cc
(arm_ternop_unone_none_unone_imm_qualifiers)
(-arm_ternop_none_none_unone_imm_qualifiers): Delete
Implement vshlc using the new MVE builtins framework.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vshlc_impl): New.
(vshlc): New.
* config/arm/arm-mve-builtins-base.def (vshlcq): New.
* config/arm/arm-mve-builtins-base.h
Implement vdwdup and viwdup using the new MVE builtins framework.
In order to share more code with viddup_impl, the patch swaps operands
1 and 2 in @mve_v[id]wdupq_m_wb_u_insn, so that the parameter
order is similar to what @mve_v[id]dupq_m_wb_u_insn uses.
2024-08-28 Christophe Lyon
This patch adds the vshlc shape description.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vshlc): New.
* config/arm/arm-mve-builtins-shapes.h (vshlc): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 44 +++
gcc
h a variable 'wrap' parameter (b)
and we need foo2 to test the overload with an immediate (1).
2024-08-28 Christophe Lyon
gcc/testsuite/
* gcc.target/arm/mve/intrinsics/vdwdupq_m_wb_u16.c: Use pointer
parameter in foo2.
* gcc.target/arm/mve/intrinsics/
.
2024-08-21 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VIWDUPQ, VDWDUPQ,
VIWDUPQ_M, VDWDUPQ_M.
(VIDWDUPQ): New iterator.
(VIDWDUPQ_M): New iterator.
* config/arm/mve.md (mve_vdwdupq_wb_u_insn)
(mve_viwdupq_wb_u_insn
t does not exist in SVE.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (long_type_suffix): New.
(half_type_suffix): New.
(struct binary_move_narrow_def): Use new helper.
(struct binary_move_narrow_unsigned_def): Likewise.
This patch adds the vidwdup shape description for vdwdup and viwdup.
It is very similar to viddup, but accounts for the additional 'wrap'
scalar parameter.
2024-08-21 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vidwdup): New.
* config/a
This patch adds the vadc_vsbc shape description.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vadc_vsbc): New.
* config/arm/arm-mve-builtins-shapes.h (vadc_vsbc): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 36
Implement vadciq using the new MVE builtins framework.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vadc_vsbc_impl): New.
(vadciq): New.
* config/arm/arm-mve-builtins-base.def (vadciq): New.
* config/arm/arm-mve-builtins
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (viddup): New.
* config/arm/arm-mve-builtins-shapes.h (viddup): New.
* config/arm/arm-mve-builtins.cc (report_not_one_of): New.
(function_checker::require_immediate_one_of): New
Like with vddup/vidup, we use code_for_mve_q_wb_u_insn, so we can drop
the expanders and their declarations as builtins, now useless.
2024-08-28 Christophe Lyon
gcc/
* config/arm/arm-builtins.cc
(arm_quinop_unone_unone_unone_unone_imm_pred_qualifiers): Delete
Factorize vddup and vidup so that they use the same parameterized
names.
This patch updates only the (define_insn
"@mve_q_u_insn") patterns and does not bother with the
(define_expand "mve_vidupq_n_u") ones, because a subsequent
patch avoids using them.
2024-08-21 Christophe
Implement vcvtaq vcvtmq vcvtnq vcvtpq using the new MVE builtins
framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vcvtaq): New.
(vcvtmq): New.
(vcvtnq): New.
(vcvtpq): New.
* config/arm/arm-mve-builtins-base.def
vddup.u16 q3, r2, #1
now:
ldr r2, [r0]
vddup.u16 q3, r2, #1
str r2, [r0]
2024-08-21 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class viddup_impl): New.
(vddup): New.
(vidup): New
We use code_for_mve_q_u_insn, rather than the expanders used by the
previous implementation, so we can remove the expanders and their
declaration as builtins.
2024-08-21 Christophe Lyon
gcc/
* config/arm/arm_mve_builtins.def (vddupq_n_u, vidupq_n_u)
(vddupq_m_n_u
Implement vctp using the new MVE builtins framework.
2024-08-21 Christophe Lyon
gcc/ChangeLog:
* config/arm/arm-mve-builtins-base.cc (class vctpq_impl): New.
(vctp16q): New.
(vctp32q): New.
(vctp64q): New.
(vctp8q): New.
* config/arm/arm-mve
nsigned we just want to check that 'imm' is
an immediate, not the optional predicates.
[1] https://gcc.gnu.org/pipermail/gcc-patches/2024-August/660262.html
2024-08-21 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix
chec
lling code_for_mve_q_XXX.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-functions.h
(unspec_based_mve_function_base): Add m_unspec_for_sint,
m_unspec_for_uint, m_unspec_for_fp and expand_unspec members.
(unspec_based_mve_function_exact_insn): Inherit
Implement vorn using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vornq): New.
* config/arm/arm-mve-builtins-base.def (vornq): New.
* config/arm/arm-mve-builtins-base.h (vornq): New.
* config/arm
Testing v[id]dup overloads with '1' as argument for uint32_t* does not
make sense: instead of choosing the '_wb' overload, we choose the
'_n', but we already do that in the '_n' tests.
This patch removes all such bogus foo2 functions.
2024-08-28
Implement vbicq using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vbicq): New.
* config/arm/arm-mve-builtins-base.def (vbicq): New.
* config/arm/arm-mve-builtins-base.h (vbicq): New.
* config
This patch adds the vcvtx shape description for vcvtaq, vcvtmq,
vcvtnq, vcvtpq.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvtx): New.
* config/arm/arm-mve-builtins-shapes.h (vcvtx): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc
Factorize vcvtq so that they use parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTQ_FROM_F_S,
VCVTQ_FROM_F_U, VCVTQ_M_FROM_F_S, VCVTQ_M_FROM_F_U,
VCVTQ_M_N_FROM_F_S, VCVTQ_M_N_FROM_F_U, VCVTQ_M_N_TO_F_S
Implement vcvtq using the new MVE builtins framework.
In config/arm/arm-mve-builtins-base.def, the patch also restores the
alphabetical order.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vcvtq_impl): New.
(vcvtq): New.
* config
Factorize vorn so that they use parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC): Add VORNQ_M_S,
VORNQ_M_U.
(MVE_FP_M_BINARY_LOGIC): Add VORNQ_M_F.
(mve_insn): Add VORNQ_M_S, VORNQ_M_U, VORNQ_M_F
This patch adds the vcvt_f16_f32 and vcvt_f32_f16 shapes descriptions.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvt_f16_f32)
(vcvt_f32_f16): New.
* config/arm/arm-mve-builtins-shapes.h (vcvt_f16_f32)
(vcvt_f32_f16): New
vcreateq have no overloaded forms, so there's no need for resolve ().
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (create_def): Remove
resolve.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 6 --
1 file changed, 6 deletions(-)
This patch adds the vcvt shape description.
It needs to add a new type_suffix_info parameter to
explicit_type_suffix_p (), because vcvt uses overloads for type
suffixes for integer to floating-point conversions, but not for
floating-point to integer.
2024-07-11 Christophe Lyon
gcc
Implement vcvtbq_f16_f32, vcvttq_f16_f32, vcvtbq_f32_f16 and
vcvttq_f32_f16 using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vcvtxq_impl): New.
(vcvtbq, vcvttq): New.
* config/arm/arm-mve-builtins
Factorize vcvtbq, vcvttq so that they use the same parameterized
names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTBQ_F16_F32,
VCVTTQ_F16_F32, VCVTBQ_F32_F16, VCVTTQ_F32_F16, VCVTBQ_M_F16_F32,
VCVTTQ_M_F16_F32
Factorize vcvtaq vcvtmq vcvtnq vcvtpq builtins so that they use the
same parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTAQ_M_S, VCVTAQ_M_U,
VCVTAQ_S, VCVTAQ_U, VCVTMQ_M_S, VCVTMQ_M_U, VCVTMQ_S, VCVTMQ_U
g_type_suffix and half_type_suffix helpers to
avoid some code duplication.
Tested on arm-eabi with
--target_board=arm-qemu{-mthumb/-mfloat-abi=hard/-march=armv8.1-m.main+mve.fp+fp.dp}
Christophe Lyon (36):
arm: [MVE intrinsics] improve comment for orrq shape
arm: [MVE intrinsics] remove useless res
Add a comment about the lack of "n" forms for floating-point nor 8-bit
integers, to make it clearer why we use build_16_32 for MODE_n.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_orrq_def): Improve
comment.
---
gcc/config/a
Hi Torbjörn,
On 9/3/24 11:30, Torbjörn SVENSSON wrote:
Ok for trunk and releases/gcc-14?
--
Some of the test cases were scanning for "bti", but it would,
incorrectly, match the ".arch_extenssion pacbti".
Also, keep test cases active if a supported Cortex-M core is supplied.
gcc/testsuite/Ch
On Wed, 14 Aug 2024 at 22:04, Torbjörn SVENSSON
wrote:
>
> Ok for trunk and releases/gcc-14?
>
> --
>
> On Cortex-M55 with fpv5-d16, the vmov.f64 instruction is used.
Hi Torbjorn,
Thanks for the patch: after looking further I realized that we can
always generate vmov.f64 with MVE, so I propose t
-mtune=cortex-m55/-mfloat-abi=hard/-mfpu=auto/-march=armv8.1-m.main+mve.fp+fp.dp
2024-08-21 Christophe Lyon
gcc/
* config/arm/vfp.md (movdi_vfp, thumb2_movdf_vfp): Handle MVE
case.
gcc/testsuite/
* gcc.target/arm/armv8_1m-fp64-move-1.c: Update expected c
On 8/19/24 10:56, Torbjörn SVENSSON wrote:
Committed as obvious in r15-3017 and r14-10602.
> --
This fixes reported regression at
https://linaro.atlassian.net/browse/GNU-1315.
Thanks.
This happens because libs/startup code are compiled with the default
short-enums scheme for the target, w
On Fri, 2 Aug 2024 at 18:14, Andre Vieira (lists)
wrote:
>
> Hi,
>
> This looks great to me, only one small suggestion, but take it or leave
> it I think it's a matter of preference.
>
> On 11/07/2024 22:42, Christophe Lyon wrote:
>
> > + /* No predica
on this series as it was not
immediately clear what the first comment implied...
Thanks
Christophe
> On 11/07/2024 22:42, Christophe Lyon wrote:
> > Add a comment about the lack of "n" forms for floating-point nor 8-bit
> > integers, to make it clearer why we use build_1
On 8/1/24 14:54, Christophe Lyon wrote:
On 8/1/24 12:02, Andre Vieira (lists) wrote:
On 01/08/2024 10:09, Christophe Lyon wrote:
It seems your attachment contains only the commit message but lacks
the actual patch?
I blame lack of coffee...
Thanks.
The patch LGTM. It seems
On 8/1/24 12:02, Andre Vieira (lists) wrote:
On 01/08/2024 10:09, Christophe Lyon wrote:
It seems your attachment contains only the commit message but lacks
the actual patch?
I blame lack of coffee...
Thanks.
The patch LGTM. It seems patchwork didn't recognize it, so Lina
Hi Andre
On 8/1/24 10:46, Andre Vieira (lists) wrote:
Hi,
This patch ensures this testcase is ran for armv8.1-m.main+mve as this
is testing that doloops with function calls that aren't intrinsics get
rejected as potential doloop targets during ivopts. For other targets
this loop gets reject
. Use
check_dec_insn to
check the validity of the candidate dec_insn.
gcc/testsuite/ChangeLog:
* gcc.targer/arm/mve/dlstp-loop-form.c: New test.
On 31/07/2024 15:15, Christophe Lyon wrote:
Because I tested with a toolchain configured for cortex-m85, which
has mve.fp en
ping for the series?
On Thu, 11 Jul 2024 at 23:43, Christophe Lyon
wrote:
>
> Add a comment about the lack of "n" forms for floating-point nor 8-bit
> integers, to make it clearer why we use build_16_32 for MODE_n.
>
> 2024-07-11 Christophe Lyon
>
>
from...
(arm_mve_dlstp_check_dec_counter): ... here. Use check_dec_insn to
check the validity of the candidate dec_insn.
gcc/testsuite/ChangeLog:
* gcc.targer/arm/mve/dlstp-loop-form.c: New test.
On 30/07/2024 21:31, Christophe Lyon wrote:
I manually tried to exercise the testcase with a cross-com
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
Tested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implement
This patch fixes a bug where the mode iterator for mve_vdup
should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64)
are not supported by MVE.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/mve.md (mve_vdup): Fix mode iterator.
---
gcc
Hi Andre,
On 7/26/24 16:05, Andre Vieira (lists) wrote:
This patch refactors and fixes an issue where
arm_mve_dlstp_check_dec_counter
was making an assumption about the form of what a candidate for a dec_insn.
I think this lacks some verb? (eg what a candidate for a dec_insn
"is" or "
0, r3
instead of the previous:
vldr.64 d6, .L5
vldr.64 d7, .L5+8
vcmp.f16 eq, q0, q3
Tested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vd
Implement vcvtaq vcvtmq vcvtnq vcvtpq using the new MVE builtins
framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vcvtaq): New.
(vcvtmq): New.
(vcvtnq): New.
(vcvtpq): New.
* config/arm/arm-mve-builtins-base.def
Implement vcvtq using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vcvtq_impl): New.
(vcvtq): New.
* config/arm/arm-mve-builtins-base.def (vcvtq): New.
* config/arm/arm-mve-builtins-base.h
This patch adds the vcvt_f16_f32 and vcvt_f32_f16 shapes descriptions.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvt_f16_f32)
(vcvt_f32_f16): New.
* config/arm/arm-mve-builtins-shapes.h (vcvt_f16_f32)
(vcvt_f32_f16): New
Factorize vcvtaq vcvtmq vcvtnq vcvtpq builtins so that they use
parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTAQ_M_S, VCVTAQ_M_U,
VCVTAQ_S, VCVTAQ_U, VCVTMQ_M_S, VCVTMQ_M_U, VCVTMQ_S, VCVTMQ_U,
VCVTNQ_M_S
Implement vorn using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vornq): New.
* config/arm/arm-mve-builtins-base.def (vornq): New.
* config/arm/arm-mve-builtins-base.h (vornq): New.
* config/arm
Factorize vcvtbq, vcvttq so that they use the same parameterized
names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTBQ_F16_F32,
VCVTTQ_F16_F32, VCVTBQ_F32_F16, VCVTTQ_F32_F16, VCVTBQ_M_F16_F32,
VCVTTQ_M_F16_F32
This patch adds the vcvtx shape description for vcvtaq, vcvtmq,
vcvtnq, vcvtpq.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (vcvtx): New.
* config/arm/arm-mve-builtins-shapes.h (vcvtx): New.
---
gcc/config/arm/arm-mve-builtins-shapes.cc
Factorize vorn so that they use the parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC): Add VORNQ_M_S,
VORNQ_M_U.
(MVE_FP_M_BINARY_LOGIC): Add VORNQ_M_F.
(mve_insn): Add VORNQ_M_S, VORNQ_M_U
Implement vbicq using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vbicq): New.
* config/arm/arm-mve-builtins-base.def (vbicq): New.
* config/arm/arm-mve-builtins-base.h (vbicq): New.
* config
_insn,
unspec_mve_function_exact_insn, unspec_mve_function_exact_insn_pred_p,
unspec_mve_function_exact_insn_vshl no longer duplicate a lot of code.
The patch also make most of PRED_m and PRED_x handling use the same
code.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-functi
This patch adds the vcvt shape description.
It needs to add a new type_suffix_info parameter to
explicit_type_suffix_p (), because vcvt uses overloads for type
suffixes for integer-> floating-point conversions, but not for
floating-point to integer.
2024-07-11 Christophe Lyon
Implement vcvtbq_f16_f32, vcvttq_f16_f32, vcvtbq_f32_f16 and
vcvttq_f32_f16 using the new MVE builtins framework.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (class vcvtxq_impl): New.
(vcvtbq, vcvttq): New.
* config/arm/arm-mve-builtins
Factorize vcvtq so that they use the parameterized names.
2024-07-11 Christophe Lyon
gcc/
* config/arm/iterators.md (mve_insn): Add VCVTQ_FROM_F_S,
VCVTQ_FROM_F_U, VCVTQ_M_FROM_F_S, VCVTQ_M_FROM_F_U,
VCVTQ_M_N_FROM_F_S, VCVTQ_M_N_FROM_F_U, VCVTQ_M_N_TO_F_S
Add a comment about the lack of "n" forms for floating-point nor 8-bit
integers, to make it clearer why we use build_16_32 for MODE_n.
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (binary_orrq_def): Improve
comment.
---
gcc/config/a
vcreateq have no overloaded forms, so there's no need for resolve ().
2024-07-11 Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-shapes.cc (create_def): Remove
resolve.
---
gcc/config/arm/arm-mve-builtins-shapes.cc | 6 --
1 file changed, 6 deletions(-)
This patch fixes a bug where the mode iterator for mve_vdup
should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64)
are not supported by MVE.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/mve.md (mve_vdup): Fix mode iterator.
---
gcc
ested on arm-linux-gnueabihf and arm-none-eabi with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl): New class.
(vdupq): Use new implementation.
* config/arm/arm.cc (arm_rtx_costs_intern
mode iterator for vdupq_n is
now MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64) are
not supported by MVE.
Tested on arm-linux-gnueabihf with no regression.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/arm-mve-builtins-base.cc (vdupq_impl)
This patch fixes a bug where the mode iterator for mve_vdup
should be MVE_VLD_ST instead of MVE_vecs: V2DI and V2DF (thus vdup.64)
are not supported by MVE.
2024-07-02 Jolen Li
Christophe Lyon
gcc/
* config/arm/mve.md (mve_vdup): Fix mode iterator.
---
gcc
Hi Evgeny,
Minor comments:
- the patch title should end with [PRn, ...] (choose the most
relevant bug number)
- ChangeLog should mention every bug with PR component/n
so that the bugzilla hooks will notice the commit.
See https://gcc.gnu.org/contribute.html#patches
(but I can do it for yo
On Wed, 26 Jun 2024 at 01:27, Iain Sandoe wrote:
>
>
>
> > On 25 Jun 2024, at 22:59, Evgeny Karpov wrote:
> >
> > The patch fixes the issue introduced in
> > https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=63512c72df09b43d56ac7680cdfd57a66d40c636
> > and reported at
> > https://gcc.gnu.org/pipermai
On Fri, 21 Jun 2024 at 15:51, Richard Sandiford
wrote:
>
> Evgeny Karpov writes:
> > Monday, June 10, 2024 7:03 PM
> > Richard Sandiford wrote:
> >
> >> Thanks for the update. Parts 1-5 look good to me. Some minor comments
> >> below about part 6:
> >>
> >> If the TARGET_DLLIMPORT_DECL_ATTRIBU
On Fri, 21 Jun 2024 at 12:14, Richard Earnshaw (lists)
wrote:
>
> On 21/06/2024 08:57, Alexandre Oliva wrote:
> > On Jun 20, 2024, Christophe Lyon wrote:
> >
> >> Maybe using
> >> if ((unsigned)b[i] >= BITS) \
> >> would be clearer?
> >
>
Hi,
On Thu, 20 Jun 2024 at 12:51, Alexandre Oliva wrote:
>
> On Jun 19, 2024, "Richard Earnshaw (lists)" wrote:
>
> > It looks like adding
>
> > if ((unsigned)b[i] >= 8*sizeof (TYPE##BITS##_t)) \
> > __builtin_unreachable(); \
>
> Ah, yes, nice, good idea, than
Hi Torbjörn!
On Thu, 6 Jun 2024 at 18:47, Torbjörn SVENSSON
wrote:
>
> I would like to push this patch to the following branches:
>
> - releases/gcc-11
> - releases/gcc-12
> - releases/gcc-13
> - releases/gcc-14
> - trunk
>
> Ok?
>
> The problem was highlighted by https://linaro.atlassian.net/bro
Hi Wilco,
On 6/3/24 15:42, Wilco Dijkstra wrote:
A Thumb-1 memory operand allows single-register LDMIA/STMIA. This doesn't get
printed as LDR/STR with writeback in unified syntax, resulting in strange
assembler errors if writeback is selected. To work around this, use the 'Uw'
constraint that
On Mon, 20 May 2024 at 15:23, Nick Clifton wrote:
>
> Hi Christophe,
>
> > I have a follow-up one: I think the same applies to binutils, but I
> > don't think any maintainer / contributor expressed an opinion, and
> > IIUC patch policy for binutils is (lightly) documented at
> > https://sourceware
Hi Alexandre,
On Thu, 23 May 2024 at 15:29, Alexandre Oliva wrote:
>
> On Apr 30, 2024, Christophe Lyon wrote:
>
> > On Tue, 30 Apr 2024 at 01:31, Alexandre Oliva wrote:
> >> >> for gcc/testsuite/ChangeLog
> >> >>
> >> >>
Thank you Mark and sorry for missing this during the reviews.
Christophe
Le dim. 12 mai 2024, 14:54, Mark Wielaard a écrit :
> The new cygming.opt.urls and mingw.opt.urls in the
> gcc/config/mingw/cygming.opt.urls directory need to generated by make
> regenerate-opt-urls in the gcc subdirector
interpreted byte-by-byte at
instruction level, see
https://developer.arm.com/documentation/101028/0012/14--M-profile-Vector-Extension--MVE--intrinsics.
This is a workaround until we change such predicates representation to
V16BImode.
2024-05-06 Christophe Lyon
Jakub Jelinek
PR
Hi,
I've just pushed this patch series, congratulations!
Thanks,
Christophe
On Thu, 11 Apr 2024 at 15:40, Evgeny Karpov wrote:
>
> Hello,
>
> Thank you for reviewing v2!
> v3 addresses all comments on v2.
>
> v3 Changes:
> - Exclude the aarch64_calling_abi declaration from the patch series.
>
On Thu, 2 May 2024 at 15:47, Gaius Mulley wrote:
>
> Simon Marchi writes:
>
> >
> > I don't have access to the gcc repo, so could you please push the patch
> > on my behalf?
>
> all done - many thanks for the patch!
>
Great, I think we now have to update autoregen.py on the buildbot so
that it s
On Thu, 2 May 2024 at 23:13, FX Coudert wrote:
>
> > libgfortran/ChangeLog:
> > * Makefile.am: Use sub-dirs, amend recipies accordingly.
> > * Makefile.in: Regenerate.
>
> Thanks Iain, I’ve tested it both with and without maintainer mode, and
> regenerated files with no issue. I can also confirm
On Tue, 30 Apr 2024 at 17:47, Simon Marchi wrote:
>
> On 4/30/24 4:54 AM, Christophe Lyon wrote:
> > On Tue, 30 Apr 2024 at 04:25, Simon Marchi wrote:
> >>
> >> Add an "AC_CONFIG_MACRO_DIRS" call in configure.ac, with the same
> >> directories
Hi Alexandre,
On Tue, 30 Apr 2024 at 01:31, Alexandre Oliva wrote:
>
> On Apr 22, 2024, Richard Biener wrote:
>
> >> Regstrapped on x86_64-linux-gnu and ppc64el-linux-gnu. Also tested with
> >> gcc-13 on ppc64-vx7r2 and ppc-vx7r2. Ok to install?
>
> > That makes sense. OK
>
> >> for gcc/test
On Tue, 30 Apr 2024 at 04:25, Simon Marchi wrote:
>
> Add an "AC_CONFIG_MACRO_DIRS" call in configure.ac, with the same
> directories as specified in "ACLOCAL_AMFLAGS", in Makefile.in.
>
> This makes it possible to re-generate aclocal.m4 using "autoreconf".
Thanks, this LGTM, although like in you
On Tue, 30 Apr 2024 at 04:01, Simon Marchi wrote:
>
> I get a diff when running "autoreconf" in this directory. I think that
> the current state is erroneous: it appears to have been generated using
>
> aclocal -I ../config -I ..
>
> even though configure.ac and Makefile.am list the include f
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