On 4/22/24 4:07 PM, 钟居哲 wrote:
Apologize that we didn't post our (me, kito and Li Pan) disscussions.
This is the story:
We found that my previous patches which support highpart register
overlap with register filter for instructions like (vwadd.wv)
cause ICE reported by:
https://gcc.gnu.org/
al Message-
From: Palmer Dabbelt
Sent: Tuesday, April 23, 2024 8:43 AM
To: juzhe.zh...@rivai.ai
Cc: Patrick O'Neill ; Li, Pan2 ; Robin
Dapp ; gcc-patches@gcc.gnu.org; Kito Cheng
Subject: Re: Re: [PATCH v1] RISC-V: Revert RVV wv instructions overlap and
xfail tests
On Mon, 22 Apr 2024 1
:20
To: Li, Pan2; Robin Dapp; gcc-patches@gcc.gnu.org
CC: juzhe.zh...@rivai.ai; kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Revert RVV wv instructions overlap and xfail
tests
Hi Pan,
I'm not sure I'm following. Did we miss something that should have been
covered? Like on
@gmail.com
Subject: Re: [PATCH v1] RISC-V: Revert RVV wv instructions overlap and xfail
tests
Hi Pan,
I'm not sure I'm following. Did we miss something that should have been
covered? Like only an overlap on the srcs but not the dest?
Are there testcases that fail? If so we should definite
Hi Pan,
I'm not sure I'm following. Did we miss something that should have been
covered? Like only an overlap on the srcs but not the dest?
Are there testcases that fail? If so we should definitely have one.
Can you give some additional information on why these reverts are needed?
+1 to the
Sure, will revert b3b2799b872 and then file the patch for the xfail tests.
Pan
-Original Message-
From: Robin Dapp
Sent: Friday, April 19, 2024 10:54 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; kito.ch...@gmail.com
Subject: Re: [PATCH v1] RI
Hi Pan,
> The RVV register overlap requires both the dest, and src operands.
> Thus the rigister filter in constraint cannot cover the fully sematics
> of the vector register overlap.
I'm not sure I'm following. Did we miss something that should have been
covered? Like only an overlap on the sr