Re: [Intel-gfx] [PATCH 3/5] drm/i915: extract and improve gen8_irq_power_well_post_enable

2014-07-15 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi rodrigo.v...@intel.com On Fri, Jul 4, 2014 at 7:50 AM, Paulo Zanoni przan...@gmail.com wrote: From: Paulo Zanoni paulo.r.zan...@intel.com Move it from hsw_power_well_post_enable() (intel_pm.c) to i915_irq.c so we can reuse the nice IRQ macros we have there. The

[Intel-gfx] [PATCH 3/5] drm/i915: extract and improve gen8_irq_power_well_post_enable

2014-07-04 Thread Paulo Zanoni
From: Paulo Zanoni paulo.r.zan...@intel.com Move it from hsw_power_well_post_enable() (intel_pm.c) to i915_irq.c so we can reuse the nice IRQ macros we have there. The main difference is that now we're going to check if the IIR register is non-zero when we try to re-enable the interrupts.