On 16/02/2018 14:42, Andy Shevchenko wrote:
On Thu, Feb 15, 2018 at 7:07 PM, John Garry wrote:
On 14/02/2018 16:16, Andy Shevchenko wrote:
+ list_for_each_entry(rentry, &resource_list, node)
+ resources[count++] = *rentry->res;
It has similarities with acpi_create_plat
On Thu, Feb 15, 2018 at 7:07 PM, John Garry wrote:
> On 14/02/2018 16:16, Andy Shevchenko wrote:
> >>> + list_for_each_entry(rentry, &resource_list, node)
> >>> + resources[count++] = *rentry->res;
>> It has similarities with acpi_create_platform_device().
>>
On 14/02/2018 16:16, Andy Shevchenko wrote:
Another approach is to use ~0UL if that is preferable.
>>> + list_for_each_entry(rentry, &resource_list, node)
>>> + resources[count++] = *rentry->res;
>> It has similarities with acpi_create_platform_device().
>> I guess we can u
On 15/02/2018 11:47, Rafael J. Wysocki wrote:
On Thu, Feb 15, 2018 at 12:19 PM, John Garry wrote:
Nothing apart from only being used by arm64 platforms today, which is
circumstantial.
I understand you need to find a place to add the:
acpi_indirect_io_scan_init()
to be called from core ACPI
On Thu, Feb 15, 2018 at 2:52 PM, John Garry wrote:
> On 15/02/2018 12:22, Andy Shevchenko wrote:
>> On Thu, Feb 15, 2018 at 1:19 PM, John Garry wrote:
>>> +static const struct acpi_device_id indirect_io_hosts[] = {
>>> +{"HISI0191", 0},/* HiSilicon LPC host */
>>> +{},
>>
>>
>> Just
On 15/02/2018 12:22, Andy Shevchenko wrote:
On Thu, Feb 15, 2018 at 1:19 PM, John Garry wrote:
Hi Andy,
+static const struct acpi_device_id indirect_io_hosts[] = {
+{"HISI0191", 0},/* HiSilicon LPC host */
+{},
Just a nit.
I noticed that I have this in the LLDD also. I thin
On Thu, Feb 15, 2018 at 12:47:25PM +0100, Rafael J. Wysocki wrote:
> On Thu, Feb 15, 2018 at 12:19 PM, John Garry wrote:
> >> Nothing apart from only being used by arm64 platforms today, which is
> >> circumstantial.
> >>
> >>>
> >>> I understand you need to find a place to add the:
> >>>
> >>> ac
On Thu, Feb 15, 2018 at 1:19 PM, John Garry wrote:
> +static const struct acpi_device_id indirect_io_hosts[] = {
> +{"HISI0191", 0},/* HiSilicon LPC host */
> +{},
Just a nit.
It seems lately this happens more often than usual, I mean a comma in
the terminator line.
If we remove it
On Thu, Feb 15, 2018 at 12:19 PM, John Garry wrote:
>> Nothing apart from only being used by arm64 platforms today, which is
>> circumstantial.
>>
>>>
>>> I understand you need to find a place to add the:
>>>
>>> acpi_indirect_io_scan_init()
>>>
>>> to be called from core ACPI code because ACPI ca
Nothing apart from only being used by arm64 platforms today, which is
circumstantial.
I understand you need to find a place to add the:
acpi_indirect_io_scan_init()
to be called from core ACPI code because ACPI can't handle probe
dependencies in any other way but other than that this patch is
On 14/02/2018 16:16, Lorenzo Pieralisi wrote:
On Wed, Feb 14, 2018 at 01:45:31AM +0800, John Garry wrote:
On some platforms (such as arm64-based hip06/hip07), access to legacy
ISA/LPC devices through access IO space is required, similar to x86
platforms. As the I/O for these devices are not memo
On Wed, Feb 14, 2018 at 5:33 PM, John Garry wrote:
> On 14/02/2018 13:53, Andy Shevchenko wrote:
>> On Tue, Feb 13, 2018 at 7:45 PM, John Garry wrote:
>>> + sys_port = logic_pio_trans_hwaddr(&host->fwnode, res->start,
>>> len);
>>> + if (sys_port == -1UL)
>> Wouldn't it be better to
On Wed, Feb 14, 2018 at 01:45:31AM +0800, John Garry wrote:
> On some platforms (such as arm64-based hip06/hip07), access to legacy
> ISA/LPC devices through access IO space is required, similar to x86
> platforms. As the I/O for these devices are not memory mapped like
> PCI/PCIE MMIO host bridges
On 14/02/2018 13:53, Andy Shevchenko wrote:
On Tue, Feb 13, 2018 at 7:45 PM, John Garry wrote:
On some platforms (such as arm64-based hip06/hip07), access to legacy
ISA/LPC devices through access IO space is required, similar to x86
platforms. As the I/O for these devices are not memory mapped
On Tue, Feb 13, 2018 at 7:45 PM, John Garry wrote:
> On some platforms (such as arm64-based hip06/hip07), access to legacy
> ISA/LPC devices through access IO space is required, similar to x86
> platforms. As the I/O for these devices are not memory mapped like
> PCI/PCIE MMIO host bridges, they r
Signed-off-by: John Garry
Signed-off-by: Zhichang Yuan
Signed-off-by: Gabriele Paoloni
Hi Rafael,
Thanks for checking again.
Just a few minor nits below.
---
drivers/acpi/arm64/Makefile | 1 +
drivers/acpi/arm64/acpi_indirectio.c | 250 +++
On Tue, Feb 13, 2018 at 6:45 PM, John Garry wrote:
> On some platforms (such as arm64-based hip06/hip07), access to legacy
> ISA/LPC devices through access IO space is required, similar to x86
> platforms. As the I/O for these devices are not memory mapped like
> PCI/PCIE MMIO host bridges, they r
On some platforms (such as arm64-based hip06/hip07), access to legacy
ISA/LPC devices through access IO space is required, similar to x86
platforms. As the I/O for these devices are not memory mapped like
PCI/PCIE MMIO host bridges, they require special low-level device
operations through some host
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