On Sun, Jan 7, 2018 at 11:47 AM, Linus Torvalds
wrote:
> On Sat, Jan 6, 2018 at 10:33 PM, Willy Tarreau wrote:
>>
>> To be fair there's overreaction on both sides. The vast majority of
>> users need to get a 100% safe system and will never notice any
>> difference.
>
> There is no such thing as
On Sun, Jan 7, 2018 at 12:12 PM, Willy Tarreau wrote:
>
> Linus, no need to explain that to me, I'm precisely trying to see how
> to disable PTI for a specific process because I face up to 45% loss in
> certain circumstances, making it a no-go. But while a few of us have
> very specific workloads
Hi Yixun,
On Sat, Jan 6, 2018 at 1:10 AM, Yixun Lan wrote:
> Describe the pinctrl info for the UART controller which is found
> in the Meson-AXG SoCs.
>
> Signed-off-by: Yixun Lan
> ---
> arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 97
> ++
> 1 file changed, 97 ins
Hi Cyrille,
On Sun, 24 Dec 2017 05:36:04 +0100
Cyrille Pitchen wrote:
> This patch has two purposes:
>
> 1 - To fix the compatible issue between the MTD and SPI sub-systems
>
> The MTD sub-system has no particular requirement about the memory areas it
> uses. Especially, ubifs is well known fo
We should not call 'edac_mc_del_mc()' if a corresponding call to
'edac_mc_add_mc()' has not been performed yet.
So here, we should go to err instead of err2 to branch at the right place
of the error handling path.
Signed-off-by: Christophe JAILLET
---
drivers/edac/mv64x60_edac.c | 2 +-
1 file
> On Jan 6, 2018, at 10:31 PM, Yafang Shao wrote:
>
> As of now, there're two sk_family are traced with sock:inet_sock_set_state,
> which are AF_INET and AF_INET6.
> So the sk_family are exposed as well.
> Then we can conveniently use it to do the filter.
>
> Both sk_family and sk_protocol are
On Sun, 7 Jan 2018, Linus Torvalds wrote:
> We need to fix the security problem, but we need to do it *without*
> these braindead arguments that performance is somehow secondary.
I surely agree, but we have gone the way of PTI without the ability of
exempting individual processes exactly for one r
On Sun, 2018-01-07 at 18:32 +, Lu, Hongjiu wrote:
>
> > What's the plan for these vs. official GCC? Is that stuff going to part of
> > GCC
> > and if so, which versions of GCC will have that?
>
> If I get positive feedbacks from kernel folks with my GCC 7 patches today, I
> will submit my pa
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:58:42 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation
Improve a size determination
drivers/misc/apds9802als.c | 8 +++-
1 file
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:42:07 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/misc/apds9802als.c | 5 ++---
1 file changed, 2 insertions(+),
From: Markus Elfring
Date: Sun, 7 Jan 2018 21:48:50 +0100
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
This issue was dete
The meltdown/spectre vulnerabilities affect several architectures and
people are asking for a common way to figure out whether a system is
affected or not.
Create
/sys/devices/system/cpu/vulnerabilites
and the files
/sys/devices/system/cpu/vulnerabilites/meltdown
/sys/devices/system/cp
As the meltdown/spectre problem affects several CPU architectures, it makes
sense to have common way to express whether a system is affected by a
particular vulnerability or not. If affected the way to express the
mitigation should be common as well.
Create /sys/devices/system/cpu/vulnerabilities
Implement the CPU vulnerabilty show functions for meltdown, spectre_v1 and
spectre_v2.
Signed-off-by: Thomas Gleixner
---
arch/x86/Kconfig |1 +
arch/x86/kernel/cpu/bugs.c | 29 +
2 files changed, 30 insertions(+)
--- a/arch/x86/Kconfig
+++ b/arch/x86
On Sun, Jan 07, 2018 at 09:57:50PM +0100, Thomas Gleixner wrote:
> As the meltdown/spectre problem affects several CPU architectures, it makes
> sense to have common way to express whether a system is affected by a
> particular vulnerability or not. If affected the way to express the
> mitigation s
On Sat, Jan 6, 2018 at 11:54 AM, Mauro Carvalho Chehab
wrote:
>
> Em Sat, 6 Jan 2018 16:04:16 +0100
> "Josef Griebichler" escreveu:
>>
>> the causing commit has been identified.
>> After reverting commit
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=4cd13c21b20
From: Markus Elfring
Date: Sun, 7 Jan 2018 22:26:44 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation
Improve a size determination
drivers/misc/fsa9480.c | 6 ++
1 file chang
From: Markus Elfring
Date: Sun, 7 Jan 2018 22:17:53 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/misc/fsa9480.c | 4 +---
1 file changed, 1 insertion(+), 3 dele
From: Markus Elfring
Date: Sun, 7 Jan 2018 22:20:19 +0100
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
This issue was dete
On Sun, 7 Jan 2018, Greg Kroah-Hartman wrote:
> > drivers/base/Kconfig |3 +++
> > drivers/base/cpu.c | 48
> >
> > include/linux/cpu.h |7 +++
> > 3 files changed, 58 insertions(+)
>
> A Documentation/ABI/ update is needed for th
From: Martin Kelly
Currently a number of Makefiles break when used with toolchains that pass
extra flags in CC and other cross-compile related variables (such as
--sysroot). Thus we get this error when we use a toolchain that puts
--sysroot in the CC var:
~/src/linux/tools$ make iio
[snip]
iio_e
On 01/07/2018 11:04 AM, Paul Gortmaker wrote:
[Re: [PATCH] tools: fix cross-compile var export] On 07/01/2018 (Sun 10:31)
Martin Kelly wrote:
[...]
With the change, we add do CC = $(CROSS_COMPILE)gcc if and only if CC is not
already set. I'm happy to add all these details to the commit descri
Implement the CPU vulnerabilty show functions for meltdown, spectre_v1 and
spectre_v2.
Signed-off-by: Thomas Gleixner
---
arch/x86/Kconfig |1 +
arch/x86/kernel/cpu/bugs.c | 29 +
2 files changed, 30 insertions(+)
--- a/arch/x86/Kconfig
+++ b/arch/x86
The meltdown/spectre vulnerabilities affect several architectures and
people are asking for a common way to figure out whether a system is
affected or not.
Create
/sys/devices/system/cpu/vulnerabilites
and the files
/sys/devices/system/cpu/vulnerabilites/meltdown
/sys/devices/system/cp
As the meltdown/spectre problem affects several CPU architectures, it makes
sense to have common way to express whether a system is affected by a
particular vulnerability or not. If affected the way to express the
mitigation should be common as well.
Create /sys/devices/system/cpu/vulnerabilities
Stefan Wahren writes:
> This reverts commit 014d6da6cb2525d7f48fb08c705cb130cc7b5f4a.
>
> The DT clean up could trigger an endless deferred probe of DWC2 USB driver
> on the Raspberry Pi 2/3. So revert the change until we fixed the probing
> issue.
Why's that? I found that I needed to enable th
Enable the use of -mindirect-branch=thunk-extern in newer GCC, and provide
the corresponding thunks. Provide assembler macros for invoking the thunks
in the same way that GCC does, from native and inline assembler.
This adds X86_FEATURE_RETPOLINE and sets it by default on all CPUs. In
some circums
Convert all indirect jumps in ftrace assembler code to use non-speculative
sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/kernel/ftrace_32.S | 6 --
arch/x86/kernel/ftrace_64.S | 8
2 files changed, 8 insertions(+)
This is a mitigation for the 'variant 2' attack described in
https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
Using GCC patches available from the hjl/indirect/gcc-7-branch/master
branch of https://github.com/hjl-tools/gcc/commits/hjl and by manually
patching
Convert all indirect jumps in hyperv inline asm code to use non-speculative
sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/include/asm/mshyperv.h | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff -
Convert indirect jumps in core 32/64bit entry assembler code to use
non-speculative sequences when CONFIG_RETPOLINE is enabled.
Don't use NOSPEC_CALL in entry_SYSCALL_64_fastpath because the return
address after the 'call' instruction must be *precisely* at the
.Lentry_SYSCALL_64_after_fastpath la
Convert all indirect jumps in crypto assembler code to use non-speculative
sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/crypto/aesni-intel_asm.S| 5 +++--
arch/x86/crypto/camellia-aesni-avx-asm_64.S | 3 ++-
arch
Convert all indirect jumps in 32bit checksum assembler code to use
non-speculative sequences when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/lib/checksum_32.S | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch
From: Andi Kleen
Convert all indirect jumps in 32bit irq inline asm code to use
non speculative sequences.
Signed-off-by: Andi Kleen
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/kernel/irq_32.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --g
Convert indirect call in Xen hypercall to use non-speculative sequence,
when CONFIG_RETPOLINE is enabled.
Signed-off-by: David Woodhouse
Acked-By: Arjan van de Ven
---
arch/x86/include/asm/xen/hypercall.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/
From: Andi Kleen
Add a noretpoline option boot to disable retpoline and patch out the
extra sequences. It cannot patch out the jumps to the thunk functions
from code generated by the compiler, but those thunks turn into a single
indirect branch now.
Signed-off-by: Andi Kleen
Signed-off-by: Davi
From: Andi Kleen
objtool's assembler nanny currently cannot deal with the code generated
by the retpoline compiler and throws hundreds of warnings, mostly
because it sees calls that don't have a symbolic target.
Exclude all the options that rely on objtool when RETPOLINE is active.
This mainly
On Sun, Jan 07, 2018 at 07:55:11PM +0100, Borislav Petkov wrote:
> > Just like you have to trust your plane's pilot eventhough you don't
> > know him personally.
>
> Funny you should make that analogy. Remember that germanwings pilot?
> People trusted him too.
>
> Now imagine if the plane had pro
On Sun, Jan 07, 2018 at 10:48:00PM +0100, Thomas Gleixner wrote:
> As the meltdown/spectre problem affects several CPU architectures, it makes
> sense to have common way to express whether a system is affected by a
> particular vulnerability or not. If affected the way to express the
> mitigation s
On Sun, Jan 07, 2018 at 10:48:01PM +0100, Thomas Gleixner wrote:
> Implement the CPU vulnerabilty show functions for meltdown, spectre_v1 and
> spectre_v2.
>
> Signed-off-by: Thomas Gleixner
Reviewed-by: Konrad Rzeszutek Wilk
Thank you!
> ---
> arch/x86/Kconfig |1 +
> arch/x86/
On Sun, 2018-01-07 at 18:32 +, Lu, Hongjiu wrote:
>
> If I get positive feedbacks from kernel folks with my GCC 7 patches today, I
> will submit my patches for GCC 8 today. After they are checked in, I will
> backport them to GCC 7/6/5/4.9.
To confirm: These seem to work for me and I've res
On Sun, Jan 7, 2018 at 2:11 PM, David Woodhouse wrote:
> This is a mitigation for the 'variant 2' attack described in
> https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
Ok, I don't love the patches, but I see nothing horribly wrong here
either, and I assume
Thomas Gleixner wrote:
> Create /sys/devices/system/cpu/vulnerabilities folder and files for
> meltdown, spectre_v1 and spectre_v2.
It is called "grep -e '^bugs' /proc/cpuinfo".
kpti is deduceable from .config and /proc/cmdline .
If people don't know what .config they are running, god bless them.
On Sun, Jan 07, 2018 at 12:17:11PM -0800, Linus Torvalds wrote:
> We need to fix the security problem, but we need to do it *without*
> these braindead arguments that performance is somehow secondary.
OK OK. At least we should have security by default and let people trade
it against performance if
Hi Miquel, Ezequiel,
On 23/12/17 05:56, Ezequiel Garcia wrote:
> On 22 December 2017 at 12:53, Miquel RAYNAL
> wrote:
>> Hello Chris,
>>
>> On Fri, 22 Dec 2017 12:19:04 +1300
>> Chris Packham wrote:
>>
>>> From: Kalyan Kinthada
>>>
>>> The Armada-370 based SoCs support arbitration between the N
Ok, we had an interesting week, and by now everybody knows why we were
merging all those odd x86 page table isolation patches without
following all of the normal release timing rules.
But rc7 itself is actually pretty calm. Yes, there were a few small
follow-up patches to the PTI code still, and y
On Sat, Jan 6, 2018 at 11:44 PM, SF Markus Elfring
wrote:
> From: Markus Elfring
> Date: Sat, 6 Jan 2018 22:34:12 +0100
>
> Two strings should be quickly put into a sequence by two function calls.
> Thus use the function "seq_puts" instead of "seq_printf".
>
> This issue was detected by using the
On Sun, Jan 7, 2018 at 5:04 PM, Minchan Kim wrote:
>> - link->next = -1 << OBJ_TAG_BITS;
>> + link->next = -1U << OBJ_TAG_BITS;
>
> -1UL?
Oh, boy, shouldn't be rather GENMASK() / GENMASK_ULL() in a way how
it's done, for example, here:
https://git.kern
I've been thinking that the problem that makes Meltdown/Spectre
possible is a synchronization problem between the use of the cache by
all running processes and invalidating the cache when switching tasks
so that the contents of the cache for a process don't exist when
switching and running to anoth
From: Colin Ian King
Use the ARRAY_SIZE macro on array __pciids to determine size of the array.
Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/scsi/bfa/bfa_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/bfa/bfa_core.c b/d
From: Colin Ian King
Use the ARRAY_SIZE macro on array buf to determine size of the array.
Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/net/ethernet/intel/ixgbe/ixgbe_x550.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethern
All zero read and write masks in the regmap config are used to signal no
special mask is needed and the bus defaults are used. In some devices
all zero read/write masks are the special mask and bus defaults should
not be used. To signal this a new variable is added.
For example SPI often sets bit
Other regmap cache types (LZO, RBtree) report back un-successful register
lookups when a value has not been previously written into the cache. This
allows regmap core to perform a real un-cached lookup to fetch the value.
The Flat type cache does not and so all read succeed reporting zero for the
r
This makes the code slightly more readable and allows for cleaner
addition of functionality in later patches.
Signed-off-by: Andrew F. Davis
---
drivers/base/regmap/regcache-flat.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/base/regmap/regcache-f
A single cache element may not always be unsigned int, use a
cache element in sizeof over hard-coding its type.
Signed-off-by: Andrew F. Davis
---
drivers/base/regmap/regcache-flat.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/base/regmap/regcache-flat.c
b/driver
On Sat, Jan 6, 2018 at 2:42 PM, Jonathan Cameron wrote:
> On Thu, 4 Jan 2018 22:06:31 +0530
>> /* Setup Register Bit Designations (AD7152_REG_CHx_SETUP) */
>> -#define AD7152_SETUP_CAPDIFF (1 << 5)
>> +#define AD7152_SETUP_CAPDIFF BIT(5)
>
> This is indeed a 1 bit field so fine.
On Saturday, January 6, 2018 4:05:41 AM CET Anson Huang wrote:
> Hi, Rafael
>
> Best Regards!
> Anson Huang
>
>
> > -Original Message-
> > From: rjwyso...@gmail.com [mailto:rjwyso...@gmail.com] On Behalf Of Rafael
> > J. Wysocki
> > Sent: 2018-01-05 8:21 PM
> > To: Anson Huang
> > Cc: l
I'm announcing the release of the 3.2.98 kernel.
All users of the 3.2 kernel series should upgrade.
The updated 3.2.y git tree can be found at:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.2.y
and can be browsed at the normal kernel.org git web browser:
On Sat, Jan 06 2018, Jonathan Corbet wrote:
> There is value in using the c:func syntax, as it will generate
> cross-references to the kerneldoc comments for those functions. In this
> case, it would appear that these comments exist, but nobody has pulled
> them into the docs yet. I took the lib
On Tue, 2 Jan 2018, Arnd Bergmann wrote:
> The CLKRUN fix caused a few harmless compile-time warnings:
>
> drivers/char/tpm/tpm_tis.c: In function 'tpm_tis_pnp_remove':
> drivers/char/tpm/tpm_tis.c:274:23: error: unused variable 'priv'
> [-Werror=unused-variable]
> drivers/char/tpm/tpm_tis.c: In
On Saturday, January 6, 2018 5:40:34 PM CET Doug Smythies wrote:
> On 2018.01.05 14:52 Rafael J. Wysocki wrote:
> > On Fri, Jan 5, 2018 at 11:14 PM, Doug Smythies
> > wrote:
>
> >> Allow use of the trace_pstate_sample trace function
> >> when the intel_pstate driver is in passive mode.
> >> Sinc
From: Colin Ian King
Use the ARRAY_SIZE macro on array cmd_priv_map to determine size of the
array. Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
drivers/net/ethernet/emulex/benet/be_cmds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ne
From: Colin Ian King
Use the ARRAY_SIZE macro on array seg6_action_table to determine size of
the array. Improvement suggested by coccinelle.
Signed-off-by: Colin Ian King
---
net/ipv6/seg6_local.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/net/ipv6/seg6_local.c b/net/
Join the Mailing List
On 01/05/2018 08:12 AM, Will Deacon wrote:
> Aliasing attacks against CPU branch predictors can allow an attacker to
> redirect speculative control flow on some CPUs and potentially divulge
> information from one context to another.
>
> This patch adds initial skeleton code behind a new Kconfig o
On Sun, Jan 07, 2018 at 09:53:19AM +0100, Thomas Zeitlhofer wrote:
> On Sun, Jan 07, 2018 at 09:17:18AM +0100, Greg Kroah-Hartman wrote:
> > On Sat, Jan 06, 2018 at 10:38:38PM +0100, Thomas Zeitlhofer wrote:
[...]
> > > While solving the previous problem, this patch also introduces new
> > > "fun a
On 2018/1/6 4:55, SF Markus Elfring wrote:
From: Markus Elfring
Date: Fri, 5 Jan 2018 21:45:04 +0100
Omit an extra message for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
Acked-by: Wenyou Yang
When more than one GP timers are used as kernel system timers and the
corresponding nodes in device-tree are marked with the same "disabled"
property, then the "attr" field of the property will be initialized
more than once as the property being added to sys file system via
__of_add_property_sysfs(
On 1/6/2018 11:33 AM, Avi Kivity wrote:
> Meltdown and Spectre mitigations focus on protecting the kernel from a
> hostile userspace. However, it's not a given that the kernel is the most
> important target in the system. It is common in server workloads that a
> single userspace application con
From: Rob Herring Sent: Saturday, January 06, 2018 12:45 AM
>To: Stefan Agner
>Cc: shawn...@kernel.org; ker...@pengutronix.de; Fabio Estevam
>; mark.rutl...@arm.com; linux-arm-
>ker...@lists.infradead.org; devicet...@vger.kernel.org; linux-
>ker...@vger.kernel.org; Andy Duan
>Subject: Re: [PATCH
Hi, Wei
On 2018年01月06日 17:51, Li Wei wrote:
This patchset adds driver support for UFS for Hi3660 SoC. It is verified on
HiKey960 board.
Usually here should list the change compared with the last change set,
to make it easier
to reviewer, who may pay more attention to the differences.
For ex
Hi. Zhangfei
Thank you, I will add it in the next patch.
-邮件原件-
发件人: zhangfei [mailto:zhangfei@linaro.org]
发送时间: 2018年1月8日 9:40
收件人: liwei (CM); robh...@kernel.org; mark.rutl...@arm.com; xuwei (O);
catalin.mari...@arm.com; will.dea...@arm.com; vinholika...@gmail.com;
j...@linux.vne
On 01/05/2018 07:50 PM, David Lechner wrote:
There is only one clock for the DA8xx MUSB device, so we don't need the
con_id, so remove it. This way we don't have to add an unnecessary
property to the device tree bindings for the clock.
Signed-off-by: David Lechner
---
superseded by https://ma
On 01/05/2018 07:53 PM, David Lechner wrote:
The ohci-da8xx device only has one clock, so a con_id is not needed, so
remove it. This way we don't have to add an unnecessary property to the
device tree bindings for the clock.
Signed-off-by: David Lechner
---
superseded by https://marc.info/?l=
Best Regards!
Anson Huang
> -Original Message-
> From: Rafael J. Wysocki [mailto:r...@rjwysocki.net]
> Sent: 2018-01-08 7:34 AM
> To: Anson Huang
> Cc: Rafael J. Wysocki ; linux-arm-
> ker...@lists.infradead.org; devicet...@vger.kernel.org; Linux PM p...@vger.kernel.org>; Linux Kernel
On (01/06/18 14:34), Michal Hocko wrote:
> > zsmalloc allocation is just one possibility; an error in
> > compressing algorithm is another one, yet is rather unlikely.
> > most likely it's OOM which can cause problems. but in any case
> > it's sort of unclear what should be done. an error can be a
From: Thomas Gleixner
Date: Sun, 7 Jan 2018 19:31:41 +0100 (CET)
> 2) Alexei's analyis is purely based on the public information of the google
>zero folks. If it would be complete and the only attack vector all fine.
>
>If not and I doubt it is, we're going to regret this decision faster
In case of error, the function syscon_node_to_regmap() returns ERR_PTR()
and never returns NULL. The NULL test in the return value check should
be replaced with IS_ERR().
Fixes: dfa3cbb83e09 ("ASoC: mediatek: modify MT2701 AFE driver to adapt mfd
device")
Signed-off-by: Wei Yongjun
---
sound/so
On Sun, Jan 07, 2018 at 11:08:24AM +0100, Thomas Gleixner wrote:
> On Sat, 6 Jan 2018, Alexei Starovoitov wrote:
> > which clearly states that bpf_tail_call() was used in the attack.
> > Yet none of the intel nor arm patches address speculation in
> > this bpf helper!
> > It means that:
> > - gpz d
On (01/05/18 15:42), Petr Mladek wrote:
>
> I am all for it. But I would postpone this removal to 4.17.
> The reason is rather ugly. 13th patch is already in arc tree.
> We would need to shuffle the patch or coordinate pull requests.
JFI, the patch is in Linus's tree as of now (d0729bc6bee797fb).
From: "Khan, Imran"
Add initial pinctrl driver to support pin configuration with
pinctrl framework for msm8998.
Signed-off-by: Imran Khan
Acked-by: Rob Herring
[bjorn: Consolidated function groups]
Signed-off-by: Bjorn Andersson
---
This was never resubmitted after my review a year ago, so f
This series converts mach-davinci to use the common clock framework.
The series works like this, the first 21 patches create new clock drivers
using the common clock framework. There are basically 3 groups of clocks -
PLL, PSC and CFGCHIP (syscon). There are six different SoCs that each have
uniqu
This adds platform-specific declarations for the PLL clocks on TI
DaVinci 365 based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/pll-dm365.c | 64 +
include/linux/clk/davinci.h | 1 +
3 files ch
This adds platform-specific declarations for the PSC clocks on TI DA850/
OMAP-L138/AM18XX SoCs.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 1 +
drivers/clk/davinci/psc-da850.c | 117
include/linux/clk/davinci.h | 1 +
3 fil
This adds a new binding for TI DA8XX USB PHY clocks. These clocks are part
of a syscon register called CFGCHIP3.
Signed-off-by: David Lechner
---
.../clock/ti/davinci/da8xx-cfgchip-usb-phy.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/de
This adds the new USB PHY clock init in mach-davinci/usb-da8xx.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/usb-da8xx.c | 84 +++
This adds the new board-specfic clock init in mach-davinci/dm644x.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
This adds platform-specific declarations for the PLL clocks on TI
DaVinci 644x based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile | 1 +
drivers/clk/davinci/pll-dm644x.c | 41
include/linux/clk/davinci.h | 1 +
3 files
This adds platform-specific declarations for the PSC clocks on TI
DaVinci 644x based systems.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile | 1 +
drivers/clk/davinci/psc-dm644x.c | 73
include/linux/clk/davinci.h | 1 +
3 files
This adds the new board-specfic clock init in mach-davinci/dm646x.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
Hi Cyrille,
Gentle ping...
BR,
Guochun
On Mon, 2017-12-18 at 09:47 +0800, Guochun Mao wrote:
> Since more and more Mediatek's SoC can use this driver to
> control spi-nor flash, functions' name with "mt8173_" is
> no longer properly. Replacing "mt8173_" with "mtk_" will
> be more accurate to des
This adds the new board-specfic clock init in mach-davinci/da850.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Some CFGCHIP* #defines are removed since they are included in the
linux/mfd/da8xx-cfgchip.h
This adds the new board-specfic clock init in mach-davinci/dm365.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
-
This adds the new board-specfic clock init in mach-davinci/dm355.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
-
This adds a new binding for multiplexer clocks that are part of the
CFGCHIPn registers on TI DA8XX-like SoCs. Currently, there are only
bindings given for the ASYNC3 clock domain, but there are additional
clock multiplexers in this syscon that could be added in the future
if needed.
Signed-off-by:
This adds the new board-specfic clock init in mach-davinci/da830.c using
the new common clock framework drivers.
The #ifdefs are needed to prevent compile errors until the entire
ARCH_DAVINCI is converted.
Also clean up the #includes since we are adding some here.
Signed-off-by: David Lechner
-
This moves the call of davinci_clk_init() from map_io to init_time for all
boards.
This is the proper place to init clocks. This is also done in preparation
for moving to the common clock framework.
dm646x is a special case because we need to handle different ref_clk rates
depending on which boar
This adds a new driver for the gate and multiplexer clocks in the
CFGCHIPn syscon registers on TI DA8XX-type SoCs.
Signed-off-by: David Lechner
---
drivers/clk/davinci/Makefile| 2 +
drivers/clk/davinci/da8xx-cfgchip.c | 203
2 files changed, 205 in
This adds a new driver for the USB PHY clocks in the CFGCHIP2 syscon
register on TI DA8XX-type SoCs.
The USB0 (USB 2.0) PHY clock is an interesting case because it calls
clk_enable() in a reentrant way. The USB 2.0 PSC only has to be enabled
temporarily while we are locking the PLL, which takes pl
Add 696MHz operating point according to datasheet
(Rev. 0, 12/2015).
Signed-off-by: Anson Huang
Reviewed-by: Fabio Estevam
---
changes since v2:
add reviewed-by.
arch/arm/boot/dts/imx6ul.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/
201 - 300 of 443 matches
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