e
<https://patchwork.kernel.org/patch/4346701/> and
<https://patchwork.kernel.org/patch/4346711/>
Signed-off-by: Doug Anderson
Tested-by: Javier Martinez Canillas
---
Changes in v2:
- Now just one patch since mfd patch landed.
- Rebased to ToT linux-next
arch/arm/boot/dts/exynos54
Andreas,
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber wrote:
> From: Andreas Färber
>
> Hello,
>
> Based on the preinstalled 3.8 based ChromeOS kernel and previous 3.15
> based attempts by Stephan and me that broke for 3.16, I've prepared a
> device tree for the HP Chromebook 11 aka Google Sp
Andreas,
Thanks for posting! A first pass on this is below...
On Sun, Jun 22, 2014 at 6:21 PM, Andreas Färber wrote:
> Adds initial support for the HP Chromebook 11.
>
> Cc: Vincent Palatin
> Cc: Doug Anderson
> Cc: Stephan van Schaik
> Signed-off-by: Andreas Färber
>
;;
> - vsys_l2-supply = <&some_reg>;
> + vsys-l1-supply = <&some_reg>;
> + vsys-l2-supply = <&some_reg>;
Your change matches the code and all existing device trees in the
Linux kernel. I also see plenty of other bindings
Kevin,
On Fri, Jun 20, 2014 at 4:13 PM, Kevin Hilman wrote:
> Doug Anderson writes:
>
>> Kevin,
>>
>> On Fri, Jun 20, 2014 at 2:48 PM, Kevin Hilman wrote:
>>> Hi Doug,
>>>
>>> Doug Anderson writes:
>>>
>>>> On Thu, Ju
Kevin,
On Fri, Jun 20, 2014 at 2:48 PM, Kevin Hilman wrote:
> Hi Doug,
>
> Doug Anderson writes:
>
>> On Thu, Jun 19, 2014 at 11:43 AM, Kevin Hilman wrote:
>>> Doug Anderson writes:
>>>
>>>> The original code for the exynos i2c controller re
ike
we did before this patch).
Signed-off-by: Doug Anderson
---
Changes in v2:
- Split noirq (polling mode) changes into MFD and charger
This patch has been sent up a number of times with no response. It's
needed to make the charger work on exynos5250-snow,
exynos5420-peach-pit, and exynos580
e "cs-gpio"(singular) usage
> from device tree binding of spi-samsung.txt and makes appropriate
> changes in the driver to use "cs-gpios"(plural) from
> SPI device node.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Acked-by: Rob Herring
> Reviewed-by: Javier
o that MAX98091
> CODEC can be specified from device tree.
>
> Signed-off-by: Wonjoon Lee
> Signed-off-by: Doug Anderson
> Signed-off-by: Tushar Behera
> ---
>
> Picked from https://chromium-review.googlesource.com/#/c/184091/
>
> .../devicetree/bindings/sound/max98
5800-peach-pi.dts | 31
> +
> 1 file changed, 31 insertions(+)
Reviewed-by: Doug Anderson
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It will conflict with every single other dts patch to pi.
Reviewed-by: Doug Anderson
-Doug
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200 MHz ->
800 MHz -> 300 MHz and will run at 800 MHz for a time with the wrong
loops_per_jiffy).
[dianders: reworked and created version 3]
Signed-off-by: Amit Daniel Kachhap
Signed-off-by: Doug Anderson
---
Changes in v3:
- Back to exynos_frc_read for now until 32/64 is resolved.
- Now re
e use of the MCT on ARM64 systems
until we've sorted out how to make "cycles_t" always 32-bit. Really
ARM64 systems should be using arch timers anyway.
Signed-off-by: Doug Anderson
---
Changes in v3:
- Now 32-bit version instead of ldmia version
Changes in v2: None
drivers/clock
Using the __raw functions is discouraged. Update the file to
consistently use the proper functions.
Signed-off-by: Doug Anderson
---
Changes in v3:
- __raw_readl / __raw_writel patch new for version 3
drivers/clocksource/exynos_mct.c | 24
1 file changed, 12
patch new for version 3
- Now 32-bit version instead of ldmia version
Changes in v2:
- Added #defines for ARM and ARM64 as pointed by Doug Anderson.
Amit Daniel Kachhap (1):
clocksource: exynos_mct: Register the timer for stable udelay
Doug Anderson (2):
clocksource: exynos_mct: __raw_readl
Hi,
On Fri, Jun 20, 2014 at 4:19 AM, amit daniel kachhap
wrote:
> On Fri, Jun 20, 2014 at 1:45 PM, Will Deacon wrote:
>> On Thu, Jun 19, 2014 at 05:40:49PM +0100, Tomasz Figa wrote:
>>> On 19.06.2014 18:31, Doug Anderson wrote:
>>> >>> My personal vote
nd/soc/samsung/snow.c |1 +
> 2 files changed, 2 insertions(+)
Reviewed-by: Doug Anderson
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Kevin,
On Thu, Jun 19, 2014 at 11:43 AM, Kevin Hilman wrote:
> Doug Anderson writes:
>
>> The original code for the exynos i2c controller registered for the
>> "noirq" variants. However during review feedback it was moved to
>> SIMPLE_DEV_PM_OPS without anyone
nos4_frc_read() to show up in ftrace profiles if it's the
bottleneck.
Signed-off-by: Doug Anderson
---
Changes in v2:
- Split out from other patches so this can go into 3.16.
- Better comment about why exynos4_frc_read() should be traceable.
- No more useless inline.
drivers/clock
Daniel,
On Tue, Jun 17, 2014 at 5:13 AM, Daniel Lezcano
wrote:
> On 06/04/2014 07:30 PM, Doug Anderson wrote:
>>
>> In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
>> supported using the MCT as a scheduler clock. We properly marked
>> exynos4_re
Tomasz,
On Thu, Jun 19, 2014 at 9:17 AM, Tomasz Figa wrote:
> On 19.06.2014 18:01, Doug Anderson wrote:
>> Hi,
>>
>> On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
>>>> +static struct delay_timer exynos4_delay_timer;
>>>> +
>>>&
Daniel,
On Thu, Jun 19, 2014 at 9:02 AM, Daniel Lezcano
wrote:
>> My understanding of the current status is:
>> * I posed the 64-bit version that's almost as fast as the 32-bit version.
>> * I asked if people want the 32-bit version: no answer
>> * I asked if anyone is opposed to the 64-bit versi
Hi,
On Thu, Jun 19, 2014 at 3:21 AM, Tomasz Figa wrote:
>> +static struct delay_timer exynos4_delay_timer;
>> +
>> +static unsigned long exynos4_read_current_timer(void)
Note: I think this should return a cycles_t, not an unsigned long.
They're the same (right now), but probably shouldn't be (se
Daniel,
On Thu, Jun 19, 2014 at 2:07 AM, Daniel Lezcano
wrote:
> On 06/19/2014 01:17 AM, Doug Anderson wrote:
>>
>> Amit,
>>
>> Thanks for posting!
>>
>> On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
>> wrote:
>>>
>>> This
Hi,
On Wed, Jun 18, 2014 at 9:54 PM, Doug Anderson wrote:
> From: Vincent Palatin
>
> When the wake-up is triggered by the PMIC RTC, the RTC driver is trying
> to read the PMIC interrupt status over I2C and fails because the I2C
> controller is not resumed yet.
> Let's re
ore.
This patch has only been compile-tested since I don't have all the
patches needed to make my machine using this i2c driver actually
suspend/resume.
Signed-off-by: Doug Anderson
---
drivers/i2c/busses/i2c-exynos5.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff -
e can properly get the wake-up
condition.
Signed-off-by: Vincent Palatin
Signed-off-by: Doug Anderson
---
drivers/i2c/busses/i2c-s3c2410.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index e828a1d..b9
Amit,
Thanks for posting!
On Wed, Jun 18, 2014 at 4:31 AM, Amit Daniel Kachhap
wrote:
> This patch register the exynos mct clocksource as the current timer
> as it has constant clock rate. This will generate correct udelay for the
> exynos platform and avoid using unnecessary calibrated jiffies.
nsport. Before this change:
cros-ec-spi spi2.0: Chrome EC (SPI)
After this change:
cros-ec-spi spi2.0: Chrome EC device registered
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
Reviewed-by: Simon Glass
---
Changes in v2:
- Include example printouts before/
From: Bill Richardson
This comment was incorrect, so update it.
Signed-off-by: Bill Richardson
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
---
Changes in v2: None
include/linux/mfd/cros_ec.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
: Bill Richardson
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
Reviewed-by: Simon Glass
---
Changes in v2:
- Removed unneeded "ret" variable.
drivers/i2c/busses/i2c-cros-ec-tunnel.c | 15 +++
drivers/input/keyboard/cros_ec_keyb.c | 12 ++--
drivers/mfd
From: Bill Richardson
This is some internal structure reorganization / renaming to prepare
for future patches that will add a userspace API to cros_ec. There
should be no visible changes.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
---
Changes in v2: None
documented that no code changes needed
on mainline]
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
Reviewed-by: Simon Glass
---
Changes in v2: None
include/linux/mfd/cros_ec.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec.h b/inc
From: Simon Glass
Some commands take a while to execute. Use -EAGAIN to signal this to the
caller.
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
---
Changes in v2: None
drivers/mfd/cros_ec_spi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers
and
the resulting flood of interrupts causes the machine to hang.
Since the EC interrupt is currently only used for the keyboard, move
the setup and handling of the EC interrupt to the cros_ec_keyb driver.
Signed-off-by: Andrew Bresticker
Signed-off-by: Doug Anderson
---
Changes in v2:
- IRQs
ommon function to cros_ec.c]
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
Changes in v2:
- Added common function to cros_ec.c
- Changed to dev_dbg() as per http://crosreview.com/66726
drivers/mfd/cros_ec.c | 18 ++
drivers/mfd/cros_ec_i2c.c | 8 +++-
dr
From: Bill Richardson
When communicating with the EC, the cmd_xfer() function should return the
number of bytes it received from the EC, or negative on error.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
Reviewed-by: Simon Glass
---
Changes in v2: None
This is a batch of cleanup patches picked from the ChromeOS 3.8 kernel
tree and applied to ToT. Most of these patches were authored by Bill
Richardson (CCed). Where appropriate I've squashed patches together,
though I have erred on the side of keeping patches logically distinct
rather than squash
.]
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
Acked-by: Lee Jones
---
Changes in v2: None
drivers/mfd/cros_ec.c | 2 +-
drivers/mfd/cros_ec_i2c.c | 4 +--
drivers/mfd/cros_ec_spi.c | 10 +++
include/linux/mfd/cros_ec.h | 65
Lee,
On Wed, Jun 18, 2014 at 9:46 AM, Lee Jones wrote:
> On Wed, 18 Jun 2014, Doug Anderson wrote:
>
>> Lee,
>>
>> On Wed, Jun 18, 2014 at 12:55 AM, Lee Jones wrote:
>> > On Mon, 16 Jun 2014, Doug Anderson wrote:
>> >
>> >> From: Bill Richar
Lee,
On Wed, Jun 18, 2014 at 12:53 AM, Lee Jones wrote:
> On Mon, 16 Jun 2014, Doug Anderson wrote:
>
>> From: Bill Richardson
>>
>> The lower-level driver may want to provide its own buffers. If so,
>> there's no need to allocate new ones. This already hap
Lee,
On Wed, Jun 18, 2014 at 12:57 AM, Lee Jones wrote:
> On Mon, 16 Jun 2014, Doug Anderson wrote:
>
>> From: Bill Richardson
>>
>> This comment was incorrect, so update it.
>>
>> Signed-off-by: Bill Richardson
>> Signed-off-by: Simon Glass
>
>
Lee,
On Wed, Jun 18, 2014 at 12:55 AM, Lee Jones wrote:
> On Mon, 16 Jun 2014, Doug Anderson wrote:
>
>> From: Bill Richardson
>>
>> Preparing the way for the LPC device, which is just a plaform_device without
>> interrupts.
>>
>> Signed-off-by: Bill R
Simon,
On Tue, Jun 17, 2014 at 8:46 PM, Simon Glass wrote:
> Hi,
>
> On 16 June 2014 14:40, Doug Anderson wrote:
>> From: Bill Richardson
>>
>> When communicating with the EC, the cmd_xfer() function should return the
>> number of bytes it received from the E
Simon,
On Tue, Jun 17, 2014 at 8:43 PM, Simon Glass wrote:
>> diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c
>> index 09ca789..4d34f1c 100644
>> --- a/drivers/mfd/cros_ec_spi.c
>> +++ b/drivers/mfd/cros_ec_spi.c
>> @@ -289,21 +289,23 @@ static int cros_ec_cmd_xfer_spi(struct c
Simon,
On Tue, Jun 17, 2014 at 9:25 PM, Simon Glass wrote:
> Hi Doug,
>
> On 17 June 2014 21:22, Doug Anderson wrote:
>>
>> Simon,
>>
>> On Tue, Jun 17, 2014 at 8:39 PM, Simon Glass wrote:
>> > Hi Doug,
>> >
>> > On 16 June 2
Simon,
On Tue, Jun 17, 2014 at 8:42 PM, Simon Glass wrote:
>> diff --git a/drivers/input/keyboard/cros_ec_keyb.c
>> b/drivers/input/keyboard/cros_ec_keyb.c
>> index 4083796..dc37b6b 100644
>> --- a/drivers/input/keyboard/cros_ec_keyb.c
>> +++ b/drivers/input/keyboard/cros_ec_keyb.c
>> @@ -191,8
Simon,
On Tue, Jun 17, 2014 at 8:39 PM, Simon Glass wrote:
> Hi Doug,
>
> On 16 June 2014 14:39, Doug Anderson wrote:
>> From: Bill Richardson
>>
>> struct cros_ec_device has a superfluous "name" field. We can get all the
>> debugging info we need fro
Simon,
On Tue, Jun 17, 2014 at 8:35 PM, Simon Glass wrote:
> Hi Doug,
>
> On 16 June 2014 14:39, Doug Anderson wrote:
>> From: Bill Richardson
>>
>> The members of struct cros_ec_device were improperly commented, and
>> intermixed the private and public secti
ybe remove MAX77686_IRQ_NR which no longer makes any sense now that
you start over at 0 partway through.
Overall this looks good to me, so once nits above are fixed feel to
add my Reviewed-by. I've also built and booted this patch on
exynos5250-snow and tested that the RTC wakealarm fires and can even
wake the system up (with some additional work that I'll email you
about).
Reviewed-by: Doug Anderson
Tested-by: Doug Anderson
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Tushar,
On Mon, Jun 16, 2014 at 8:36 PM, Tushar Behera wrote:
> On Mon, Jun 16, 2014 at 10:19 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
>>> On 06/13/2014 10:33 PM, Doug Anderson wrote:
>>>> Tushar,
From: Simon Glass
Some commands take a while to execute. Use -EAGAIN to signal this to the
caller.
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec_spi.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd
From: Bill Richardson
This is some internal structure reorganization / renaming to prepare
for future patches that will add a userspace API to cros_ec. There
should be no visible changes.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c | 28
From: Bill Richardson
When communicating with the EC, the cmd_xfer() function should return the
number of bytes it received from the EC, or negative on error.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/i2c/busses/i2c-cros-ec-tunnel.c | 2 +-
drivers/mfd
: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/i2c/busses/i2c-cros-ec-tunnel.c | 15 +++
drivers/input/keyboard/cros_ec_keyb.c | 14 --
drivers/mfd/cros_ec.c | 32
include/linux/mfd/cros_ec.h | 19
rdson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec_i2c.c | 15 +++
drivers/mfd/cros_ec_spi.c | 26 ++
2 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/drivers/mfd/cros_ec_i2c.c b/drivers/mfd/cros_ec_i2c.c
index 5bb32f5..2276096 100644
documented that no code changes needed
on mainline]
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
include/linux/mfd/cros_ec.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec.h b/include/linux/mfd/cros_ec.h
index 7e9fe6e..2ee3
From: Bill Richardson
Preparing the way for the LPC device, which is just a plaform_device without
interrupts.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git
From: Bill Richardson
struct cros_ec_device has a superfluous "name" field. We can get all the
debugging info we need from the existing ec_name and phys_name fields, so
let's take out the extra field.
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
driver
This is a batch of cleanup patches picked from the ChromeOS 3.8 kernel
tree and applied to ToT. Most of these patches were authored by Bill
Richardson (CCed). Where appropriate I've squashed patches together,
though I have erred on the side of keeping patches logically distinct
rather than squash
.]
Signed-off-by: Bill Richardson
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec.c | 2 +-
drivers/mfd/cros_ec_i2c.c | 4 +--
drivers/mfd/cros_ec_spi.c | 10 +++
include/linux/mfd/cros_ec.h | 65 -
4 files changed, 43 insertions(+), 38
From: Bill Richardson
This comment was incorrect, so update it.
Signed-off-by: Bill Richardson
Signed-off-by: Simon Glass
Signed-off-by: Doug Anderson
---
include/linux/mfd/cros_ec.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/linux/mfd/cros_ec.h b/include
: Prathyush K
Signed-off-by: Doug Anderson
---
Note that I don't have suspend/resume actually working upstream, but I
see that /sys/bus/spi/drivers/cros-ec-spi/spi2.0/power/wakeup exists
with this patch and doesn't exist without it.
drivers/mfd/cros_ec_spi.c | 2 ++
1 file changed, 2
Nicolas,
On Mon, Jun 9, 2014 at 1:55 PM, Nicolas Pitre wrote:
> On Mon, 9 Jun 2014, Kevin Hilman wrote:
>
>> On Mon, Jun 9, 2014 at 1:22 PM, Nicolas Pitre
>> wrote:
>> > On Mon, 9 Jun 2014, Andrew Bresticker wrote:
>> >
>> >> > [1] While waiting for the forth-coming patch from Andrew to enable
Kukjin,
On Wed, Jun 11, 2014 at 8:28 AM, Kukjin Kim wrote:
> On 06/12/14 00:19, Doug Anderson wrote:
>>
>> Chander,
>>
>> On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyap
>> wrote:
>>>
>>> Hi Doug,
>>>
>>> On Tue, Jun 10, 20
Mark,
On Mon, Jun 16, 2014 at 9:51 AM, Mark Brown wrote:
> On Mon, Jun 16, 2014 at 09:49:26AM -0700, Doug Anderson wrote:
>
>> Yes please. I think there's supposed to be some official ordering of
>> things. If anyone reading this has a pointer to the official sort
&g
Tushar,
On Mon, Jun 16, 2014 at 4:19 AM, Tushar Behera wrote:
> On 06/13/2014 10:33 PM, Doug Anderson wrote:
>> Tushar,
>>
>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
>>> Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
>>
>
Daniel,
On Mon, Jun 16, 2014 at 1:52 AM, Daniel Lezcano
wrote:
> Hi Dough,
>
> thanks for the explanation. I still don't get why it is important to keep
> others users of mct traceable because it is quite slow ? May be it is what
> you explained here, but I miss the connection between 'the other
Daniel,
On Sun, Jun 15, 2014 at 2:18 PM, Daniel Lezcano
wrote:
> On 06/04/2014 07:30 PM, Doug Anderson wrote:
>>
>> In (93bfb76 clocksource: exynos_mct: register sched_clock callback) we
>> supported using the MCT as a scheduler clock. We properly marked
>> exynos4_re
Mark,
On Fri, Jun 13, 2014 at 3:04 PM, Mark Brown wrote:
> On Fri, Jun 13, 2014 at 02:58:26PM -0700, Doug Anderson wrote:
>
>> Anyway, suffice to say that the i2c core needs to be extended to
>> handle the idea that a single device has more than one "compatible"
>
Mark,
On Fri, Jun 13, 2014 at 10:13 AM, Doug Anderson wrote:
> Mark,
>
> On Fri, Jun 13, 2014 at 10:05 AM, Mark Brown wrote:
>> On Fri, Jun 13, 2014 at 10:03:50AM -0700, Doug Anderson wrote:
>>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera
>>> wrote:
>
ros-ec-spi-msg-delay'.
Signed-off-by: Doug Anderson
---
drivers/mfd/cros_ec_spi.c | 18 +++---
1 file changed, 7 insertions(+), 11 deletions(-)
diff --git a/drivers/mfd/cros_ec_spi.c b/drivers/mfd/cros_ec_spi.c
index 0b8d328..0cbc3db 100644
--- a/drivers/mfd/cros_ec_spi.c
+++ b/
ed bindings. See
<https://patchwork.kernel.org/patch/4346701/> and
<https://patchwork.kernel.org/patch/4346711/>
Signed-off-by: Doug Anderson
---
arch/arm/boot/dts/exynos5420-peach-pit.dts | 146 +
arch/arm/boot/dts/exynos5800-peach-pi.dts | 146
Mark,
On Fri, Jun 13, 2014 at 10:05 AM, Mark Brown wrote:
> On Fri, Jun 13, 2014 at 10:03:50AM -0700, Doug Anderson wrote:
>> On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
>
>> > Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
>
>> If y
Tushar,
On Tue, Jun 10, 2014 at 10:32 PM, Tushar Behera wrote:
> Peach-pi board has MAX98090 audio codec connected on HSI2C-7 bus.
If you want to be a stickler about it, peach-pi actually has a
max98091. That requires code changes to the i2c driver, though.
...and unfortunately listing two comp
Paul,
On Fri, Jun 13, 2014 at 1:08 AM, Paul Bolle wrote:
> Doug,
>
> On Wed, 2014-06-11 at 08:11 -0700, Doug Anderson wrote:
>> On Wed, Jun 11, 2014 at 3:37 AM, Paul Bolle wrote:
>> > On Tue, 2014-05-20 at 09:46 +0100, Lee Jones wrote:
>> >> On W
Chander,
On Fri, Jun 13, 2014 at 4:54 AM, Chander Kashyap wrote:
> This patch is effectively changing the mcpm_entry_point address from
> nsbase + 0x1c to nsbase + 0x8
>
> Hence while integrating with mainline u-boot we need to take care for
> new mcpm_entry_point address.
>
> With Chromebook it
c: Javier Martinez Canillas
> Cc: Doug Anderson
> Cc: Tomasz Figa
> ---
> drivers/spi/spi-s3c64xx.c | 11 ++-
> 1 file changed, 6 insertions(+), 5 deletions(-)
I'm not planning to do an in-depth review of this patch since it seems
that others are on top of it, but I
cs-gpio"(singular) usage
> from device tree binding of spi-samsung.txt and makes appropriate
> changes in the driver to use "cs-gpios"(plural) from
> SPI device node.
>
> Signed-off-by: Naveen Krishna Chatradhi
> Acked-by: Rob Herring
> Cc: Javier Martinez C
ed in
> the new binding.
>
> Respective changes are preposed to spi-s3c64xx.c driver.
> @ http://www.spinics.net/lists/linux-samsung-soc/msg32282.html
>
> Signed-off-by: Naveen Krishna Chatradhi
> Acked-by: Rob Herring
> Cc: Javier Martinez Canillas
> Cc: Doug Anderson
>
Thomas,
On Wed, Jun 4, 2014 at 11:05 AM, Thomas Gleixner wrote:
> On Wed, 4 Jun 2014, Doug Anderson wrote:
>
>> As we saw in (clocksource: exynos_mct: cache mct upper count), the
>> time spent reading the MCT shows up fairly high in real-world
>> profiles. That me
Vikas,
On Fri, May 23, 2014 at 5:14 AM, Vikas Sajjan wrote:
> Hi,
>
> I notice that if CONFIG_SAMSUNG_PM_CHECK is enabled, we get a crash in
> function "crc32_le(), as below.
PM_CHECK is nowhere near working in upstream. ...or at least it
wasn't when I last checked in 3.8 and I can't imagine th
Chander,
On Tue, Jun 10, 2014 at 9:52 PM, Chander Kashyap wrote:
> Hi Doug,
>
> On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre
> wrote:
>> On Tue, 10 Jun 2014, Doug Anderson wrote:
>>
>>> My S-state knowledge is not strong, but I believe that Lorenzo's
Paul,
On Wed, Jun 11, 2014 at 3:37 AM, Paul Bolle wrote:
> On Tue, 2014-05-20 at 09:46 +0100, Lee Jones wrote:
>> On Wed, 30 Apr 2014, Doug Anderson wrote:
>> > From: Bill Richardson
>> >
>> > This just updates include/linux/mfd/cros_ec_commands.h to match
Javier,
On Tue, Jun 10, 2014 at 1:03 PM, Javier Martinez Canillas
wrote:
> Yes, I did not have this issue before. However... I installed the latest Peach
> pit recovery image you provided me and mainline kernel started to hang on
> boot.
> I remembered this thread so tested Kevin's patch which m
Tomasz,
On Tue, Jun 10, 2014 at 12:59 PM, Tomasz Figa wrote:
> On 10.06.2014 21:58, Doug Anderson wrote:
>> Tomasz,
>>
>> On Tue, Jun 10, 2014 at 12:49 PM, Tomasz Figa wrote:
>>> This is wrong. The "cs-gpios" property is supposed to be an array,
>>
Tomasz,
On Tue, Jun 10, 2014 at 12:49 PM, Tomasz Figa wrote:
> This is wrong. The "cs-gpios" property is supposed to be an array,
> indexed by chip select number of SPI devices (indicated by their "reg"
> properties).
>
> Moreover, is there a need to parse this manually in this driver? I can
> se
Naveen,
Not a full review, but a few quick things I happened to notice:
On Tue, Jun 10, 2014 at 3:08 AM, Naveen Krishna Chatradhi
wrote:
> @@ -94,7 +93,6 @@ Example:
> spi-max-frequency = <1>;
>
> controller-data {
> -
Naveen / Sylwester,
On Tue, Jun 10, 2014 at 4:00 AM, Naveen Krishna Ch
wrote:
>> Can we support both "cs-gpio" and "cs-gpios" for backward compatibility ?
>> After your change all DTBs using the original pattern will not work with
>> new kernels any more. At least I would expect such backward com
Hi,
On Mon, Jun 9, 2014 at 11:48 PM, Shaik Ameer Basha
wrote:
> Hi Kevin,
>
> We tested on 3 "peach-pi" boards. We are not observing this issue.
>
> Even I tried with the below defconfig mentioned by you. No issues observed.
> https://chromium.googlesource.com/chromiumos/overlays/chromiumos-overl
Chander,
On Tue, Jun 10, 2014 at 1:12 AM, Chander Kashyap
wrote:
> On 10 June 2014 04:08, Lorenzo Pieralisi wrote:
>> On Mon, Jun 09, 2014 at 06:03:31PM +0100, Doug Anderson wrote:
>>
>> [...]
>>
>>> Cold boot and resume from suspend are detected via various
Javier,
On Mon, Jun 9, 2014 at 3:55 PM, Javier Martinez Canillas
wrote:
>> * The RTC has many subtle differences between the 77686 and 77802.
>> They expanded it to handle a 200 year timeframe instead of 100 and
>> that meant that they had to shuffle the bits around everywhere. They
>> also move
Kevin and Nicolas,
On Mon, Jun 9, 2014 at 1:27 PM, Kevin Hilman wrote:
> Nicolas Pitre writes:
>
>> On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
>>
>>> Hi Nicolas,
>>>
>>> The first man of the incoming cluster enables its snoops via the
>>> power_up_setup function. During secondary boot-up, this
Tomasz,
On Fri, Jun 6, 2014 at 4:41 PM, Mike Turquette wrote:
> Quoting Tomasz Figa (2014-06-05 15:26:31)
>> On 05.06.2014 22:35, Doug Anderson wrote:
>> > The "aclk66_peric" clock is a gate clock with a whole bunch of gates
>> > underneath it. This big gat
Lorenzo,
On Sat, Jun 7, 2014 at 11:12 AM, Lorenzo Pieralisi
wrote:
> On Fri, Jun 06, 2014 at 10:43:05PM +0100, Doug Anderson wrote:
>> On exynos mcpm systems the firmware is hardcoded to jump to an address
>> in SRAM (0x02073000) when secondary CPUs come up. By default the
>
Krzystof,
On Mon, Jun 9, 2014 at 3:16 AM, Krzysztof Kozlowski
wrote:
> On pon, 2014-06-09 at 11:37 +0200, Javier Martinez Canillas wrote:
>> MAX77802 is a PMIC that contains 10 high efficiency Buck regulators,
>> 32 Low-dropout (LDO) regulators, two 32kHz buffered clock outputs,
>> a Real-Time-Cl
/resume is implemented for systems using exynos-mcpm we'll
need to make sure we reinstall our fixed up code after resume. ...but
that's not anything new since IRAM (and thus the address of the
mcpm_entry_point) is lost across suspend/resume anyway.
Signed-off-by: Doug Anderson
---
Chan
Mike,
On Fri, Jun 6, 2014 at 3:31 PM, Mike Turquette wrote:
> Anyways, getting back on point, Tomasz was right about the whole clk_get
> thing. So I'm happy to take either V1 or V3 of your patch. I will be
> submitting a second PR for 3.16 next week and it will include whichever
> version you and
Nicolas,
On Fri, Jun 6, 2014 at 3:38 PM, Nicolas Pitre wrote:
> On Fri, 6 Jun 2014, Doug Anderson wrote:
>
>> Note that handling CPU resume in a way that can be updated by RW
>> firmware is non-trivial and requires some SRAM to be saved across
>> suspend/resume.
>
&
Nicolas,
On Fri, Jun 6, 2014 at 3:35 PM, Nicolas Pitre wrote:
> On Fri, 6 Jun 2014, Doug Anderson wrote:
>
>> On exynos mcpm systems the firmware is hardcoded to jump to an address
>> in SRAM (0x02073000) when secondary CPUs come up. By default the
>> firmware puts
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