On Thu, May 21, 2015 at 01:45:27PM -0300, Emilio López wrote:
> Hi Maxime, Vinod,
>
> El 20/05/15 a las 18:17, Maxime Ripard escibió:
> >>>+static struct dma_async_tx_descriptor *
> >>>+sun4i_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf, size_t
> >>>len,
> >>>+siz
On Thu, May 21, 2015 at 09:47:35AM +0200, Maxime Ripard wrote:
> On Mon, May 18, 2015 at 02:16:14PM +0530, Vinod Koul wrote:
> > > +static enum dma_status sun4i_dma_tx_status(struct dma_chan *chan,
> > > +dma_cookie_t cookie,
> > > +
Hi Maxime, Vinod,
El 20/05/15 a las 18:17, Maxime Ripard escibió:
+static struct dma_async_tx_descriptor *
+sun4i_dma_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf, size_t len,
+ size_t period_len, enum dma_transfer_direction dir,
+ unsigne
On Mon, May 18, 2015 at 02:16:14PM +0530, Vinod Koul wrote:
> > +static enum dma_status sun4i_dma_tx_status(struct dma_chan *chan,
> > + dma_cookie_t cookie,
> > + struct dma_tx_state *state)
> > +{
> > + struct sun4i_dma_v
Hi Vinod,
On Mon, May 18, 2015 at 02:16:14PM +0530, Vinod Koul wrote:
> On Mon, May 11, 2015 at 03:27:32PM +0200, Maxime Ripard wrote:
> > +
> > +/** Normal DMA register values **/
> > +
> > +/* Normal DMA source/destination data request type values */
> > +#define NDMA_DRQ_TYPE_SDRAM
On Mon, May 11, 2015 at 03:27:32PM +0200, Maxime Ripard wrote:
> +
> +/** Normal DMA register values **/
> +
> +/* Normal DMA source/destination data request type values */
> +#define NDMA_DRQ_TYPE_SDRAM 0x16
> +#define NDMA_DRQ_TYPE_LIMIT (0x1F + 1)
> +
> +/** Nor
