DPCM needs extra dapm routes in the machine driver to route audio
between Front-End and Back-End. In order to differ the stream names
in the route map from CODECs, we here add specific stream names to
SSI driver so that we can implement ASRC via DPCM to it.
Signed-off-by: Nicolin Chen
---
sound/
DPCM needs extra dapm routes in the machine driver to route audio
between Front-End and Back-End. In order to differ the stream names
in the route map from CODECs, we here add specific stream names to
SPDIF driver so that we can implement ASRC via DPCM to it.
Signed-off-by: Nicolin Chen
---
soun
DPCM needs extra dapm routes in the machine driver to route audio
between Front-End and Back-End. In order to differ the stream names
in the route map from CODECs, we here add specific stream names to
SAI driver so that we can implement ASRC via DPCM to it.
Signed-off-by: Nicolin Chen
---
sound/
DPCM needs extra dapm routes in the machine driver to route audio
between Front-End and Back-End. In order to differ the stream names
in the route map from CODECs, we here add specific stream names to
ESAI driver so that we can implement ASRC via DPCM to it.
Signed-off-by: Nicolin Chen
---
sound
DPCM needs extra dapm routes in the machine driver to route audio
between Front-End and Back-End. In order to differ the stream names
in the route map from CODECs, we here add specific stream names to
all Freescale ASoC CPU DAI drivers so that we can implement ASRC via
DPCM to each of them.
Docume
when flexcan is not physically linked, command 'cantest' will
trigger an err_irq, add err_irq handler for it.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- use a space instead of tab
- use flexcan_poll_state instead of print
Changes for v3:
- return IRQ_HANDLED if err is
On Tue, Jun 24, 2014 at 11:31:52AM +0800, Zhao Qiang wrote:
> ls1 has qe and ls1 has arm cpu.
> move qe from arch/powerpc to drivers.
>
> Signed-off-by: Zhao Qiang
This is a very terse changelog. Explain more about what QE is, and what
this patch accomplishes (it doesn't seem to get rid of the
Commit bcdde7e made __sysfs_remove_dir() recursive and introduced a BUG_ON
during PHB removal while attempting to delete the power managment attribute
group of the bus. This is a result of tearing the bridge and bus devices down
out of order in remove_phb_dynamic. Since, the the bus resides below t
On Mon, 2014-07-28 at 06:51 +, Emil Medve wrote:
> Hello Scott,
>
>
> Scott Wood freescale.com> writes:
> > On Wed, 2014-07-16 at 15:17 -0500, Shruti Kanetkar wrote:
> > > + mdio fd000 {
> > > + /* For 10g interfaces */
> > > +
Signed-off-by: Shruti Kanetkar
---
drivers/net/ethernet/freescale/xgmac_mdio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/xgmac_mdio.c
b/drivers/net/ethernet/freescale/xgmac_mdio.c
index 8173407..6e7db66 100644
--- a/drivers/net/ethernet/fr
On Tue, 2014-07-29 at 14:44 -0500, Shruti Kanetkar wrote:
> From: Madalin Bucur
>
> Fix one misspelled word reported by codespell.
>
> Signed-off-by: Madalin Bucur
> Signed-off-by: Shruti Kanetkar
> ---
> drivers/net/ethernet/freescale/xgmac_mdio.c | 2 +-
> 1 file changed, 1 insertion(+), 1
From: Madalin Bucur
Fix one misspelled word reported by codespell.
Signed-off-by: Madalin Bucur
Signed-off-by: Shruti Kanetkar
---
drivers/net/ethernet/freescale/xgmac_mdio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/xgmac_mdio.c
b/dri
On Tue, Jul 29, 2014 at 06:08:51PM +0800, Nicolin Chen wrote:
> This series of patches add Freescale ASRC module driver support along
> with the extra request in imx-sdma structure required by SDMA Device
> to Device script.
Applied both, thanks.
signature.asc
Description: Digital signature
On 07/28/2014 06:44 PM, Michael Ellerman wrote:
> On Mon, 2014-07-28 at 20:48 -0400, Tyrel Datwyler wrote:
>> Commit bcdde7e made __sysfs_remove_dir() recursive and introduced a BUG_ON
>> during PHB removal while attempting to delete the power managment attribute
>> group of the bus. This is a resu
From: Peter Zijlstra
This patch has been added to the 3.12 stable tree. If you have any
objections, please let us know.
===
commit 4badad352a6bb202ec68afa7a574c0bb961e5ebc upstream.
The optimistic spin code assumes regular stores and cmpxchg() play nice;
this is found to not be tru
From: Mahesh Salgaonkar
HMIs are thread specific and can come while thread is in sleep/nap mode.
Hence with SMT=off mode we can receive HMIs on sleeping threads. For
interrupt received in nap mode, cpu wakes up at system reset vector, clears
the interrupt and go back to nap mode again. But HMIs a
From: Mahesh Salgaonkar
When we hit the HMI in Linux, invoke opal call to handle/recover from HMI
errors in real mode and then in virtual mode during check_irq_replay()
invoke opal_poll_events()/opal_do_notifier() to retrieve HMI event from
OPAL and act accordingly.
Now that we are ready to hand
From: Mahesh Salgaonkar
Handle Hypervisor Maintenance Interrupt (HMI) in Linux. This patch implements
basic infrastructure to handle HMI in Linux host. The design is to invoke
opal handle hmi in real mode for recovery and set irq_pending when we hit HMI.
During check_irq_replay pull opal hmi even
This patch series implements HMI interrupt handling in Linux. First patch
implements basic infrastructure to handle HMI in Linux host. Second patch
invokes opal call to handle hmi in opal firmware and retrieve HMI event
generated by opal. Third patch handles HMI received on cpus in sleep/nap mode.
Benjamin Herrenschmidt writes:
> On Tue, 2014-07-29 at 12:25 +0530, Aneesh Kumar K.V wrote:
>> We want to make sure for usage like below we don't reorder the load.
>>
>> if (pmd_trans_huge(*pmdp)){
>>
>>get_hpte_slot_array(pmdp)
>> }
>
> Shouldn't we also make sure that we don't have lock
On Tue, Jul 29, 2014 at 10:46:13AM +0100, Mark Rutland wrote:
> > + - big-endian : If this property is absent, the native endian mode will
> > + be in use as default, or the big endian mode will be in
> > use
> > + for all the device registers.
>
> Native endian
SDMA supports device to device (per_2_per) scripts to handle DMA transfering
between two peripheral devices. The per_2_per script, however, needs two dma
requests from two sides while the current structure only defined one request.
So this patch just simply adds the secondary request so as to let
The Asynchronous Sample Rate Converter (ASRC) converts the sampling rate of a
signal associated with an input clock into a signal associated with a different
output clock. The driver currently works as a Front End of DPCM with other Back
Ends DAI links such as ESAI<->CS42888 and SSI<->WM8962 and SA
This series of patches add Freescale ASRC module driver support along
with the extra request in imx-sdma structure required by SDMA Device
to Device script.
The previous version has been in the maillist for nearly six months
without any comment and reply. So I decide to drop the SDMA part's
change
> + - big-endian : If this property is absent, the native endian mode will
> + be in use as default, or the big endian mode will be in use
> + for all the device registers.
Native endian is meaningless. If a CPU supports both BE and LE, there is
no native endianne
With hugepages, we store the hpte valid information in the pte page
whose address is stored in the second half of the PMD. Use a
write barrier to make sure clearing pmd busy bit and updating
hpte valid info are ordered properly.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hugepage-hash64
Add tracepoint to track hugepage invalidate. This help us
in debugging difficult to track bugs.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/pgtable_64.c | 6 +++
arch/powerpc/mm/tlb_hash64.c | 4 ++
include/trace/events/thp.h | 88
3 files
On ppc64 we support 4K hash pte with 64K page size. That requires
us to track the hash pte slot information on a per 4k basis. We do that
by storing the slot details in the second half of pte page. The pte bit
_PAGE_COMBO is used to indicate whether the second half need to be
looked while building
We would get wrong results in compiler recomputed old_pmd. Avoid
that by using ACCESS_ONCE
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/hugepage-hash64.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/mm/hugepage-hash64.c
b/arch/powerpc/mm/hugepage-ha
As per ISA, for 4k base page size we compare 14..65 bits of VA specified
with the entry_VA in tlb. That implies we need to make sure we do a
tlbie with all the possible 4k va we used to access the 16MB hugepage.
With 64k base page size we compare 14..57 bits of VA. Hence we cannot
ignore the lower
If we changed base page size of the segment, either via sub_page_protect
or via remap_4k_pfn, we do a demote_segment which doesn't flush the hash
table entries. We do a lazy hash page table flush for all mapped pages
in the demoted segment. This happens when we handle hash page fault for
these page
If we changed base page size of the segment, either via sub_page_protect
or via remap_4k_pfn, we do a demote_segment which doesn't flush the hash
table entries. We do a lazy hash page table flush for all mapped pages
in the demoted segment. This happens when we handle hash page fault
for these page
The segment identifier and segment size will remain the same in
the loop, So we can compute it outside. We also change the
hugepage_invalidate interface so that we can use it the later patch
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/machdep.h| 6 +++---
arch/powerpc/mm/ha
Hi,
This patch series fixes machine check exception that we observed when using
transparent huge page along with 4k hash pte on power bare metal platform.
Patch "powerpc: mm: Use read barrier when creating real_pte" is not really
related to thp, but was added in the series because it is fixing a
On Mon, Jul 07, 2014 at 10:25:54PM +0100, Scott Wood wrote:
> On Thu, 2014-07-03 at 23:08 -0500, Jain Priyanka-B32167 wrote:
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Friday, July 04, 2014 3:40 AM
> > > To: Jain Priyanka-B32167
> > > Cc: devicet...@vger.kernel.
On Tue, Jul 29, 2014 at 2:57 PM, Benjamin Herrenschmidt
wrote:
> On Mon, 2014-07-28 at 15:58 +0800, Liu ping fan wrote:
>> Hope I am right. Take the following seq as an example
>>
>> if (hptep[0] & HPTE_V_VALID) {
>> /* HPTE was previously valid, so we need to invalidate it */
>> unlock_rmap(rmap
On Mon, 2014-07-28 at 15:58 +0800, Liu ping fan wrote:
> Hope I am right. Take the following seq as an example
>
> if (hptep[0] & HPTE_V_VALID) {
> /* HPTE was previously valid, so we need to invalidate it */
> unlock_rmap(rmap);
> hptep[0] |= HPTE_V_ABSENT;
> kvmppc_invalidate_hpte(kvm, hptep, i
On Tue, 2014-07-29 at 12:25 +0530, Aneesh Kumar K.V wrote:
> We want to make sure for usage like below we don't reorder the load.
>
> if (pmd_trans_huge(*pmdp)){
>
>get_hpte_slot_array(pmdp)
> }
Shouldn't we also make sure that we don't have lock set ? (In case it's
in the middle of being u
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