This avoids the following build-error when building with emtpy
vulkan-drivers and without glx=dri:
Meson encountered an error in file src/vulkan/wsi/meson.build, line 30,
column 2:
Unknown variable "dep_xcb".
Signed-off-by: Erik Faye-Lund
---
src/meson.build | 4 +++-
1
On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
> The automatic exec size inference can accidentally mess things up if
> we're not careful. For instance, if we have
>
> add(4)g38.2<4>Dg38.1<8,2,4>Dg38.2<8,2,4>D
>
> then the destination register will end up having a width of
On 26 October 2017 at 23:48, Mauro Rossi wrote:
> Having moved gallium_dri.so library to /vendor/lib/dri
> also symlinks need to be coherently created using TARGET_OUT_VENDOR insted of
> TARGET_OUT
> or all non Intel drivers will not be loaded with Android N and earlier,
>
On Friday, October 27, 2017 4:26:32 AM PDT Pohjolainen, Topi wrote:
> On Fri, Oct 27, 2017 at 03:02:59AM -0700, Kenneth Graunke wrote:
> > On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote:
> > > Fixes intermittent GPU hangs on Broxton with an Intel internal
> > > test case.
>
On Fri, Oct 27, 2017 at 03:02:59AM -0700, Kenneth Graunke wrote:
> On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote:
> > Fixes intermittent GPU hangs on Broxton with an Intel internal
> > test case.
> >
> > There are plenty of similar fragment shaders in piglit that do
> >
On 27 October 2017 at 00:57, Dylan Baker wrote:
> Which allows the code to be compiled with c99 instead of gnu99.
>
> A little history. This code is guarded by #ifdef __GNUC__, so it's only
> compiled with autotools on *nix, SCons with MSVC wont hit that code.
> However,
On Thursday, 2017-10-26 13:55:35 -0700, Dylan Baker wrote:
> Quoting Eric Engestrom (2017-10-26 02:40:20)
> > On Wednesday, 2017-10-25 15:58:23 -0700, Dylan Baker wrote:
> > > This has been tested with the osdemo from mesa-demos
> > >
> > > Signed-off-by: Dylan Baker
>
For the series
Reviewed-by: Emil Velikov
-Emil
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On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
> Originally we tried to handle this case based on
> slots_valid. However,
> there are a number of ways that this can go wrong. For one, we throw
> away any trailing slots which either aren't written or are set to
> VARYING_SLOT_PAD.
I
Reviewed-by: Timothy Arceri
On 10/10/17 23:09, Nicolai Hähnle wrote:
From: Nicolai Hähnle
The dynamic index of a vector (not array!) is lowered to a sequence of
conditional assignments. However, the interpolate_at_* expressions
require that the
I meant to review this a while ago. Sorry for the delay.
Reviewed-by: Timothy Arceri
On 10/10/17 23:09, Nicolai Hähnle wrote:
From: Nicolai Hähnle
The intended rule has been clarified in GLSL 4.60, Section 8.13.2
(Interpolation Functions):
On Friday, October 27, 2017 2:56:45 AM PDT Tapani Pälli wrote:
> brw_bo_unreference handles NULL case
>
> Signed-off-by: Tapani Pälli
> ---
> src/mesa/drivers/dri/i965/brw_context.c | 16 ++--
> 1 file changed, 6 insertions(+), 10 deletions(-)
>
> diff --git
This should be squashed into the previous commit
On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
> With the advent of SPIR-V subgroup operations, compute shaders will
> have
> to be slightly different depending on the SIMD size at which they
> execute. In order to allow us to do
On Wednesday, October 25, 2017 10:37:37 AM PDT Topi Pohjolainen wrote:
> Fixes intermittent GPU hangs on Broxton with an Intel internal
> test case.
>
> There are plenty of similar fragment shaders in piglit that do
> not use any varyings and any uniforms. According to the
> documentation special
On 10/27/2017 12:57 PM, Kenneth Graunke wrote:
On Friday, October 27, 2017 2:08:36 AM PDT Emil Velikov wrote:
On 27 October 2017 at 07:52, Tapani Pälli wrote:
Valgrind shows that leak is caused by gen6_upload_push_constant, add
unref push_const_bo per stage to
On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
> With the advent of SPIR-V subgroup operations, compute shaders will
> have
> to be slightly different depending on the SIMD size at which they
> execute. In order to allow us to do dispatch-width specific things
> in
> NIR, we re-run the
On Friday, October 27, 2017 2:08:36 AM PDT Emil Velikov wrote:
> On 27 October 2017 at 07:52, Tapani Pälli wrote:
> > Valgrind shows that leak is caused by gen6_upload_push_constant, add
> > unref push_const_bo per stage to destructor to fix this (like done for
> >
Valgrind shows that leak is caused by gen6_upload_push_constant, add
unref push_const_bo per stage to destructor to fix this (like done for
scratch_bo).
==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66
==10952==at 0x4C30A1E: calloc (vg_replace_malloc.c:711)
brw_bo_unreference handles NULL case
Signed-off-by: Tapani Pälli
---
src/mesa/drivers/dri/i965/brw_context.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
Thanks for fixing this.
Reviewed-by: Antia Puentes
On 27/10/17 11:18, Alejandro Piñeiro wrote:
From the spec:
"IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the
resource when used as an image textures is returned in
. This is equivalent to
From the spec:
"IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the
resource when used as an image textures is returned in
. This is equivalent to calling GetTexParameter"
So we would need to return None for any target not supported by
GetTexParameter. By mistake, we
On Wed, 2017-10-25 at 16:26 -0700, Jason Ekstrand wrote:
> Previously, brw_nir_lower_intrinsics added the param and then emitted
> a
> load_uniform intrinsic to load it directly. This commit switches
> things
> over to use a specific NIR intrinsic for the thread id. The one
> thing I
> don't
On 27 October 2017 at 07:52, Tapani Pälli wrote:
> Valgrind shows that leak is caused by gen6_upload_push_constant, add
> unref push_const_bo per stage to destructor to fix this (like done for
> scratch_bo).
>
>==10952== 144 bytes in 1 blocks are definitely lost in
Pushed with "clear_db_cache_before_clear", Thanks Marek.
On 10/26/2017 10:42 PM, Marek Olšák wrote:
Please "clear_db_cache_before_clear" and the option too. With that,
the patch is:
Reviewed-by: Marek Olšák
Thanks,
Marek
On Thu, Oct 26, 2017 at 6:08 PM, Samuel Pitoiset
On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote:
> The only things that adjust fs_visitor::max_dispatch_width are render
> target writes which don't happen in compute shaders so they're
> pointless.
> ---
> src/intel/compiler/brw_fs.cpp | 6 ++
> 1 file changed, 2 insertions(+), 4
Reviewed-by: Tapani Pälli
On 10/27/2017 01:48 AM, Mauro Rossi wrote:
Having moved gallium_dri.so library to /vendor/lib/dri
also symlinks need to be coherently created using TARGET_OUT_VENDOR insted of
TARGET_OUT
or all non Intel drivers will not be loaded with Android
Am Donnerstag, den 26.10.2017, 17:28 +0100 schrieb Emil Velikov:
>
> > .../tests/test_glsl_to_tgsi_lifetime.cpp | 1278
> > +++-
>
> JFYI you'd want to explicitly undef NDEBUG in the test.
> git grep -10 "#undef NDEBUG" - for examples
>
> Otherwise the asserts will
This sounds good to me, but I guess it is not really fixing anything,
right? I ask because the subject claims that this patch does something
that the original code was already supposed to be doing.
On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote:
> Before, we bailing in
On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote:
> ---
> src/intel/compiler/brw_fs.cpp | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs.cpp
> b/src/intel/compiler/brw_fs.cpp
> index 1c4351b..52079d3 100644
> ---
On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote:
> ---
> src/intel/compiler/brw_fs_nir.cpp | 33 +--
> --
> 1 file changed, 21 insertions(+), 12 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_nir.cpp
> b/src/intel/compiler/brw_fs_nir.cpp
> index
Valgrind shows that leak is caused by gen6_upload_push_constant, add
unref push_const_bo per stage to destructor to fix this (like done for
scratch_bo).
==10952== 144 bytes in 1 blocks are definitely lost in loss record 44 of 66
==10952==at 0x4C30A1E: calloc (vg_replace_malloc.c:711)
On Wed, 2017-10-25 at 16:25 -0700, Jason Ekstrand wrote:
> Stop retyping the output of shuffle_64bit_data_for_32bit_write. It's
> always BRW_REGISTER_TYPE_D which is perfectly fine for writing out.
> Also, when we change get_nir_src to return something with a 64-bit
> type
> for 64-bit values,
Signed-off-by: Jordan Justen
Reviewed-by: Jason Ekstrand
Cc: Jason Ekstrand
Cc: Kenneth Graunke
---
* Add comment (Ken)
* No typedef (Jason)
src/intel/compiler/brw_compiler.h | 20
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