Re: [PATCH net] net: axienet: fix a signedness bug in probe

2019-09-25 Thread Alvaro G. M
f_node); > - if (lp->phy_mode < 0) { > + if ((int)lp->phy_mode < 0) { This (almost) exact code appears in a lot of different drivers too, so maybe it'd be nice to review them all and apply the same cast if needed? Best regards -- Alvaro G. M.

Re: Xilinx axienet + DP83620 in fiber mode won't set netif_carrier_on

2018-05-16 Thread Alvaro G. M.
link that reads a different register to check for fiber connectivity instead of using genphy_update_link, which I see reads from MII_BMSR.BMSR_LSTATUS It looks like the DP83620 may do something similar, and the fiber status may be accesible from some other register. This starts to make sense, thanks for setting my on track! Best regards! -- Alvaro G. M.

Xilinx axienet + DP83620 in fiber mode won't set netif_carrier_on

2018-05-16 Thread Alvaro G. M.
eded, and please, feel free to correct me if I've said anything incorrect, which most probably I've done. Best regards -- Alvaro G. M.

xilinx_axienet: No interrupts asserted in Tx path?

2017-04-03 Thread Alvaro G. M.
a hardware (VHDL-block design) problem nevertheless. Any ideas? Thanks, best ergards! -- Alvaro G. M.