> > diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> > index 052540a866ac..a0e4acb707d7 100644
> > --- a/target/s390x/cpu_models.c
> > +++ b/target/s390x/cpu_models.c
> > @@ -560,16 +560,15 @@ S390CPUModel *get_max_cpu_model(Error **errp)
> > }
> > if (kvm_enabled())
On 4/16/24 11:18, Jamin Lin wrote:
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35 CPU).
AST2700 SOC and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new ast2700
class with instance_init and realize handlers.
AST
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
As error.h suggested, the best practice for callee is to return
something to indicate success / failure.
With returned boolean, there's no need to check @err.
Suggested-by: Thomas Huth
Signed-off-by: Zhao Liu
---
target/s390x/cpu_models.
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
Use @errp to fetech error information directly and drop the local
s/fetech/fetch/
virable @err.
s/virable/variable/
Suggested-by: Thomas Huth
Signed-off-by: Zhao Liu
---
target/s390x/cpu_models.c | 4 +---
1 file changed, 1 insert
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
As error.h suggested, the best practice for callee is to return
something to indicate success / failure.
So make kvm_s390_get_host_cpu_model() return boolean and check the
returned boolean in get_max_cpu_model() instead of accessing @err.
Ad
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
Use @errp to fetech error information directly and drop the local
virable @err.
Copy-n-paste of the same typos as in patch 2 ;-)
Signed-off-by: Zhao Liu
---
target/s390x/cpu_models.c | 4 +---
1 file changed, 1 insertion(+), 3 deletion
Hi Cedric,
> On 4/16/24 11:18, Jamin Lin wrote:
> > Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35
> CPU).
> >
> > AST2700 SOC and its interrupt controller are too complex to handle in
> > the common Aspeed SoC framework. We introduce a new ast2700 class with
> > instanc
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
As error.h suggested, the best practice for callee is to return
something to indicate success / failure.
So make kvm_s390_apply_cpu_model() return boolean and check the
returned boolean in apply_cpu_model() instead of accessing @err.
Signed-
On 19/04/2024 08.57, Zhao Liu wrote:
From: Zhao Liu
Use @errp to fetech error information directly and drop the local
virable @err.
With the typos fixed:
Reviewed-by: Thomas Huth
On Thu, Apr 18, 2024 at 10:46 PM Si-Wei Liu wrote:
>
>
>
> On 4/10/2024 3:03 AM, Eugenio Pérez wrote:
> > IOVA tree is also used to track the mappings of virtio-net shadow
> > virtqueue. This mappings may not match with the GPA->HVA ones.
> >
> > This causes a problem when overlapped regions (dif
Hi Thomas,
On Fri, Apr 19, 2024 at 09:50:46AM +0200, Thomas Huth wrote:
> Date: Fri, 19 Apr 2024 09:50:46 +0200
> From: Thomas Huth
> Subject: Re: [PATCH 3/6] target/s390x/cpu_models: Make
> kvm_s390_get_host_cpu_model() return boolean
>
> On 19/04/2024 08.57, Zhao Liu wrote:
> > From: Zhao Liu
On Fri, Apr 19, 2024 at 09:39:53AM +0200, Thomas Huth wrote:
> Date: Fri, 19 Apr 2024 09:39:53 +0200
> From: Thomas Huth
> Subject: Re: [PATCH 2/6] target/s390x/cpu_model: Drop local @err in
> s390_realize_cpu_model()
>
> On 19/04/2024 08.57, Zhao Liu wrote:
> > From: Zhao Liu
> >
> > Use @err
Commit b447378e12 ("qom/object: Limit type names to alphanumerical ...")
cut down the amount of allowed characters for QOM types to a saner set.
The "+" character was meant to be included in this set, so we had to
add a hack there to still allow the legacy names of POWER and Sparc64
CPUs. However,
Add some words about how to enable or disable boolean features,
and remove the note about a Linux kernel being available on the
QEMU website (they have been removed long ago already), and the
note about NetBSD and OpenBSD still having issues (they should
work fine nowadays).
Fixes: https://gitlab.
For consistency we should drop the names with a "+" in it in the
long run.
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 9 +
1 file changed, 9 insertions(+)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 6b932961bc..
The Sparc CPU naming and the corresponding help text is somewhat
confusing for the users. We should avoid spaces in the Names and
provide clear information to the users what can be passed to the
"-cpu" option.
While we're at it, also remove the "+" from two of the CPU names
since this character is
The output of "-cpu help" is currently rather confusing to the users:
It might not be fully clear which part of the output defines the CPU
names since the CPU names contain white spaces (which we later have to
convert into dashes internally). At best it's at least a nuisance since
the users might n
On 2024/04/19 4:00, Dmitry Osipenko wrote:
Add new "suspended" flag to virtio_gpu_ctrl_command telling cmd
processor that it should stop processing commands and retry again
next time until flag is unset.
Signed-off-by: Dmitry Osipenko
This flag shouldn't be added to virtio_gpu_ctrl_command. s
We are running this test since almost a year; it is
safe to remove its debug statements, which clutter
CI jobs output:
▶ 88/100 /nested-aio-poll OK
io_read 0x16bb26158
io_poll_true 0x16bb26158
> io_poll_ready
io_read 0x16bb26164
< io_poll_ready
io_poll_true 0x16
On 19/4/24 10:48, Thomas Huth wrote:
For consistency we should drop the names with a "+" in it in the
long run.
Reviewed-by: Mark Cave-Ayland
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 9 +
1 file changed, 9 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 16/04/2024 21:56, Andrey Drobyshev wrote:
On 10/27/23 14:10, Jean-Louis Dupond wrote:
[...]
I've checked all the code paths, and as far as I see it nowhere breaks
the discard_no_unref option.
It's important that we don't introduce new code paths that can make
holes in the qcow2 image when th
Since the calls are elided when KVM is not available,
we can remove the stubs (which are never compiled).
Inspired-by: Thomas Huth >
Signed-off-by: Philippe Mathieu-Daudé
---
RFC: untested =) Inspired by
https://lore.kernel.org/qemu-devel/0ae778e1-b4aa-4021-bdbc-4c6a663db...@redhat.com/
---
targ
Hi Richard,
On 4/16/24 23:26, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the following instructions to decodetree specification :
mulli : D-form
mul{lw, lwo, hw, hwu}[.] : XO-form
The changes were verified by validating that the tcg o
On 19/4/24 10:44, Zhao Liu wrote:
Hi Thomas,
On Fri, Apr 19, 2024 at 09:50:46AM +0200, Thomas Huth wrote:
Date: Fri, 19 Apr 2024 09:50:46 +0200
From: Thomas Huth
Subject: Re: [PATCH 3/6] target/s390x/cpu_models: Make
kvm_s390_get_host_cpu_model() return boolean
On 19/04/2024 08.57, Zhao Liu
On 19/4/24 11:06, Philippe Mathieu-Daudé wrote:
Since the calls are elided when KVM is not available,
we can remove the stubs (which are never compiled).
Inspired-by: Thomas Huth >
Signed-off-by: Philippe Mathieu-Daudé
---
RFC: untested =)
Now tested!
Inspired by
https://lore.kernel.org/qem
Hi Richard,
On 4/16/24 23:27, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
The handler methods for divw[u] instructions internally use
Rc(ctx->opcode),
for extraction of Rc field of instructions, which poses a problem if
we move
the above said instructions to decodetree, as t
On 2024/04/19 4:00, Dmitry Osipenko wrote:
From: Antonio Caggiano
Support BLOB resources creation, mapping and unmapping by calling the
new stable virglrenderer 0.10 interface. Only enabled when available and
via the blob config. E.g. -device virtio-vga-gl,blob=true
Signed-off-by: Antonio Cagg
On 4/16/24 23:49, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the following instructions to decodetree specification :
divw[u, e, eu][o][.] : XO-form
The changes were verified by validating that the tcg ops generated by
those
instructions remain the same, whi
On 4/16/24 23:55, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the below instructions to decodetree specification :
neg[o][.] : XO-form
mod{sw, uw}, darn : X-form
The changes were verified by validating that the tcg ops generated by
those
instr
On Fri, 19 Apr 2024 at 04:49, 姜智伟 wrote:
>
> > On 4/18/24 03:27, Zhiwei Jiang wrote:
> > > Sometimes, when the address of the passed TCGTemp *ts variable is the
> > > same as tcg_ctx,
> >
> > Pardon? When would TCGTemp *ts == TCGContext *tcg_ctx?
> >
> >
> > > the index calculated in the temp_id
Hi Eric,
On Thu, Apr 18, 2024 at 08:11:06PM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 4/8/24 16:08, Mostafa Saleh wrote:
> > Currently, QEMU supports emulating either stage-1 or stage-2 SMMUs
> > but not nested instances.
> > This patch series adds support for nested translation in SMMUv3,
>
Hi Richard,
On 4/17/24 00:06, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
+static bool trans_MADDHDU(DisasContext *ctx, arg_MADDHDU *a)
...
+ tcg_gen_movi_i64(t1, 0);
Drop the movi.
+ tcg_gen_add2_i64(t1, cpu_gpr[a->vrt], lo, hi, cpu_gpr[a->rc], t1);
Use tcg_con
Hi Richard,
On 4/17/24 00:50, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the following instructions to decodetree specification :
cmp{rb, eqb}, t{w, d} : X-form
t{w, d}i : D-form
isel : A-form
The changes were verified by validating
On 2024/04/19 4:00, Dmitry Osipenko wrote:
From: Antonio Caggiano
Enable resource UUID feature and implement command resource assign UUID.
UUID feature availability is mandatory for Vulkan Venus context.
UUID is intended for sharing dmabufs between virtio devices on host. Qemu
doesn't have sec
On 4/17/24 01:05, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the below instructions to decodetree specification :
andi[s]., {ori, xori}[s] : D-form
{and, andc, nand, or, orc, nor, xor, eqv}[.],
exts{b, h, w}[.], cnt{l, t}z{w, d}[.],
pop
Hi,
On macOS, the fuzz-virtio-scsi-test triggers
virtio_error(vdev, "Cannot map used") from
virtio_init_region_cache():
QTEST_QEMU_BINARY=./qemu-system-x86_64 tests/qtest/fuzz-virtio-scsi-test
# Start of x86_64 tests
# Start of fuzz tests
# starting QEMU: exec ./qemu-system-x86_64 ...
-M pc-q3
On 2024/04/19 4:00, Dmitry Osipenko wrote:
From: Pierre-Eric Pelloux-Prayer
virtio_gpu_virgl_get_num_capsets will return "num_capsets", but we can't
assume that capset_index 1 is always VIRGL2 once we'll support more capsets,
like Venus and DRM capsets. Register capsets dynamically to avoid tha
> > > On 4/18/24 03:27, Zhiwei Jiang wrote:
> > > > Sometimes, when the address of the passed TCGTemp *ts variable is the
> > > > same as tcg_ctx,
> > >
> > > Pardon? When would TCGTemp *ts == TCGContext *tcg_ctx?
> > >
> > >
> > > > the index calculated in the temp_idx function, i.e., ts -
> >
On 2024/04/19 4:00, Dmitry Osipenko wrote:
From: Antonio Caggiano
Request Venus when initializing VirGL and if vulkan=true flag is set for
virtio-gpu device.
Signed-off-by: Antonio Caggiano
Signed-off-by: Huang Rui
Signed-off-by: Dmitry Osipenko
---
hw/display/virtio-gpu-virgl.c | 14 +++
On 4/17/24 00:08, Richard Henderson wrote:
On 4/15/24 23:39, Chinmay Rath wrote:
Moving the below instructions to decodetree specification :
divd[u, e, eu][o][.] : XO-form
mod{sd, ud} : X-form
With this patch, all the fixed-point arithmetic instructions have been
moved to
>-Original Message-
>From: Cédric Le Goater
>Subject: Re: [PATCH v2 3/5] intel_iommu: Add a framework to do
>compatibility check with host IOMMU cap/ecap
>
>Hello Zhenzhong,
>
>On 4/18/24 10:42, Duan, Zhenzhong wrote:
>> Hi Cédric,
>>
>>> -Original Message-
>>> From: Cédric Le Go
On Thu, Apr 18, 2024 at 04:02:49PM -0400, Peter Xu wrote:
> On Thu, Apr 18, 2024 at 08:14:15PM +0200, Maciej S. Szmigiero wrote:
> > I think one of the reasons for these results is that mixed (RAM + device
> > state) multifd channels participate in the RAM sync process
> > (MULTIFD_FLAG_SYNC) where
On Thu, Apr 18, 2024 at 08:14:15PM +0200, Maciej S. Szmigiero wrote:
> On 18.04.2024 12:39, Daniel P. Berrangé wrote:
> > On Thu, Apr 18, 2024 at 11:50:12AM +0200, Maciej S. Szmigiero wrote:
> > > On 17.04.2024 18:35, Daniel P. Berrangé wrote:
> > > > On Wed, Apr 17, 2024 at 02:11:37PM +0200, Macie
On Fri, 19 Apr 2024 at 10:37, 姜智伟 wrote:
> Peter Maydell wrote:
> > I feel like this might be a bug elsewhere. Can you provide
> > a repro binary and command line?
>
> The test file has been attached with RISCV CBO instruction as the first
> instruction to execute, with command-line arguments as
Hi Eric,
On Thu, Apr 18, 2024 at 02:51:59PM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 4/8/24 16:08, Mostafa Saleh wrote:
> > According to the user manual (ARM IHI 0070 F.b),
> s/user manual/ARM SMMU architecture specification
> > In "5.2 Stream Table Entry":
> > [51:6] S1ContextPtr
> > If C
On Thu, Apr 11, 2024 at 11:38:41AM +0200, Philippe Mathieu-Daudé wrote:
> On 11/4/24 00:27, BALATON Zoltan wrote:
> > On Wed, 10 Apr 2024, Richard Henderson wrote:
> > > On 4/10/24 06:06, Philippe Mathieu-Daudé wrote:
> > > > Hi,
> > > >
> > > > sprintf() is deprecated on Darwin since macOS 13.0 /
Hi Eric,
On Thu, Apr 18, 2024 at 03:54:01PM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 4/8/24 16:08, Mostafa Saleh wrote:
> > When nested translation is requested, do the following:
> >
> > - Translate stage-1 IPA using stage-2 to a physical address.
> > - Translate stage-1 PTW walks using sta
Hi Eric,
On Thu, Apr 18, 2024 at 04:48:39PM +0200, Eric Auger wrote:
> Hi Mostafa,
>
> On 4/8/24 16:08, Mostafa Saleh wrote:
> > Some commands need rework for nesting, as they used to assume S1
> > and S2 are mutually exclusive:
> >
> > - CMD_TLBI_NH_ASID: Consider VMID if stage-2 is supported
>
On 19/4/24 12:21, Peter Maydell wrote:
On Fri, 19 Apr 2024 at 10:37, 姜智伟 wrote:
Peter Maydell wrote:
I feel like this might be a bug elsewhere. Can you provide
a repro binary and command line?
The test file has been attached with RISCV CBO instruction as the first
instruction to execute, wi
We need to use get_address() to get an address from cpu_gpr[],
since $zero is "special" (NULL).
Fixes: e05da09b7c ("target/riscv: implement Zicbom extension")
Reported-by: Zhiwei Jiang (姜智伟)
Signed-off-by: Philippe Mathieu-Daudé
---
target/riscv/insn_trans/trans_rvzicbo.c.inc | 8
1 fi
On 19/4/24 13:05, Philippe Mathieu-Daudé wrote:
We need to use get_address() to get an address from cpu_gpr[],
since $zero is "special" (NULL).
Cc: qemu-sta...@nongnu.org
Fixes: e05da09b7c ("target/riscv: implement Zicbom extension")
Reported-by: Zhiwei Jiang (姜智伟)
Signed-off-by: Philippe M
Hi,
> Gerd, any ideas? Maybe I needs something subtly different in my
> edk2 build? I've not looked at this bit of the qemu infrastructure
> before - is there a document on how that image is built?
There is roms/Makefile for that.
make -C roms help
make -C roms efi
So easiest would be to ju
On 4/18/24 13:41, Arnd Bergmann wrote:
On Thu, Apr 18, 2024, at 17:44, Joseph Myers wrote:
On Wed, 17 Apr 2024, Sandra Loosemore wrote:
Therefore I'd like to mark Nios II as obsolete in GCC 14 now, and remove
support from all toolchain components after the release is made. I'm not sure
the
On Thu, Apr 18, 2024 at 12:10:44PM +0200, Thomas Huth wrote:
> Since Ubuntu 22.04 is now available since two years, we can stop
Grammar suggestion:
Since Ubuntu 22.04 has now been available for more than two years,
> actively supporting the previous LTS version of Ubuntu now.
>
> Reviewed-by: P
On Fri, Apr 19, 2024 at 10:58:19AM +0200, Philippe Mathieu-Daudé wrote:
> We are running this test since almost a year; it is
Grammar suggestion:
We have been running this test for almost a year;
> safe to remove its debug statements, which clutter
> CI jobs output:
>
> ▶ 88/100 /nested-aio-
On Thu, Apr 18, 2024 at 12:10:47PM +0200, Thomas Huth wrote:
> RHEL 9 (and thus also the derivatives) are available since two years
> now, so according to QEMU's support policy, we can drop the active
Grammar suggestion:
RHEL 9 (and thus also the derivatives) have been available for two years now
On Thu, Apr 18, 2024 at 12:10:52PM +0200, Thomas Huth wrote:
> Since version 2.66, glib has useful URI parsing functions, too.
> Use those instead of the QEMU-internal ones to be finally able
> to get rid of the latter.
>
> Since g_uri_get_path() returns a const pointer, we also need to
> tweak th
On Sun, 7 Apr 2024 at 09:19, Jinjie Ruan wrote:
>
> This patch set implements FEAT_NMI and FEAT_GICv3_NMI for ARMv8. These
> introduce support for a new category of interrupts in the architecture
> which we can use to provide NMI like functionality.
I had one last loose end I wanted to tidy up, a
On 4/16/24 11:18, Jamin Lin wrote:
DMA length is from 1 byte to 32MB for AST2600 and AST10x0
and DMA length is from 4 bytes to 32MB for AST2500.
In other words, if "R_DMA_LEN" is 0, it should move at least 1 byte
data for AST2600 and AST10x0 and 4 bytes data for AST2500.
To support all ASPEED S
On Fri, 5 Apr 2024 00:07:06 +
"Ho-Ren (Jack) Chuang" wrote:
> The current implementation treats emulated memory devices, such as
> CXL1.1 type3 memory, as normal DRAM when they are emulated as normal memory
> (E820_TYPE_RAM). However, these emulated devices have different
> characteristics t
On Tue, 9 Apr 2024 at 14:38, Peter Maydell wrote:
>
> On Tue, 9 Apr 2024 at 14:32, Anastasia Belova wrote:
> >
> >
> >
> > 09/04/24 15:02, Peter Maydell пишет:
> > > On Tue, 9 Apr 2024 at 12:54, Anastasia Belova
> > > wrote:
> > >> ch->num can reach values up to 31. Add casting to
> > >> a larg
On Fri, 5 Apr 2024 at 15:27, Peter Maydell wrote:
>
> On Fri, 29 Mar 2024 at 17:44, Arnaud Minier
> wrote:
> >
> > This patch adds the STM32L4x5 USART
> > (Universal Synchronous/Asynchronous Receiver/Transmitter)
> > device and is part of a series implementing the
> > STM32L4x5 with a few periphe
John Snow writes:
> This series adds a new qapi-domain extension for Sphinx, which adds a
> series of custom directives for documenting QAPI definitions.
>
> GitLab CI: https://gitlab.com/jsnow/qemu/-/pipelines/1259566476
>
> (Link to a demo HTML page at the end of this cover letter, but I want
>
On Tue, 16 Apr 2024 at 19:11, Don Porter wrote:
>
> On 4/16/24 13:03, Peter Maydell wrote:
> > On Tue, 16 Apr 2024 at 17:53, Don Porter wrote:
> >> There is still a lot I am learning about the code base, but it seems
> >> that qemu_get_guest_memory_mapping() does most of what one would need.
> >>
Hi Michael,
This just got lost somehow. It is still an issue (see
https://gitlab.com/qemu-project/qemu/-/issues/1510 ). I believe this change
fixes the issue.
On Thu, Apr 18, 2024 at 10:43 AM Michael Tokarev wrote:
> 06.02.2024 10:13, Cord Amfmgm wrote:
> > This changes the ohci validation to n
On Thu, 18 Apr 2024 at 21:39, Raphael Poggi
wrote:
>
> Hi Philippe,
>
> Le jeu. 18 avr. 2024 à 20:43, Philippe Mathieu-Daudé
> a écrit :
> >
> > Hi Raphael,
> >
> > On 18/4/24 21:16, Raphael Poggi wrote:
> > > When dealing with few clocks depending with each others, sometimes
> > > we might only
Markus Armbruster writes:
[...]
>> The purpose of sending this series in its current form is largely to
>> solicit feedback on general aesthetics, layout, and features. Sphinx is
>> a wily beast, and feedback at this stage will dictate how and where
>> certain features are implemented.
>
> I'd a
On Fri, Apr 19, 2024 at 11:07:21AM +0100, Daniel P. Berrangé wrote:
> On Thu, Apr 18, 2024 at 04:02:49PM -0400, Peter Xu wrote:
> > On Thu, Apr 18, 2024 at 08:14:15PM +0200, Maciej S. Szmigiero wrote:
> > > I think one of the reasons for these results is that mixed (RAM + device
> > > state) multif
Hi Anthony,
On Thu, Apr 18, 2024 at 12:52:14PM +0200, Anthony Harivel wrote:
> Date: Thu, 18 Apr 2024 12:52:14 +0200
> From: Anthony Harivel
> Subject: Re: [PATCH v5 3/3] Add support for RAPL MSRs in KVM/Qemu
>
> > The package energy consumption includes core part and uncore part, where
> > unco
On 18/4/24 12:04, Zhao Liu wrote:
From: Zhao Liu
---
Zhao Liu (3):
hw/cxl/cxl-cdat: Make ct3_load_cdat() return boolean
hw/cxl/cxl-cdat: Make ct3_build_cdat() return boolean
hw/cxl/cxl-cdat: Make cxl_doe_cdat_init() return boolean
Since Jonathan Ack'ed the series, I'm queuing it v
The confidential guest support in KVM limits the number of registers
that we can read and write. Split the get/put_registers function to
prepare for it.
Signed-off-by: Jean-Philippe Brucker
---
target/arm/kvm.c | 30 --
1 file changed, 28 insertions(+), 2 deletions(-)
Add a new RmeGuest object, inheriting from ConfidentialGuestSupport, to
support the Arm Realm Management Extension (RME). It is instantiated by
passing on the command-line:
-M virt,confidential-guest-support=
-object guest-rme,id=[,options...]
This is only the skeleton. Support will be added
When RME is enabled, the upper GPA bit is used to distinguish protected
from unprotected addresses. Reserve it when setting up the guest memory
map.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2: separate patch
---
hw/arm/virt.c | 14 --
1 file changed, 12 insertions(+), 2 deletion
Some ID registers have a different value for a Realm VM, for example
ID_AA64DFR0_EL1 contains the number of breakpoints/watchpoints
implemented by RMM instead of the hardware.
Even though RMM is in charge of setting up most Realm registers, KVM
still provides GET_ONE_REG interface on a Realm VM to
When confidential-guest-support is enabled for the virt machine, call
the RME init function, and add the RME flag to the VM type.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2:
* Don't explicitly disable steal_time, it's now done through KVM capabilities
* Split patch
---
hw/arm/virt.c | 15 ++
The Realm Personalization Value (RPV) is provided by the user to
distinguish Realms that have the same initial measurement.
The user provides up to 64 hexadecimal bytes. They are stored into the
RPV in the same order, zero-padded on the right.
Cc: Eric Blake
Cc: Markus Armbruster
Cc: Daniel P.
The KVM_CHECK_EXTENSION ioctl can be issued either on the global fd
(/dev/kvm), or on the VM fd obtained with KVM_CREATE_VM. For most
extensions, KVM returns the same value with either method, but for some
of them it can refine the returned value depending on the VM type. The
KVM documentation [1]
Returning an error to kvm_init() is fatal anyway, no need to continue
the initialization.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2: new
---
target/arm/kvm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index 3371ffa401..a5673241
These patches enable launching a confidential guest with QEMU KVM on
Arm. The KVM changes for CCA have now been posted as v2 [1]. Launching a
confidential VM requires two additional command-line parameters:
-M confidential-guest-support=rme0
-object rme-guest,id=rme0
Since the RFC
The flash device that holds firmware code relies on read-only stage-2
mappings. Read accesses behave as RAM and write accesses as MMIO. Since
the RMM does not support read-only mappings we cannot use the flash
device as-is.
That isn't a problem because the firmware does not want to disclose any
in
Request that RAM block uses the KVM guest memfd call to allocate guest
memory. With RME, guest memory is not accessible by the host, and using
guest memfd ensures that the host kernel is aware of this and doesn't
attempt to access guest pages.
Done in a separate patch because ms->require_guest_mem
Add a "num-pmu-counters" CPU parameter to configure the number of
counters that KVM presents to the guest. This is needed for Realm VMs,
whose parameters include the number of PMU counters and influence the
Realm Initial Measurement.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2: new
---
targe
For confidential VMs we'll want to skip flash device creation.
Unfortunately, in virt_instance_init() the machine->cgs member has not
yet been initialized, so we cannot check whether confidential guest is
enabled. Move virt_flash_create() to machvirt_init(), where we can
access the machine->cgs mem
Collect the images copied into guest RAM into a sorted list, and issue
POPULATE_REALM KVM ioctls once we've created the Realm Descriptor. The
images are part of the Realm Initial Measurement.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2: Use a ROM loader notifier
---
target/arm/kvm-rme.c | 97
Add a function to register a notifier, that is invoked after a ROM gets
loaded into guest memory.
It will be used by Arm confidential guest support, in order to register
all blobs loaded into memory with KVM, so that their content is part of
the initial VM measurement and contribute to the guest a
Add "num-breakpoints" and "num-watchpoints" CPU parameters to configure
the debug features that KVM presents to the guest. The KVM vCPU
configuration is modified by calling SET_ONE_REG on the ID register.
This is needed for Realm VMs, whose parameters include breakpoints and
watchpoints, and influ
The target code calls kvm_arm_vcpu_init() to mark the vCPU as part of a
Realm. For a Realm vCPU, only x0-x7 can be set at runtime. Before boot,
the PC can also be set, and is ignored at runtime. KVM also accepts a
few system register changes during initial configuration, as returned by
KVM_GET_REG_
The machine code calls kvm_arm_rme_vm_type() to get the VM flag and KVM
calls kvm_arm_rme_init() to issue KVM hypercalls:
* create the realm descriptor,
* load images into Realm RAM (in another patch),
* finalize the REC (vCPU) after the registers are reset,
* activate the realm at the end, at whi
This option selects which measurement algorithm to use for attestation.
Supported values are SHA256 and SHA512. Default to SHA512 arbitrarily.
SHA512 is generally faster on 64-bit architectures. On a few arm64 CPUs
I tested SHA256 is much faster, but that's most likely because they only
support ac
Although the BSS section is not currently part of the kernel blob, it
needs to be registered as guest RAM for confidential guest support,
because the kernel needs to access it before it is able to setup its RAM
regions.
It would be tempting to simply add the BSS as part of the ROM blob (ie
pass ke
The host cannot access registers of a Realm. Instead of showing all
registers as zero in "info registers", display a message about this
restriction.
Signed-off-by: Jean-Philippe Brucker
---
v1->v2: new
---
target/arm/cpu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/arm/cpu.c
A realm cannot be reset, it must be recreated from scratch. The RMM
specification defines states of a Realm as NEW -> ACTIVE -> SYSTEM_OFF,
after which the Realm can only be destroyed. A PCSI_SYSTEM_RESET call,
which normally reboots the system, puts the Realm in SYSTEM_OFF state.
QEMU does not su
The dtb-randomness feature, which adds random seeds to the DTB, isn't
really compatible with confidential VMs since it randomizes the Realm
Initial Measurement. Enabling it is not an error, but it prevents
attestation. It also isn't useful to a Realm, which doesn't trust host
input.
Currently the
Hi Peter,
Le ven. 19 avr. 2024 à 16:08, Peter Maydell a écrit :
>
> On Thu, 18 Apr 2024 at 21:39, Raphael Poggi
> wrote:
> >
> > Hi Philippe,
> >
> > Le jeu. 18 avr. 2024 à 20:43, Philippe Mathieu-Daudé
> > a écrit :
> > >
> > > Hi Raphael,
> > >
> > > On 18/4/24 21:16, Raphael Poggi wrote:
> >
On Fri, 19 Apr 2024 13:52:07 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > Gerd, any ideas? Maybe I needs something subtly different in my
> > edk2 build? I've not looked at this bit of the qemu infrastructure
> > before - is there a document on how that image is built?
>
> There is roms/Makefil
On Fri, 19 Apr 2024 at 17:09, Raphael Poggi
wrote:
>
> Hi Peter,
>
> Le ven. 19 avr. 2024 à 16:08, Peter Maydell a
> écrit :
> >
> > On Thu, 18 Apr 2024 at 21:39, Raphael Poggi
> > wrote:
> > > There is an assert "assert(clk->source == NULL);" in clock_propagate().
> > > If I am not wrong, clk-
On Fri, Apr 19, 2024 at 04:56:50PM +0100, Jean-Philippe Brucker wrote:
> Add a new RmeGuest object, inheriting from ConfidentialGuestSupport, to
> support the Arm Realm Management Extension (RME). It is instantiated by
> passing on the command-line:
>
> -M virt,confidential-guest-support=
> -o
This commit allows childs clock to propagate their new frequency,
for example, after setting a new multiplier/diviser.
Signed-off-by: Raphael Poggi
---
hw/core/clock.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/core/clock.c b/hw/core/clock.c
index 85421f8b55..174c8be095 100644
--- a/h
On 19/4/24 18:08, Raphael Poggi wrote:
Hi Peter,
Le ven. 19 avr. 2024 à 16:08, Peter Maydell a écrit :
On Thu, 18 Apr 2024 at 21:39, Raphael Poggi
wrote:
Hi Philippe,
Le jeu. 18 avr. 2024 à 20:43, Philippe Mathieu-Daudé
a écrit :
Hi Raphael,
On 18/4/24 21:16, Raphael Poggi wrote:
Whe
On Fri, Apr 19, 2024, 10:45 AM Markus Armbruster wrote:
> John Snow writes:
>
> > This series adds a new qapi-domain extension for Sphinx, which adds a
> > series of custom directives for documenting QAPI definitions.
> >
> > GitLab CI: https://gitlab.com/jsnow/qemu/-/pipelines/1259566476
> >
>
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