On Tue, 2019-12-24 at 03:50 +0800, Ryder Lee wrote:
> On Mon, 2019-12-23 at 17:28 +0800, mingming lee wrote:
> > Update mtk common clock driver to support mt8512
> > 1. add new set_clr_upd mux type and related operation
> > 2. add configurable pcw_chg_reg/ibits/fmin to mtk_pll
> > 3. fix
On Mon, 2019-12-23 at 17:28 +0800, mingming lee wrote:
> Update mtk common clock driver to support mt8512
> 1. add new set_clr_upd mux type and related operation
> 2. add configurable pcw_chg_reg/ibits/fmin to mtk_pll
> 3. fix mtk_clk_find_parent_rate data overflow.
I think these should be split
Update mtk common clock driver to support mt8512
1. add new set_clr_upd mux type and related operation
2. add configurable pcw_chg_reg/ibits/fmin to mtk_pll
3. fix mtk_clk_find_parent_rate data overflow
Signed-off-by: mingming lee
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drivers/clk/mediatek/clk-mtk.c | 72
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