Re: [PATCH v2 0/3] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Edward O'Callaghan 
This series is,
Reviewed-by: Edward O'Callaghan 

On 01/17/2017 04:16 PM, Andrey Grodzovsky wrote:
> This series is a folow-up on
> https://patchwork.kernel.org/patch/9501787/
> 
> The first patch makes changes to atomic helpers to allow for 
> drives with ASYNC flip support to use them.
> Patch 2 is to use this in AMDGPU/DC.
> Patch 3 is possible cleanup in nouveau/kms who seems to have to duplicate 
> the helper as we did to support ASYNC flips. 
> 
> v2: 
> Resend drm/atomic: Save flip flags in drm_plane_state since
> the original patch was incomplete.
> Squash 2 AMD changes into one to not break compilation.
> 
> Andrey Grodzovsky (3):
>   drm/atomic: Save flip flags in drm_plane_state
>   drm/amd/display: Switch to using atomic_helper for flip.
>   drm/nouveau/kms/nv50: Switch to using atomic helper for flip.
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 
> ++
>  drivers/gpu/drm/drm_atomic_helper.c| 18 ++---
>  drivers/gpu/drm/nouveau/nv50_display.c | 77 ++
>  include/drm/drm_plane.h|  8 ++
>  5 files changed, 24 insertions(+), 172 deletions(-)
> 



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[PATCH v2 2/3] drm/amd/display: Switch to using atomic_helper for flip.

2017-01-16 Thread Andrey Grodzovsky 
Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ++
 2 files changed, 6 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 4c0a86e..3ff3c14 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -443,7 +443,6 @@ struct amdgpu_crtc {
enum amdgpu_interrupt_state vsync_timer_enabled;
 
int otg_inst;
-   uint32_t flip_flags;
/* After Set Mode target will be non-NULL */
struct dc_target *target;
 };
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index a443b70..d4664bf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -1060,83 +1060,6 @@ static int dm_crtc_funcs_atomic_set_property(
return 0;
 }
 
-
-static int amdgpu_atomic_helper_page_flip(struct drm_crtc *crtc,
-   struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event,
-   uint32_t flags)
-{
-   struct drm_plane *plane = crtc->primary;
-   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
-   struct drm_atomic_state *state;
-   struct drm_plane_state *plane_state;
-   struct drm_crtc_state *crtc_state;
-   int ret = 0;
-
-   state = drm_atomic_state_alloc(plane->dev);
-   if (!state)
-   return -ENOMEM;
-
-   ret = drm_crtc_vblank_get(crtc);
-   if (ret)
-   return ret;
-
-   state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
-retry:
-   crtc_state = drm_atomic_get_crtc_state(state, crtc);
-   if (IS_ERR(crtc_state)) {
-   ret = PTR_ERR(crtc_state);
-   goto fail;
-   }
-   crtc_state->event = event;
-
-   plane_state = drm_atomic_get_plane_state(state, plane);
-   if (IS_ERR(plane_state)) {
-   ret = PTR_ERR(plane_state);
-   goto fail;
-   }
-
-   ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
-   if (ret != 0)
-   goto fail;
-   drm_atomic_set_fb_for_plane(plane_state, fb);
-
-   /* Make sure we don't accidentally do a full modeset. */
-   state->allow_modeset = false;
-   if (!crtc_state->active) {
-   DRM_DEBUG_ATOMIC("[CRTC:%d] disabled, rejecting legacy flip\n",
-crtc->base.id);
-   ret = -EINVAL;
-   goto fail;
-   }
-   acrtc->flip_flags = flags;
-
-   ret = drm_atomic_nonblocking_commit(state);
-
-fail:
-   if (ret == -EDEADLK)
-   goto backoff;
-
-   if (ret)
-   drm_crtc_vblank_put(crtc);
-
-   drm_atomic_state_put(state);
-
-   return ret;
-backoff:
-   drm_atomic_state_clear(state);
-   drm_atomic_legacy_backoff(state);
-
-   /*
-* Someone might have exchanged the framebuffer while we dropped locks
-* in the backoff code. We need to fix up the fb refcount tracking the
-* core does for us.
-*/
-   plane->old_fb = plane->fb;
-
-   goto retry;
-}
-
 /* Implemented only the options currently availible for the driver */
 static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
.reset = drm_atomic_helper_crtc_reset,
@@ -1145,7 +1068,7 @@ static int amdgpu_atomic_helper_page_flip(struct drm_crtc 
*crtc,
.destroy = amdgpu_dm_crtc_destroy,
.gamma_set = amdgpu_dm_atomic_crtc_gamma_set,
.set_config = drm_atomic_helper_set_config,
-   .page_flip = amdgpu_atomic_helper_page_flip,
+   .page_flip_target = drm_atomic_helper_page_flip_target,
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.atomic_set_property = dm_crtc_funcs_atomic_set_property
@@ -1679,7 +1602,7 @@ static bool page_flip_needed(
sizeof(old_state_tmp)) == 0 ? true:false;
if (new_state->crtc && page_flip_required == false) {
acrtc_new = to_amdgpu_crtc(new_state->crtc);
-   if (acrtc_new->flip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
+   if (new_state->pflip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
page_flip_required = true;
}
return page_flip_required;
@@ -2760,7 +2683,6 @@ int amdgpu_dm_atomic_commit(
for_each_plane_in_state(state, plane, old_plane_state, i) {
struct drm_plane_state *plane_state = plane->state;
struct drm_crtc *crtc = plane_state->crtc;
-   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
struct drm_framebuffer

[PATCH v2 3/3] drm/nouveau/kms/nv50: Switch to using atomic helper for flip.

2017-01-16 Thread Andrey Grodzovsky 
Change-Id: I5a3189c03e389af2ff6c13d870a7d28282b7b0ee
Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/nouveau/nv50_display.c | 77 +++---
 1 file changed, 5 insertions(+), 72 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 2c2c645..419e00c 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -846,6 +846,10 @@ struct nv50_wndw_func {
asyw->image.w = fb->base.width;
asyw->image.h = fb->base.height;
asyw->image.kind = (fb->nvbo->tile_flags & 0xff00) >> 8;
+
+   asyw->interval =
+   asyw->state.pflip_flags & DRM_MODE_PAGE_FLIP_ASYNC ? 0 
: 1;
+
if (asyw->image.kind) {
asyw->image.layout = 0;
if (drm->device.info.chipset >= 0xc0)
@@ -2221,77 +2225,6 @@ struct nv50_base {
.atomic_check = nv50_head_atomic_check,
 };
 
-/* This is identical to the version in the atomic helpers, except that
- * it supports non-vblanked ("async") page flips.
- */
-static int
-nv50_head_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event, u32 flags)
-{
-   struct drm_plane *plane = crtc->primary;
-   struct drm_atomic_state *state;
-   struct drm_plane_state *plane_state;
-   struct drm_crtc_state *crtc_state;
-   int ret = 0;
-
-   state = drm_atomic_state_alloc(plane->dev);
-   if (!state)
-   return -ENOMEM;
-
-   state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
-retry:
-   crtc_state = drm_atomic_get_crtc_state(state, crtc);
-   if (IS_ERR(crtc_state)) {
-   ret = PTR_ERR(crtc_state);
-   goto fail;
-   }
-   crtc_state->event = event;
-
-   plane_state = drm_atomic_get_plane_state(state, plane);
-   if (IS_ERR(plane_state)) {
-   ret = PTR_ERR(plane_state);
-   goto fail;
-   }
-
-   ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
-   if (ret != 0)
-   goto fail;
-   drm_atomic_set_fb_for_plane(plane_state, fb);
-
-   /* Make sure we don't accidentally do a full modeset. */
-   state->allow_modeset = false;
-   if (!crtc_state->active) {
-   DRM_DEBUG_ATOMIC("[CRTC:%d] disabled, rejecting legacy flip\n",
-crtc->base.id);
-   ret = -EINVAL;
-   goto fail;
-   }
-
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   nv50_wndw_atom(plane_state)->interval = 0;
-
-   ret = drm_atomic_nonblocking_commit(state);
-fail:
-   if (ret == -EDEADLK)
-   goto backoff;
-
-   drm_atomic_state_put(state);
-   return ret;
-
-backoff:
-   drm_atomic_state_clear(state);
-   drm_atomic_legacy_backoff(state);
-
-   /*
-* Someone might have exchanged the framebuffer while we dropped locks
-* in the backoff code. We need to fix up the fb refcount tracking the
-* core does for us.
-*/
-   plane->old_fb = plane->fb;
-
-   goto retry;
-}
-
 static int
 nv50_head_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
uint32_t size)
@@ -2386,7 +2319,7 @@ struct nv50_base {
.gamma_set = nv50_head_gamma_set,
.destroy = nv50_head_destroy,
.set_config = drm_atomic_helper_set_config,
-   .page_flip = nv50_head_page_flip,
+   .page_flip = drm_atomic_helper_page_flip,
.set_property = drm_atomic_helper_crtc_set_property,
.atomic_duplicate_state = nv50_head_atomic_duplicate_state,
.atomic_destroy_state = nv50_head_atomic_destroy_state,
-- 
1.9.1

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[PATCH v2 0/3] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Andrey Grodzovsky 
This series is a folow-up on
https://patchwork.kernel.org/patch/9501787/

The first patch makes changes to atomic helpers to allow for 
drives with ASYNC flip support to use them.
Patch 2 is to use this in AMDGPU/DC.
Patch 3 is possible cleanup in nouveau/kms who seems to have to duplicate 
the helper as we did to support ASYNC flips. 

v2: 
Resend drm/atomic: Save flip flags in drm_plane_state since
the original patch was incomplete.
Squash 2 AMD changes into one to not break compilation.

Andrey Grodzovsky (3):
  drm/atomic: Save flip flags in drm_plane_state
  drm/amd/display: Switch to using atomic_helper for flip.
  drm/nouveau/kms/nv50: Switch to using atomic helper for flip.

 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ++
 drivers/gpu/drm/drm_atomic_helper.c| 18 ++---
 drivers/gpu/drm/nouveau/nv50_display.c | 77 ++
 include/drm/drm_plane.h|  8 ++
 5 files changed, 24 insertions(+), 172 deletions(-)

-- 
1.9.1

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[PATCH v2 1/3] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Andrey Grodzovsky 
Allows using atomic flip helpers for drivers
using ASYNC flip.
Remove ASYNC_FLIP restriction in helpers and
caches the page flip flags in drm_plane_state
to be used in the low level drivers.

v2:
Resending the patch since the original was broken.
Remove comment about not supporting ASYNC flips.

Change-Id: I0219c3ec3ecceb82143ee176d30cb50d9aa76bf0
Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/drm_atomic_helper.c | 18 +-
 include/drm/drm_plane.h |  8 
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index a4e5477..12f70f2 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -2737,7 +2737,8 @@ static int page_flip_common(
struct drm_atomic_state *state,
struct drm_crtc *crtc,
struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event)
+   struct drm_pending_vblank_event *event,
+   uint32_t flags)
 {
struct drm_plane *plane = crtc->primary;
struct drm_plane_state *plane_state;
@@ -2754,6 +2755,7 @@ static int page_flip_common(
if (IS_ERR(plane_state))
return PTR_ERR(plane_state);
 
+   plane_state->pflip_flags = flags;
 
ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
if (ret != 0)
@@ -2781,10 +2783,6 @@ static int page_flip_common(
  * Provides a default _crtc_funcs.page_flip implementation
  * using the atomic driver interface.
  *
- * Note that for now so called async page flips (i.e. updates which are not
- * synchronized to vblank) are not supported, since the atomic interfaces have
- * no provisions for this yet.
- *
  * Returns:
  * Returns 0 on success, negative errno numbers on failure.
  *
@@ -2800,9 +2798,6 @@ int drm_atomic_helper_page_flip(struct drm_crtc *crtc,
struct drm_atomic_state *state;
int ret = 0;
 
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   return -EINVAL;
-
state = drm_atomic_state_alloc(plane->dev);
if (!state)
return -ENOMEM;
@@ -2810,7 +2805,7 @@ int drm_atomic_helper_page_flip(struct drm_crtc *crtc,
state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
 
 retry:
-   ret = page_flip_common(state, crtc, fb, event);
+   ret = page_flip_common(state, crtc, fb, event, flags);
if (ret != 0)
goto fail;
 
@@ -2865,9 +2860,6 @@ int drm_atomic_helper_page_flip_target(
struct drm_crtc_state *crtc_state;
int ret = 0;
 
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   return -EINVAL;
-
state = drm_atomic_state_alloc(plane->dev);
if (!state)
return -ENOMEM;
@@ -2875,7 +2867,7 @@ int drm_atomic_helper_page_flip_target(
state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
 
 retry:
-   ret = page_flip_common(state, crtc, fb, event);
+   ret = page_flip_common(state, crtc, fb, event, flags);
if (ret != 0)
goto fail;
 
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index db3bbde..86d8ffc 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -122,6 +122,14 @@ struct drm_plane_state {
 */
bool visible;
 
+
+   /**
+* @pflip_flags:
+*
+* Flip related config options
+*/
+   u32 pflip_flags;
+
struct drm_atomic_state *state;
 };
 
-- 
1.9.1

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RE: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Grodzovsky, Andrey 
> -Original Message-
> From: Laurent Pinchart [mailto:laurent.pinch...@ideasonboard.com]
> Sent: Monday, January 16, 2017 5:18 PM
> To: dri-de...@lists.freedesktop.org
> Cc: Grodzovsky, Andrey; nouv...@lists.freedesktop.org; amd-
> g...@lists.freedesktop.org; Deucher, Alexander; daniel.vet...@intel.com
> Subject: Re: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state
> 
> Hi Andrey,
> 
> Thank you for the patch.
> 
> On Monday 16 Jan 2017 10:44:55 Andrey Grodzovsky wrote:
> > Allows using atomic flip helpers for drivers using ASYNC flip.
> > Remove ASYNC_FLIP restriction in helpers and caches the page flip
> > flags in drm_plane_state to be used in the low level drivers.
> >
> > Signed-off-by: Andrey Grodzovsky 
> > ---
> >  drivers/gpu/drm/drm_atomic_helper.c | 10 +++---
> >  include/drm/drm_plane.h |  8 
> >  2 files changed, 11 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> > b/drivers/gpu/drm/drm_atomic_helper.c index a4e5477..f83dc43 100644
> > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > @@ -2737,7 +2737,8 @@ static int page_flip_common(
> > struct drm_atomic_state *state,
> > struct drm_crtc *crtc,
> > struct drm_framebuffer *fb,
> > -   struct drm_pending_vblank_event *event)
> > +   struct drm_pending_vblank_event *event,
> > +   uint32_t flags)
> >  {
> > struct drm_plane *plane = crtc->primary;
> > struct drm_plane_state *plane_state; @@ -2754,6 +2755,7 @@ static
> > int page_flip_common(
> > if (IS_ERR(plane_state))
> > return PTR_ERR(plane_state);
> >
> > +   plane_state->pflip_flags = flags;
> >
> > ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
> > if (ret != 0)
> > @@ -2800,9 +2802,6 @@ int drm_atomic_helper_page_flip(struct drm_crtc
> > *crtc, struct drm_atomic_state *state;
> > int ret = 0;
> >
> > -   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
> > -   return -EINVAL;
> > -
> 
> With this change all drivers using the helper will not reject that async flag,
> even if they don't implement support for async page flip. You need to either
> patch them all to reject the flag, or implement async page flip support for 
> all
> of them (preferable in the helpers, and then remove the

Please check drm_mode_page_flip_ioctl, one of the checks in the beginning is

if ((page_flip->flags & DRM_MODE_PAGE_FLIP_ASYNC) && 
!dev->mode_config.async_page_flip)
return -EINVAL;

We in DC explicitly set dev->mode_config.async_page_flip = true, any driver 
which is 
Not supporting ASYNC flip will fail the IOCTL at this point.
Same in drm_mode_atomic_ioctl
> 
>  * Note that for now so called async page flips (i.e. updates which are not
>  * synchronized to vblank) are not supported, since the atomic interfaces
> have
>  * no provisions for this yet.
> 
> comment).

Thanks, that a good catch, will remove.

Andrey
> 
> > state = drm_atomic_state_alloc(plane->dev);
> > if (!state)
> > return -ENOMEM;
> > @@ -2865,9 +2864,6 @@ int drm_atomic_helper_page_flip_target(
> > struct drm_crtc_state *crtc_state;
> > int ret = 0;
> >
> > -   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
> > -   return -EINVAL;
> > -
> > state = drm_atomic_state_alloc(plane->dev);
> > if (!state)
> > return -ENOMEM;
> > diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h index
> > db3bbde..86d8ffc 100644
> > --- a/include/drm/drm_plane.h
> > +++ b/include/drm/drm_plane.h
> > @@ -122,6 +122,14 @@ struct drm_plane_state {
> >  */
> > bool visible;
> >
> > +
> > +   /**
> > +* @pflip_flags:
> > +*
> > +* Flip related config options
> > +*/
> > +   u32 pflip_flags;
> > +
> > struct drm_atomic_state *state;
> >  };
> 
> --
> Regards,
> 
> Laurent Pinchart

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[PATCH] drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)

2017-01-16 Thread Monk Liu 
to support SRIOV preemption.

v2:
fix emit_frame_size

Change-Id: I9f3534149b132756e5cd9292d48474e50306936b
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 10 +-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index fdc2cb5..52cb37d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -6703,6 +6703,10 @@ static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring 
*ring, uint32_t flags)
 {
uint32_t dw2 = 0;
 
+   if (amdgpu_sriov_vf(ring->adev))
+   gfx_v8_0_ring_emit_ce_meta_init(ring,
+   (flags & AMDGPU_VM_DOMAIN) ? AMDGPU_CSA_VADDR : 
ring->adev->virt.csa_vmid0_addr);
+
dw2 |= 0x8000; /* set load_enable otherwise this package is just 
NOPs */
if (flags & AMDGPU_HAVE_CTX_SWITCH) {
gfx_v8_0_ring_emit_vgt_flush(ring);
@@ -6727,6 +6731,10 @@ static void gfx_v8_ring_emit_cntxcntl(struct amdgpu_ring 
*ring, uint32_t flags)
amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));
amdgpu_ring_write(ring, dw2);
amdgpu_ring_write(ring, 0);
+
+   if (amdgpu_sriov_vf(ring->adev))
+   gfx_v8_0_ring_emit_de_meta_init(ring,
+   (flags & AMDGPU_VM_DOMAIN) ? AMDGPU_CSA_VADDR : 
ring->adev->virt.csa_vmid0_addr);
 }
 
 static void gfx_v8_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,
@@ -6976,7 +6984,7 @@ static const struct amdgpu_ring_funcs 
gfx_v8_0_ring_funcs_gfx = {
7 + /* gfx_v8_0_ring_emit_pipeline_sync */
128 + 19 + /* gfx_v8_0_ring_emit_vm_flush */
2 + /* gfx_v8_ring_emit_sb */
-   3 + 4, /* gfx_v8_ring_emit_cntxcntl including vgt flush */
+   3 + 4 + 29, /* gfx_v8_ring_emit_cntxcntl including vgt 
flush/meta-data */
.emit_ib_size = 4, /* gfx_v8_0_ring_emit_ib_gfx */
.emit_ib = gfx_v8_0_ring_emit_ib_gfx,
.emit_fence = gfx_v8_0_ring_emit_fence_gfx,
-- 
2.7.4

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[PATCH 3/5] drm/amdgpu:implement CE/DE meta-init routines

2017-01-16 Thread Monk Liu 
those package need to insert into ring buffer for
SRIOV case. they are used to let CP do preemption.

Change-Id: Ib9282fbf146a181b4fce96e15a765ed344c65db9
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 +++
 1 file changed, 61 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 3366825..fdc2cb5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -657,6 +657,8 @@ static void gfx_v8_0_set_gds_init(struct amdgpu_device 
*adev);
 static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev);
 static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev);
 static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev);
+static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, uint64_t 
addr);
+static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, uint64_t 
addr);
 
 static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
 {
@@ -7211,3 +7213,62 @@ const struct amdgpu_ip_block_version gfx_v8_1_ip_block =
.rev = 0,
.funcs = _v8_0_ip_funcs,
 };
+
+static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, uint64_t 
csa_addr)
+{
+   uint64_t ce_payload_addr;
+   int cnt_ce;
+   static union {
+   struct amdgpu_ce_ib_state regular;
+   struct amdgpu_ce_ib_state_chained_ib chained;
+   } ce_payload = {0};
+
+   if (ring->adev->virt.chained_ib_support) {
+   ce_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data_chained_ib, ce_payload);
+   cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
+   } else {
+   ce_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data, ce_payload);
+   cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
+   }
+
+   amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));
+   amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
+   WRITE_DATA_DST_SEL(8) |
+   WR_CONFIRM) |
+   WRITE_DATA_CACHE_POLICY(0));
+   amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));
+   amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));
+   amdgpu_ring_write_multiple(ring, (void *)_payload, cnt_ce - 2);
+}
+
+static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, uint64_t 
csa_addr)
+{
+   uint64_t de_payload_addr, gds_addr;
+   int cnt_de;
+   static union {
+   struct amdgpu_de_ib_state regular;
+   struct amdgpu_de_ib_state_chained_ib chained;
+   } de_payload = {0};
+
+   gds_addr = csa_addr + 4096;
+   if (ring->adev->virt.chained_ib_support) {
+   de_payload.chained.gds_backup_addrlo = lower_32_bits(gds_addr);
+   de_payload.chained.gds_backup_addrhi = upper_32_bits(gds_addr);
+   de_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data_chained_ib, de_payload);
+   cnt_de = (sizeof(de_payload.chained) >> 2) + 4 - 2;
+   } else {
+   de_payload.regular.gds_backup_addrlo = lower_32_bits(gds_addr);
+   de_payload.regular.gds_backup_addrhi = upper_32_bits(gds_addr);
+   de_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data, de_payload);
+   cnt_de = (sizeof(de_payload.regular) >> 2) + 4 - 2;
+   }
+
+   amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de));
+   amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |
+   WRITE_DATA_DST_SEL(8) |
+   WR_CONFIRM) |
+   WRITE_DATA_CACHE_POLICY(0));
+   amdgpu_ring_write(ring, lower_32_bits(de_payload_addr));
+   amdgpu_ring_write(ring, upper_32_bits(de_payload_addr));
+   amdgpu_ring_write_multiple(ring, (void *)_payload, cnt_de - 2);
+}
-- 
2.7.4

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[PATCH 0/5] META-DATA init packages patches v2

2017-01-16 Thread Monk Liu 
*** BLURB HERE ***

Monk Liu (5):
  drm/amdgpu:add META_DATA struct for CSA/SRIOV v2
  drm/amdgpu:implement ring_write_multiple
  drm/amdgpu:implement CE/DE meta-init routines
  drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl
  drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE

 drivers/gpu/drm/amd/amdgpu/amdgpu.h  |  32 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c   |   3 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h |   1 +
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c|  76 +
 drivers/gpu/drm/amd/amdgpu/vi.h  | 112 +++
 5 files changed, 224 insertions(+)

-- 
2.7.4

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[PATCH 4/5] drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl

2017-01-16 Thread Monk Liu 
Change-Id: Ibfd20e7260de76177ac59bc6af15887ae0983a83
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b8523f2..4bbd7f9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -953,6 +953,7 @@ struct amdgpu_cs_parser {
 #define AMDGPU_PREAMBLE_IB_PRESENT  (1 << 0) /* bit set means command 
submit involves a preamble IB */
 #define AMDGPU_PREAMBLE_IB_PRESENT_FIRST(1 << 1) /* bit set means preamble 
IB is first presented in belonging context */
 #define AMDGPU_HAVE_CTX_SWITCH  (1 << 2) /* bit set means context 
switch occured */
+#define AMDGPU_VM_DOMAIN(1 << 3) /* bit set means in 
virtual memory context */
 
 struct amdgpu_job {
struct amd_sched_jobbase;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 16308eb..6939822 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -184,6 +184,9 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned 
num_ibs,
if (need_ctx_switch)
status |= AMDGPU_HAVE_CTX_SWITCH;
status |= job->preamble_status;
+
+   if (vm)
+   status |= AMDGPU_VM_DOMAIN;
amdgpu_ring_emit_cntxcntl(ring, status);
}
 
-- 
2.7.4

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[PATCH 2/5] drm/amdgpu:implement ring_write_multiple

2017-01-16 Thread Monk Liu 
Change-Id: Ib9105e5f0e1183ae92e647db64244077a86642a4
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index e9983fb..b8523f2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1599,6 +1599,37 @@ static inline void amdgpu_ring_write(struct amdgpu_ring 
*ring, uint32_t v)
ring->count_dw--;
 }
 
+static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void 
*src, int count_dw)
+{
+   unsigned occupied, chunk1, chunk2;
+   void *dst;
+
+   if (ring->count_dw < count_dw) {
+   DRM_ERROR("amdgpu: writing more dwords to the ring than 
expected!\n");
+   } else {
+   occupied = ring->wptr & ring->ptr_mask;
+   dst = (void *)>ring[occupied];
+   chunk1 = ring->ptr_mask + 1 - occupied;
+   chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
+   chunk2 = count_dw - chunk1;
+   chunk1 <<= 2;
+   chunk2 <<= 2;
+
+   if (chunk1)
+   memcpy(dst, src, chunk1);
+
+   if (chunk2) {
+   src += chunk1;
+   dst = (void *)ring->ring;
+   memcpy(dst, src, chunk2);
+   }
+
+   ring->wptr += count_dw;
+   ring->wptr &= ring->ptr_mask;
+   ring->count_dw -= count_dw;
+   }
+}
+
 static inline struct amdgpu_sdma_instance *
 amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 {
-- 
2.7.4

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[PATCH 1/5] drm/amdgpu:add META_DATA struct for CSA/SRIOV v2

2017-01-16 Thread Monk Liu 
META-DATA is used in GFX cmd submit, we have two
format suit for META-DATA-init, one is legacy and another
is for chained-ib preempt, which is used in vulkan
UMD.

v2: drop use CP version number to judge if chain-ib
supports or not, we wait for it mature

Change-Id: I17324905b4822a93fd3ffb3e8f86e544871b89ab
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h |   1 +
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c|   7 ++
 drivers/gpu/drm/amd/amdgpu/vi.h  | 112 +++
 3 files changed, 120 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index fa1d569..cf1c94b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -34,6 +34,7 @@ struct amdgpu_virt {
uint32_t caps;
struct amdgpu_bo *csa_obj;
uint64_t csa_vmid0_addr;
+   bool chained_ib_support;
 };
 
 #define AMDGPU_CSA_SIZE(8 * 1024)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index a9087f0..3366825 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -941,6 +941,13 @@ static int gfx_v8_0_init_microcode(struct amdgpu_device 
*adev)
goto out;
cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data;
adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);
+
+   /* chain ib ucode isn't formal released, just disable it by far
+* TODO: when ucod ready we should use ucode version to judge if
+* chain-ib support or not.
+*/
+   adev->virt.chained_ib_support = false;
+
adev->gfx.me_feature_version = 
le32_to_cpu(cp_hdr->ucode_feature_version);
 
snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ce.bin", chip_name);
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.h b/drivers/gpu/drm/amd/amdgpu/vi.h
index 575d7ae..719587b 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.h
+++ b/drivers/gpu/drm/amd/amdgpu/vi.h
@@ -28,4 +28,116 @@ void vi_srbm_select(struct amdgpu_device *adev,
u32 me, u32 pipe, u32 queue, u32 vmid);
 int vi_set_ip_blocks(struct amdgpu_device *adev);
 
+struct amdgpu_ce_ib_state
+{
+   uint32_tce_ib_completion_status;
+   uint32_tce_constegnine_count;
+   uint32_tce_ibOffset_ib1;
+   uint32_tce_ibOffset_ib2;
+}; /* Total of 4 DWORD */
+
+struct amdgpu_de_ib_state
+{
+   uint32_tib_completion_status;
+   uint32_tde_constEngine_count;
+   uint32_tib_offset_ib1;
+   uint32_tib_offset_ib2;
+   uint32_tpreamble_begin_ib1;
+   uint32_tpreamble_begin_ib2;
+   uint32_tpreamble_end_ib1;
+   uint32_tpreamble_end_ib2;
+   uint32_tdraw_indirect_baseLo;
+   uint32_tdraw_indirect_baseHi;
+   uint32_tdisp_indirect_baseLo;
+   uint32_tdisp_indirect_baseHi;
+   uint32_tgds_backup_addrlo;
+   uint32_tgds_backup_addrhi;
+   uint32_tindex_base_addrlo;
+   uint32_tindex_base_addrhi;
+   uint32_tsample_cntl;
+}; /* Total of 17 DWORD */
+
+struct amdgpu_ce_ib_state_chained_ib
+{
+   /* section of non chained ib part */
+   uint32_tce_ib_completion_status;
+   uint32_tce_constegnine_count;
+   uint32_tce_ibOffset_ib1;
+   uint32_tce_ibOffset_ib2;
+
+   /* section of chained ib */
+   uint32_tce_chainib_addrlo_ib1;
+   uint32_tce_chainib_addrlo_ib2;
+   uint32_tce_chainib_addrhi_ib1;
+   uint32_tce_chainib_addrhi_ib2;
+   uint32_tce_chainib_size_ib1;
+   uint32_tce_chainib_size_ib2;
+}; /* total 10 DWORD */
+
+struct amdgpu_de_ib_state_chained_ib
+{
+   /* section of non chained ib part */
+   uint32_tib_completion_status;
+   uint32_tde_constEngine_count;
+   uint32_tib_offset_ib1;
+   uint32_tib_offset_ib2;
+
+   /* section of chained ib */
+   uint32_tchain_ib_addrlo_ib1;
+   uint32_tchain_ib_addrlo_ib2;
+   uint32_tchain_ib_addrhi_ib1;
+   uint32_tchain_ib_addrhi_ib2;
+   uint32_tchain_ib_size_ib1;
+   uint32_tchain_ib_size_ib2;
+
+   /* section of non chained ib part */
+   uint32_tpreamble_begin_ib1;
+   uint32_tpreamble_begin_ib2;
+   uint32_tpreamble_end_ib1;
+   uint32_tpreamble_end_ib2;
+
+   /* section of chained ib */
+   uint32_tchain_ib_pream_addrlo_ib1;
+   uint32_tchain_ib_pream_addrlo_ib2;
+   uint32_tchain_ib_pream_addrhi_ib1;
+   uint32_tchain_ib_pream_addrhi_ib2;
+
+   /* section of non chained ib part */
+   uint32_tdraw_indirect_baseLo;
+   uint32_tdraw_indirect_baseHi;
+   uint32_tdisp_indirect_baseLo;
+   uint32_tdisp_indirect_baseHi;
+   uint32_tgds_backup_addrlo;
+   uint32_t

Re: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Laurent Pinchart 
Hi Andrey,

Thank you for the patch.

On Monday 16 Jan 2017 10:44:55 Andrey Grodzovsky wrote:
> Allows using atomic flip helpers for drivers
> using ASYNC flip.
> Remove ASYNC_FLIP restriction in helpers and
> caches the page flip flags in drm_plane_state
> to be used in the low level drivers.
> 
> Signed-off-by: Andrey Grodzovsky 
> ---
>  drivers/gpu/drm/drm_atomic_helper.c | 10 +++---
>  include/drm/drm_plane.h |  8 
>  2 files changed, 11 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> b/drivers/gpu/drm/drm_atomic_helper.c index a4e5477..f83dc43 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -2737,7 +2737,8 @@ static int page_flip_common(
>   struct drm_atomic_state *state,
>   struct drm_crtc *crtc,
>   struct drm_framebuffer *fb,
> - struct drm_pending_vblank_event *event)
> + struct drm_pending_vblank_event *event,
> + uint32_t flags)
>  {
>   struct drm_plane *plane = crtc->primary;
>   struct drm_plane_state *plane_state;
> @@ -2754,6 +2755,7 @@ static int page_flip_common(
>   if (IS_ERR(plane_state))
>   return PTR_ERR(plane_state);
> 
> + plane_state->pflip_flags = flags;
> 
>   ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
>   if (ret != 0)
> @@ -2800,9 +2802,6 @@ int drm_atomic_helper_page_flip(struct drm_crtc *crtc,
> struct drm_atomic_state *state;
>   int ret = 0;
> 
> - if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
> - return -EINVAL;
> -

With this change all drivers using the helper will not reject that async flag, 
even if they don't implement support for async page flip. You need to either 
patch them all to reject the flag, or implement async page flip support for 
all of them (preferable in the helpers, and then remove the

 * Note that for now so called async page flips (i.e. updates which are not
 * synchronized to vblank) are not supported, since the atomic interfaces have
 * no provisions for this yet.

comment).

>   state = drm_atomic_state_alloc(plane->dev);
>   if (!state)
>   return -ENOMEM;
> @@ -2865,9 +2864,6 @@ int drm_atomic_helper_page_flip_target(
>   struct drm_crtc_state *crtc_state;
>   int ret = 0;
> 
> - if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
> - return -EINVAL;
> -
>   state = drm_atomic_state_alloc(plane->dev);
>   if (!state)
>   return -ENOMEM;
> diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
> index db3bbde..86d8ffc 100644
> --- a/include/drm/drm_plane.h
> +++ b/include/drm/drm_plane.h
> @@ -122,6 +122,14 @@ struct drm_plane_state {
>*/
>   bool visible;
> 
> +
> + /**
> +  * @pflip_flags:
> +  *
> +  * Flip related config options
> +  */
> + u32 pflip_flags;
> +
>   struct drm_atomic_state *state;
>  };

-- 
Regards,

Laurent Pinchart

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Re: [PATCH 3/4] drm/amd/display: Switch to using atomic_helper for flip.

2017-01-16 Thread Laurent Pinchart 
Hi Andrey,

Thank you for the patch.

On Monday 16 Jan 2017 10:44:57 Andrey Grodzovsky wrote:
> Change-Id: Iad3e0b9b3546e4e4dc79be9233daf4fe4dba83e0
> Signed-off-by: Andrey Grodzovsky 
> ---
>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ++
>  1 file changed, 6 insertions(+), 86 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c index
> a443b70..d4664bf 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
> @@ -1060,83 +1060,6 @@ static int dm_crtc_funcs_atomic_set_property(
>   return 0;
>  }
> 
> -
> -static int amdgpu_atomic_helper_page_flip(struct drm_crtc *crtc,
> - struct drm_framebuffer *fb,
> - struct drm_pending_vblank_event *event,
> - uint32_t flags)
> -{
> - struct drm_plane *plane = crtc->primary;
> - struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
> - struct drm_atomic_state *state;
> - struct drm_plane_state *plane_state;
> - struct drm_crtc_state *crtc_state;
> - int ret = 0;
> -
> - state = drm_atomic_state_alloc(plane->dev);
> - if (!state)
> - return -ENOMEM;
> -
> - ret = drm_crtc_vblank_get(crtc);

The DRM core's atomic page flip helper doesn't get/put vblank. Have you 
double-checked that removing them isn't a problem ?

> - if (ret)
> - return ret;
> -
> - state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
> -retry:
> - crtc_state = drm_atomic_get_crtc_state(state, crtc);
> - if (IS_ERR(crtc_state)) {
> - ret = PTR_ERR(crtc_state);
> - goto fail;
> - }
> - crtc_state->event = event;
> -
> - plane_state = drm_atomic_get_plane_state(state, plane);
> - if (IS_ERR(plane_state)) {
> - ret = PTR_ERR(plane_state);
> - goto fail;
> - }
> -
> - ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
> - if (ret != 0)
> - goto fail;
> - drm_atomic_set_fb_for_plane(plane_state, fb);
> -
> - /* Make sure we don't accidentally do a full modeset. */
> - state->allow_modeset = false;
> - if (!crtc_state->active) {
> - DRM_DEBUG_ATOMIC("[CRTC:%d] disabled, rejecting legacy 
flip\n",
> -  crtc->base.id);
> - ret = -EINVAL;
> - goto fail;
> - }
> - acrtc->flip_flags = flags;
> -
> - ret = drm_atomic_nonblocking_commit(state);
> -
> -fail:
> - if (ret == -EDEADLK)
> - goto backoff;
> -
> - if (ret)
> - drm_crtc_vblank_put(crtc);
> -
> - drm_atomic_state_put(state);
> -
> - return ret;
> -backoff:
> - drm_atomic_state_clear(state);
> - drm_atomic_legacy_backoff(state);
> -
> - /*
> -  * Someone might have exchanged the framebuffer while we dropped locks
> -  * in the backoff code. We need to fix up the fb refcount tracking the
> -  * core does for us.
> -  */
> - plane->old_fb = plane->fb;
> -
> - goto retry;
> -}
> -
>  /* Implemented only the options currently availible for the driver */
>  static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
>   .reset = drm_atomic_helper_crtc_reset,
> @@ -1145,7 +1068,7 @@ static int amdgpu_atomic_helper_page_flip(struct
> drm_crtc *crtc, .destroy = amdgpu_dm_crtc_destroy,
>   .gamma_set = amdgpu_dm_atomic_crtc_gamma_set,
>   .set_config = drm_atomic_helper_set_config,
> - .page_flip = amdgpu_atomic_helper_page_flip,
> + .page_flip_target = drm_atomic_helper_page_flip_target,
>   .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
>   .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
>   .atomic_set_property = dm_crtc_funcs_atomic_set_property
> @@ -1679,7 +1602,7 @@ static bool page_flip_needed(
>   sizeof(old_state_tmp)) == 0 ? true:false;
>   if (new_state->crtc && page_flip_required == false) {
>   acrtc_new = to_amdgpu_crtc(new_state->crtc);
> - if (acrtc_new->flip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
> + if (new_state->pflip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
>   page_flip_required = true;
>   }
>   return page_flip_required;
> @@ -2760,7 +2683,6 @@ int amdgpu_dm_atomic_commit(
>   for_each_plane_in_state(state, plane, old_plane_state, i) {
>   struct drm_plane_state *plane_state = plane->state;
>   struct drm_crtc *crtc = plane_state->crtc;
> - struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
>   struct drm_framebuffer *fb = plane_state->fb;
> 
>   if (!fb || !crtc || !crtc->state->planes_changed ||
> @@ -2771,10 +2693,9 @@ int amdgpu_dm_atomic_commit(
>   ret =

Re: More specific libdrm error message

2017-01-16 Thread Xie, AlexBin 
Hi Emil,


Thanks for the advice. I noticed that you have changed some tests using 
drmGetDevices2.

I mark this to my to do list.


Thanks,

Alex Bin Xie


From: Emil Velikov 
Sent: Thursday, January 12, 2017 2:26 PM
To: Edward O'Callaghan
Cc: Xie, AlexBin; amd-gfx@lists.freedesktop.org
Subject: Re: More specific libdrm error message

On 12 January 2017 at 01:29, Edward O'Callaghan
 wrote:
> Hi Xie,
>
> Perhaps you want to use `fprintf(stderr, "...")` over `printf("..")` and
> lose the space before the start parenthesis. Also, line wrap
> your commit message.
>
> Side note, use git send-email so that the patch is inline and not a HTML
> email for easy review and application of the patch.
>
Thanks Edward.

Xie, suggesting to run almost anything as root is a bad idea ;-)
Instead one could auth, in order to have the correct permissions.
Alternatively can use the renderD node all together.

Idea for future work:
Would be even better to use drmGetDevices2 to fetch all the devices
and use the correct node since card0/renderD128 is not guaranteed to
be a amdgpu one. Or maybe even run all the amdgpu devices through the
tests ?

Please correctly wrap commit messages and code.

Thanks
Emil
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Re: [PATCH 2/4] drm/amdgpu: Remove flip_flag from amdgpu_crtc

2017-01-16 Thread Laurent Pinchart 
Hi Andrey,

Thank you for the patch.

On Monday 16 Jan 2017 10:44:56 Andrey Grodzovsky wrote:
> Follwing introduction of pflip_flags in drm_plane_state
> this is not needed anymore.
> 
> Signed-off-by: Andrey Grodzovsky 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h index 4c0a86e..3ff3c14 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -443,7 +443,6 @@ struct amdgpu_crtc {
>   enum amdgpu_interrupt_state vsync_timer_enabled;
> 
>   int otg_inst;
> - uint32_t flip_flags;

This breaks compilation of the amdgpu driver. You should squash this patch 
with 3/4.

>   /* After Set Mode target will be non-NULL */
>   struct dc_target *target;
>  };

-- 
Regards,

Laurent Pinchart

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Re: [PATCH 0/4] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Laurent Pinchart 
Hi Harry,

On Monday 16 Jan 2017 16:13:39 Harry Wentland wrote:
> On 2017-01-16 03:39 PM, Laurent Pinchart wrote:
> > On Monday 16 Jan 2017 10:44:54 Andrey Grodzovsky wrote:
> >> This series is a folow-up on
> >> https://patchwork.kernel.org/patch/9501787/
> >> 
> >> The first patch makes changes to atomic helpers
> >> to allow for drives with ASYNC flip support to use them.
> >> Patches 2 and 3 are to use this in AMDGPU/DC and
> >> patch 4 is possible cleanup in nouveau/kms who seems
> >> to have the duplicate the helper as we did to support
> >> ASYNC flips.
> > 
> > I have my doubts regarding this. I'd much rather see userspace moving to
> > the atomic API instead of extending support for legacy APIs.
> 
> This change is not about introducing the async flag but cleaning up the
> legacy helpers to make sure drivers that currently use it through the
> legacy IOCTLs can benefit from the helpers and not have to roll their own.
> 
> If the problem is with the pflip_flags, wouldn't drivers still need that
> after moving userspace to the atomic IOCTL?
> 
> I don't disagree with you on having userspace move to atomic but I don't
> expect to see all userspace drivers move to atomic in the next couple
> months. Why not clean this up in the meantime?

If this patch series was just about moving common driver code into the core, 
sure, but it goes beyond that. Or, actually, it needs to go beyond that, but 
doesn't yet. Removing the DRM_MODE_PAGE_FLIP_ASYNC test in patch 1/4 means 
that the DRM core will not reject async page flips anymore, for any driver 
that uses the helper. You thus need to either patch all drivers that use the 
helper to reject the flag, or implement the feature in the drivers (and 
preferably in the helpers then). The current version of this patch series will 
make all existing users of the helpers accept async page flips without 
actually implementing them.

> >> Andrey Grodzovsky (4):
> >>   drm/atomic: Save flip flags in drm_plane_state
> >>   drm/amdgpu: Remove flip_flag from amdgpu_crtc
> >>   drm/amd/display: Switch to using atomic_helper for flip.
> >>   drm/nouveau/kms/nv50: Switch to using atomic helper for flip.
> >>  
> >>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
> >>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ---
> >>  drivers/gpu/drm/drm_atomic_helper.c| 10 +--
> >>  drivers/gpu/drm/nouveau/nv50_display.c | 77 ++-
> >>  include/drm/drm_plane.h|  8 ++
> >>  5 files changed, 22 insertions(+), 166 deletions(-)

-- 
Regards,

Laurent Pinchart

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Re: [PATCH 0/4] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Harry Wentland 

On 2017-01-16 03:39 PM, Laurent Pinchart wrote:

Hi Andrey,

Thank you for the patches.

On Monday 16 Jan 2017 10:44:54 Andrey Grodzovsky wrote:

This series is a folow-up on
https://patchwork.kernel.org/patch/9501787/

The first patch makes changes to atomic helpers
to allow for drives with ASYNC flip support to use them.
Patches 2 and 3 are to use this in AMDGPU/DC and
patch 4 is possible cleanup in nouveau/kms who seems
to have the duplicate the helper as we did to support
ASYNC flips.


I have my doubts regarding this. I'd much rather see userspace moving to the
atomic API instead of extending support for legacy APIs.



This change is not about introducing the async flag but cleaning up the 
legacy helpers to make sure drivers that currently use it through the 
legacy IOCTLs can benefit from the helpers and not have to roll their own.


If the problem is with the pflip_flags, wouldn't drivers still need that 
after moving userspace to the atomic IOCTL?


I don't disagree with you on having userspace move to atomic but I don't 
expect to see all userspace drivers move to atomic in the next couple 
months. Why not clean this up in the meantime?


Harry


Andrey Grodzovsky (4):
  drm/atomic: Save flip flags in drm_plane_state
  drm/amdgpu: Remove flip_flag from amdgpu_crtc
  drm/amd/display: Switch to using atomic_helper for flip.
  drm/nouveau/kms/nv50: Switch to using atomic helper for flip.

 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ---
 drivers/gpu/drm/drm_atomic_helper.c| 10 +--
 drivers/gpu/drm/nouveau/nv50_display.c | 77 ++
 include/drm/drm_plane.h|  8 ++
 5 files changed, 22 insertions(+), 166 deletions(-)



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RE: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Grodzovsky, Andrey 


> -Original Message-
> From: Gustavo Padovan [mailto:gust...@padovan.org]
> Sent: Monday, January 16, 2017 3:22 PM
> To: Grodzovsky, Andrey
> Cc: dri-de...@lists.freedesktop.org; nouv...@lists.freedesktop.org; amd-
> g...@lists.freedesktop.org; Deucher, Alexander; daniel.vet...@intel.com
> Subject: Re: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state
> 
> Hi Andrey,
> 
> 2017-01-16 Andrey Grodzovsky :
> 
> > Allows using atomic flip helpers for drivers using ASYNC flip.
> > Remove ASYNC_FLIP restriction in helpers and caches the page flip
> > flags in drm_plane_state to be used in the low level drivers.
> >
> > Signed-off-by: Andrey Grodzovsky 
> > ---
> >  drivers/gpu/drm/drm_atomic_helper.c | 10 +++---
> >  include/drm/drm_plane.h |  8 
> >  2 files changed, 11 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_atomic_helper.c
> > b/drivers/gpu/drm/drm_atomic_helper.c
> > index a4e5477..f83dc43 100644
> > --- a/drivers/gpu/drm/drm_atomic_helper.c
> > +++ b/drivers/gpu/drm/drm_atomic_helper.c
> > @@ -2737,7 +2737,8 @@ static int page_flip_common(
> > struct drm_atomic_state *state,
> > struct drm_crtc *crtc,
> > struct drm_framebuffer *fb,
> > -   struct drm_pending_vblank_event *event)
> > +   struct drm_pending_vblank_event *event,
> > +   uint32_t flags)
> 
> Did you build this patch? It is changing the signature of
> page_flip_common() but no changes to the callers.
> 
> Gustavo

Thanks for spotting this, I am afraid I've sent not the final version of the 
patch. 
I will resend the latest version later today.

Thanks
Andrey

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[PATCH] drm/amdgpu: simplify allocation of scratch regs

2017-01-16 Thread Nils Wallménius 
The scratch regs are sequential so there's no need to keep
them in an array, we can just return the index of the first
free register + the base register. Also change the array
of bools for keeping track of the free regs to a bitfield.

Signed-off-by: Nils Wallménius 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h |  3 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 21 +++--
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c   |  7 +--
 drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c   |  7 +--
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c   |  7 +--
 5 files changed, 11 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ffeda245..9531480 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -794,8 +794,7 @@ struct amdgpu_kiq {
 struct amdgpu_scratch {
unsignednum_reg;
uint32_treg_base;
-   boolfree[32];
-   uint32_treg[32];
+   uint32_tfree_mask;
 };
 
 /*
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 01a42b6..1994335 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -42,12 +42,12 @@ int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, 
uint32_t *reg)
 {
int i;
 
-   for (i = 0; i < adev->gfx.scratch.num_reg; i++) {
-   if (adev->gfx.scratch.free[i]) {
-   adev->gfx.scratch.free[i] = false;
-   *reg = adev->gfx.scratch.reg[i];
-   return 0;
-   }
+   i = ffs(adev->gfx.scratch.free_mask);
+   if (i != 0 && i <= adev->gfx.scratch.num_reg) {
+   i--;
+   adev->gfx.scratch.free_mask &= ~(1u << i);
+   *reg = adev->gfx.scratch.reg_base + i;
+   return 0;
}
return -EINVAL;
 }
@@ -62,14 +62,7 @@ int amdgpu_gfx_scratch_get(struct amdgpu_device *adev, 
uint32_t *reg)
  */
 void amdgpu_gfx_scratch_free(struct amdgpu_device *adev, uint32_t reg)
 {
-   int i;
-
-   for (i = 0; i < adev->gfx.scratch.num_reg; i++) {
-   if (adev->gfx.scratch.reg[i] == reg) {
-   adev->gfx.scratch.free[i] = true;
-   return;
-   }
-   }
+   adev->gfx.scratch.free_mask |= 1u << (reg - adev->gfx.scratch.reg_base);
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index b323f5e..e013243 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -1794,14 +1794,9 @@ static void gfx_v6_0_gpu_init(struct amdgpu_device *adev)
 
 static void gfx_v6_0_scratch_init(struct amdgpu_device *adev)
 {
-   int i;
-
adev->gfx.scratch.num_reg = 7;
adev->gfx.scratch.reg_base = mmSCRATCH_REG0;
-   for (i = 0; i < adev->gfx.scratch.num_reg; i++) {
-   adev->gfx.scratch.free[i] = true;
-   adev->gfx.scratch.reg[i] = adev->gfx.scratch.reg_base + i;
-   }
+   adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1;
 }
 
 static int gfx_v6_0_ring_test_ring(struct amdgpu_ring *ring)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index c4e1401..cfed6db 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -2003,14 +2003,9 @@ static void gfx_v7_0_gpu_init(struct amdgpu_device *adev)
  */
 static void gfx_v7_0_scratch_init(struct amdgpu_device *adev)
 {
-   int i;
-
adev->gfx.scratch.num_reg = 7;
adev->gfx.scratch.reg_base = mmSCRATCH_REG0;
-   for (i = 0; i < adev->gfx.scratch.num_reg; i++) {
-   adev->gfx.scratch.free[i] = true;
-   adev->gfx.scratch.reg[i] = adev->gfx.scratch.reg_base + i;
-   }
+   adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1;
 }
 
 /**
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index c8c45ba..69543d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -749,14 +749,9 @@ static void gfx_v8_0_init_golden_registers(struct 
amdgpu_device *adev)
 
 static void gfx_v8_0_scratch_init(struct amdgpu_device *adev)
 {
-   int i;
-
adev->gfx.scratch.num_reg = 7;
adev->gfx.scratch.reg_base = mmSCRATCH_REG0;
-   for (i = 0; i < adev->gfx.scratch.num_reg; i++) {
-   adev->gfx.scratch.free[i] = true;
-   adev->gfx.scratch.reg[i] = adev->gfx.scratch.reg_base + i;
-   }
+   adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1;
 }
 
 static int gfx_v8_0_ring_test_ring(struct amdgpu_ring *ring)
-- 
2.10.2

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Re: [PATCH 0/4] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Laurent Pinchart 
Hi Andrey,

Thank you for the patches.

On Monday 16 Jan 2017 10:44:54 Andrey Grodzovsky wrote:
> This series is a folow-up on
> https://patchwork.kernel.org/patch/9501787/
> 
> The first patch makes changes to atomic helpers
> to allow for drives with ASYNC flip support to use them.
> Patches 2 and 3 are to use this in AMDGPU/DC and
> patch 4 is possible cleanup in nouveau/kms who seems
> to have the duplicate the helper as we did to support
> ASYNC flips.

I have my doubts regarding this. I'd much rather see userspace moving to the 
atomic API instead of extending support for legacy APIs.

> Andrey Grodzovsky (4):
>   drm/atomic: Save flip flags in drm_plane_state
>   drm/amdgpu: Remove flip_flag from amdgpu_crtc
>   drm/amd/display: Switch to using atomic_helper for flip.
>   drm/nouveau/kms/nv50: Switch to using atomic helper for flip.
> 
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
>  .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ---
>  drivers/gpu/drm/drm_atomic_helper.c| 10 +--
>  drivers/gpu/drm/nouveau/nv50_display.c | 77 ++
>  include/drm/drm_plane.h|  8 ++
>  5 files changed, 22 insertions(+), 166 deletions(-)

-- 
Regards,

Laurent Pinchart

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Re: [PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Gustavo Padovan 
Hi Andrey,

2017-01-16 Andrey Grodzovsky :

> Allows using atomic flip helpers for drivers
> using ASYNC flip.
> Remove ASYNC_FLIP restriction in helpers and
> caches the page flip flags in drm_plane_state
> to be used in the low level drivers.
> 
> Signed-off-by: Andrey Grodzovsky 
> ---
>  drivers/gpu/drm/drm_atomic_helper.c | 10 +++---
>  include/drm/drm_plane.h |  8 
>  2 files changed, 11 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
> b/drivers/gpu/drm/drm_atomic_helper.c
> index a4e5477..f83dc43 100644
> --- a/drivers/gpu/drm/drm_atomic_helper.c
> +++ b/drivers/gpu/drm/drm_atomic_helper.c
> @@ -2737,7 +2737,8 @@ static int page_flip_common(
>   struct drm_atomic_state *state,
>   struct drm_crtc *crtc,
>   struct drm_framebuffer *fb,
> - struct drm_pending_vblank_event *event)
> + struct drm_pending_vblank_event *event,
> + uint32_t flags)

Did you build this patch? It is changing the signature of
page_flip_common() but no changes to the callers.

Gustavo

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[PATCH 1/4] drm/atomic: Save flip flags in drm_plane_state

2017-01-16 Thread Andrey Grodzovsky 
Allows using atomic flip helpers for drivers
using ASYNC flip.
Remove ASYNC_FLIP restriction in helpers and
caches the page flip flags in drm_plane_state
to be used in the low level drivers.

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/drm_atomic_helper.c | 10 +++---
 include/drm/drm_plane.h |  8 
 2 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic_helper.c 
b/drivers/gpu/drm/drm_atomic_helper.c
index a4e5477..f83dc43 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -2737,7 +2737,8 @@ static int page_flip_common(
struct drm_atomic_state *state,
struct drm_crtc *crtc,
struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event)
+   struct drm_pending_vblank_event *event,
+   uint32_t flags)
 {
struct drm_plane *plane = crtc->primary;
struct drm_plane_state *plane_state;
@@ -2754,6 +2755,7 @@ static int page_flip_common(
if (IS_ERR(plane_state))
return PTR_ERR(plane_state);
 
+   plane_state->pflip_flags = flags;
 
ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
if (ret != 0)
@@ -2800,9 +2802,6 @@ int drm_atomic_helper_page_flip(struct drm_crtc *crtc,
struct drm_atomic_state *state;
int ret = 0;
 
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   return -EINVAL;
-
state = drm_atomic_state_alloc(plane->dev);
if (!state)
return -ENOMEM;
@@ -2865,9 +2864,6 @@ int drm_atomic_helper_page_flip_target(
struct drm_crtc_state *crtc_state;
int ret = 0;
 
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   return -EINVAL;
-
state = drm_atomic_state_alloc(plane->dev);
if (!state)
return -ENOMEM;
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index db3bbde..86d8ffc 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -122,6 +122,14 @@ struct drm_plane_state {
 */
bool visible;
 
+
+   /**
+* @pflip_flags:
+*
+* Flip related config options
+*/
+   u32 pflip_flags;
+
struct drm_atomic_state *state;
 };
 
-- 
1.9.1

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[PATCH 4/4] drm/nouveau/kms/nv50: Switch to using atomic helper for flip.

2017-01-16 Thread Andrey Grodzovsky 
Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/nouveau/nv50_display.c | 77 +++---
 1 file changed, 5 insertions(+), 72 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nv50_display.c 
b/drivers/gpu/drm/nouveau/nv50_display.c
index 2c2c645..419e00c 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -846,6 +846,10 @@ struct nv50_wndw_func {
asyw->image.w = fb->base.width;
asyw->image.h = fb->base.height;
asyw->image.kind = (fb->nvbo->tile_flags & 0xff00) >> 8;
+
+   asyw->interval =
+   asyw->state.pflip_flags & DRM_MODE_PAGE_FLIP_ASYNC ? 0 
: 1;
+
if (asyw->image.kind) {
asyw->image.layout = 0;
if (drm->device.info.chipset >= 0xc0)
@@ -2221,77 +2225,6 @@ struct nv50_base {
.atomic_check = nv50_head_atomic_check,
 };
 
-/* This is identical to the version in the atomic helpers, except that
- * it supports non-vblanked ("async") page flips.
- */
-static int
-nv50_head_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event, u32 flags)
-{
-   struct drm_plane *plane = crtc->primary;
-   struct drm_atomic_state *state;
-   struct drm_plane_state *plane_state;
-   struct drm_crtc_state *crtc_state;
-   int ret = 0;
-
-   state = drm_atomic_state_alloc(plane->dev);
-   if (!state)
-   return -ENOMEM;
-
-   state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
-retry:
-   crtc_state = drm_atomic_get_crtc_state(state, crtc);
-   if (IS_ERR(crtc_state)) {
-   ret = PTR_ERR(crtc_state);
-   goto fail;
-   }
-   crtc_state->event = event;
-
-   plane_state = drm_atomic_get_plane_state(state, plane);
-   if (IS_ERR(plane_state)) {
-   ret = PTR_ERR(plane_state);
-   goto fail;
-   }
-
-   ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
-   if (ret != 0)
-   goto fail;
-   drm_atomic_set_fb_for_plane(plane_state, fb);
-
-   /* Make sure we don't accidentally do a full modeset. */
-   state->allow_modeset = false;
-   if (!crtc_state->active) {
-   DRM_DEBUG_ATOMIC("[CRTC:%d] disabled, rejecting legacy flip\n",
-crtc->base.id);
-   ret = -EINVAL;
-   goto fail;
-   }
-
-   if (flags & DRM_MODE_PAGE_FLIP_ASYNC)
-   nv50_wndw_atom(plane_state)->interval = 0;
-
-   ret = drm_atomic_nonblocking_commit(state);
-fail:
-   if (ret == -EDEADLK)
-   goto backoff;
-
-   drm_atomic_state_put(state);
-   return ret;
-
-backoff:
-   drm_atomic_state_clear(state);
-   drm_atomic_legacy_backoff(state);
-
-   /*
-* Someone might have exchanged the framebuffer while we dropped locks
-* in the backoff code. We need to fix up the fb refcount tracking the
-* core does for us.
-*/
-   plane->old_fb = plane->fb;
-
-   goto retry;
-}
-
 static int
 nv50_head_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b,
uint32_t size)
@@ -2386,7 +2319,7 @@ struct nv50_base {
.gamma_set = nv50_head_gamma_set,
.destroy = nv50_head_destroy,
.set_config = drm_atomic_helper_set_config,
-   .page_flip = nv50_head_page_flip,
+   .page_flip = drm_atomic_helper_page_flip,
.set_property = drm_atomic_helper_crtc_set_property,
.atomic_duplicate_state = nv50_head_atomic_duplicate_state,
.atomic_destroy_state = nv50_head_atomic_destroy_state,
-- 
1.9.1

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[PATCH 0/4] Allow ASYNC flip with atomic helpers.

2017-01-16 Thread Andrey Grodzovsky 
This series is a folow-up on 
https://patchwork.kernel.org/patch/9501787/

The first patch makes changes to atomic helpers
to allow for drives with ASYNC flip support to use them.
Patches 2 and 3 are to use this in AMDGPU/DC and
patch 4 is possible cleanup in nouveau/kms who seems
to have the duplicate the helper as we did to support
ASYNC flips. 

Andrey Grodzovsky (4):
  drm/atomic: Save flip flags in drm_plane_state
  drm/amdgpu: Remove flip_flag from amdgpu_crtc
  drm/amd/display: Switch to using atomic_helper for flip.
  drm/nouveau/kms/nv50: Switch to using atomic helper for flip.

 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h   |  1 -
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ++
 drivers/gpu/drm/drm_atomic_helper.c| 10 +--
 drivers/gpu/drm/nouveau/nv50_display.c | 77 ++
 include/drm/drm_plane.h|  8 ++
 5 files changed, 22 insertions(+), 166 deletions(-)

-- 
1.9.1

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[PATCH 3/4] drm/amd/display: Switch to using atomic_helper for flip.

2017-01-16 Thread Andrey Grodzovsky 
Change-Id: Iad3e0b9b3546e4e4dc79be9233daf4fe4dba83e0
Signed-off-by: Andrey Grodzovsky 
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 92 ++
 1 file changed, 6 insertions(+), 86 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index a443b70..d4664bf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -1060,83 +1060,6 @@ static int dm_crtc_funcs_atomic_set_property(
return 0;
 }
 
-
-static int amdgpu_atomic_helper_page_flip(struct drm_crtc *crtc,
-   struct drm_framebuffer *fb,
-   struct drm_pending_vblank_event *event,
-   uint32_t flags)
-{
-   struct drm_plane *plane = crtc->primary;
-   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
-   struct drm_atomic_state *state;
-   struct drm_plane_state *plane_state;
-   struct drm_crtc_state *crtc_state;
-   int ret = 0;
-
-   state = drm_atomic_state_alloc(plane->dev);
-   if (!state)
-   return -ENOMEM;
-
-   ret = drm_crtc_vblank_get(crtc);
-   if (ret)
-   return ret;
-
-   state->acquire_ctx = drm_modeset_legacy_acquire_ctx(crtc);
-retry:
-   crtc_state = drm_atomic_get_crtc_state(state, crtc);
-   if (IS_ERR(crtc_state)) {
-   ret = PTR_ERR(crtc_state);
-   goto fail;
-   }
-   crtc_state->event = event;
-
-   plane_state = drm_atomic_get_plane_state(state, plane);
-   if (IS_ERR(plane_state)) {
-   ret = PTR_ERR(plane_state);
-   goto fail;
-   }
-
-   ret = drm_atomic_set_crtc_for_plane(plane_state, crtc);
-   if (ret != 0)
-   goto fail;
-   drm_atomic_set_fb_for_plane(plane_state, fb);
-
-   /* Make sure we don't accidentally do a full modeset. */
-   state->allow_modeset = false;
-   if (!crtc_state->active) {
-   DRM_DEBUG_ATOMIC("[CRTC:%d] disabled, rejecting legacy flip\n",
-crtc->base.id);
-   ret = -EINVAL;
-   goto fail;
-   }
-   acrtc->flip_flags = flags;
-
-   ret = drm_atomic_nonblocking_commit(state);
-
-fail:
-   if (ret == -EDEADLK)
-   goto backoff;
-
-   if (ret)
-   drm_crtc_vblank_put(crtc);
-
-   drm_atomic_state_put(state);
-
-   return ret;
-backoff:
-   drm_atomic_state_clear(state);
-   drm_atomic_legacy_backoff(state);
-
-   /*
-* Someone might have exchanged the framebuffer while we dropped locks
-* in the backoff code. We need to fix up the fb refcount tracking the
-* core does for us.
-*/
-   plane->old_fb = plane->fb;
-
-   goto retry;
-}
-
 /* Implemented only the options currently availible for the driver */
 static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs = {
.reset = drm_atomic_helper_crtc_reset,
@@ -1145,7 +1068,7 @@ static int amdgpu_atomic_helper_page_flip(struct drm_crtc 
*crtc,
.destroy = amdgpu_dm_crtc_destroy,
.gamma_set = amdgpu_dm_atomic_crtc_gamma_set,
.set_config = drm_atomic_helper_set_config,
-   .page_flip = amdgpu_atomic_helper_page_flip,
+   .page_flip_target = drm_atomic_helper_page_flip_target,
.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
.atomic_set_property = dm_crtc_funcs_atomic_set_property
@@ -1679,7 +1602,7 @@ static bool page_flip_needed(
sizeof(old_state_tmp)) == 0 ? true:false;
if (new_state->crtc && page_flip_required == false) {
acrtc_new = to_amdgpu_crtc(new_state->crtc);
-   if (acrtc_new->flip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
+   if (new_state->pflip_flags & DRM_MODE_PAGE_FLIP_ASYNC)
page_flip_required = true;
}
return page_flip_required;
@@ -2760,7 +2683,6 @@ int amdgpu_dm_atomic_commit(
for_each_plane_in_state(state, plane, old_plane_state, i) {
struct drm_plane_state *plane_state = plane->state;
struct drm_crtc *crtc = plane_state->crtc;
-   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
struct drm_framebuffer *fb = plane_state->fb;
 
if (!fb || !crtc || !crtc->state->planes_changed ||
@@ -2771,10 +2693,9 @@ int amdgpu_dm_atomic_commit(
ret = amdgpu_crtc_page_flip_target(crtc,
   fb,
   crtc->state->event,
-  acrtc->flip_flags,
-

Re: 答复: [PATCH 2/3] drm/amdgpu:implement META-DATA write routines

2017-01-16 Thread Christian König 
That is perfectly fine as long as you add the code using it in the same 
set of patches.


What we should avoid is adding a lot of code and then not using for for 
quite some time, that get certainly removed sooner or later.


Regards,
Christian.

Am 16.01.2017 um 09:20 schrieb Liu, Monk:


if ring_write_multiple is organized in a separate patch, doesn't it 
introduces an function that no client using it ??



fine by me although ...


BR Monk


*发件人:* Christian König 
*发送时间:* 2017年1月12日 20:27:48
*收件人:* Liu, Monk; amd-gfx@lists.freedesktop.org
*主题:* Re: [PATCH 2/3] drm/amdgpu:implement META-DATA write routines
Am 12.01.2017 um 08:41 schrieb Monk Liu:
> Change-Id: I66007a7f7e4e27fb129121f36143dce3cfb43738
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   | 31 ++
>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 
+++

>   2 files changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h

> index e9983fb..2039da7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1599,6 +1599,37 @@ static inline void amdgpu_ring_write(struct 
amdgpu_ring *ring, uint32_t v)

>ring->count_dw--;
>   }
>
> +static inline void amdgpu_ring_write_multiple(struct amdgpu_ring 
*ring, void *src, int count_dw)

> +{
> + unsigned occupied, chunk1, chunk2;
> + void *dst;
> +
> + if (ring->count_dw < count_dw)
> + DRM_ERROR("amdgpu: writing more dwords to the ring 
than expected!\n");

> + else {

Coding style says when either the "if" or the "else" branch uses "{" and
"}" both should use them.

I think even better would be to use a return statement in the "if",
cause this is just checking the prerequisites for errors.

Additional to that adding this function should be a separate patch.

Christian.

> + occupied = ring->wptr & ring->ptr_mask;
> + dst = (void *)>ring[occupied];
> + chunk1 = ring->ptr_mask + 1 - occupied;
> + chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> + chunk2 = count_dw - chunk1;
> + chunk1 <<= 2;
> + chunk2 <<= 2;
> + if (chunk1) {
> + memcpy(dst, src, chunk1);
> + }
> +
> + if (chunk2) {
> + src += chunk1;
> + dst = (void *)ring->ring;
> + memcpy(dst, src, chunk2);
> + }
> +
> + ring->wptr += count_dw;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw -= count_dw;
> + }
> +}
> +
>   static inline struct amdgpu_sdma_instance *
>   amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>   {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

> index 375784d..3e8cff3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -657,6 +657,8 @@ static void gfx_v8_0_set_gds_init(struct 
amdgpu_device *adev);

>   static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev);
>   static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev);
>   static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev);
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring 
*ring, uint64_t addr);
> +static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring 
*ring, uint64_t addr);

>
>   static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
>   {
> @@ -7212,3 +7214,62 @@ const struct amdgpu_ip_block_version 
gfx_v8_1_ip_block =

>.rev = 0,
>.funcs = _v8_0_ip_funcs,
>   };
> +
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring 
*ring, uint64_t csa_addr)

> +{
> + uint64_t ce_payload_addr;
> + int cnt_ce;
> + static union {
> + struct amdgpu_ce_ib_state regular;
> + struct amdgpu_ce_ib_state_chained_ib chained;
> + } ce_payload = {0};
> +
> + if (ring->adev->virt.chained_ib_support) {
> + ce_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data_chained_ib, ce_payload);

> + cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
> + } else {
> + ce_payload_addr = csa_addr + offsetof(struct 
amdgpu_gfx_meta_data, ce_payload);

> + cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
> + }
> +
> + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));
> + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
> + WRITE_DATA_DST_SEL(8) |
> + WR_CONFIRM) |
> + WRITE_DATA_CACHE_POLICY(0));
> + amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));
> + amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));
> +

答复: [PATCH 2/3] drm/amdgpu:implement META-DATA write routines

2017-01-16 Thread Liu, Monk 
if ring_write_multiple is organized in a separate patch, doesn't it introduces 
an function that no client using it ??


fine by me although ...


BR Monk


发件人: Christian König 
发送时间: 2017年1月12日 20:27:48
收件人: Liu, Monk; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH 2/3] drm/amdgpu:implement META-DATA write routines

Am 12.01.2017 um 08:41 schrieb Monk Liu:
> Change-Id: I66007a7f7e4e27fb129121f36143dce3cfb43738
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h   | 31 ++
>   drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 61 
> +++
>   2 files changed, 92 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index e9983fb..2039da7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1599,6 +1599,37 @@ static inline void amdgpu_ring_write(struct 
> amdgpu_ring *ring, uint32_t v)
>ring->count_dw--;
>   }
>
> +static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, void 
> *src, int count_dw)
> +{
> + unsigned occupied, chunk1, chunk2;
> + void *dst;
> +
> + if (ring->count_dw < count_dw)
> + DRM_ERROR("amdgpu: writing more dwords to the ring than 
> expected!\n");
> + else {

Coding style says when either the "if" or the "else" branch uses "{" and
"}" both should use them.

I think even better would be to use a return statement in the "if",
cause this is just checking the prerequisites for errors.

Additional to that adding this function should be a separate patch.

Christian.

> + occupied = ring->wptr & ring->ptr_mask;
> + dst = (void *)>ring[occupied];
> + chunk1 = ring->ptr_mask + 1 - occupied;
> + chunk1 = (chunk1 >= count_dw) ? count_dw: chunk1;
> + chunk2 = count_dw - chunk1;
> + chunk1 <<= 2;
> + chunk2 <<= 2;
> + if (chunk1) {
> + memcpy(dst, src, chunk1);
> + }
> +
> + if (chunk2) {
> + src += chunk1;
> + dst = (void *)ring->ring;
> + memcpy(dst, src, chunk2);
> + }
> +
> + ring->wptr += count_dw;
> + ring->wptr &= ring->ptr_mask;
> + ring->count_dw -= count_dw;
> + }
> +}
> +
>   static inline struct amdgpu_sdma_instance *
>   amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>   {
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> index 375784d..3e8cff3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
> @@ -657,6 +657,8 @@ static void gfx_v8_0_set_gds_init(struct amdgpu_device 
> *adev);
>   static void gfx_v8_0_set_rlc_funcs(struct amdgpu_device *adev);
>   static u32 gfx_v8_0_get_csb_size(struct amdgpu_device *adev);
>   static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev);
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, 
> uint64_t addr);
> +static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, 
> uint64_t addr);
>
>   static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev)
>   {
> @@ -7212,3 +7214,62 @@ const struct amdgpu_ip_block_version gfx_v8_1_ip_block 
> =
>.rev = 0,
>.funcs = _v8_0_ip_funcs,
>   };
> +
> +static void gfx_v8_0_ring_emit_ce_meta_init(struct amdgpu_ring *ring, 
> uint64_t csa_addr)
> +{
> + uint64_t ce_payload_addr;
> + int cnt_ce;
> + static union {
> + struct amdgpu_ce_ib_state regular;
> + struct amdgpu_ce_ib_state_chained_ib chained;
> + } ce_payload = {0};
> +
> + if (ring->adev->virt.chained_ib_support) {
> + ce_payload_addr = csa_addr + offsetof(struct 
> amdgpu_gfx_meta_data_chained_ib, ce_payload);
> + cnt_ce = (sizeof(ce_payload.chained) >> 2) + 4 - 2;
> + } else {
> + ce_payload_addr = csa_addr + offsetof(struct 
> amdgpu_gfx_meta_data, ce_payload);
> + cnt_ce = (sizeof(ce_payload.regular) >> 2) + 4 - 2;
> + }
> +
> + amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));
> + amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |
> + WRITE_DATA_DST_SEL(8) |
> + WR_CONFIRM) |
> + WRITE_DATA_CACHE_POLICY(0));
> + amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));
> + amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));
> + amdgpu_ring_write_multiple(ring, (void *)_payload, cnt_ce - 2);
> +}
> +
> +static void gfx_v8_0_ring_emit_de_meta_init(struct amdgpu_ring *ring, 
> uint64_t csa_addr)
> +{
> + uint64_t de_payload_addr, gds_addr;
> + int cnt_de;
> + static union {
> + struct amdgpu_de_ib_state regular;
> +