Re: [PATCH] drm/amdgpu: add more cases to DCE11 possible crtc mask setup

2017-02-09 Thread Michel Dänzer 
On 10/02/17 02:02 PM, Alex Deucher wrote:
> Add cases for asics with 3 and 5 crtcs.  Fixes an artificial
> limitation on asics with 3 or 5 crtcs.
> 
> Fixes:
> https://bugs.freedesktop.org/show_bug.cgi?id=99744
> 
> Signed-off-by: Alex Deucher 
> Cc: sta...@vger.kernel.org
> ---
>  drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
> b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> index 1cf1d9d..5b24e89 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> @@ -3737,9 +3737,15 @@ static void dce_v11_0_encoder_add(struct amdgpu_device 
> *adev,
>   default:
>   encoder->possible_crtcs = 0x3;
>   break;
> + case 3:
> + encoder->possible_crtcs = 0x7;
> + break;
>   case 4:
>   encoder->possible_crtcs = 0xf;
>   break;
> + case 5:
> + encoder->possible_crtcs = 0x1f;
> + break;
>   case 6:
>   encoder->possible_crtcs = 0x3f;
>   break;
> 

The switch statement could be simplified to something like:

switch (adev->mode_info.num_crtc) {
case 2:
default:
encoder->possible_crtcs = 0x3;
break;
case 1:
case 3:
case 4:
case 5:
case 6:
encoder->possible_crtcs = (1 << adev->mode_info.num_crtc) - 1;
break;
}

Either way,

Reviewed-by: Michel Dänzer 


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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Re: [PATCH 2/2] drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()

2017-02-09 Thread zhoucm1 



On 2017年02月10日 06:28, Samuel Pitoiset wrote:

This removes code duplication.

Signed-off-by: Samuel Pitoiset 

Reviewed-by: Chunming Zhou 

Thanks,
David Zhou

---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +---
  1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index ae4658a10e2c..76569e31bfd8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -506,13 +506,7 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device 
*adev,
list_for_each_entry(entry, list, head) {
struct amdgpu_bo *bo =
container_of(entry->bo, struct amdgpu_bo, tbo);
-
-   /* if anything is swapped out don't swap it in here,
-  just abort and wait for the next CS */
-   if (!amdgpu_bo_gpu_accessible(bo))
-   goto error;
-
-   if (bo->shadow && !amdgpu_bo_gpu_accessible(bo->shadow))
+   if (amdgpu_gem_va_check(NULL, bo))
goto error;
}
  


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Re: [PATCH 1/2] drm/amdgpu: drop multiple bo_unreserve() calls in amdgpu_gem_op_ioctl()

2017-02-09 Thread zhoucm1 



On 2017年02月10日 06:28, Samuel Pitoiset wrote:

Move amdgpu_bo_unreserve() outside of the switch. While we are
at it, add a missing break in the default case.

Signed-off-by: Samuel Pitoiset 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 7 ++-
  1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 1dc59aafec71..ae4658a10e2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -660,7 +660,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
info.domains = robj->prefered_domains;
info.domain_flags = robj->flags;
-   amdgpu_bo_unreserve(robj);
if (copy_to_user(out, , sizeof(info)))
r = -EFAULT;
NAK, your this change will break our previous deadlock fix for ww_mutex 
and mm->mmap_sem if I remember correctly.


Regards,
David Zhou

break;
@@ -668,7 +667,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
case AMDGPU_GEM_OP_SET_PLACEMENT:
if (amdgpu_ttm_tt_get_usermm(robj->tbo.ttm)) {
r = -EPERM;
-   amdgpu_bo_unreserve(robj);
break;
}
robj->prefered_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
@@ -677,14 +675,13 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void 
*data,
robj->allowed_domains = robj->prefered_domains;
if (robj->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
robj->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
-
-   amdgpu_bo_unreserve(robj);
break;
default:
-   amdgpu_bo_unreserve(robj);
r = -EINVAL;
+   break;
}
  
+	amdgpu_bo_unreserve(robj);

  out:
drm_gem_object_unreference_unlocked(gobj);
return r;


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[PATCH 1/2] drm/amdgpu: drop multiple bo_unreserve() calls in amdgpu_gem_op_ioctl()

2017-02-09 Thread Samuel Pitoiset 
Move amdgpu_bo_unreserve() outside of the switch. While we are
at it, add a missing break in the default case.

Signed-off-by: Samuel Pitoiset 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 7 ++-
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 1dc59aafec71..ae4658a10e2c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -660,7 +660,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
info.alignment = robj->tbo.mem.page_alignment << PAGE_SHIFT;
info.domains = robj->prefered_domains;
info.domain_flags = robj->flags;
-   amdgpu_bo_unreserve(robj);
if (copy_to_user(out, , sizeof(info)))
r = -EFAULT;
break;
@@ -668,7 +667,6 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void *data,
case AMDGPU_GEM_OP_SET_PLACEMENT:
if (amdgpu_ttm_tt_get_usermm(robj->tbo.ttm)) {
r = -EPERM;
-   amdgpu_bo_unreserve(robj);
break;
}
robj->prefered_domains = args->value & (AMDGPU_GEM_DOMAIN_VRAM |
@@ -677,14 +675,13 @@ int amdgpu_gem_op_ioctl(struct drm_device *dev, void 
*data,
robj->allowed_domains = robj->prefered_domains;
if (robj->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
robj->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
-
-   amdgpu_bo_unreserve(robj);
break;
default:
-   amdgpu_bo_unreserve(robj);
r = -EINVAL;
+   break;
}
 
+   amdgpu_bo_unreserve(robj);
 out:
drm_gem_object_unreference_unlocked(gobj);
return r;
-- 
2.11.1

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[PATCH 2/2] drm/amdgpu: use amdgpu_gem_va_check() in amdgpu_gem_va_update_vm()

2017-02-09 Thread Samuel Pitoiset 
This removes code duplication.

Signed-off-by: Samuel Pitoiset 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index ae4658a10e2c..76569e31bfd8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -506,13 +506,7 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device 
*adev,
list_for_each_entry(entry, list, head) {
struct amdgpu_bo *bo =
container_of(entry->bo, struct amdgpu_bo, tbo);
-
-   /* if anything is swapped out don't swap it in here,
-  just abort and wait for the next CS */
-   if (!amdgpu_bo_gpu_accessible(bo))
-   goto error;
-
-   if (bo->shadow && !amdgpu_bo_gpu_accessible(bo->shadow))
+   if (amdgpu_gem_va_check(NULL, bo))
goto error;
}
 
-- 
2.11.1

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[PATCH 1/8] drm/amdgpu: Expose mode_config functions for DM

2017-02-09 Thread Harry Wentland 
Signed-off-by: Harry Wentland 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 33 +
 2 files changed, 35 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index a7d3a3943e56..a6000ce6ff43 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -596,7 +596,7 @@ amdgpu_framebuffer_init(struct drm_device *dev,
return 0;
 }
 
-static struct drm_framebuffer *
+struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
   const struct drm_mode_fb_cmd2 *mode_cmd)
@@ -628,7 +628,7 @@ amdgpu_user_framebuffer_create(struct drm_device *dev,
return _fb->base;
 }
 
-static void amdgpu_output_poll_changed(struct drm_device *dev)
+void amdgpu_output_poll_changed(struct drm_device *dev)
 {
struct amdgpu_device *adev = dev->dev_private;
amdgpu_fb_output_poll_changed(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
new file mode 100644
index ..3cc0ef0c055e
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+#ifndef __AMDGPU_DISPLAY_H__
+#define __AMDGPU_DISPLAY_H__
+
+struct drm_framebuffer *
+amdgpu_user_framebuffer_create(struct drm_device *dev,
+  struct drm_file 
*file_priv,
+  const struct 
drm_mode_fb_cmd2 *mode_cmd);
+
+void amdgpu_output_poll_changed(struct drm_device *dev);
+
+#endif
-- 
2.9.3

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[PATCH 4/8] drm/amd/display: Remove unused define from amdgpu_dm_types

2017-02-09 Thread Harry Wentland 
Change-Id: Idfd0d0d6e537eddbc75378ba394b0f36bd89dd50
Signed-off-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h | 5 -
 1 file changed, 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
index 6ed1480a8bc3..4faa1659f7f9 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.h
@@ -59,11 +59,6 @@ int amdgpu_dm_atomic_commit(
 int amdgpu_dm_atomic_check(struct drm_device *dev,
struct drm_atomic_state *state);
 
-int dm_create_validation_set_for_stream(
-   struct drm_connector *connector,
-   struct drm_display_mode *mode,
-   struct dc_validation_set *val_set);
-
 void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector);
 struct drm_connector_state *amdgpu_dm_connector_atomic_duplicate_state(
struct drm_connector *connector);
-- 
2.9.3

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[PATCH 6/8] drm/amd/display: Refactor atomic commit implementation.

2017-02-09 Thread Harry Wentland 
From: Andrey Grodzovsky 

Modify amdgpu_dm_atomic_comit to implement
atomic_comit_tail hook.
Unify Buffer objects allocation and dealocation
for surface updates and page flips.
Simplify wait for fences and target_vbank logic
for non blockiing commit.
Remove hacky update surface to page flip synchronization
we had and rely on atomic framework synchronization logic.

Change-Id: I23a01d2744b9f75d4e534a95e586d64de47ca32c
Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  |  62 ++--
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 321 +
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.h|   7 +-
 3 files changed, 190 insertions(+), 200 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b259867364fa..58eac40fb464 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -155,7 +155,6 @@ static struct amdgpu_crtc *get_crtc_by_otg_inst(
 
 static void dm_pflip_high_irq(void *interrupt_params)
 {
-   struct amdgpu_flip_work *works;
struct amdgpu_crtc *amdgpu_crtc;
struct common_irq_params *irq_params = interrupt_params;
struct amdgpu_device *adev = irq_params->adev;
@@ -171,7 +170,6 @@ static void dm_pflip_high_irq(void *interrupt_params)
}
 
spin_lock_irqsave(>ddev->event_lock, flags);
-   works = amdgpu_crtc->pflip_works;
 
if (amdgpu_crtc->pflip_status != AMDGPU_FLIP_SUBMITTED){
DRM_DEBUG_DRIVER("amdgpu_crtc->pflip_status = %d 
!=AMDGPU_FLIP_SUBMITTED(%d) on crtc:%d[%p] \n",
@@ -183,23 +181,25 @@ static void dm_pflip_high_irq(void *interrupt_params)
return;
}
 
-   /* page flip completed. clean up */
-   amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
-   amdgpu_crtc->pflip_works = NULL;
 
/* wakeup usersapce */
-   if (works->event)
-   drm_crtc_send_vblank_event(_crtc->base,
-  works->event);
+   if (amdgpu_crtc->event &&
+   amdgpu_crtc->event->event.base.type
+   == DRM_EVENT_FLIP_COMPLETE) {
+   drm_crtc_send_vblank_event(_crtc->base, 
amdgpu_crtc->event);
+   /* page flip completed. clean up */
+   amdgpu_crtc->event = NULL;
+   } else {
+   WARN_ON(1);
+   }
 
+   amdgpu_crtc->pflip_status = AMDGPU_FLIP_NONE;
spin_unlock_irqrestore(>ddev->event_lock, flags);
 
-   DRM_DEBUG_DRIVER("%s - crtc :%d[%p], pflip_stat:AMDGPU_FLIP_NONE, work: 
%p,\n",
-   __func__, amdgpu_crtc->crtc_id, 
amdgpu_crtc, works);
+   DRM_DEBUG_DRIVER("%s - crtc :%d[%p], pflip_stat:AMDGPU_FLIP_NONE \n",
+   __func__, amdgpu_crtc->crtc_id, 
amdgpu_crtc);
 
-   if (amdgpu_crtc->base.funcs->page_flip_target)
-   drm_crtc_vblank_put(_crtc->base);
-   schedule_work(>unpin_work);
+   drm_crtc_vblank_put(_crtc->base);
 }
 
 static void dm_crtc_high_irq(void *interrupt_params)
@@ -731,7 +731,11 @@ static struct drm_mode_config_funcs amdgpu_dm_mode_funcs = 
{
.fb_create = amdgpu_user_framebuffer_create,
.output_poll_changed = amdgpu_output_poll_changed,
.atomic_check = amdgpu_dm_atomic_check,
-   .atomic_commit = amdgpu_dm_atomic_commit
+   .atomic_commit = drm_atomic_helper_commit
+};
+
+static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = 
{
+   .atomic_commit_tail = amdgpu_dm_atomic_commit_tail
 };
 
 void amdgpu_dm_update_connector_after_detect(
@@ -1106,6 +1110,7 @@ static int amdgpu_dm_mode_config_init(struct 
amdgpu_device *adev)
adev->mode_info.mode_config_initialized = true;
 
adev->ddev->mode_config.funcs = (void *)_dm_mode_funcs;
+   adev->ddev->mode_config.helper_private = 
_dm_mode_config_helperfuncs;
 
adev->ddev->mode_config.max_width = 16384;
adev->ddev->mode_config.max_height = 16384;
@@ -1359,6 +1364,14 @@ static void dm_page_flip(struct amdgpu_device *adev,
acrtc = adev->mode_info.crtcs[crtc_id];
stream = acrtc->stream;
 
+
+   if (acrtc->pflip_status != AMDGPU_FLIP_NONE) {
+   DRM_ERROR("flip queue: acrtc %d, already busy\n", 
acrtc->crtc_id);
+   /* In commit tail framework this cannot happen */
+   BUG_ON(0);
+   }
+
+
/*
 * Received a page flip call after the display has been reset.
 * Just return in this case. Everything should be clean-up on reset.
@@ -1373,15 +1386,28 @@ static void dm_page_flip(struct amdgpu_device *adev,
addr.address.grph.addr.high_part = upper_32_bits(crtc_base);
addr.flip_immediate = async;
 
+
+   if (acrtc->base.state->event &&
+

[PATCH 7/8] drm/amd/display: Refactor headless to use atomic commit.

2017-02-09 Thread Harry Wentland 
From: Andrey Grodzovsky 

Headless mode set needs to be synchronized against outstanding nonblocking
commits. This achieved by building atomic state and commiting it.

Change-Id: Ie5e778afb33dd5c303a169216a7bb8c2d857037e
Signed-off-by: Andrey Grodzovsky 
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 140 +
 1 file changed, 61 insertions(+), 79 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index 93cc3d128a11..69c85ef63c4b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -2802,6 +2802,65 @@ void amdgpu_dm_atomic_commit_tail(
/* Release old FB */
drm_atomic_helper_cleanup_planes(dev, state);
 }
+
+
+static int dm_force_atomic_commit(struct drm_connector *connector)
+{
+   int ret = 0;
+   struct drm_device *ddev = connector->dev;
+   struct drm_atomic_state *state = drm_atomic_state_alloc(ddev);
+   struct amdgpu_crtc *disconnected_acrtc = 
to_amdgpu_crtc(connector->encoder->crtc);
+   struct drm_plane *plane = disconnected_acrtc->base.primary;
+   struct drm_connector_state *conn_state;
+   struct drm_crtc_state *crtc_state;
+   struct drm_plane_state *plane_state;
+
+   if (!state)
+   return ENOMEM;
+
+   state->acquire_ctx = ddev->mode_config.acquire_ctx;
+
+   /* Construct an atomic state to restore previous display setting */
+
+   /*
+* Attach connectors to drm_atomic_state
+*/
+   conn_state = drm_atomic_get_connector_state(state, connector);
+
+   ret = PTR_ERR_OR_ZERO(conn_state);
+   if (ret)
+   goto err;
+
+   /* Attach crtc to drm_atomic_state*/
+   crtc_state = drm_atomic_get_crtc_state(state, 
_acrtc->base);
+
+   ret = PTR_ERR_OR_ZERO(crtc_state);
+   if (ret)
+   goto err;
+
+   /* force a restore */
+   crtc_state->mode_changed = true;
+
+   /* Attach plane to drm_atomic_state */
+   plane_state = drm_atomic_get_plane_state(state, plane);
+
+   ret = PTR_ERR_OR_ZERO(plane_state);
+   if (ret)
+   goto err;
+
+
+   /* Call commit internally with the state we just constructed */
+   ret = drm_atomic_commit(state);
+   if (!ret)
+   return 0;
+
+err:
+   DRM_ERROR("Restoring old state failed with %i\n", ret);
+   drm_atomic_state_put(state);
+
+   return ret;
+}
+
 /*
  * This functions handle all cases when set mode does not come upon hotplug.
  * This include when the same display is unplugged then plugged back into the
@@ -2809,15 +2868,8 @@ void amdgpu_dm_atomic_commit_tail(
  */
 void dm_restore_drm_connector_state(struct drm_device *dev, struct 
drm_connector *connector)
 {
-   struct drm_crtc *crtc;
-   struct amdgpu_device *adev = dev->dev_private;
-   struct dc *dc = adev->dm.dc;
struct amdgpu_connector *aconnector = to_amdgpu_connector(connector);
struct amdgpu_crtc *disconnected_acrtc;
-   const struct dc_sink *sink;
-   const struct dc_stream *commit_streams[MAX_STREAMS];
-   const struct dc_stream *current_stream;
-   uint32_t commit_streams_count = 0;
 
if (!aconnector->dc_sink || !connector->state || !connector->encoder)
return;
@@ -2827,83 +2879,13 @@ void dm_restore_drm_connector_state(struct drm_device 
*dev, struct drm_connector
if (!disconnected_acrtc || !disconnected_acrtc->stream)
return;
 
-   sink = disconnected_acrtc->stream->sink;
-
/*
 * If the previous sink is not released and different from the current,
 * we deduce we are in a state where we can not rely on usermode call
 * to turn on the display, so we do it here
 */
-   if (sink != aconnector->dc_sink) {
-   struct dm_connector_state *dm_state =
-   to_dm_connector_state(aconnector->base.state);
-
-   struct dc_stream *new_stream =
-   create_stream_for_sink(
-   aconnector,
-   _acrtc->base.state->mode,
-   dm_state);
-
-   DRM_INFO("Headless hotplug, restoring connector state\n");
-   /*
-* we evade vblanks and pflips on crtc that
-* should be changed
-*/
-   manage_dm_interrupts(adev, disconnected_acrtc, false);
-   /* this is the update mode case */
-
-   current_stream = disconnected_acrtc->stream;
-
-   disconnected_acrtc->stream = new_stream;
-   disconnected_acrtc->enabled = true;
-   disconnected_acrtc->hw_mode = 
disconnected_acrtc->base.state->mode;
-
-   commit_streams_count = 0;
-
-

[PATCH 5/8] drm/amdgpu: Add a few members to support DAL atomic refactor.

2017-02-09 Thread Harry Wentland 
From: Andrey Grodzovsky 

Signed-off-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index fda53fa0313f..1e77136d6f0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -322,6 +322,9 @@ struct amdgpu_display_funcs {
 struct amdgpu_framebuffer {
struct drm_framebuffer base;
struct drm_gem_object *obj;
+
+   /* caching for later use */
+   uint64_t address;
 };
 
 struct amdgpu_fbdev {
@@ -447,6 +450,7 @@ struct amdgpu_crtc {
uint32_t flip_flags;
/* After Set Mode stream will be non-NULL */
const struct dc_stream *stream;
+   struct drm_pending_vblank_event *event;
 };
 
 struct amdgpu_encoder_atom_dig {
-- 
2.9.3

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[PATCH 3/8] drm/amd/display: Use atomic helpers for gamma

2017-02-09 Thread Harry Wentland 
We were using set_properties and gamma in a weird way.
This change aligns the properties with other drivers
and allows us to remove a private gamma flag and reuse
atomic helpers for most of this.

Change-Id: Ic74b692ee6c6d3e4fd938c6226e65b54075ff983
Signed-off-by: Harry Wentland 
---
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_types.c| 89 +-
 1 file changed, 21 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
index e80ecd5707f8..2ee5765f0315 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_types.c
@@ -61,7 +61,6 @@ struct dm_connector_state {
 #define to_dm_connector_state(x)\
container_of((x), struct dm_connector_state, base)
 
-#define AMDGPU_CRTC_MODE_PRIVATE_FLAGS_GAMMASET 1
 
 void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 {
@@ -551,23 +550,18 @@ static void fill_gamma_from_crtc(
 {
int i;
struct dc_gamma *gamma;
-   uint16_t *red, *green, *blue;
-   int end = (crtc->gamma_size > NUM_OF_RAW_GAMMA_RAMP_RGB_256) ?
-   NUM_OF_RAW_GAMMA_RAMP_RGB_256 : crtc->gamma_size;
-
-   red = crtc->gamma_store;
-   green = red + crtc->gamma_size;
-   blue = green + crtc->gamma_size;
+   struct drm_crtc_state *state = crtc->state;
+   struct drm_color_lut *lut = (struct drm_color_lut *) 
state->gamma_lut->data;
 
gamma = dc_create_gamma();
 
if (gamma == NULL)
return;
 
-   for (i = 0; i < end; i++) {
-   gamma->red[i] = (unsigned short) red[i];
-   gamma->green[i] = (unsigned short) green[i];
-   gamma->blue[i] = (unsigned short) blue[i];
+   for (i = 0; i < NUM_OF_RAW_GAMMA_RAMP_RGB_256; i++) {
+   gamma->red[i] = lut[i].red;
+   gamma->green[i] = lut[i].green;
+   gamma->blue[i] = lut[i].blue;
}
 
dc_surface->gamma_correction = gamma;
@@ -601,8 +595,7 @@ static void fill_plane_attributes(
surface->in_transfer_func = input_tf;
 
/* In case of gamma set, update gamma value */
-   if (crtc->mode.private_flags &
-   AMDGPU_CRTC_MODE_PRIVATE_FLAGS_GAMMASET) {
+   if (state->crtc->state->gamma_lut) {
fill_gamma_from_crtc(crtc, surface);
}
 }
@@ -719,12 +712,6 @@ static void dm_dc_surface_commit(
dc_surface,
crtc->primary->state,
true);
-   if (crtc->mode.private_flags &
-   AMDGPU_CRTC_MODE_PRIVATE_FLAGS_GAMMASET) {
-   /* reset trigger of gamma */
-   crtc->mode.private_flags &=
-   ~AMDGPU_CRTC_MODE_PRIVATE_FLAGS_GAMMASET;
-   }
 
dc_surfaces[0] = dc_surface;
 
@@ -1049,50 +1036,6 @@ void amdgpu_dm_crtc_destroy(struct drm_crtc *crtc)
kfree(crtc);
 }
 
-static int amdgpu_dm_atomic_crtc_gamma_set(
-   struct drm_crtc *crtc,
-   u16 *red,
-   u16 *green,
-   u16 *blue,
-   uint32_t size)
-{
-   struct drm_device *dev = crtc->dev;
-   struct drm_property *prop = dev->mode_config.prop_crtc_id;
-
-   crtc->state->mode.private_flags |= 
AMDGPU_CRTC_MODE_PRIVATE_FLAGS_GAMMASET;
-
-   return drm_atomic_helper_crtc_set_property(crtc, prop, 0);
-}
-
-static int dm_crtc_funcs_atomic_set_property(
-   struct drm_crtc *crtc,
-   struct drm_crtc_state *crtc_state,
-   struct drm_property *property,
-   uint64_t val)
-{
-   struct drm_plane_state *plane_state;
-
-   crtc_state->planes_changed = true;
-
-   /*
-* Bit of magic done here. We need to ensure
-* that planes get update after mode is set.
-* So, we need to add primary plane to state,
-* and this way atomic_update would be called
-* for it
-*/
-   plane_state =
-   drm_atomic_get_plane_state(
-   crtc_state->state,
-   crtc->primary);
-
-   if (!plane_state)
-   return -EINVAL;
-
-   return 0;
-}
-
-
 static int amdgpu_atomic_helper_page_flip(struct drm_crtc *crtc,
struct drm_framebuffer *fb,
struct drm_pending_vblank_event *event,
@@ -1174,12 +1117,12 @@ static const struct drm_crtc_funcs amdgpu_dm_crtc_funcs 
= {
.cursor_set = dm_crtc_cursor_set,
.cursor_move = dm_crtc_cursor_move,
.destroy = amdgpu_dm_crtc_destroy,
-   .gamma_set = amdgpu_dm_atomic_crtc_gamma_set,
+   .gamma_set = drm_atomic_helper_legacy_gamma_set,
.set_config = drm_atomic_helper_set_config,
+   .set_property = drm_atomic_helper_crtc_set_property,
.page_flip = amdgpu_atomic_helper_page_flip,
.atomic_duplicate_state =

[PATCH 2/8] drm/amd/display: Use amdgpu mode funcs statically

2017-02-09 Thread Harry Wentland 
No need to assign them dynamically. This is much more readable.

Change-Id: I2d8a356e8d916800c4553c4e9b19ce42f7f1c391
Signed-off-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 5a2ed49c0b8a..b259867364fa 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -28,6 +28,7 @@
 
 #include "vid.h"
 #include "amdgpu.h"
+#include "amdgpu_display.h"
 #include "atom.h"
 #include "amdgpu_dm.h"
 #include "amdgpu_dm_types.h"
@@ -727,6 +728,8 @@ const struct amdgpu_ip_block_version dm_ip_block =
 
 /* TODO: it is temporary non-const, should fixed later */
 static struct drm_mode_config_funcs amdgpu_dm_mode_funcs = {
+   .fb_create = amdgpu_user_framebuffer_create,
+   .output_poll_changed = amdgpu_output_poll_changed,
.atomic_check = amdgpu_dm_atomic_check,
.atomic_commit = amdgpu_dm_atomic_commit
 };
@@ -1102,11 +1105,6 @@ static int amdgpu_dm_mode_config_init(struct 
amdgpu_device *adev)
 
adev->mode_info.mode_config_initialized = true;
 
-   amdgpu_dm_mode_funcs.fb_create =
-   amdgpu_mode_funcs.fb_create;
-   amdgpu_dm_mode_funcs.output_poll_changed =
-   amdgpu_mode_funcs.output_poll_changed;
-
adev->ddev->mode_config.funcs = (void *)_dm_mode_funcs;
 
adev->ddev->mode_config.max_width = 16384;
-- 
2.9.3

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Re: Change queue/pipe split between amdkfd and amdgpu

2017-02-09 Thread Oded Gabbay 
 Andres,

I tried your patches on Kaveri with airlied's drm-next branch.
I used radeon+amdkfd

The following test failed: KFDQMTest.CreateMultipleCpQueues
However, I can't debug it because I don't have the sources of kfdtest.

In dmesg, I saw the following warning during boot:
WARNING: CPU: 0 PID: 150 at
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c:670
start_cpsch+0xc5/0x220 [amdkfd]
[4.393796] Modules linked in: hid_logitech_hidpp hid_logitech_dj
hid_generic usbhid hid uas usb_storage amdkfd amd_iommu_v2 radeon(+)
i2c_algo_bit ttm drm_kms_helper syscopyarea ahci sysfillrect sysimgblt
libahci fb_sys_fops drm r8169 mii fjes video
[4.393811] CPU: 0 PID: 150 Comm: systemd-udevd Not tainted 4.10.0-rc5+ #1
[4.393811] Hardware name: Gigabyte Technology Co., Ltd. To be
filled by O.E.M./F2A88XM-D3H, BIOS F5 01/09/2014
[4.393812] Call Trace:
[4.393818]  dump_stack+0x63/0x90
[4.393822]  __warn+0xcb/0xf0
[4.393823]  warn_slowpath_null+0x1d/0x20
[4.393830]  start_cpsch+0xc5/0x220 [amdkfd]
[4.393836]  ? initialize_cpsch+0xa0/0xb0 [amdkfd]
[4.393841]  kgd2kfd_device_init+0x375/0x490 [amdkfd]
[4.393883]  radeon_kfd_device_init+0xaf/0xd0 [radeon]
[4.393911]  radeon_driver_load_kms+0x11e/0x1f0 [radeon]
[4.393933]  drm_dev_register+0x14a/0x200 [drm]
[4.393946]  drm_get_pci_dev+0x9d/0x160 [drm]
[4.393974]  radeon_pci_probe+0xb8/0xe0 [radeon]
[4.393976]  local_pci_probe+0x45/0xa0
[4.393978]  pci_device_probe+0x103/0x150
[4.393981]  driver_probe_device+0x2bf/0x460
[4.393982]  __driver_attach+0xdf/0xf0
[4.393984]  ? driver_probe_device+0x460/0x460
[4.393985]  bus_for_each_dev+0x6c/0xc0
[4.393987]  driver_attach+0x1e/0x20
[4.393988]  bus_add_driver+0x1fd/0x270
[4.393989]  ? 0xc05c8000
[4.393991]  driver_register+0x60/0xe0
[4.393992]  ? 0xc05c8000
[4.393993]  __pci_register_driver+0x4c/0x50
[4.394007]  drm_pci_init+0xeb/0x100 [drm]
[4.394008]  ? 0xc05c8000
[4.394031]  radeon_init+0x98/0xb6 [radeon]
[4.394034]  do_one_initcall+0x53/0x1a0
[4.394037]  ? __vunmap+0x81/0xd0
[4.394039]  ? kmem_cache_alloc_trace+0x152/0x1c0
[4.394041]  ? vfree+0x2e/0x70
[4.394044]  do_init_module+0x5f/0x1ff
[4.394046]  load_module+0x24cc/0x29f0
[4.394047]  ? __symbol_put+0x60/0x60
[4.394050]  ? security_kernel_post_read_file+0x6b/0x80
[4.394052]  SYSC_finit_module+0xdf/0x110
[4.394054]  SyS_finit_module+0xe/0x10
[4.394056]  entry_SYSCALL_64_fastpath+0x1e/0xad
[4.394058] RIP: 0033:0x7f9cda77c8e9
[4.394059] RSP: 002b:7ffe195d3378 EFLAGS: 0246 ORIG_RAX:
0139
[4.394060] RAX: ffda RBX: 7f9cdb8dda7e RCX: 7f9cda77c8e9
[4.394061] RDX:  RSI: 7f9cdac7ce2a RDI: 0013
[4.394062] RBP: 7ffe195d2450 R08:  R09: 
[4.394063] R10: 0013 R11: 0246 R12: 7ffe195d245a
[4.394063] R13: 7ffe195d1378 R14: 563f70cc93b0 R15: 563f70cba4d0
[4.394091] ---[ end trace 9c5af17304d998bb ]---
[4.394092] Invalid queue enabled by amdgpu: 9

I suggest you get a Kaveri/Carrizo machine to debug these issues.

Until that, I don't think we should merge this patch-set.

Oded

On Wed, Feb 8, 2017 at 9:47 PM, Andres Rodriguez  wrote:
> Thank you Oded.
>
> - Andres
>
>
> On 2017-02-08 02:32 PM, Oded Gabbay wrote:
>>
>> On Wed, Feb 8, 2017 at 6:23 PM, Andres Rodriguez 
>> wrote:
>>>
>>> Hey Felix,
>>>
>>> Thanks for the pointer to the ROCm mqd commit. I like that the
>>> workarounds
>>> are easy to spot. I'll add that to a new patch series I'm working on for
>>> some bug-fixes for perf being lower on pipes other than pipe 0.
>>>
>>> I haven't tested this yet on kaveri/carrizo. I'm hoping someone with the
>>> HW
>>> will be able to give it a go. I put in a few small hacks to get KFD to
>>> boot
>>> but do nothing on polaris10.
>>>
>>> Regards,
>>> Andres
>>>
>>>
>>> On 2017-02-06 03:20 PM, Felix Kuehling wrote:

 Hi Andres,

 Thank you for tackling this task. It's more involved than I expected,
 mostly because I didn't have much awareness of the MQD management in
 amdgpu.

 I made one comment in a separate message about the unified MQD commit
 function, if you want to bring that more in line with our latest ROCm
 release on github.

 Also, were you able to test the upstream KFD with your changes on a
 Kaveri or Carrizo?

 Regards,
Felix


 On 17-02-03 11:51 PM, Andres Rodriguez wrote:
>
> The current queue/pipe split policy is for amdgpu to take the first
> pipe
> of
> MEC0 and leave the rest for amdkfd to use. This policy is taken as an
> assumption in a few areas of the implementation.
>
> This patch series aims to allow for flexible/tunable queue/pipe split
> policies
>

Re: PRT support for amdgpu v3

2017-02-09 Thread Bas Nieuwenhuizen 
Tested on amd-staging-4.9 + these patches, and it works for me too.

Thanks,
Bas Nieuwenhuizen

On Wed, Feb 8, 2017, at 16:04, Christian König wrote:
> Hi guys,
> 
> ok I finally found time to write an unit test for this and hammered out
> the last few bugs.
> 
> Seems to work fine on my Tonga now. Please note that this set is based on
> "fix race in GEM VA map IOCTL v2", without that patch you will run into a
> NULL pointer dereference during PRT mapping.
> 
> Going to send out the unit test in a minute.
> 
> Regards,
> Christian.
> 
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[pull] radeon and amdgpu drm-next-4.11

2017-02-09 Thread Alex Deucher 
Hi Dave,

Some additional fixes for 4.11.  Delayed a bit due to Chinese New Year. 
Highlights:
- Powerplay fixes
- VCE and UVD powergating fixes
- Clean up amdgpu SI gfx code to match CI and VI
- Misc bug fixes

The following changes since commit 18566acac18f5784347bc5fe636a26897d1c963b:

  Merge branch 'exynos-drm-next' of 
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next 
(2017-02-01 08:43:42 +1000)

are available in the git repository at:

  git://people.freedesktop.org/~agd5f/linux drm-next-4.11

for you to fetch changes up to fad061270ac43ff9eed315f0eae7c40b694592de:

  drm/amdgpu: report the number of bytes moved at buffer creation (2017-02-09 
11:29:44 -0500)


Alex Deucher (1):
  drm/amdgpu: add support for new smc firmware on polaris

Arnd Bergmann (1):
  drm/amdgpu: shut up #warning for compile testing

Christian König (2):
  drm/amdgpu: fix race in GEM VA map IOCTL v2
  drm/amdgpu: stop reserving a shared fence for VA updates

Colin Ian King (1):
  drm/amdgpu/virt: fix double kfree on bo_va

Dan Carpenter (1):
  drm/radeon: remove some dead code

Flora Cui (7):
  drm/amdgpu/gfx6: clean up rb configuration
  drm/amdgpu/gfx6: clean up cu configuration
  drm/amdgpu/gfx6: clean up spi configuration
  drm/amdgpu: refine si_read_register
  drm/amdgpu: update VERDE_GB_ADDR_CONFIG_GOLDEN
  drm/amdgpu: update HAINAN_GB_ADDR_CONFIG_GOLDEN
  drm/amd/gfx6: update gb_addr_config

Jérôme Glisse (1):
  drm/radeon: avoid kernel segfault in vce when gpu fails to resume

Rex Zhu (14):
  drm/amdgpu: when dpm disabled, also can enable uvd cg/pg.
  drm/amdgpu: add current_pg_status register define for smu7.1
  drm/amdgpu: power down/up uvd4 when smu disabled.
  drm/amdgpu: refine uvd pg code in kv_dpm.c
  drm/amdgpu: refine uvd4.2 init/stop code.
  drm/amdgpu: fix uvd can't initialized when dpm disabled on Ci.
  drm/amdgpu: refine uvd5.0/6.0 code.
  drm/amdgpu: when dpm disabled, also need to stop/start vce.
  drm/amdgpu: refine code for VCE2.0 and related dpm code.
  drm/amdgpu: enable vce pg feature on Kv.
  drm/amdgpu: move subfunctions to the front of vce_v2_0.c.
  drm/amdgpu: refine vce3.0 code and related powerplay pg code.
  drm/amd/powerplay: set fan speed to max in profile peak mode only.
  drm/amd/powerplay: refine code to avoid potential bug that the memory not 
cleared.

Samuel Pitoiset (2):
  drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()
  drm/amdgpu: report the number of bytes moved at buffer creation

 drivers/gpu/drm/amd/amdgpu/amdgpu.h|   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c|  33 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c |   3 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c|  54 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  13 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c |  12 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c|   9 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c|   9 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c   |   1 -
 drivers/gpu/drm/amd/amdgpu/ci_dpm.c|  29 +-
 drivers/gpu/drm/amd/amdgpu/cik.c   |   4 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c  | 216 --
 drivers/gpu/drm/amd/amdgpu/kv_dpm.c|  68 +---
 drivers/gpu/drm/amd/amdgpu/si.c|  90 +++-
 drivers/gpu/drm/amd/amdgpu/si_enums.h  |   4 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c  | 128 --
 drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c  |  24 +-
 drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c  |  21 +-
 drivers/gpu/drm/amd/amdgpu/vce_v2_0.c  | 451 +++--
 drivers/gpu/drm/amd/amdgpu/vce_v3_0.c  |  17 +-
 .../gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_d.h |   1 +
 .../drm/amd/powerplay/hwmgr/cz_clockpowergating.c  |  74 ++--
 .../amd/powerplay/hwmgr/smu7_clockpowergating.c|  23 +-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   |  22 +-
 drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c  |   2 +
 drivers/gpu/drm/radeon/radeon_bios.c   |   4 +-
 drivers/gpu/drm/radeon/vce_v1_0.c  |   2 +-
 27 files changed, 682 insertions(+), 633 deletions(-)
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[PATCH] drm/amd/amdgpu: Update read_sensor calls to have size parameter

2017-02-09 Thread Tom St Denis 
This update allows sensors to return more than 1 value and
indicates to the caller how many bytes are written.

The debugfs interface has been updated to handle reading all
of the values.  Simply seek to the enum value (multiplied
by 4) and then read as many bytes as the sensor provides.

Signed-off-by: Tom St Denis 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 26 +++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h   |  4 ++--
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 28 +--
 drivers/gpu/drm/amd/powerplay/amd_powerplay.c |  5 ++--
 drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c|  8 ++-
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c  | 11 -
 drivers/gpu/drm/amd/powerplay/inc/amd_powerplay.h |  2 +-
 drivers/gpu/drm/amd/powerplay/inc/hwmgr.h |  2 +-
 8 files changed, 59 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0d33bc94afb5..78d1f4045539 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3192,24 +3192,36 @@ static ssize_t amdgpu_debugfs_sensor_read(struct file 
*f, char __user *buf,
size_t size, loff_t *pos)
 {
struct amdgpu_device *adev = f->f_inode->i_private;
-   int idx, r;
-   int32_t value;
+   int idx, x, outsize, r, valuesize;
+   uint32_t values[16];
 
-   if (size != 4 || *pos & 0x3)
+   if (size & 3 || *pos & 0x3)
return -EINVAL;
 
/* convert offset to sensor number */
idx = *pos >> 2;
 
+   valuesize = sizeof(values);
if (adev->powerplay.pp_funcs && adev->powerplay.pp_funcs->read_sensor)
-   r = 
adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, );
+   r = 
adev->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, idx, 
[0], );
else
return -EINVAL;
 
-   if (!r)
-   r = put_user(value, (int32_t *)buf);
+   if (size > valuesize)
+   return -EINVAL;
+
+   outsize = 0;
+   x = 0;
+   if (!r) {
+   while (size) {
+   r = put_user(values[x++], (int32_t *)buf);
+   buf += 4;
+   size -= 4;
+   outsize += 4;
+   }
+   }
 
-   return !r ? 4 : r;
+   return !r ? outsize : r;
 }
 
 static ssize_t amdgpu_debugfs_wave_read(struct file *f, char __user *buf,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 14fef5cf3566..98698dcf15c7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -290,9 +290,9 @@ struct amdgpu_dpm_funcs {
 #define amdgpu_dpm_vblank_too_short(adev) 
(adev)->pm.funcs->vblank_too_short((adev))
 #define amdgpu_dpm_enable_bapm(adev, e) (adev)->pm.funcs->enable_bapm((adev), 
(e))
 
-#define amdgpu_dpm_read_sensor(adev, idx, value) \
+#define amdgpu_dpm_read_sensor(adev, idx, value, size) \
((adev)->pp_enabled ? \
-   
(adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), 
(value)) : \
+   
(adev)->powerplay.pp_funcs->read_sensor(adev->powerplay.pp_handle, (idx), 
(value), (size)) : \
-EINVAL)
 
 #define amdgpu_dpm_get_temperature(adev) \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 392bc716e4bd..e27d2ef7531b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1532,6 +1532,7 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file *m, 
struct amdgpu_device *a
 {
uint32_t value;
struct pp_gpu_power query = {0};
+   int size;
 
/* sanity check PP is enabled */
if (!(adev->powerplay.pp_funcs &&
@@ -1539,16 +1540,18 @@ static int amdgpu_debugfs_pm_info_pp(struct seq_file 
*m, struct amdgpu_device *a
  return -EINVAL;
 
/* GPU Clocks */
+   size = sizeof(value);
seq_printf(m, "GFX Clocks and Power:\n");
-   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void 
*)))
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_MCLK, (void 
*), ))
seq_printf(m, "\t%u MHz (MCLK)\n", value/100);
-   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void 
*)))
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_GFX_SCLK, (void 
*), ))
seq_printf(m, "\t%u MHz (SCLK)\n", value/100);
-   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void 
*)))
+   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDGFX, (void 
*), ))
seq_printf(m, "\t%u mV (VDDGFX)\n", value);
-   if (!amdgpu_dpm_read_sensor(adev, AMDGPU_PP_SENSOR_VDDNB, (void 
*)))
+   if

Re: [PATCH libdrm 1/2] amdgpu: add AMDGPU_VM_PAGE_PRT

2017-02-09 Thread Emil Velikov 
On 8 February 2017 at 12:34, Nicolai Hähnle  wrote:
> From: Nicolai Hähnle 
>
> This is a new kernel interface.
>
> Signed-off-by: Nicolai Hähnle 
> ---
>  include/drm/amdgpu_drm.h | 2 ++
Hi Nicolai,

Please see the "When and how to update these files" section in the README

-Emil
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Re: PRT support for amdgpu v3

2017-02-09 Thread Christian König 

Am 09.02.2017 um 11:11 schrieb Nicolai Hähnle:

On 08.02.2017 16:04, Christian König wrote:

Hi guys,

ok I finally found time to write an unit test for this and hammered 
out the last few bugs.


Seems to work fine on my Tonga now. Please note that this set is 
based on "fix race in GEM VA map IOCTL v2", without that patch you 
will run into a NULL pointer dereference during PRT mapping.


I can confirm that it works with my Mesa series as well: I get the 
"Disabling VM faults" warning message, and indeed accessing outside 
the committed region does not cause VM faults.


Great! Anybody who wants to give me some RBs on the patches?

I would like to commit those to the internal branches.

Regards,
Christian.



Cheers,
Nicolai



Going to send out the unit test in a minute.

Regards,
Christian.

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Re: [PATCH] drm/amdgpu:use hw_init for sriov_gpu_reset

2017-02-09 Thread Christian König 

Am 09.02.2017 um 15:37 schrieb Deucher, Alexander:

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Monk Liu
Sent: Thursday, February 09, 2017 12:46 AM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk
Subject: [PATCH] drm/amdgpu:use hw_init for sriov_gpu_reset

no suspend invoked so after VF FLR by host, we just
call hw_init to reinitialize IPs.

Change-Id: If09cb42b09bee6acc84e6b239ef537ad5a3df41c
Signed-off-by: Monk Liu 

Reviewed-by: Alex Deucher 


Reviewed-by: Christian König .




---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++--
  1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0d33bc9..7e64110 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1604,7 +1604,7 @@ int amdgpu_suspend(struct amdgpu_device
*adev)
return 0;
  }

-static int amdgpu_sriov_resume_early(struct amdgpu_device *adev)
+static int amdgpu_sriov_reinit_early(struct amdgpu_device *adev)
  {
int i, r;

@@ -1615,7 +1615,7 @@ static int amdgpu_sriov_resume_early(struct
amdgpu_device *adev)
if (adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_COMMON ||
adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_GMC ||
adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_IH)
-   r = adev->ip_blocks[i].version->funcs-

resume(adev);

+   r = adev->ip_blocks[i].version->funcs-

hw_init(adev);

if (r) {
DRM_ERROR("resume of IP block <%s> failed %d\n",
@@ -1627,7 +1627,7 @@ static int amdgpu_sriov_resume_early(struct
amdgpu_device *adev)
return 0;
  }

-static int amdgpu_sriov_resume_late(struct amdgpu_device *adev)
+static int amdgpu_sriov_reinit_late(struct amdgpu_device *adev)
  {
int i, r;

@@ -1640,7 +1640,7 @@ static int amdgpu_sriov_resume_late(struct
amdgpu_device *adev)
adev->ip_blocks[i].version->type ==
AMD_IP_BLOCK_TYPE_IH )
continue;

-   r = adev->ip_blocks[i].version->funcs->resume(adev);
+   r = adev->ip_blocks[i].version->funcs->hw_init(adev);
if (r) {
DRM_ERROR("resume of IP block <%s> failed %d\n",
  adev->ip_blocks[i].version->funcs->name,
r);
@@ -2433,13 +2433,13 @@ int amdgpu_sriov_gpu_reset(struct
amdgpu_device *adev, bool voluntary)


/* Resume IP prior to SMC */
-   amdgpu_sriov_resume_early(adev);
+   amdgpu_sriov_reinit_early(adev);

/* we need recover gart prior to run SMC/CP/SDMA resume */
amdgpu_ttm_recover_gart(adev);

/* now we are okay to resume SMC/CP/SDMA */
-   amdgpu_sriov_resume_late(adev);
+   amdgpu_sriov_reinit_late(adev);

amdgpu_irq_gpu_reset_resume_helper(adev);

--
2.7.4

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RE: [PATCH] drm/amdgpu:use hw_init for sriov_gpu_reset

2017-02-09 Thread Deucher, Alexander 
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Thursday, February 09, 2017 12:46 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: [PATCH] drm/amdgpu:use hw_init for sriov_gpu_reset
> 
> no suspend invoked so after VF FLR by host, we just
> call hw_init to reinitialize IPs.
> 
> Change-Id: If09cb42b09bee6acc84e6b239ef537ad5a3df41c
> Signed-off-by: Monk Liu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++--
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 0d33bc9..7e64110 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1604,7 +1604,7 @@ int amdgpu_suspend(struct amdgpu_device
> *adev)
>   return 0;
>  }
> 
> -static int amdgpu_sriov_resume_early(struct amdgpu_device *adev)
> +static int amdgpu_sriov_reinit_early(struct amdgpu_device *adev)
>  {
>   int i, r;
> 
> @@ -1615,7 +1615,7 @@ static int amdgpu_sriov_resume_early(struct
> amdgpu_device *adev)
>   if (adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_COMMON ||
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_GMC ||
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_IH)
> - r = adev->ip_blocks[i].version->funcs-
> >resume(adev);
> + r = adev->ip_blocks[i].version->funcs-
> >hw_init(adev);
> 
>   if (r) {
>   DRM_ERROR("resume of IP block <%s> failed %d\n",
> @@ -1627,7 +1627,7 @@ static int amdgpu_sriov_resume_early(struct
> amdgpu_device *adev)
>   return 0;
>  }
> 
> -static int amdgpu_sriov_resume_late(struct amdgpu_device *adev)
> +static int amdgpu_sriov_reinit_late(struct amdgpu_device *adev)
>  {
>   int i, r;
> 
> @@ -1640,7 +1640,7 @@ static int amdgpu_sriov_resume_late(struct
> amdgpu_device *adev)
>   adev->ip_blocks[i].version->type ==
> AMD_IP_BLOCK_TYPE_IH )
>   continue;
> 
> - r = adev->ip_blocks[i].version->funcs->resume(adev);
> + r = adev->ip_blocks[i].version->funcs->hw_init(adev);
>   if (r) {
>   DRM_ERROR("resume of IP block <%s> failed %d\n",
> adev->ip_blocks[i].version->funcs->name,
> r);
> @@ -2433,13 +2433,13 @@ int amdgpu_sriov_gpu_reset(struct
> amdgpu_device *adev, bool voluntary)
> 
> 
>   /* Resume IP prior to SMC */
> - amdgpu_sriov_resume_early(adev);
> + amdgpu_sriov_reinit_early(adev);
> 
>   /* we need recover gart prior to run SMC/CP/SDMA resume */
>   amdgpu_ttm_recover_gart(adev);
> 
>   /* now we are okay to resume SMC/CP/SDMA */
> - amdgpu_sriov_resume_late(adev);
> + amdgpu_sriov_reinit_late(adev);
> 
>   amdgpu_irq_gpu_reset_resume_helper(adev);
> 
> --
> 2.7.4
> 
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RE: [PATCH] drm/amdgpu:remove unused macro

2017-02-09 Thread Deucher, Alexander 
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Thursday, February 09, 2017 12:49 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: [PATCH] drm/amdgpu:remove unused macro
> 
> Change-Id: I37901358f0dc3e24c0b05df5d2231947cc717c93
> Signed-off-by: Monk Liu 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 73086d0..be9e27d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1716,7 +1716,6 @@ amdgpu_get_sdma_instance(struct amdgpu_ring
> *ring)
>  #define amdgpu_emit_fill_buffer(adev, ib, s, d, b) (adev)-
> >mman.buffer_funcs->emit_fill_buffer((ib), (s), (d), (b))
>  #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs-
> >get_gpu_clock_counter((adev))
>  #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) (adev)-
> >gfx.funcs->select_se_sh((adev), (se), (sh), (instance))
> -#define amdgpu_gds_switch(adev, r, v, d, w, a) (adev)->gds.funcs-
> >patch_gds_switch((r), (v), (d), (w), (a))
> 
>  /* Common functions */
>  int amdgpu_gpu_reset(struct amdgpu_device *adev);
> --
> 2.7.4
> 
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[PATCH v2 2/2] drm/amdgpu: report the number of bytes moved at buffer creation

2017-02-09 Thread Samuel Pitoiset 
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

v2: fix computation

Signed-off-by: Samuel Pitoiset 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 3 +--
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 402a8954c6d8..5227e4d1d5db 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1720,6 +1720,7 @@ int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, 
void *data);
 int amdgpu_cs_get_ring(struct amdgpu_device *adev, u32 ip_type,
   u32 ip_instance, u32 ring,
   struct amdgpu_ring **out_ring);
+void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes);
 void amdgpu_ttm_placement_from_domain(struct amdgpu_bo *abo, u32 domain);
 bool amdgpu_ttm_bo_is_amdgpu_bo(struct ttm_buffer_object *bo);
 int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm, struct page **pages);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 6e948e4986ec..dade2fa9593a 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -351,8 +351,7 @@ static u64 amdgpu_cs_get_threshold_for_moves(struct 
amdgpu_device *adev)
  * submission. This can result in a debt that can stop buffer migrations
  * temporarily.
  */
-static void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev,
-u64 num_bytes)
+void amdgpu_cs_report_moved_bytes(struct amdgpu_device *adev, u64 num_bytes)
 {
spin_lock(>mm_stats.lock);
adev->mm_stats.accum_us -= bytes_to_us(adev, num_bytes);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 556236a112c1..4aa2c8a94347 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -323,6 +323,7 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
struct amdgpu_bo *bo;
enum ttm_bo_type type;
unsigned long page_align;
+   u64 initial_bytes_moved;
size_t acc_size;
int r;
 
@@ -399,10 +400,15 @@ int amdgpu_bo_create_restricted(struct amdgpu_device 
*adev,
locked = ww_mutex_trylock(>tbo.ttm_resv.lock);
WARN_ON(!locked);
}
+
+   initial_bytes_moved = atomic64_read(>num_bytes_moved);
r = ttm_bo_init(>mman.bdev, >tbo, size, type,
>placement, page_align, !kernel, NULL,
acc_size, sg, resv ? resv : >tbo.ttm_resv,
_ttm_bo_destroy);
+   amdgpu_cs_report_moved_bytes(adev,
+   atomic64_read(>num_bytes_moved) - initial_bytes_moved);
+
if (unlikely(r != 0)) {
if (!resv)
ww_mutex_unlock(>tbo.resv->lock);
-- 
2.11.1

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[PATCH v2 1/2] drm/amdgpu: fix a potential deadlock in amdgpu_bo_create_restricted()

2017-02-09 Thread Samuel Pitoiset 
When ttm_bo_init() fails, the reservation mutex should be unlocked.

In debug build, the kernel reported "possible recursive locking
detected" in this codepath. For debugging purposes, I also added
a "WARN_ON(ww_mutex_is_locked())" when ttm_bo_init() fails and the
mutex was locked as expected.

This should fix (random) GPU hangs. The easy way to reproduce the
issue is to change the "Super Sampling" option from 1.0 to 2.0 in
Hitman. It will create a huge buffer, evict a bunch of buffers
(around ~5k) and deadlock.

This regression has been introduced pretty recently.

v2: only release the mutex if resv is NULL

Fixes: 12a852219583 ("drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED 
handling (v2)")
Signed-off-by: Samuel Pitoiset 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index d1ef1d064de4..556236a112c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -403,8 +403,11 @@ int amdgpu_bo_create_restricted(struct amdgpu_device *adev,
>placement, page_align, !kernel, NULL,
acc_size, sg, resv ? resv : >tbo.ttm_resv,
_ttm_bo_destroy);
-   if (unlikely(r != 0))
+   if (unlikely(r != 0)) {
+   if (!resv)
+   ww_mutex_unlock(>tbo.resv->lock);
return r;
+   }
 
bo->tbo.priority = ilog2(bo->tbo.num_pages);
if (kernel)
-- 
2.11.1

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Re: [PATCH 2/2] drm/amdgpu: report the number of bytes moved at buffer creation

2017-02-09 Thread Samuel Pitoiset 



On 02/09/2017 01:58 AM, Michel Dänzer wrote:

On 09/02/17 08:35 AM, Samuel Pitoiset wrote:

Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

Signed-off-by: Samuel Pitoiset 


[...]


@@ -399,10 +400,15 @@ int amdgpu_bo_create_restricted(struct amdgpu_device 
*adev,
locked = ww_mutex_trylock(>tbo.ttm_resv.lock);
WARN_ON(!locked);
}
+
+   initial_bytes_moved = atomic64_read(>num_bytes_moved);
r = ttm_bo_init(>mman.bdev, >tbo, size, type,
>placement, page_align, !kernel, NULL,
acc_size, sg, resv ? resv : >tbo.ttm_resv,
_ttm_bo_destroy);
+   amdgpu_cs_report_moved_bytes(adev,
+   initial_bytes_moved - atomic64_read(>num_bytes_moved));


This looks backwards, should be

atomic64_read(>num_bytes_moved) - initial_bytes_moved);

?


My mistake, thanks for noticing.





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Re: PRT support for amdgpu v3

2017-02-09 Thread Nicolai Hähnle 

On 08.02.2017 16:04, Christian König wrote:

Hi guys,

ok I finally found time to write an unit test for this and hammered out the 
last few bugs.

Seems to work fine on my Tonga now. Please note that this set is based on "fix race 
in GEM VA map IOCTL v2", without that patch you will run into a NULL pointer 
dereference during PRT mapping.


I can confirm that it works with my Mesa series as well: I get the 
"Disabling VM faults" warning message, and indeed accessing outside the 
committed region does not cause VM faults.


Cheers,
Nicolai



Going to send out the unit test in a minute.

Regards,
Christian.

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