Re: convert dc to using krefs for object reference counts
On 2017-10-02 10:38 PM, Dave Airlie wrote: > This series might be a bit of a too big step :-) > Should be okay since ref counts are pretty self-contained. > So in the kernel we use krefs for reference counts for lots of good > reasons, the main one, is no bugs with roll your own atomic reference > counting for structs, which lots of this code is. > > I've ported all the structs I could find using hand rolled atomic > reference counters to use krefs. > I'd still echo Christian's nitpick but knowing the state of DC code style this series is Reviewed-by: Harry Wentland Harry > Dave. > > ___ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Regressions in amd-staging-drm-next
Hello, Today I tracked down 2 regressions with git bisect: 1. Crash: the most recent amd-drm-staging-next code based kernels result in a complete crash on boot with no interaction possible. The cause is a "tidy up" commit which actually inverts the logical behavior. Went through the amd-gfx list to see this was already found. If there is such a show-stopper regression which is simple to fix please push the revert/fix to agd5f asap, to spare the Linux/AMD enthusiasts running these kernels some pain. 2. Flicker issue: As wrote in my last mail the amd-staging-drm-next causes heavy flickering horizontal lines. Had to do a large bisect to find the bad commit. No idea what is precisely broken there but I hope this helps to resolve it. Many regards, Martind5d178b20a4b4aa511ae050e10eb84ea6734bc3b is the first bad commit commit d5d178b20a4b4aa511ae050e10eb84ea6734bc3b Author: Rex Zhu Date: Fri Sep 29 14:36:15 2017 +0800 drm/amd/powerplay: tidy up ret checks in amd_powerplay.c Change-Id: Ibecbcebadb1cbe91e756ef469954da449feaa21a Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu :04 04 9f0b9c1ddad61406da496232ec04ff008fe673ef f7a35f31a191250c69c1c5b76f2a43746c114864 M drivers git bisect start # good: [c854c55e8c0fa05b62aecdc2c86c876d14696f44] Fixed drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.c git bisect good c854c55e8c0fa05b62aecdc2c86c876d14696f44 # bad: [eba2d57add96e1052cdb3f6f924a7041405cf26e] Merge branch 'amd-staging-drm-next' of git://people.freedesktop.org/~agd5f/linux into mbab_4.13_ubuntu git bisect bad eba2d57add96e1052cdb3f6f924a7041405cf26e # skip: [98c186515965c561600bf4fa325da56e2573870c] amdgpu/nbio: use constant nbio_hdp_flush_reg structs. git bisect skip 98c186515965c561600bf4fa325da56e2573870c # skip: [166fccc38ae9aef83f673426c06f8bd0e0bb63c5] amdgpu/pp: rewrite polaris pwrvirus upload code. git bisect skip 166fccc38ae9aef83f673426c06f8bd0e0bb63c5 # good: [6fc753d0a1cc9f3b774aef070e35265fb257ebc1] scsi: megaraid_sas: Return pended IOCTLs with cmd_status MFI_STAT_WRONG_STATE in case adapter is dead git bisect good 6fc753d0a1cc9f3b774aef070e35265fb257ebc1 # good: [0fe655e313b8b00d85c7ccea8cc3254d901f] drm/amd/powerplay: export new interfaces in amd_pm_funcs git bisect good 0fe655e313b8b00d85c7ccea8cc3254d901f # good: [0fe655e313b8b00d85c7ccea8cc3254d901f] drm/amd/powerplay: export new interfaces in amd_pm_funcs git bisect good 0fe655e313b8b00d85c7ccea8cc3254d901f # good: [6eb9c0fc1bca163dd084da77d77bb11c4b1639bc] Linux 4.13.4 git bisect good 6eb9c0fc1bca163dd084da77d77bb11c4b1639bc # good: [50a15beab73d7b7b7fd1e16048da9a0cef7afb67] Merge branch 'amd-staging-drm-next' of git://people.freedesktop.org/~agd5f/linux into mbab_4.13_ubuntu git bisect good 50a15beab73d7b7b7fd1e16048da9a0cef7afb67 # bad: [1a7d8841d41415927887b98f16c10442ba24f4b2] amdgfx/gfx: don't use static objects for ce/de meta. (v2) git bisect bad 1a7d8841d41415927887b98f16c10442ba24f4b2 # bad: [344dda82b64781b889983836fbe10a4b9ce49a66] drm/amdgpu: move DC and PP shared data structures to dm_pp_interface.h git bisect bad 344dda82b64781b889983836fbe10a4b9ce49a66 # good: [6a1f70848ca224e9fa74dfc72c05a0f9c8711b98] drm/amd/powerplay: refine code in amd_powerplay.c git bisect good 6a1f70848ca224e9fa74dfc72c05a0f9c8711b98 # bad: [d5d178b20a4b4aa511ae050e10eb84ea6734bc3b] drm/amd/powerplay: tidy up ret checks in amd_powerplay.c git bisect bad d5d178b20a4b4aa511ae050e10eb84ea6734bc3b # first bad commit: [d5d178b20a4b4aa511ae050e10eb84ea6734bc3b] drm/amd/powerplay: tidy up ret checks in amd_powerplay.c0b6b4cbf77c995a34a4ec3d705a636434dadc51a is the first bad commit commit 0b6b4cbf77c995a34a4ec3d705a636434dadc51a Author: Rex Zhu Date: Thu Sep 14 21:05:18 2017 +0800 drm/amd/powerplay: Add support for CI asics to hwmgr Add support for CI asics (Bonaire, Hawaii) to the powerplay hwmgr Change-Id: Ia0a31f631dfd717807c16c6c166c994566f644c9 Reviewed-by: Alex Deucher Signed-off-by: Rex Zhu :04 04 b2a034b2e3c56cef96f3f12c2b583b3da5b8caba 77fb81ef872079201db9169f2d625aedc9cea101 M drivers git bisect start # good: [6eb9c0fc1bca163dd084da77d77bb11c4b1639bc] Linux 4.13.4 git bisect good 6eb9c0fc1bca163dd084da77d77bb11c4b1639bc # bad: [50a15beab73d7b7b7fd1e16048da9a0cef7afb67] Merge branch 'amd-staging-drm-next' of git://people.freedesktop.org/~agd5f/linux into mbab_4.13_ubuntu git bisect bad 50a15beab73d7b7b7fd1e16048da9a0cef7afb67 # skip: [614d806e08921e77a75b7026388d35be5f451b50] drm/amd/display: remove HDMI deep color debug flag git bisect skip 614d806e08921e77a75b7026388d35be5f451b50 # skip: [9b17970bec7d5a759ca753b68b1e83d96305b62e] drm/amd/display: Temporary disable PSR for HBR2 & HBR3 git bisect skip 9b17970bec7d5a759ca753b68b1e83d96305b62e # skip: [9b17970bec7d5a759ca753b68b1e83d96305b62e] drm/amd/display: Temporary disable PSR for HBR2 & HBR3 git bisect skip 9b17970bec7d5a759ca753b68b1e83d96305b62e # go
Re: [PATCH 4/4] amdgpu/dc: remove bitmap implementation in gpio_service
On 2017-10-02 11:49 PM, Dave Airlie wrote: > From: Dave Airlie > > This handrolls a bit map implementation (linux/bitmap.h), > but it also actually doesn't need it, the max value greppable > in the code is 31 for a gpio count. So just use a uint32_t for now. > > This should probably migrate to using the linux/bitops.h operations, > but for now just rip out the bitmap implementation and fail if we I think bitops are atomic, which may not be needed here. We've also run into issues with bitops on other CPU architectures with KFD, because they're 64-bit ops that can fail with incorrect alignment. We ended up converting some of them to shifts and masks for that reason. Regards, Felix >> 32 bits. > Signed-off-by: Dave Airlie > --- > drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c | 85 > +++--- > drivers/gpu/drm/amd/display/dc/gpio/gpio_service.h | 8 +- > 2 files changed, 11 insertions(+), 82 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > index d4e5ef6..95df7d4 100644 > --- a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > +++ b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > @@ -56,8 +56,7 @@ struct gpio_service *dal_gpio_service_create( > struct dc_context *ctx) > { > struct gpio_service *service; > - > - uint32_t index_of_id; > + int i; > > service = kzalloc(sizeof(struct gpio_service), GFP_KERNEL); > > @@ -78,62 +77,16 @@ struct gpio_service *dal_gpio_service_create( > goto failure_1; > } > > - /* allocate and initialize business storage */ > - { > - const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > - > - index_of_id = 0; > - service->ctx = ctx; > - > - do { > - uint32_t number_of_bits = > - service->factory.number_of_pins[index_of_id]; > - > - uint32_t number_of_uints = > - (number_of_bits + bits_per_uint - 1) / > - bits_per_uint; > - > - uint32_t *slot; > - > - if (number_of_bits) { > - uint32_t index_of_uint = 0; > + service->ctx = ctx; > > - slot = kzalloc(number_of_uints * > sizeof(uint32_t), > -GFP_KERNEL); > - > - if (!slot) { > - BREAK_TO_DEBUGGER(); > - goto failure_2; > - } > - > - do { > - slot[index_of_uint] = 0; > - > - ++index_of_uint; > - } while (index_of_uint < number_of_uints); > - } else > - slot = NULL; > - > - service->busyness[index_of_id] = slot; > - > - ++index_of_id; > - } while (index_of_id < GPIO_ID_COUNT); > + for (i = 0; i < GPIO_ID_COUNT; i++) { > + if (service->factory.number_of_pins[i] > 32) { > + BREAK_TO_DEBUGGER(); > + goto failure_1; > + } > } > - > return service; > > -failure_2: > - while (index_of_id) { > - uint32_t *slot; > - > - --index_of_id; > - > - slot = service->busyness[index_of_id]; > - > - if (slot) > - kfree(slot); > - }; > - > failure_1: > kfree(service); > > @@ -164,20 +117,6 @@ void dal_gpio_service_destroy( > return; > } > > - /* free business storage */ > - { > - uint32_t index_of_id = 0; > - > - do { > - uint32_t *slot = (*ptr)->busyness[index_of_id]; > - > - if (slot) > - kfree(slot); > - > - ++index_of_id; > - } while (index_of_id < GPIO_ID_COUNT); > - } > - > kfree(*ptr); > > *ptr = NULL; > @@ -195,9 +134,7 @@ static bool is_pin_busy( > { > const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > > - const uint32_t *slot = service->busyness[id] + (en / bits_per_uint); > - > - return 0 != (*slot & (1 << (en % bits_per_uint))); > + return 0 != (service->busyness[id] & (1 << (en % bits_per_uint))); > } > > static void set_pin_busy( > @@ -207,8 +144,7 @@ static void set_pin_busy( > { > const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > > - service->busyness[id][en / bits_per_uint] |= > - (1 << (en % bits_per_uint)); > + service->busyness[id] |= (1 << (en % bits_per_uint)); > } > > static void set_pin_free( > @@ -218,8 +154,7 @@ static void set_pin_free( > { > const uint32_t bits_per_uint = sizeof(
powerplay tidyup/refactor suggestion
Hi all, Soliciting for opinion on a tiny refactor I've noticed is possible in the hwmgr API, we have functions like int (*dynamic_state_management_enable)( struct pp_hwmgr *hw_mgr); int (*dynamic_state_management_disable)( struct pp_hwmgr *hw_mgr); Which could be merged with a 2nd parameter, or: uint32_t (*get_mclk)(struct pp_hwmgr *hwmgr, bool low); uint32_t (*get_sclk)(struct pp_hwmgr *hwmgr, bool low); Could be merged as well (with a 3rd parameter), and: int (*get_sclk_od)(struct pp_hwmgr *hwmgr); int (*set_sclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); int (*get_mclk_od)(struct pp_hwmgr *hwmgr); int (*set_mclk_od)(struct pp_hwmgr *hwmgr, uint32_t value); Could be merged somewhat, etc. The gain is that we have duplicate blocks like: static uint32_t smu7_dpm_get_mclk(struct pp_hwmgr *hwmgr, bool low) { struct pp_power_state *ps; struct smu7_power_state *smu7_ps; if (hwmgr == NULL) return -EINVAL; ps = hwmgr->request_ps; if (ps == NULL) return -EINVAL; smu7_ps = cast_phw_smu7_power_state(&ps->hardware); if (low) return smu7_ps->performance_levels[0].memory_clock; else return smu7_ps->performance_levels [smu7_ps->performance_level_count-1].memory_clock; } static uint32_t smu7_dpm_get_sclk(struct pp_hwmgr *hwmgr, bool low) { struct pp_power_state *ps; struct smu7_power_state *smu7_ps; if (hwmgr == NULL) return -EINVAL; ps = hwmgr->request_ps; if (ps == NULL) return -EINVAL; smu7_ps = cast_phw_smu7_power_state(&ps->hardware); if (low) return smu7_ps->performance_levels[0].engine_clock; else return smu7_ps->performance_levels [smu7_ps->performance_level_count-1].engine_clock; } Where most of the two functions are the same and could be reduced. Anyways nothing earth shattering but would help reduce some LOC and make the API simpler. I could tackle this for the various hwmgr's all in one series. Thoughts? Tom ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 4/4] amdgpu/dc: remove bitmap implementation in gpio_service
On 2017-10-02 11:49 PM, Dave Airlie wrote: > From: Dave Airlie > > This handrolls a bit map implementation (linux/bitmap.h), > but it also actually doesn't need it, the max value greppable > in the code is 31 for a gpio count. So just use a uint32_t for now. > > This should probably migrate to using the linux/bitops.h operations, > but for now just rip out the bitmap implementation and fail if we >> 32 bits. > > Signed-off-by: Dave Airlie Nice cleanup. This was such overengineered code. This series is Reviewed-by: Harry Wentland Looks like you sent the ilog2 patch twice. I'll ignore the separate one as it seems to be the same as the one from this series. Harry > --- > drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c | 85 > +++--- > drivers/gpu/drm/amd/display/dc/gpio/gpio_service.h | 8 +- > 2 files changed, 11 insertions(+), 82 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > index d4e5ef6..95df7d4 100644 > --- a/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > +++ b/drivers/gpu/drm/amd/display/dc/gpio/gpio_service.c > @@ -56,8 +56,7 @@ struct gpio_service *dal_gpio_service_create( > struct dc_context *ctx) > { > struct gpio_service *service; > - > - uint32_t index_of_id; > + int i; > > service = kzalloc(sizeof(struct gpio_service), GFP_KERNEL); > > @@ -78,62 +77,16 @@ struct gpio_service *dal_gpio_service_create( > goto failure_1; > } > > - /* allocate and initialize business storage */ > - { > - const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > - > - index_of_id = 0; > - service->ctx = ctx; > - > - do { > - uint32_t number_of_bits = > - service->factory.number_of_pins[index_of_id]; > - > - uint32_t number_of_uints = > - (number_of_bits + bits_per_uint - 1) / > - bits_per_uint; > - > - uint32_t *slot; > - > - if (number_of_bits) { > - uint32_t index_of_uint = 0; > + service->ctx = ctx; > > - slot = kzalloc(number_of_uints * > sizeof(uint32_t), > -GFP_KERNEL); > - > - if (!slot) { > - BREAK_TO_DEBUGGER(); > - goto failure_2; > - } > - > - do { > - slot[index_of_uint] = 0; > - > - ++index_of_uint; > - } while (index_of_uint < number_of_uints); > - } else > - slot = NULL; > - > - service->busyness[index_of_id] = slot; > - > - ++index_of_id; > - } while (index_of_id < GPIO_ID_COUNT); > + for (i = 0; i < GPIO_ID_COUNT; i++) { > + if (service->factory.number_of_pins[i] > 32) { > + BREAK_TO_DEBUGGER(); > + goto failure_1; > + } > } > - > return service; > > -failure_2: > - while (index_of_id) { > - uint32_t *slot; > - > - --index_of_id; > - > - slot = service->busyness[index_of_id]; > - > - if (slot) > - kfree(slot); > - }; > - > failure_1: > kfree(service); > > @@ -164,20 +117,6 @@ void dal_gpio_service_destroy( > return; > } > > - /* free business storage */ > - { > - uint32_t index_of_id = 0; > - > - do { > - uint32_t *slot = (*ptr)->busyness[index_of_id]; > - > - if (slot) > - kfree(slot); > - > - ++index_of_id; > - } while (index_of_id < GPIO_ID_COUNT); > - } > - > kfree(*ptr); > > *ptr = NULL; > @@ -195,9 +134,7 @@ static bool is_pin_busy( > { > const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > > - const uint32_t *slot = service->busyness[id] + (en / bits_per_uint); > - > - return 0 != (*slot & (1 << (en % bits_per_uint))); > + return 0 != (service->busyness[id] & (1 << (en % bits_per_uint))); > } > > static void set_pin_busy( > @@ -207,8 +144,7 @@ static void set_pin_busy( > { > const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > > - service->busyness[id][en / bits_per_uint] |= > - (1 << (en % bits_per_uint)); > + service->busyness[id] |= (1 << (en % bits_per_uint)); > } > > static void set_pin_free( > @@ -218,8 +154,7 @@ static void set_pin_free( > { > const uint32_t bits_per_uint = sizeof(uint32_t) << 3; > > - service->busyness[id][en /
RE: [PATCH xf86-video-ati] Fix VT switching with ShadowFB
> -Original Message- > From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf > Of Michel Dänzer > Sent: Tuesday, October 03, 2017 6:55 AM > To: amd-gfx@lists.freedesktop.org > Subject: [PATCH xf86-video-ati] Fix VT switching with ShadowFB > > From: Michel Dänzer > > We were trying to call acceleration specific functions from LeaveVT. > Instead, memset the scanout buffer to all 0 in LeaveVT and allocate a > new one in EnterVT. > > Bugzilla: https://bugs.freedesktop.org/102948 > Fixes: 06a465484101 ("Make all active CRTCs scan out an all-black > framebuffer in LeaveVT") > Signed-off-by: Michel Dänzer Reviewed-by: Alex Deucher > --- > src/radeon_kms.c | 157 +--- > --- > 1 file changed, 94 insertions(+), 63 deletions(-) > > diff --git a/src/radeon_kms.c b/src/radeon_kms.c > index 351af995..b982e425 100644 > --- a/src/radeon_kms.c > +++ b/src/radeon_kms.c > @@ -2423,6 +2423,31 @@ Bool RADEONEnterVT_KMS(ScrnInfoPtr pScrn) > > radeon_set_drm_master(pScrn); > > +if (info->r600_shadow_fb) { > + int base_align = drmmode_get_base_align(pScrn, info->pixel_bytes, > 0); > + struct radeon_bo *front_bo = radeon_bo_open(info->bufmgr, 0, > + info->front_bo->size, > + base_align, > + > RADEON_GEM_DOMAIN_VRAM, 0); > + > + if (front_bo) { > + if (radeon_bo_map(front_bo, 1) == 0) { > + memset(front_bo->ptr, 0, front_bo->size); > + radeon_bo_unref(info->front_bo); > + info->front_bo = front_bo; > + } else { > + radeon_bo_unref(front_bo); > + front_bo = NULL; > + } > + } > + > + if (!front_bo) { > + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, > +"Failed to allocate new scanout BO after VT switch, " > +"other DRM masters may see screen contents\n"); > + } > +} > + > info->accel_state->XInited3D = FALSE; > info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; > > @@ -2473,85 +2498,91 @@ pixmap_unref_fb(void *value, XID id, void > *cdata) > void RADEONLeaveVT_KMS(ScrnInfoPtr pScrn) > { > RADEONInfoPtr info = RADEONPTR(pScrn); > -RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); > ScreenPtr pScreen = pScrn->pScreen; > -xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); > -struct drmmode_scanout black_scanout = { .pixmap = NULL, .bo = NULL }; > -xf86CrtcPtr crtc; > -drmmode_crtc_private_ptr drmmode_crtc; > -unsigned w = 0, h = 0; > -int i; > > xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, > "RADEONLeaveVT_KMS\n"); > > -/* Compute maximum scanout dimensions of active CRTCs */ > -for (i = 0; i < xf86_config->num_crtc; i++) { > - crtc = xf86_config->crtc[i]; > - drmmode_crtc = crtc->driver_private; > +if (!info->r600_shadow_fb) { > + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); > + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); > + struct drmmode_scanout black_scanout = { .pixmap = NULL, .bo = > NULL }; > + xf86CrtcPtr crtc; > + drmmode_crtc_private_ptr drmmode_crtc; > + unsigned w = 0, h = 0; > + int i; > > - if (!drmmode_crtc->fb) > - continue; > + /* Compute maximum scanout dimensions of active CRTCs */ > + for (i = 0; i < xf86_config->num_crtc; i++) { > + crtc = xf86_config->crtc[i]; > + drmmode_crtc = crtc->driver_private; > > - w = max(w, crtc->mode.HDisplay); > - h = max(h, crtc->mode.VDisplay); > -} > - > -/* Make all active CRTCs scan out from an all-black framebuffer */ > -if (w > 0 && h > 0) { > - if (drmmode_crtc_scanout_create(crtc, &black_scanout, w, h)) { > - struct drmmode_fb *black_fb = > - radeon_pixmap_get_fb(black_scanout.pixmap); > - > - radeon_pixmap_clear(black_scanout.pixmap); > - radeon_cs_flush_indirect(pScrn); > - radeon_bo_wait(black_scanout.bo); > - > - for (i = 0; i < xf86_config->num_crtc; i++) { > - crtc = xf86_config->crtc[i]; > - drmmode_crtc = crtc->driver_private; > - > - if (drmmode_crtc->fb) { > - if (black_fb) { > - drmmode_set_mode(crtc, black_fb, &crtc->mode, 0, > 0); > - } else { > - drmModeSetCrtc(pRADEONEnt->fd, > -drmmode_crtc->mode_crtc->crtc_id, 0, 0, > -0, NULL, 0, NULL); > - drmmode_fb_reference(pRADEONEnt->fd, > &drmmode_crtc->fb, > - NULL); > - } > + if (!drmmode_crtc->fb) > + continue; > + > + w = max(w, crtc->mode.HDisplay); > + h = max(h, crtc->mode.VDispla
[PATCH xf86-video-ati] Fix VT switching with ShadowFB
From: Michel Dänzer We were trying to call acceleration specific functions from LeaveVT. Instead, memset the scanout buffer to all 0 in LeaveVT and allocate a new one in EnterVT. Bugzilla: https://bugs.freedesktop.org/102948 Fixes: 06a465484101 ("Make all active CRTCs scan out an all-black framebuffer in LeaveVT") Signed-off-by: Michel Dänzer --- src/radeon_kms.c | 157 +-- 1 file changed, 94 insertions(+), 63 deletions(-) diff --git a/src/radeon_kms.c b/src/radeon_kms.c index 351af995..b982e425 100644 --- a/src/radeon_kms.c +++ b/src/radeon_kms.c @@ -2423,6 +2423,31 @@ Bool RADEONEnterVT_KMS(ScrnInfoPtr pScrn) radeon_set_drm_master(pScrn); +if (info->r600_shadow_fb) { + int base_align = drmmode_get_base_align(pScrn, info->pixel_bytes, 0); + struct radeon_bo *front_bo = radeon_bo_open(info->bufmgr, 0, + info->front_bo->size, + base_align, + RADEON_GEM_DOMAIN_VRAM, 0); + + if (front_bo) { + if (radeon_bo_map(front_bo, 1) == 0) { + memset(front_bo->ptr, 0, front_bo->size); + radeon_bo_unref(info->front_bo); + info->front_bo = front_bo; + } else { + radeon_bo_unref(front_bo); + front_bo = NULL; + } + } + + if (!front_bo) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Failed to allocate new scanout BO after VT switch, " + "other DRM masters may see screen contents\n"); + } +} + info->accel_state->XInited3D = FALSE; info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; @@ -2473,85 +2498,91 @@ pixmap_unref_fb(void *value, XID id, void *cdata) void RADEONLeaveVT_KMS(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); -RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); ScreenPtr pScreen = pScrn->pScreen; -xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); -struct drmmode_scanout black_scanout = { .pixmap = NULL, .bo = NULL }; -xf86CrtcPtr crtc; -drmmode_crtc_private_ptr drmmode_crtc; -unsigned w = 0, h = 0; -int i; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONLeaveVT_KMS\n"); -/* Compute maximum scanout dimensions of active CRTCs */ -for (i = 0; i < xf86_config->num_crtc; i++) { - crtc = xf86_config->crtc[i]; - drmmode_crtc = crtc->driver_private; +if (!info->r600_shadow_fb) { + RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + struct drmmode_scanout black_scanout = { .pixmap = NULL, .bo = NULL }; + xf86CrtcPtr crtc; + drmmode_crtc_private_ptr drmmode_crtc; + unsigned w = 0, h = 0; + int i; - if (!drmmode_crtc->fb) - continue; + /* Compute maximum scanout dimensions of active CRTCs */ + for (i = 0; i < xf86_config->num_crtc; i++) { + crtc = xf86_config->crtc[i]; + drmmode_crtc = crtc->driver_private; - w = max(w, crtc->mode.HDisplay); - h = max(h, crtc->mode.VDisplay); -} - -/* Make all active CRTCs scan out from an all-black framebuffer */ -if (w > 0 && h > 0) { - if (drmmode_crtc_scanout_create(crtc, &black_scanout, w, h)) { - struct drmmode_fb *black_fb = - radeon_pixmap_get_fb(black_scanout.pixmap); - - radeon_pixmap_clear(black_scanout.pixmap); - radeon_cs_flush_indirect(pScrn); - radeon_bo_wait(black_scanout.bo); - - for (i = 0; i < xf86_config->num_crtc; i++) { - crtc = xf86_config->crtc[i]; - drmmode_crtc = crtc->driver_private; - - if (drmmode_crtc->fb) { - if (black_fb) { - drmmode_set_mode(crtc, black_fb, &crtc->mode, 0, 0); - } else { - drmModeSetCrtc(pRADEONEnt->fd, - drmmode_crtc->mode_crtc->crtc_id, 0, 0, - 0, NULL, 0, NULL); - drmmode_fb_reference(pRADEONEnt->fd, &drmmode_crtc->fb, -NULL); - } + if (!drmmode_crtc->fb) + continue; + + w = max(w, crtc->mode.HDisplay); + h = max(h, crtc->mode.VDisplay); + } + + /* Make all active CRTCs scan out from an all-black framebuffer */ + if (w > 0 && h > 0) { + if (drmmode_crtc_scanout_create(crtc, &black_scanout, w, h)) { + struct drmmode_fb *black_fb = + radeon_pixmap_get_fb(black_scanout.pixmap); + + radeon_pixmap_clear(black_scanout.pixmap); +
Re: [PATCH 3/3] amdgpu/dm: don't use after free.
On 2017-10-03 12:27 AM, Dave Airlie wrote: > From: Dave Airlie > > This dereference acrtc after freeing it. > > Found by the kfree cocci script. > > Signed-off-by: Dave Airlie Series is Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index 61ccddd..4f89731 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -3174,7 +3174,6 @@ int amdgpu_dm_crtc_init(struct amdgpu_display_manager > *dm, > fail: > kfree(acrtc); > kfree(cursor_plane); > - acrtc->crtc_id = -1; > return res; > } > > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 4/4] amdgpu/dc: kill a bunch of dead code.
On 2017-10-03 01:11 AM, Dave Airlie wrote: > From: Dave Airlie > > None of this code is used currently. > > Signed-off-by: Dave Airlie Series is Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/dc/core/dc.c | 101 > -- > drivers/gpu/drm/amd/display/dc/core/dc_link.c | 15 > drivers/gpu/drm/amd/display/dc/core/dc_sink.c | 34 - > 3 files changed, 150 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c > b/drivers/gpu/drm/amd/display/dc/core/dc.c > index 26b7207..f41f15f 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c > @@ -1559,107 +1559,6 @@ void dc_resume(struct dc *dc) > core_link_resume(dc->links[i]); > } > > -bool dc_read_aux_dpcd( > - struct dc *dc, > - uint32_t link_index, > - uint32_t address, > - uint8_t *data, > - uint32_t size) > -{ > - > - struct dc_link *link = dc->links[link_index]; > - enum ddc_result r = dal_ddc_service_read_dpcd_data( > - link->ddc, > - false, > - I2C_MOT_UNDEF, > - address, > - data, > - size); > - return r == DDC_RESULT_SUCESSFULL; > -} > - > -bool dc_write_aux_dpcd( > - struct dc *dc, > - uint32_t link_index, > - uint32_t address, > - const uint8_t *data, > - uint32_t size) > -{ > - struct dc_link *link = dc->links[link_index]; > - > - enum ddc_result r = dal_ddc_service_write_dpcd_data( > - link->ddc, > - false, > - I2C_MOT_UNDEF, > - address, > - data, > - size); > - return r == DDC_RESULT_SUCESSFULL; > -} > - > -bool dc_read_aux_i2c( > - struct dc *dc, > - uint32_t link_index, > - enum i2c_mot_mode mot, > - uint32_t address, > - uint8_t *data, > - uint32_t size) > -{ > - > - struct dc_link *link = dc->links[link_index]; > - enum ddc_result r = dal_ddc_service_read_dpcd_data( > - link->ddc, > - true, > - mot, > - address, > - data, > - size); > - return r == DDC_RESULT_SUCESSFULL; > -} > - > -bool dc_write_aux_i2c( > - struct dc *dc, > - uint32_t link_index, > - enum i2c_mot_mode mot, > - uint32_t address, > - const uint8_t *data, > - uint32_t size) > -{ > - struct dc_link *link = dc->links[link_index]; > - > - enum ddc_result r = dal_ddc_service_write_dpcd_data( > - link->ddc, > - true, > - mot, > - address, > - data, > - size); > - return r == DDC_RESULT_SUCESSFULL; > -} > - > -bool dc_query_ddc_data( > - struct dc *dc, > - uint32_t link_index, > - uint32_t address, > - uint8_t *write_buf, > - uint32_t write_size, > - uint8_t *read_buf, > - uint32_t read_size) { > - > - > - struct dc_link *link = dc->links[link_index]; > - > - bool result = dal_ddc_service_query_ddc_data( > - link->ddc, > - address, > - write_buf, > - write_size, > - read_buf, > - read_size); > - > - return result; > -} > - > bool dc_submit_i2c( > struct dc *dc, > uint32_t link_index, > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c > b/drivers/gpu/drm/amd/display/dc/core/dc_link.c > index d02dd9f..4a70948 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c > @@ -1857,21 +1857,6 @@ bool dc_link_set_backlight_level(const struct dc_link > *link, uint32_t level, > return true; > } > > - > -bool dc_link_set_abm_disable(const struct dc_link *link) > -{ > - struct dc *core_dc = link->ctx->dc; > - struct abm *abm = core_dc->res_pool->abm; > - > - if ((abm == NULL) || (abm->funcs->set_backlight_level == NULL)) > - return false; > - > - abm->funcs->set_abm_immediate_disable(abm); > - > - return true; > -} > - > - > bool dc_link_set_psr_enable(const struct dc_link *link, bool enable, bool > wait) > { > struct dc *core_dc = link->ctx->dc; > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c > b/drivers/gpu/drm/amd/display/dc/core/dc_sink.c > index f2b2e82..25fae38 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_sink.c > +++ b/drivers/gpu/drm/amd/display/dc/core/d
Re: [PATCH] amdgpu/dc: use kernel ilog2 for log_2.
On 2017-10-02 11:14 PM, Dave Airlie wrote: > From: Dave Airlie > > This should produce the same result. > > Signed-off-by: Dave Airlie Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/dc/basics/conversion.c | 10 -- > drivers/gpu/drm/amd/display/dc/basics/conversion.h | 5 - > 2 files changed, 4 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/basics/conversion.c > b/drivers/gpu/drm/amd/display/dc/basics/conversion.c > index a2e22ae..23c9a0e 100644 > --- a/drivers/gpu/drm/amd/display/dc/basics/conversion.c > +++ b/drivers/gpu/drm/amd/display/dc/basics/conversion.c > @@ -102,13 +102,3 @@ void convert_float_matrix( > matrix[i] = (uint16_t)reg_value; > } > } > - > -unsigned int log_2(unsigned int num) > -{ > - unsigned int result = 0; > - > - while ((num >>= 1) != 0) > - result++; > - > - return result; > -} > diff --git a/drivers/gpu/drm/amd/display/dc/basics/conversion.h > b/drivers/gpu/drm/amd/display/dc/basics/conversion.h > index 189325f..ade785c 100644 > --- a/drivers/gpu/drm/amd/display/dc/basics/conversion.h > +++ b/drivers/gpu/drm/amd/display/dc/basics/conversion.h > @@ -38,6 +38,9 @@ void convert_float_matrix( > struct fixed31_32 *flt, > uint32_t buffer_size); > > -unsigned int log_2(unsigned int num); > +static inline unsigned int log_2(unsigned int num) > +{ > + return ilog2(num); > +} > > #endif > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] amdgpu/dc: don't memset after kzalloc.
On 2017-10-02 10:37 PM, Dave Airlie wrote: > From: Dave Airlie > > We allocate this struct zeroed, so don't need to memset in the > constructor. > > Signed-off-by: Dave Airlie Reviewed-by: Harry Wentland Harry > --- > drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c > b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c > index f170ae9..ff07105 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c > @@ -37,8 +37,6 @@ > static void construct(struct dc_context *ctx, struct dc_plane_state > *plane_state) > { > plane_state->ctx = ctx; > - memset(&plane_state->hdr_static_ctx, > - 0, sizeof(struct dc_hdr_static_metadata)); > } > > static void destruct(struct dc_plane_state *plane_state) > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] amdgpu/dc: inline dal grph object id functions.
On 2017-10-02 10:36 PM, Dave Airlie wrote: > From: Dave Airlie > > This is worth 400 bytes. > > Signed-off-by: Dave Airlie Reviewed-by: Harry Wentland Harry > --- > .../gpu/drm/amd/display/dc/basics/grph_object_id.c | 61 +- > .../gpu/drm/amd/display/include/grph_object_id.h | 72 > +- > 2 files changed, 56 insertions(+), 77 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/basics/grph_object_id.c > b/drivers/gpu/drm/amd/display/dc/basics/grph_object_id.c > index 9c80847..1478225 100644 > --- a/drivers/gpu/drm/amd/display/dc/basics/grph_object_id.c > +++ b/drivers/gpu/drm/amd/display/dc/basics/grph_object_id.c > @@ -26,7 +26,7 @@ > #include "dm_services.h" > #include "include/grph_object_id.h" > > -bool dal_graphics_object_id_is_valid(struct graphics_object_id id) > +static bool dal_graphics_object_id_is_valid(struct graphics_object_id id) > { > bool rc = true; > > @@ -72,63 +72,4 @@ bool dal_graphics_object_id_is_equal( > return false; > } > > -/* Based on internal data members memory layout */ > -uint32_t dal_graphics_object_id_to_uint(struct graphics_object_id id) > -{ > - uint32_t object_id = 0; > - > - object_id = id.id + (id.enum_id << 0x8) + (id.type << 0xc); > - return object_id; > -} > - > -/* > - * *** get specific ID - internal safe cast into specific type *** > - */ > - > -enum controller_id dal_graphics_object_id_get_controller_id( > - struct graphics_object_id id) > -{ > - if (id.type == OBJECT_TYPE_CONTROLLER) > - return id.id; > - return CONTROLLER_ID_UNDEFINED; > -} > - > -enum clock_source_id dal_graphics_object_id_get_clock_source_id( > - struct graphics_object_id id) > -{ > - if (id.type == OBJECT_TYPE_CLOCK_SOURCE) > - return id.id; > - return CLOCK_SOURCE_ID_UNDEFINED; > -} > - > -enum encoder_id dal_graphics_object_id_get_encoder_id( > - struct graphics_object_id id) > -{ > - if (id.type == OBJECT_TYPE_ENCODER) > - return id.id; > - return ENCODER_ID_UNKNOWN; > -} > - > -enum connector_id dal_graphics_object_id_get_connector_id( > - struct graphics_object_id id) > -{ > - if (id.type == OBJECT_TYPE_CONNECTOR) > - return id.id; > - return CONNECTOR_ID_UNKNOWN; > -} > - > -enum audio_id dal_graphics_object_id_get_audio_id(struct graphics_object_id > id) > -{ > - if (id.type == OBJECT_TYPE_AUDIO) > - return id.id; > - return AUDIO_ID_UNKNOWN; > -} > - > -enum engine_id dal_graphics_object_id_get_engine_id( > - struct graphics_object_id id) > -{ > - if (id.type == OBJECT_TYPE_ENGINE) > - return id.id; > - return ENGINE_ID_UNKNOWN; > -} > > diff --git a/drivers/gpu/drm/amd/display/include/grph_object_id.h > b/drivers/gpu/drm/amd/display/include/grph_object_id.h > index e4aa4dd..5eb2b4d 100644 > --- a/drivers/gpu/drm/amd/display/include/grph_object_id.h > +++ b/drivers/gpu/drm/amd/display/include/grph_object_id.h > @@ -233,24 +233,62 @@ static inline struct graphics_object_id > dal_graphics_object_id_init( > return result; > } > > -bool dal_graphics_object_id_is_valid( > - struct graphics_object_id id); > bool dal_graphics_object_id_is_equal( > struct graphics_object_id id1, > struct graphics_object_id id2); > -uint32_t dal_graphics_object_id_to_uint( > - struct graphics_object_id id); > - > -enum controller_id dal_graphics_object_id_get_controller_id( > - struct graphics_object_id id); > -enum clock_source_id dal_graphics_object_id_get_clock_source_id( > - struct graphics_object_id id); > -enum encoder_id dal_graphics_object_id_get_encoder_id( > - struct graphics_object_id id); > -enum connector_id dal_graphics_object_id_get_connector_id( > - struct graphics_object_id id); > -enum audio_id dal_graphics_object_id_get_audio_id( > - struct graphics_object_id id); > -enum engine_id dal_graphics_object_id_get_engine_id( > - struct graphics_object_id id); > + > +/* Based on internal data members memory layout */ > +static inline uint32_t dal_graphics_object_id_to_uint( > + struct graphics_object_id id) > +{ > + return id.id + (id.enum_id << 0x8) + (id.type << 0xc); > +} > + > +static inline enum controller_id dal_graphics_object_id_get_controller_id( > + struct graphics_object_id id) > +{ > + if (id.type == OBJECT_TYPE_CONTROLLER) > + return id.id; > + return CONTROLLER_ID_UNDEFINED; > +} > + > +static inline enum clock_source_id > dal_graphics_object_id_get_clock_source_id( > + struct graphics_object_id id) > +{ > + if (id.type == OBJECT_TYPE_CLOCK_SOURCE) > + return id.id; > + return CLOCK_SOURCE_ID_UNDEFINED; > +} > + > +static inline enum encoder_id dal_graphics_object_id_get_encoder_id( > + struct graphics_object_id id) > +{ > + if (id.type == OBJECT_TYPE_ENCODER) > + return id.id; > + return ENCODER_ID_UNKNOWN; >
Re: convert dc to using krefs for object reference counts
Apart from a minor style nit pick which was repeated a few times the series is Reviewed-by: Christian König . Regards, Christian. Am 03.10.2017 um 04:38 schrieb Dave Airlie: This series might be a bit of a too big step :-) So in the kernel we use krefs for reference counts for lots of good reasons, the main one, is no bugs with roll your own atomic reference counting for structs, which lots of this code is. I've ported all the structs I could find using hand rolled atomic reference counters to use krefs. Dave. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 1/6] amdgpu/dc: convert dc_transfer to use a kref.
Am 03.10.2017 um 04:38 schrieb Dave Airlie: From: Dave Airlie Rolling your own atomic ref counts is frowned upon. Signed-off-by: Dave Airlie --- drivers/gpu/drm/amd/display/dc/core/dc_surface.c | 17 + drivers/gpu/drm/amd/display/dc/dc.h | 2 +- drivers/gpu/drm/amd/display/dc/os_types.h| 2 ++ 3 files changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c index ff07105..c2168df 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_surface.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_surface.c @@ -161,17 +161,18 @@ struct dc_gamma *dc_create_gamma() void dc_transfer_func_retain(struct dc_transfer_func *tf) { - ASSERT(atomic_read(&tf->ref_count) > 0); - atomic_inc(&tf->ref_count); + kref_get(&tf->refcount); } -void dc_transfer_func_release(struct dc_transfer_func *tf) +static void dc_transfer_func_free(struct kref *kref) { - ASSERT(atomic_read(&tf->ref_count) > 0); - atomic_dec(&tf->ref_count); + struct dc_transfer_func *tf = container_of(kref, struct dc_transfer_func, refcount); + kfree(tf); Minor style nit pick, but we should have a new line between declaration and code. Alternative I could also like with "kfree(container)". Not that I care to much, but I had to spend a good part of my time beating people at AMD to come up with good kernel coding style :) Christian. +} - if (atomic_read(&tf->ref_count) == 0) - kfree(tf); +void dc_transfer_func_release(struct dc_transfer_func *tf) +{ + kref_put(&tf->refcount, dc_transfer_func_free); } struct dc_transfer_func *dc_create_transfer_func() @@ -181,7 +182,7 @@ struct dc_transfer_func *dc_create_transfer_func() if (tf == NULL) goto alloc_fail; - atomic_inc(&tf->ref_count); + kref_init(&tf->refcount); return tf; diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 9c0e000..17f0c73 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -334,11 +334,11 @@ enum dc_transfer_func_predefined { }; struct dc_transfer_func { + struct kref refcount; struct dc_transfer_func_distributed_points tf_pts; enum dc_transfer_func_type type; enum dc_transfer_func_predefined tf; struct dc_context *ctx; - atomic_t ref_count; }; /* diff --git a/drivers/gpu/drm/amd/display/dc/os_types.h b/drivers/gpu/drm/amd/display/dc/os_types.h index 27ed2a6..e0cd527 100644 --- a/drivers/gpu/drm/amd/display/dc/os_types.h +++ b/drivers/gpu/drm/amd/display/dc/os_types.h @@ -32,6 +32,8 @@ #include #include +#include + #include "cgs_linux.h" #if defined(__BIG_ENDIAN) && !defined(BIGENDIAN_CPU) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 00/18] use ARRAY_SIZE macro
Em Sun, 1 Oct 2017 20:52:20 -0400 Jérémy Lefaure escreveu: > Anyway, I can tell to each maintainer that they can apply the patches > they're concerned about and next time I may send individual patches. In the case of media, we'll handle it as if they were individual ones. Thanks, Mauro ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [Intel-gfx] [PATCH 00/18] use ARRAY_SIZE macro
Thanks for the patch! :) 2017-10-01 22:30 GMT+03:00 Jérémy Lefaure : > Hi everyone, > Using ARRAY_SIZE improves the code readability. I used coccinelle (I > made a change to the array_size.cocci file [1]) to find several places > where ARRAY_SIZE could be used instead of other macros or sizeof > division. > > I tried to divide the changes into a patch per subsystem (excepted for > staging). If one of the patch should be split into several patches, let > me know. > > In order to reduce the size of the To: and Cc: lines, each patch of the > series is sent only to the maintainers and lists concerned by the patch. > This cover letter is sent to every list concerned by this series. > > This series is based on linux-next next-20170929. Each patch has been > tested by building the relevant files with W=1. > > This series contains the following patches: > [PATCH 01/18] sound: use ARRAY_SIZE > [PATCH 02/18] tracing/filter: use ARRAY_SIZE > [PATCH 03/18] media: use ARRAY_SIZE > [PATCH 04/18] IB/mlx5: Use ARRAY_SIZE > [PATCH 05/18] net: use ARRAY_SIZE > [PATCH 06/18] drm: use ARRAY_SIZE > [PATCH 07/18] scsi: bfa: use ARRAY_SIZE > [PATCH 08/18] ecryptfs: use ARRAY_SIZE > [PATCH 09/18] nfsd: use ARRAY_SIZE > [PATCH 10/18] orangefs: use ARRAY_SIZE > [PATCH 11/18] dm space map metadata: use ARRAY_SIZE > [PATCH 12/18] x86: use ARRAY_SIZE > [PATCH 13/18] tpm: use ARRAY_SIZE > [PATCH 14/18] ipmi: use ARRAY_SIZE > [PATCH 15/18] acpi: use ARRAY_SIZE > [PATCH 16/18] media: staging: atomisp: use ARRAY_SIZE > [PATCH 17/18] staging: rtl8723bs: use ARRAY_SIZE > [PATCH 18/18] staging: rtlwifi: use ARRAY_SIZE > > > [1]: https://lkml.org/lkml/2017/9/13/689 > ___ > Intel-gfx mailing list > intel-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: KFD event handling questions
On Mon, Oct 2, 2017, at 08:22, Kuehling, Felix wrote: > Is the "new debug trap handler" already working? It seems right now I'm > breaking the "old" debugger backend test. However, given the current > status of that debugger, I guess we can disable those tests for now? > > Can you speak on behalf of the debugger team, or should I consult someone > else on their end as well? The existing debug API was designed to interact with live wavefronts on the device. This created problems for the scheduler, which needs to be able to remove wavefronts at any time without notice. The unprivileged debugger could interfere with privileged operations (e.g. debugging in the presence of oversubscribed processes, world switch in SR-IOV). It wasn't developed beyond internal test cases and the ioctls should not have been upstreamed. The debugger was redesigned to work with offline wavefront state collected through wavefront context save (already implemented in the scheduler and controlled through hsaKmtUpdateQueue). This respects the privilege model and is robust in all scheduling scenarios. There are stil some yet-to-be-determined interfaces to control per-process debugging features. This could extend/repurpose an existing ioctl or require a new one. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 00/18] use ARRAY_SIZE macro
On Mon, Oct 02, 2017 at 07:35:54AM +0200, Greg KH wrote: > On Sun, Oct 01, 2017 at 08:52:20PM -0400, Jérémy Lefaure wrote: > > On Mon, 2 Oct 2017 09:01:31 +1100 > > "Tobin C. Harding" wrote: > > > > > > In order to reduce the size of the To: and Cc: lines, each patch of the > > > > series is sent only to the maintainers and lists concerned by the patch. > > > > This cover letter is sent to every list concerned by this series. > > > > > > Why don't you just send individual patches for each subsystem? I'm not a > > > maintainer but I don't see > > > how any one person is going to be able to apply this whole series, it is > > > making it hard for > > > maintainers if they have to pick patches out from among the series (if > > > indeed any will bother > > > doing that). > > Yeah, maybe it would have been better to send individual patches. > > > > From my point of view it's a series because the patches are related (I > > did a git format-patch from my local branch). But for the maintainers > > point of view, they are individual patches. > > And the maintainers view is what matters here, if you wish to get your > patches reviewed and accepted... Mainly I'd just like to know which you're asking for. Do you want me to apply this, or to ACK it so someone else can? If it's sent as a series I tend to assume the latter. But in this case I'm assuming it's the former, so I'll pick up the nfsd one --b. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 00/18] use ARRAY_SIZE macro
On Mon, 2 Oct 2017 15:22:24 -0400 bfie...@fieldses.org (J. Bruce Fields) wrote: > Mainly I'd just like to know which you're asking for. Do you want me to > apply this, or to ACK it so someone else can? If it's sent as a series > I tend to assume the latter. > > But in this case I'm assuming it's the former, so I'll pick up the nfsd > one Could you to apply the NFSD patch ("nfsd: use ARRAY_SIZE") with the Reviewed-by: Jeff Layton ) tag please ? This patch is an individual patch and it should not have been sent in a series (sorry about that). Thank you, Jérémy ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx