[PATCH] drm/amd/display: check if modeset is required before adding plane

2017-10-26 Thread S, Shirish

From: Shirish S 

Adding affected planes without checking if modeset is requested from the user 
space causes performance regression in video p/b scenarios when full screen p/b 
is not composited.

Hence add a check before adding a plane as affected.

bug: https://bugs.freedesktop.org/show_bug.cgi?id=103408

Signed-off-by: Shirish S 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index f0b50d9..e6ec130 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4727,6 +4727,9 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev,
}
} else {
for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, 
new_crtc_state, i) {
+   if (!drm_atomic_crtc_needs_modeset(new_crtc_state))
+   continue;
+
if (!new_crtc_state->enable)
continue;
 
--
2.7.4

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Re: [PATCH 00/29] DC Linux Patches Oct 25, 2017

2017-10-26 Thread Andrey Grodzovsky

Patches 1,2,6,24-26,28 are

Reviewed-by: Andrey Grodzovsky


On 2017-10-26 02:34 PM, Harry Wentland wrote:

  * Remove annoyning Freesync warning
  * Fix Freesync and amd-stg which was broken in last set of patches
  * Fix issue with plugging in displays during S3
  * Bunch of generic fixes found during Raven bringup
  * Whole bunch of Raven fixes and work

Andrew Jiang (3):
   drm/amd/display: Reject PPLib clock values if they are invalid
   drm/amd/display: Use constants from atom.h for HDMI caps read
   drm/amd/display: Don't reject 3D timings

Anthony Koo (1):
   drm/amd/display: Move hdr_metadata from plane to stream

Charlene Liu (1):
   drm/amd/display: correct DP is always in full range or bt609

Dmytro Laktyushkin (2):
   drm/amd/display: fix split recout calculation
   drm/amd/display: fix split recout offset

Eric Yang (1):
   drm/amd/display: Add timing validation against dongle cap

Harry Wentland (7):
   drm/amdgpu: Remove immutable flag from freesync_capable property
   drm/amd/display: Move conn_state to header
   drm/amd/display: Use plane pointer to avoid line breaks
   drm/amd/display: Use single fail label in init_drm_dev
   drm/amd/display: Explicitly call ->reset for each object
   drm/amd/display: Don't access legacy properties
   drm/amd/display: Fix Freesync enablement

Hersen Wu (1):
   drm/amd/display: Handle as MST first and then DP dongle if sink
 support both

Leo (Sunpeng) Li (2):
   drm/amd/display: Fix styling of freesync code in commit_tail
   drm/amd/display: Complete TODO item: use new DRM iterator

Roman Li (1):
   drm/amd/display: Fix S3 topology change

SivapiriyanKumarasamy (1):
   drm/amd/display: Apply VQ adjustments in MPO case

Tony Cheng (3):
   drm/amd/display: dal 3.1.08
   drm/amd/display: dal 3.1.09
   drm/amd/display: dal 3.1.10

Yongqiang Sun (3):
   drm/amd/display: Power down front end in init_hw.
   drm/amd/display: Not reset front end when program back end.
   drm/amd/display: Added disconnect dchub.

Yue Hin Lau (3):
   drm/amd/display: create new files for hubbub functions
   drm/amd/display: create new structure for hubbub
   drm/amd/display: fix bug from last commit for hubbub

  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c|   2 +-
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  | 198 ++---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h  |  13 +
  drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c   |  68 +-
  drivers/gpu/drm/amd/display/dc/core/dc.c   |  23 +-
  drivers/gpu/drm/amd/display/dc/core/dc_debug.c |   4 +
  drivers/gpu/drm/amd/display/dc/core/dc_link.c  | 108 ++-
  drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |  21 +-
  drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |  51 +-
  drivers/gpu/drm/amd/display/dc/dc.h|  44 +-
  drivers/gpu/drm/amd/display/dc/dc_hw_types.h   |   9 +
  drivers/gpu/drm/amd/display/dc/dc_types.h  |   5 -
  .../drm/amd/display/dc/dce/dce_stream_encoder.c|  34 +-
  .../amd/display/dc/dce110/dce110_hw_sequencer.c|   3 +-
  drivers/gpu/drm/amd/display/dc/dcn10/Makefile  |   3 +-
  drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c   |  31 +-
  drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h   |  47 +-
  .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c|  44 +-
  .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c| 510 +
  .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h| 217 ++
  drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c  |   9 +
  .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 841 +
  .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h  |   1 +
  .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |  44 ++
  .../amd/display/dc/dcn10/dcn10_timing_generator.c  |   3 -
  drivers/gpu/drm/amd/display/dc/inc/core_status.h   |   2 +-
  drivers/gpu/drm/amd/display/dc/inc/core_types.h|   1 +
  drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h|  10 +-
  drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h   |   2 +
  drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h  |  14 +
  drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h|   6 +-
  drivers/gpu/drm/amd/display/dc/inc/hw/transform.h  |   6 +-
  32 files changed, 1468 insertions(+), 906 deletions(-)
  create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
  create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h



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Re: [PATCH 03/29] drm/amd/display: Complete TODO item: use new DRM iterator

2017-10-26 Thread Andrey Grodzovsky



On 2017-10-26 02:34 PM, Harry Wentland wrote:

From: "Leo (Sunpeng) Li" 

Abandon new_crtcs array and use for_each_new iterator to acquire new
crtcs.

Signed-off-by: Leo (Sunpeng) Li 
Reviewed-by: Harry Wentland 
---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 36 +--
  1 file changed, 14 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 442b399a9400..590f80d29b56 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4013,10 +4013,8 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
struct amdgpu_display_manager *dm = >dm;
struct dm_atomic_state *dm_state;
uint32_t i, j;
-   uint32_t new_crtcs_count = 0;
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
-   struct amdgpu_crtc *new_crtcs[MAX_STREAMS];
unsigned long flags;
bool wait_for_vblank = true;
struct drm_connector *connector;
@@ -4075,25 +4073,9 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
continue;
}
  
-

if (dm_old_crtc_state->stream)
remove_stream(adev, acrtc, 
dm_old_crtc_state->stream);
  
-

-   /*
-* this loop saves set mode crtcs
-* we needed to enable vblanks once all
-* resources acquired in dc after dc_commit_streams
-*/
-
-   /*TODO move all this into dm_crtc_state, get rid of
-* new_crtcs array and use old and new atomic states
-* instead
-*/
-   new_crtcs[new_crtcs_count] = acrtc;
-   new_crtcs_count++;
-
-   new_crtc_state = drm_atomic_get_new_crtc_state(state, 
crtc);
acrtc->enabled = true;
acrtc->hw_mode = new_crtc_state->mode;
crtc->hwmode = new_crtc_state->mode;
@@ -4221,18 +4203,28 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
dm_error("%s: Failed to update stream scaling!\n", 
__func__);
}
  
-	for (i = 0; i < new_crtcs_count; i++) {

+   for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
+   new_crtc_state, i) {
/*
 * loop to enable interrupts on newly arrived crtc
 */
-   struct amdgpu_crtc *acrtc = new_crtcs[i];
+   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
+   bool modeset_needed;
  
-		new_crtc_state = drm_atomic_get_new_crtc_state(state, >base);

dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
+   dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
+   modeset_needed = modeset_required(
+   new_crtc_state,
+   dm_new_crtc_state->stream,
+   dm_old_crtc_state->stream);
+
+   if (dm_new_crtc_state->stream == NULL || !modeset_needed)
+   continue;


I feel it's a bit future bug prone to repeat the 2 checks above from the 
initial
for_each_crtc_in_state loop, somebody makes changes there and forget 
about this loop.

The array is ugly but it avoids logic duplication.

Thanks,
Andrey

  
  		if (adev->dm.freesync_module)

mod_freesync_notify_mode_change(
-   adev->dm.freesync_module, 
_new_crtc_state->stream, 1);
+   adev->dm.freesync_module,
+   _new_crtc_state->stream, 1);
  
  		manage_dm_interrupts(adev, acrtc, true);

}


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Re: [PATCH 27/29] drm/amd/display: Explicitly call ->reset for each object

2017-10-26 Thread Andrey Grodzovsky



On 2017-10-26 02:35 PM, Harry Wentland wrote:

We need to avoid calling reset after detection.


Could you explain why please ?


This is much simpler
if we call ->reset on the connector right after creation but before
detection. To stay consistent call ->reset on every other object
as well after creation.

Signed-off-by: Harry Wentland 
Reviewed-by: Roman Li 
Acked-by: Harry Wentland 
---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 --
  1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6fc043957bbf..62e8db1f113c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1436,8 +1436,6 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
goto fail;
}
  
-	drm_mode_config_reset(dm->ddev);


This is a standard helper called by many drivers on driver init , it's 
also called in drm_atomic_helper_resume
which we use on resume from suspend so now it's kind of asymmetrical 
behavior.


Thanks,
Andrey


-
return 0;
  fail:
kfree(aencoder);
@@ -3105,6 +3103,11 @@ static int amdgpu_dm_plane_init(struct 
amdgpu_display_manager *dm,
  
  	drm_plane_helper_add(>base, _plane_helper_funcs);
  
+	/* Create (reset) the plane state */

+   if (aplane->base.funcs->reset)
+   aplane->base.funcs->reset(>base);
+
+
return res;
  }
  
@@ -3140,6 +3143,10 @@ static int amdgpu_dm_crtc_init(struct amdgpu_display_manager *dm,
  
  	drm_crtc_helper_add(>base, _dm_crtc_helper_funcs);
  
+	/* Create (reset) the plane state */

+   if (acrtc->base.funcs->reset)
+   acrtc->base.funcs->reset(>base);
+
acrtc->max_cursor_width = dm->adev->dm.dc->caps.max_cursor_size;
acrtc->max_cursor_height = dm->adev->dm.dc->caps.max_cursor_size;
  
@@ -3500,6 +3507,9 @@ static int amdgpu_dm_connector_init(struct amdgpu_display_manager *dm,

>base,
_dm_connector_helper_funcs);
  
+	if (aconnector->base.funcs->reset)

+   aconnector->base.funcs->reset(>base);
+
amdgpu_dm_connector_init_helper(
dm,
aconnector,


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Re: [pull] amdgpu dc drm-next-4.15-dc

2017-10-26 Thread Dieter Nützel

Am 26.10.2017 19:26, schrieb Alex Deucher:
On Thu, Oct 26, 2017 at 10:10 AM, Dieter Nützel  
wrote:

Hello Alex & Rex,

any progress?
The 'screen blank' (monitor standby mode) is really annoying.


Does this patch help?
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=amd-staging-drm-next=ddabbf65aae36e21b4c79354940f80eae6c36104

Alex


Yes, it seems so. Many thanks to Jerry for this fix.
I've tested it with latest amd-staging-drm-next #4ce527eb8bb3 on my 
Polaris 20. Both cases (kdm_greet and 'screen blank') are solved. W'll 
apply it on drm-next-4.15-dc, too.


Side note:
HDMI audio is _gone_ after logout and relogin.
Missing reinitialization?

Next:
Fix fan speed...

Thank you very much!
Dieter



Thanks,
Dieter

Am 23.10.2017 03:03, schrieb Dieter Nützel:


Am 22.10.2017 23:48, schrieb Dieter Nützel:


Am 21.10.2017 23:22, schrieb Alex Deucher:


Hi Dave,

Last batch of new stuff for DC. Highlights:
- Fix some memory leaks
- S3 fixes
- Hotplug fixes
- Fix some CX multi-display issues
- MST fixes
- DML updates from the hw team
- Various code cleanups
- Misc bug fixes



Now this tree has the same fan regression as 'amd-staging-drm-next'
startet with 0944c350c8eddf4064e7abb881dd245032fdfa23.

Look here:
[amd-staging-drm-next] regression - no fan info (sensors) on RX580
https://lists.freedesktop.org/archives/amd-gfx/2017-October/014065.html

Second:
KDE's greeter 'kdm_greet' (login screen went into dpms) and KDE's
'screen blank' (energy saving / dpms off) never came back. All I can
do is a clean reboot. So I have to disable all 'dpms'.
But I could attach gdb remotely on it.
'kdm_greet' hang in 'poll'.
Nothing alarming in 'dmesg' and 'Xorg.0.log'. (Both available taken
from 'amd-staging-drm-next' if needed).



Hello Alex and Rex,

I've found good hint from Jan (randomsalad) on phoronix for the
'screen blank' (monitor standby mode):

https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984555#post984555

My Reply:

https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984581#post984581

I can swear, that I could 'return' one time (the first time, maybe 
due

to only warm reboot) on 'drm-next-4.15-dc-wip' directly from within
KDE session with replugging the video cable, but for all later tests
on both kernels I have to blindly switching back to login screen
(kdm_greet) and then replugging the video cable.

For me these regression started with 'amd-staging-drm-next' much
earlier than with the latest commit.

Dieter
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[PATCH libdrm 2/2] amdgpu: Add VMID reservation per GPU context test.

2017-10-26 Thread Andrey Grodzovsky
The test will Reserve a VMID, submit a command and
unreserve the VMID.

Change-Id: I2e5320b2c3044d1375bc5b18d936d3c0637f5daa
Signed-off-by: Andrey Grodzovsky 
---
 tests/amdgpu/Makefile.am   |   3 +-
 tests/amdgpu/amdgpu_test.c |   7 +++
 tests/amdgpu/amdgpu_test.h |  15 +
 tests/amdgpu/vm_tests.c| 151 +
 4 files changed, 175 insertions(+), 1 deletion(-)
 create mode 100644 tests/amdgpu/vm_tests.c

diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am
index 8700c4d..e79c1bd 100644
--- a/tests/amdgpu/Makefile.am
+++ b/tests/amdgpu/Makefile.am
@@ -31,4 +31,5 @@ amdgpu_test_SOURCES = \
uvd_enc_tests.c \
vcn_tests.c \
uve_ib.h \
-   deadlock_tests.c
+   deadlock_tests.c \
+   vm_tests.c
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index 9925503..a82d9ab 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -103,6 +103,13 @@ static CU_SuiteInfo suites[] = {
.pCleanupFunc = suite_deadlock_tests_clean,
.pTests = deadlock_tests,
},
+   {
+   .pName = "VM Tests",
+   .pInitFunc = suite_vm_tests_init,
+   .pCleanupFunc = suite_vm_tests_clean,
+   .pTests = vm_tests,
+   },
+
CU_SUITE_INFO_NULL,
 };
 
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index ece93f4..4fffbc6 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -150,6 +150,21 @@ int suite_deadlock_tests_clean();
 extern CU_TestInfo deadlock_tests[];
 
 /**
+ * Initialize vm test suite
+ */
+int suite_vm_tests_init();
+
+/**
+ * Deinitialize deadlock test suite
+ */
+int suite_vm_tests_clean();
+
+/**
+ * Tests in vm test suite
+ */
+extern CU_TestInfo vm_tests[];
+
+/**
  * Helper functions
  */
 static inline amdgpu_bo_handle gpu_mem_alloc(
diff --git a/tests/amdgpu/vm_tests.c b/tests/amdgpu/vm_tests.c
new file mode 100644
index 000..22bac37
--- /dev/null
+++ b/tests/amdgpu/vm_tests.c
@@ -0,0 +1,151 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+*/
+
+#include "CUnit/Basic.h"
+
+#include "amdgpu_test.h"
+#include "amdgpu_drm.h"
+
+static  amdgpu_device_handle device_handle;
+static  uint32_t  major_version;
+static  uint32_t  minor_version;
+
+
+static void amdgpu_vmid_reserve_test(void);
+
+int suite_vm_tests_init(void)
+{
+   struct amdgpu_gpu_info gpu_info = {0};
+   int r;
+
+   r = amdgpu_device_initialize(drm_amdgpu[0], _version,
+  _version, _handle);
+
+   if (r) {
+   if ((r == -EACCES) && (errno == EACCES))
+   printf("\n\nError:%s. "
+   "Hint:Try to run this test program as root.",
+   strerror(errno));
+   return CUE_SINIT_FAILED;
+   }
+
+   return CUE_SUCCESS;
+}
+
+int suite_vm_tests_clean(void)
+{
+   int r = amdgpu_device_deinitialize(device_handle);
+
+   if (r == 0)
+   return CUE_SUCCESS;
+   else
+   return CUE_SCLEAN_FAILED;
+}
+
+
+CU_TestInfo vm_tests[] = {
+   { "resere vmid test",  amdgpu_vmid_reserve_test },
+   CU_TEST_INFO_NULL,
+};
+
+static void amdgpu_vmid_reserve_test(void)
+{
+   amdgpu_context_handle context_handle;
+   amdgpu_bo_handle ib_result_handle;
+   void *ib_result_cpu;
+   uint64_t ib_result_mc_address;
+   struct amdgpu_cs_request ibs_request;
+   struct amdgpu_cs_ib_info ib_info;
+   struct amdgpu_cs_fence fence_status;
+   uint32_t expired, flags;
+   int i, r, instance;
+   amdgpu_bo_list_handle bo_list;
+   amdgpu_va_handle va_handle;
+   union drm_amdgpu_vm vm;
+   static uint32_t *ptr;
+
+   r = amdgpu_cs_ctx_create(device_handle, _handle);
+  

[PATCH libdrm 1/2] amdgpu: Add wrappers for AMDGPU_VM IOCTL.

2017-10-26 Thread Andrey Grodzovsky
Change-Id: I7eafb85c1ca96d6d255f0183bed0ce4129746fe0
Signed-off-by: Andrey Grodzovsky 
---
 amdgpu/Makefile.sources |  1 +
 amdgpu/amdgpu.h | 20 +++
 amdgpu/amdgpu_vm.c  | 52 +
 3 files changed, 73 insertions(+)
 create mode 100644 amdgpu/amdgpu_vm.c

diff --git a/amdgpu/Makefile.sources b/amdgpu/Makefile.sources
index bc3abaa..498b64c 100644
--- a/amdgpu/Makefile.sources
+++ b/amdgpu/Makefile.sources
@@ -6,6 +6,7 @@ LIBDRM_AMDGPU_FILES := \
amdgpu_gpu_info.c \
amdgpu_internal.h \
amdgpu_vamgr.c \
+   amdgpu_vm.c \
util_hash.c \
util_hash.h \
util_hash_table.c \
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index ecc975f..07f2851 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -1489,6 +1489,26 @@ void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence 
*fence,
 void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info 
*fence_info,
struct drm_amdgpu_cs_chunk_data *data);
 
+/**
+ * Reserve VMID
+ * \param   context - \c [in]  GPU Context
+ * \param   flags - \c [in]  TBD
+ *
+ * \return  0 on success otherwise POSIX Error code
+*/
+int amdgpu_vm_alloc_reserved_vmid(amdgpu_context_handle context,
+ uint32_t  
flags);
+
+/**
+ * Free reserved VMID
+ * \param   context - \c [in]  GPU Context
+ * \param   flags - \c [in]  TBD
+ *
+ * \return  0 on success otherwise POSIX Error code
+*/
+int amdgpu_vm_free_reserved_vmid(amdgpu_context_handle context,
+uint32_t   
flags);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/amdgpu/amdgpu_vm.c b/amdgpu/amdgpu_vm.c
new file mode 100644
index 000..1664b7b
--- /dev/null
+++ b/amdgpu/amdgpu_vm.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright 2017 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+
+#include "amdgpu.h"
+#include "amdgpu_drm.h"
+#include "xf86drm.h"
+#include "amdgpu_internal.h"
+
+int amdgpu_vm_alloc_reserved_vmid(amdgpu_context_handle context,
+ uint32_t  
flags)
+{
+   union drm_amdgpu_vm vm;
+
+   vm.in.op = AMDGPU_VM_OP_RESERVE_VMID;
+   vm.in.flags = flags;
+
+   return drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_VM,
+  , sizeof(vm));
+}
+
+int amdgpu_vm_free_reserved_vmid(amdgpu_context_handle context,
+uint32_t   
flags)
+{
+   union drm_amdgpu_vm vm;
+
+   vm.in.op = AMDGPU_VM_OP_UNRESERVE_VMID;
+   vm.in.flags = flags;
+
+   return drmCommandWriteRead(context->dev->fd, DRM_AMDGPU_VM,
+  , sizeof(vm));
+}
-- 
2.7.4

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RE: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
> Sent: Thursday, October 26, 2017 2:39 PM
> To: Deucher, Alexander; 'Christian König'; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> amdgpu_ttm_bind
> 
> Am 26.10.2017 um 20:11 schrieb Deucher, Alexander:
> >> -Original Message-
> >> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On
> Behalf
> >> Of Christian König
> >> Sent: Thursday, October 26, 2017 12:06 PM
> >> To: amd-gfx@lists.freedesktop.org
> >> Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> >> amdgpu_ttm_bind
> >>
> >> From: Christian König 
> >>
> >> Just unbind and rebind to force updates of the GART space.
> >>
> >> This prevents forcing the BO to be idle.
> > Is there a chance something could change like the caching on a  rebind that
> we need to account for?
> 
> Not that I could think of.
> 
> The new placement should have identical attributes to the old one, just
> with GART space allocated.

In that case,

Acked-by: Alex Deucher 

> 
> Christian.
> 
> >
> > Alex
> >
> >> Signed-off-by: Christian König 
> >> ---
> >>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24
> ++-
> >> -
> >>   1 file changed, 18 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> index 3045701..b40d2f3 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> @@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
> >> *bo, struct ttm_mem_reg *bo_mem)
> >>if (unlikely(r))
> >>return r;
> >>
> >> -  r = ttm_bo_move_ttm(bo, true, false, );
> >> -  if (unlikely(r))
> >> +  if (ttm->state == tt_bound) {
> >> +  r = ttm->func->unbind(ttm);
> >> +  if (unlikely(r))
> >> +  return r;
> >> +
> >> +  ttm->state = tt_unbound;
> >> +  }
> >> +
> >> +  r = ttm_tt_bind(ttm, );
> >> +  if (unlikely(r)) {
> >>ttm_bo_mem_put(bo, );
> >> -  else
> >> -  bo->offset = (bo->mem.start << PAGE_SHIFT) +
> >> -  bo->bdev->man[bo->mem.mem_type].gpu_offset;
> >> +  return r;
> >> +  }
> >>
> >> -  return r;
> >> +  ttm_bo_mem_put(bo, bo_mem);
> >> +  bo->mem = tmp;
> >> +  bo->offset = (bo->mem.start << PAGE_SHIFT) +
> >> +  bo->bdev->man[bo->mem.mem_type].gpu_offset;
> >> +
> >> +  return 0;
> >>   }
> >>
> >>   int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
> >> --
> >> 2.7.4
> >>
> >> ___
> >> amd-gfx mailing list
> >> amd-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> > ___
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 

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Re: [PATCH v2] drm/amd/display: Don't print error when bo_pin is interrupted

2017-10-26 Thread Andrey Grodzovsky



On 2017-10-26 04:08 PM, Harry Wentland wrote:

v2: Also don't print for ERESTARTSYS or EAGAIN

Signed-off-by: Harry Wentland 


Reviewed-by: Andrey Grodzovsky


Thanks,
Andrey


---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cf15701f208d..4401f0fb3f02 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2944,7 +2944,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
amdgpu_bo_unreserve(rbo);
  
  	if (unlikely(r != 0)) {

-   DRM_ERROR("Failed to pin framebuffer\n");
+   if (!(r == -EINTR || r == -ERESTARTSYS || r == EAGAIN))
+   DRM_ERROR("Failed to pin framebuffer with error %d\n", 
r);
return r;
}
  


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[PATCH v2] drm/amd/display: Don't print error when bo_pin is interrupted

2017-10-26 Thread Harry Wentland
v2: Also don't print for ERESTARTSYS or EAGAIN

Signed-off-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cf15701f208d..4401f0fb3f02 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2944,7 +2944,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
amdgpu_bo_unreserve(rbo);
 
if (unlikely(r != 0)) {
-   DRM_ERROR("Failed to pin framebuffer\n");
+   if (!(r == -EINTR || r == -ERESTARTSYS || r == EAGAIN))
+   DRM_ERROR("Failed to pin framebuffer with error %d\n", 
r);
return r;
}
 
-- 
2.14.1

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Re: [PATCH] drm/amd/display: Don't print error when bo_pin is interrupted

2017-10-26 Thread Andrey Grodzovsky



On 2017-10-26 03:42 PM, Harry Wentland wrote:

Signed-off-by: Harry Wentland 
---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cf15701f208d..5593ff05d2a6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2944,7 +2944,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
amdgpu_bo_unreserve(rbo);
  
  	if (unlikely(r != 0)) {

-   DRM_ERROR("Failed to pin framebuffer\n");
+   if (r != -EINTR)
+   DRM_ERROR("Failed to pin framebuffer\n");


I think the error could also be ERASTARTSYS (e.g. for 
wait_event_interruptable) or even EAGAIN


Thanks,
Andrey


return r;
}
  


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[PATCH] drm/amd/display: Don't print error when bo_pin is interrupted

2017-10-26 Thread Harry Wentland
Signed-off-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cf15701f208d..5593ff05d2a6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2944,7 +2944,8 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
amdgpu_bo_unreserve(rbo);
 
if (unlikely(r != 0)) {
-   DRM_ERROR("Failed to pin framebuffer\n");
+   if (r != -EINTR)
+   DRM_ERROR("Failed to pin framebuffer\n");
return r;
}
 
-- 
2.14.1

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Re: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

2017-10-26 Thread Andrey Grodzovsky



On 2017-10-26 02:43 PM, Christian König wrote:

Am 26.10.2017 um 19:56 schrieb Deucher, Alexander:

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Christian König
Sent: Thursday, October 26, 2017 12:06 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
GART space

From: Christian König 

Display can't seem to handle this correctly.

Signed-off-by: Christian König 

Acked-by: Alex Deucher 


BTW: Harry & Andrey:

It is probably a good idea to actually wait interruptible here.

How problematic would it be for you guys to allow that?

The only negative effect I could find of hand is some error printing 
in the DC code.


It shouldn't be an issue, as i trace this call i see it's gonna impact 
dm_plane_helper_prepare_fb through calling amdgpu_bo_pin,
so instead of treating any r != 0 as error we just should gracefully 
return for EINTR there w\o printing error.


Thanks,
Andrey



Christian.




---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e5cab4b..3045701 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
struct ttm_mem_reg *bo_mem)
  placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
|
  TTM_PL_FLAG_TT;

-r = ttm_bo_mem_space(bo, , , true, false);
+r = ttm_bo_mem_space(bo, , , false, false);
  if (unlikely(r))
  return r;

--
2.7.4

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Re: [PATCH 02/16] drm/amdkfd: Don't dereference kfd_process.mm

2017-10-26 Thread Felix Kuehling
On 2017-10-26 02:11 PM, Christian König wrote:
> But now reading the patch there is something else which I stumbled over:
>> -    WARN_ON(atomic_read(>mm->mm_count) <= 0);
>> +    /*
>> + * This cast should be safe here because we grabbed a
>> + * reference to the mm in kfd_process_notifier_release
>> + */
>> +    WARN_ON(atomic_read(&((struct mm_struct *)p->mm)->mm_count) <= 0);
>>      mmdrop(p->mm);
> Well that isn't good coding style. You shouldn't obfuscate what
> pointer it is by changing it to "void*", but rather set it to NULL as
> soon as you know that it is stale.
>
> Additional to that it is certainly not job of the driver to warn on a
> run over mm_count.

Yeah. We don't have this in our current staging branch. The whole
process teardown has changed quite a bit. I just fixed this up to make
it work with current upstream.

If you prefer, I could just remove the WARN_ON.

Regards,
  Felix

>
> Regards,
> Christian.
>
>>
>> Regards,
>>    Felix
>>
>>> Regards,
>>> Christian.
>>>
 Signed-off-by: Felix Kuehling 
 ---
    drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 19 +++
    drivers/gpu/drm/amd/amdkfd/kfd_priv.h    |  7 ++-
    drivers/gpu/drm/amd/amdkfd/kfd_process.c |  6 +-
    3 files changed, 26 insertions(+), 6 deletions(-)

 diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
 b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
 index 944abfa..61ce547 100644
 --- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
 +++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
 @@ -24,8 +24,8 @@
    #include 
    #include 
    #include 
 +#include 
    #include 
 -#include 
    #include 
    #include 
    #include "kfd_priv.h"
 @@ -904,14 +904,24 @@ void kfd_signal_iommu_event(struct kfd_dev
 *dev, unsigned int pasid,
     * running so the lookup function returns a locked process.
     */
    struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
 +    struct mm_struct *mm;
      if (!p)
    return; /* Presumably process exited. */
    +    /* Take a safe reference to the mm_struct, which may otherwise
 + * disappear even while the kfd_process is still referenced.
 + */
 +    mm = get_task_mm(p->lead_thread);
 +    if (!mm) {
 +    mutex_unlock(>mutex);
 +    return; /* Process is exiting */
 +    }
 +
    memset(_exception_data, 0,
 sizeof(memory_exception_data));
    -    down_read(>mm->mmap_sem);
 -    vma = find_vma(p->mm, address);
 +    down_read(>mmap_sem);
 +    vma = find_vma(mm, address);
      memory_exception_data.gpu_id = dev->id;
    memory_exception_data.va = address;
 @@ -937,7 +947,8 @@ void kfd_signal_iommu_event(struct kfd_dev *dev,
 unsigned int pasid,
    }
    }
    -    up_read(>mm->mmap_sem);
 +    up_read(>mmap_sem);
 +    mmput(mm);
      mutex_lock(>event_mutex);
    diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
 b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
 index 7d86ec9..1a483a7 100644
 --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
 +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
 @@ -494,7 +494,12 @@ struct kfd_process {
     */
    struct hlist_node kfd_processes;
    -    struct mm_struct *mm;
 +    /*
 + * Opaque pointer to mm_struct. We don't hold a reference to
 + * it so it should never be dereferenced from here. This is
 + * only used for looking up processes by their mm.
 + */
 +    void *mm;
      struct mutex mutex;
    diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
 b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
 index 3ccb3b5..21d27e5 100644
 --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
 +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
 @@ -200,7 +200,11 @@ static void kfd_process_destroy_delayed(struct
 rcu_head *rcu)
    struct kfd_process *p;
      p = container_of(rcu, struct kfd_process, rcu);
 -    WARN_ON(atomic_read(>mm->mm_count) <= 0);
 +    /*
 + * This cast should be safe here because we grabbed a
 + * reference to the mm in kfd_process_notifier_release
 + */
 +    WARN_ON(atomic_read(&((struct mm_struct *)p->mm)->mm_count) <=
 0);
      mmdrop(p->mm);
    
>>>
>

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Re: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

2017-10-26 Thread Christian König

Am 26.10.2017 um 19:56 schrieb Deucher, Alexander:

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Christian König
Sent: Thursday, October 26, 2017 12:06 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
GART space

From: Christian König 

Display can't seem to handle this correctly.

Signed-off-by: Christian König 

Acked-by: Alex Deucher 


BTW: Harry & Andrey:

It is probably a good idea to actually wait interruptible here.

How problematic would it be for you guys to allow that?

The only negative effect I could find of hand is some error printing in 
the DC code.


Christian.




---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e5cab4b..3045701 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
struct ttm_mem_reg *bo_mem)
placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
|
TTM_PL_FLAG_TT;

-   r = ttm_bo_mem_space(bo, , , true, false);
+   r = ttm_bo_mem_space(bo, , , false, false);
if (unlikely(r))
return r;

--
2.7.4

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Re: [PATCH 2/8] drm/amdgpu: always bind pinned BOs

2017-10-26 Thread Christian König

Am 26.10.2017 um 19:55 schrieb Deucher, Alexander:

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Christian König
Sent: Thursday, October 26, 2017 12:06 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 2/8] drm/amdgpu: always bind pinned BOs

From: Christian König 

We always need to bind pinned BOs, not just when the caller requested the
address.

Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

Should this go to stable as well?


Good question. As far as I can see it didn't made a difference so far 
cause all users of pinned GART BOs provided an address as well.


Just the framebuffer code doesn't do this and so I stumbled over it when 
allowing scanout from GART.


Christian.



Alex


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++---
  1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 76551cd..0b76d83 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
*bo, u32 domain,
goto error;
}

+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (unlikely(r)) {
+   dev_err(adev->dev, "%p bind failed\n", bo);
+   goto error;
+   }
+
bo->pin_count = 1;
-   if (gpu_addr != NULL) {
-   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
-   if (unlikely(r)) {
-   dev_err(adev->dev, "%p bind failed\n", bo);
-   goto error;
-   }
+   if (gpu_addr != NULL)
*gpu_addr = amdgpu_bo_gpu_offset(bo);
-   }

domain = amdgpu_mem_type_to_domain(bo-

tbo.mem.mem_type);

if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
--
2.7.4

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Re: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

2017-10-26 Thread Christian König

Am 26.10.2017 um 20:11 schrieb Deucher, Alexander:

-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Christian König
Sent: Thursday, October 26, 2017 12:06 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
amdgpu_ttm_bind

From: Christian König 

Just unbind and rebind to force updates of the GART space.

This prevents forcing the BO to be idle.

Is there a chance something could change like the caching on a  rebind that we 
need to account for?


Not that I could think of.

The new placement should have identical attributes to the old one, just 
with GART space allocated.


Christian.



Alex


Signed-off-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++-
-
  1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3045701..b40d2f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
*bo, struct ttm_mem_reg *bo_mem)
if (unlikely(r))
return r;

-   r = ttm_bo_move_ttm(bo, true, false, );
-   if (unlikely(r))
+   if (ttm->state == tt_bound) {
+   r = ttm->func->unbind(ttm);
+   if (unlikely(r))
+   return r;
+
+   ttm->state = tt_unbound;
+   }
+
+   r = ttm_tt_bind(ttm, );
+   if (unlikely(r)) {
ttm_bo_mem_put(bo, );
-   else
-   bo->offset = (bo->mem.start << PAGE_SHIFT) +
-   bo->bdev->man[bo->mem.mem_type].gpu_offset;
+   return r;
+   }

-   return r;
+   ttm_bo_mem_put(bo, bo_mem);
+   bo->mem = tmp;
+   bo->offset = (bo->mem.start << PAGE_SHIFT) +
+   bo->bdev->man[bo->mem.mem_type].gpu_offset;
+
+   return 0;
  }

  int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
--
2.7.4

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[PATCH 24/29] drm/amd/display: Move conn_state to header

2017-10-26 Thread Harry Wentland
We'll need it in amdgpu_dm_mst_types.c as well.

Signed-off-by: Harry Wentland 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 -
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 12 
 2 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 427fd17f7624..cd295a202950 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1654,19 +1654,6 @@ static int dm_early_init(void *handle)
return 0;
 }
 
-struct dm_connector_state {
-   struct drm_connector_state base;
-
-   enum amdgpu_rmx_type scaling;
-   uint8_t underscan_vborder;
-   uint8_t underscan_hborder;
-   bool underscan_enable;
-   struct mod_freesync_user_enable user_enable;
-};
-
-#define to_dm_connector_state(x)\
-   container_of((x), struct dm_connector_state, base)
-
 static bool modeset_required(struct drm_crtc_state *crtc_state,
 struct dc_stream_state *new_stream,
 struct dc_stream_state *old_stream)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
index be3b70d683e7..6f1aaee35d11 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h
@@ -222,6 +222,18 @@ struct dm_atomic_state {
 
 #define to_dm_atomic_state(x) container_of(x, struct dm_atomic_state, base)
 
+struct dm_connector_state {
+   struct drm_connector_state base;
+
+   enum amdgpu_rmx_type scaling;
+   uint8_t underscan_vborder;
+   uint8_t underscan_hborder;
+   bool underscan_enable;
+   struct mod_freesync_user_enable user_enable;
+};
+
+#define to_dm_connector_state(x)\
+   container_of((x), struct dm_connector_state, base)
 
 void amdgpu_dm_connector_funcs_reset(struct drm_connector *connector);
 struct drm_connector_state *
-- 
2.14.1

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[PATCH 28/29] drm/amd/display: Don't access legacy properties

2017-10-26 Thread Harry Wentland
We're an atomic driver and shouldn't access legacy properties. Doing so
will only scare users with stack traces.

Instead save the prop in the state and access it directly. Much simpler.

Signed-off-by: Harry Wentland 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 73 ++-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  1 +
 2 files changed, 34 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 62e8db1f113c..6465a200578d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2462,23 +2462,6 @@ amdgpu_dm_connector_detect(struct drm_connector 
*connector, bool force)
connector_status_disconnected);
 }
 
-/* Compare user free sync property with immunable property free sync capable
- * and if display is not free sync capable sets free sync property to 0
- */
-static int
-amdgpu_freesync_update_property_atomic(struct drm_connector *connector,
-  uint64_t val_capable)
-{
-   struct drm_device *dev = connector->dev;
-   struct amdgpu_device *adev = dev->dev_private;
-
-   return drm_object_property_set_value(>base,
-adev->mode_info.freesync_property,
-val_capable);
-
-
-}
-
 int amdgpu_dm_connector_atomic_set_property(struct drm_connector *connector,
struct drm_connector_state 
*connector_state,
struct drm_property *property,
@@ -2532,8 +2515,8 @@ int amdgpu_dm_connector_atomic_set_property(struct 
drm_connector *connector,
dm_new_state->user_enable.enable_for_video = val;
ret = 0;
} else if (property == adev->mode_info.freesync_capable_property) {
-   ret = -EINVAL;
-   return ret;
+   dm_new_state->freesync_capable = val;
+   ret = 0;
}
 
return ret;
@@ -2549,7 +2532,6 @@ int amdgpu_dm_connector_atomic_get_property(struct 
drm_connector *connector,
struct dm_connector_state *dm_state =
to_dm_connector_state(state);
int ret = -EINVAL;
-   int i;
 
if (property == dev->mode_config.scaling_mode_property) {
switch (dm_state->scaling) {
@@ -2577,14 +2559,12 @@ int amdgpu_dm_connector_atomic_get_property(struct 
drm_connector *connector,
} else if (property == adev->mode_info.underscan_property) {
*val = dm_state->underscan_enable;
ret = 0;
-   } else if ((property == adev->mode_info.freesync_property) ||
-  (property == adev->mode_info.freesync_capable_property)) {
-   for (i = 0; i < connector->base.properties->count; i++) {
-   if (connector->base.properties->properties[i] == 
property) {
-   *val = connector->base.properties->values[i];
-   ret = 0;
-   }
-   }
+   } else if (property == adev->mode_info.freesync_property) {
+   *val = dm_state->user_enable.enable_for_gaming;
+   ret = 0;
+   } else if (property == adev->mode_info.freesync_capable_property) {
+   *val = dm_state->freesync_capable;
+   ret = 0;
}
return ret;
 }
@@ -4843,17 +4823,24 @@ void amdgpu_dm_add_sink_to_freesync_module(struct 
drm_connector *connector,
   struct edid *edid)
 {
int i;
-   uint64_t val_capable;
bool edid_check_required;
struct detailed_timing *timing;
struct detailed_non_pixel *data;
struct detailed_data_monitor_range *range;
struct amdgpu_dm_connector *amdgpu_dm_connector =
to_amdgpu_dm_connector(connector);
+   struct dm_connector_state *dm_con_state;
 
struct drm_device *dev = connector->dev;
struct amdgpu_device *adev = dev->dev_private;
 
+   if (!connector->state) {
+   DRM_ERROR("%s - Connector has no state", __func__);
+   return;
+   }
+
+   dm_con_state = to_dm_connector_state(connector->state);
+
edid_check_required = false;
if (!amdgpu_dm_connector->dc_sink) {
DRM_ERROR("dc_sink NULL, could not add free_sync module.\n");
@@ -4872,7 +4859,7 @@ void amdgpu_dm_add_sink_to_freesync_module(struct 
drm_connector *connector,
amdgpu_dm_connector);
}
}
-   val_capable = 0;
+   dm_con_state->freesync_capable = false;
if (edid_check_required == true && (edid->version 

[PATCH 27/29] drm/amd/display: Explicitly call ->reset for each object

2017-10-26 Thread Harry Wentland
We need to avoid calling reset after detection. This is much simpler
if we call ->reset on the connector right after creation but before
detection. To stay consistent call ->reset on every other object
as well after creation.

Signed-off-by: Harry Wentland 
Reviewed-by: Roman Li 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 --
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6fc043957bbf..62e8db1f113c 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1436,8 +1436,6 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
goto fail;
}
 
-   drm_mode_config_reset(dm->ddev);
-
return 0;
 fail:
kfree(aencoder);
@@ -3105,6 +3103,11 @@ static int amdgpu_dm_plane_init(struct 
amdgpu_display_manager *dm,
 
drm_plane_helper_add(>base, _plane_helper_funcs);
 
+   /* Create (reset) the plane state */
+   if (aplane->base.funcs->reset)
+   aplane->base.funcs->reset(>base);
+
+
return res;
 }
 
@@ -3140,6 +3143,10 @@ static int amdgpu_dm_crtc_init(struct 
amdgpu_display_manager *dm,
 
drm_crtc_helper_add(>base, _dm_crtc_helper_funcs);
 
+   /* Create (reset) the plane state */
+   if (acrtc->base.funcs->reset)
+   acrtc->base.funcs->reset(>base);
+
acrtc->max_cursor_width = dm->adev->dm.dc->caps.max_cursor_size;
acrtc->max_cursor_height = dm->adev->dm.dc->caps.max_cursor_size;
 
@@ -3500,6 +3507,9 @@ static int amdgpu_dm_connector_init(struct 
amdgpu_display_manager *dm,
>base,
_dm_connector_helper_funcs);
 
+   if (aconnector->base.funcs->reset)
+   aconnector->base.funcs->reset(>base);
+
amdgpu_dm_connector_init_helper(
dm,
aconnector,
-- 
2.14.1

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[PATCH 20/29] drm/amd/display: Don't reject 3D timings

2017-10-26 Thread Harry Wentland
From: Andrew Jiang 

Signed-off-by: Andrew Jiang 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
index 1994865d4351..178dadda74f9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_timing_generator.c
@@ -499,9 +499,6 @@ static bool tgn10_validate_timing(
timing->timing_3d_format != TIMING_3D_FORMAT_INBAND_FA)
return false;
 
-   if (timing->timing_3d_format != TIMING_3D_FORMAT_NONE &&
-   tg->ctx->dc->debug.disable_stereo_support)
-   return false;
/* Temporarily blocking interlacing mode until it's supported */
if (timing->flags.INTERLACE == 1)
return false;
-- 
2.14.1

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[PATCH 25/29] drm/amd/display: Use plane pointer to avoid line breaks

2017-10-26 Thread Harry Wentland
Signed-off-by: Harry Wentland 
Reviewed-by: Mikita Lipski 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index cd295a202950..55fb0b282f44 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1331,13 +1331,16 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
}
 
for (i = 0; i < dm->dc->caps.max_planes; i++) {
-   mode_info->planes[i] = kzalloc(sizeof(struct amdgpu_plane),
-GFP_KERNEL);
-   if (!mode_info->planes[i]) {
+   struct amdgpu_plane *plane;
+
+   plane = kzalloc(sizeof(struct amdgpu_plane), GFP_KERNEL);
+   mode_info->planes[i] = plane;
+
+   if (!plane) {
DRM_ERROR("KMS: Failed to allocate plane\n");
goto fail_free_planes;
}
-   mode_info->planes[i]->base.type = mode_info->plane_type[i];
+   plane->base.type = mode_info->plane_type[i];
 
/*
 * HACK: IGT tests expect that each plane can only have one
-- 
2.14.1

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[PATCH 29/29] drm/amd/display: Fix Freesync enablement

2017-10-26 Thread Harry Wentland
With our recent change to save Freesync properties as part
of the atomic state we removed the call to enable freesync
when the property is being set. Apparently that is still
needed.

Signed-off-by: Harry Wentland 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 6465a200578d..9fb4dfece5a5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2510,9 +2510,21 @@ int amdgpu_dm_connector_atomic_set_property(struct 
drm_connector *connector,
dm_new_state->underscan_enable = val;
ret = 0;
} else if (property == adev->mode_info.freesync_property) {
+   struct amdgpu_crtc *acrtc;
+   struct dm_crtc_state *acrtc_state;
+
dm_new_state->user_enable.enable_for_gaming = val;
dm_new_state->user_enable.enable_for_static = val;
dm_new_state->user_enable.enable_for_video = val;
+
+   if (adev->dm.freesync_module && connector_state->crtc) {
+   acrtc = to_amdgpu_crtc(connector_state->crtc);
+   acrtc_state = 
to_dm_crtc_state(connector_state->crtc->state);
+   mod_freesync_set_user_enable(adev->dm.freesync_module,
+_state->stream, 1,
+
_new_state->user_enable);
+   }
+
ret = 0;
} else if (property == adev->mode_info.freesync_capable_property) {
dm_new_state->freesync_capable = val;
-- 
2.14.1

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[PATCH 23/29] drm/amd/display: dal 3.1.10

2017-10-26 Thread Harry Wentland
From: Tony Cheng 

Signed-off-by: Tony Cheng 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index e39371797eeb..4019e7417c88 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -38,7 +38,7 @@
 #include "inc/compressor.h"
 #include "dml/display_mode_lib.h"
 
-#define DC_VER "3.1.09"
+#define DC_VER "3.1.10"
 
 #define MAX_SURFACES 3
 #define MAX_STREAMS 6
-- 
2.14.1

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[PATCH 26/29] drm/amd/display: Use single fail label in init_drm_dev

2017-10-26 Thread Harry Wentland
No need for multiple labels as kfree will always do a NULL check
before freeing the memory.

Signed-off-by: Harry Wentland 
Reviewed-by: Bhawanpreet Lakha 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 +++
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 55fb0b282f44..6fc043957bbf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1338,7 +1338,7 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
 
if (!plane) {
DRM_ERROR("KMS: Failed to allocate plane\n");
-   goto fail_free_planes;
+   goto fail;
}
plane->base.type = mode_info->plane_type[i];
 
@@ -1354,14 +1354,14 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
 
if (amdgpu_dm_plane_init(dm, mode_info->planes[i], 
possible_crtcs)) {
DRM_ERROR("KMS: Failed to initialize plane\n");
-   goto fail_free_planes;
+   goto fail;
}
}
 
for (i = 0; i < dm->dc->caps.max_streams; i++)
if (amdgpu_dm_crtc_init(dm, _info->planes[i]->base, i)) {
DRM_ERROR("KMS: Failed to initialize crtc\n");
-   goto fail_free_planes;
+   goto fail;
}
 
dm->display_indexes_num = dm->dc->caps.max_streams;
@@ -1378,20 +1378,20 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
 
aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
if (!aconnector)
-   goto fail_free_planes;
+   goto fail;
 
aencoder = kzalloc(sizeof(*aencoder), GFP_KERNEL);
if (!aencoder)
-   goto fail_free_connector;
+   goto fail;
 
if (amdgpu_dm_encoder_init(dm->ddev, aencoder, i)) {
DRM_ERROR("KMS: Failed to initialize encoder\n");
-   goto fail_free_encoder;
+   goto fail;
}
 
if (amdgpu_dm_connector_init(dm, aconnector, i, aencoder)) {
DRM_ERROR("KMS: Failed to initialize connector\n");
-   goto fail_free_encoder;
+   goto fail;
}
 
if (dc_link_detect(dc_get_link_at_index(dm->dc, i),
@@ -1416,14 +1416,14 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
case CHIP_VEGA10:
if (dce110_register_irq_handlers(dm->adev)) {
DRM_ERROR("DM: Failed to initialize IRQ\n");
-   goto fail_free_encoder;
+   goto fail;
}
break;
 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
case CHIP_RAVEN:
if (dcn10_register_irq_handlers(dm->adev)) {
DRM_ERROR("DM: Failed to initialize IRQ\n");
-   goto fail_free_encoder;
+   goto fail;
}
/*
 * Temporary disable until pplib/smu interaction is implemented
@@ -1433,17 +1433,15 @@ static int amdgpu_dm_initialize_drm_device(struct 
amdgpu_device *adev)
 #endif
default:
DRM_ERROR("Usupported ASIC type: 0x%X\n", adev->asic_type);
-   goto fail_free_encoder;
+   goto fail;
}
 
drm_mode_config_reset(dm->ddev);
 
return 0;
-fail_free_encoder:
+fail:
kfree(aencoder);
-fail_free_connector:
kfree(aconnector);
-fail_free_planes:
for (i = 0; i < dm->dc->caps.max_planes; i++)
kfree(mode_info->planes[i]);
return -1;
-- 
2.14.1

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[PATCH 19/29] drm/amd/display: fix bug from last commit for hubbub

2017-10-26 Thread Harry Wentland
From: Yue Hin Lau 

fix memory leak

Signed-off-by: Yue Hin Lau 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index 2d87834e621d..9c8d6765bab1 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -730,6 +730,12 @@ static void destruct(struct dcn10_resource_pool *pool)
kfree(TO_DCN10_MPC(pool->base.mpc));
pool->base.mpc = NULL;
}
+
+   if (pool->base.hubbub != NULL) {
+   kfree(pool->base.hubbub);
+   pool->base.hubbub = NULL;
+   }
+
for (i = 0; i < pool->base.pipe_count; i++) {
if (pool->base.opps[i] != NULL)

pool->base.opps[i]->funcs->opp_destroy(>base.opps[i]);
@@ -1453,7 +1459,7 @@ static bool construct(
}
 
pool->base.hubbub = dcn10_hubbub_create(ctx);
-   if (pool->base.mpc == NULL) {
+   if (pool->base.hubbub == NULL) {
BREAK_TO_DEBUGGER();
dm_error("DC: failed to create mpc!\n");
goto fail;
-- 
2.14.1

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[PATCH 15/29] drm/amd/display: Handle as MST first and then DP dongle if sink support both

2017-10-26 Thread Harry Wentland
From: Hersen Wu 

Signed-off-by: Hersen Wu 
Reviewed-by: Tony Cheng 
Reviewed-by: Wenjing Liu 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 32 +--
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 18294df189b3..be9a182d6fb3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -480,22 +480,6 @@ static void detect_dp(
sink_caps->signal = SIGNAL_TYPE_DISPLAY_PORT;
detect_dp_sink_caps(link);
 
-   /* DP active dongles */
-   if (is_dp_active_dongle(link)) {
-   link->type = dc_connection_active_dongle;
-   if (!link->dpcd_caps.sink_count.bits.SINK_COUNT) {
-   /*
-* active dongle unplug processing for short irq
-*/
-   link_disconnect_sink(link);
-   return;
-   }
-
-   if (link->dpcd_caps.dongle_type !=
-   DISPLAY_DONGLE_DP_HDMI_CONVERTER) {
-   *converter_disable_audio = true;
-   }
-   }
if (is_mst_supported(link)) {
sink_caps->signal = SIGNAL_TYPE_DISPLAY_PORT_MST;
link->type = dc_connection_mst_branch;
@@ -535,6 +519,22 @@ static void detect_dp(
sink_caps->signal = SIGNAL_TYPE_DISPLAY_PORT;
}
}
+
+   if (link->type != dc_connection_mst_branch &&
+   is_dp_active_dongle(link)) {
+   /* DP active dongles */
+   link->type = dc_connection_active_dongle;
+   if (!link->dpcd_caps.sink_count.bits.SINK_COUNT) {
+   /*
+* active dongle unplug processing for short irq
+*/
+   link_disconnect_sink(link);
+   return;
+   }
+
+   if (link->dpcd_caps.dongle_type != 
DISPLAY_DONGLE_DP_HDMI_CONVERTER)
+   *converter_disable_audio = true;
+   }
} else {
/* DP passive dongles */
sink_caps->signal = dp_passive_dongle_detection(link->ddc,
-- 
2.14.1

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[PATCH 18/29] drm/amd/display: Move hdr_metadata from plane to stream

2017-10-26 Thread Harry Wentland
From: Anthony Koo 

Need to move HDR Metadata from Surface to Stream since there is only one
infoframe possible per stream.

Also cleaning up some duplicate definitions.

Signed-off-by: Anthony Koo 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc.c   | 19 +++---
 drivers/gpu/drm/amd/display/dc/core/dc_debug.c |  4 +++
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  | 41 +-
 drivers/gpu/drm/amd/display/dc/dc.h| 35 +-
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h   |  9 +
 .../drm/amd/display/dc/dce/dce_stream_encoder.c| 11 +-
 .../amd/display/dc/dce110/dce110_hw_sequencer.c|  3 +-
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  |  3 +-
 8 files changed, 65 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 5120e5eaa025..96ebc3d1b4b2 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -960,6 +960,7 @@ bool dc_commit_planes_to_stream(
flip_addr[i].address = plane_states[i]->address;
flip_addr[i].flip_immediate = plane_states[i]->flip_immediate;
plane_info[i].color_space = plane_states[i]->color_space;
+   plane_info[i].input_tf = plane_states[i]->input_tf;
plane_info[i].format = plane_states[i]->format;
plane_info[i].plane_size = plane_states[i]->plane_size;
plane_info[i].rotation = plane_states[i]->rotation;
@@ -1085,12 +1086,12 @@ static enum surface_update_type 
get_plane_info_update_type(
 
/* Full update parameters */
temp_plane_info.color_space = u->surface->color_space;
+   temp_plane_info.input_tf = u->surface->input_tf;
temp_plane_info.dcc = u->surface->dcc;
temp_plane_info.horizontal_mirror = u->surface->horizontal_mirror;
temp_plane_info.plane_size = u->surface->plane_size;
temp_plane_info.rotation = u->surface->rotation;
temp_plane_info.stereo_format = u->surface->stereo_format;
-   temp_plane_info.input_csc_enabled = 
u->surface->input_csc_color_matrix.enable_adjustment;
 
if (surface_index == 0)
temp_plane_info.visible = u->plane_info->visible;
@@ -1171,7 +1172,6 @@ static enum surface_update_type det_surface_update(
overall_type = type;
 
if (u->in_transfer_func ||
-   u->hdr_static_metadata ||
u->input_csc_color_matrix) {
if (overall_type < UPDATE_TYPE_MED)
overall_type = UPDATE_TYPE_MED;
@@ -1303,14 +1303,25 @@ static void commit_planes_for_stream(struct dc *dc,
pipe_ctx->top_pipe->plane_state == 
pipe_ctx->plane_state))
dc->hwss.set_input_transfer_func(
pipe_ctx, 
pipe_ctx->plane_state);
+   }
+   }
+
+   if (update_type > UPDATE_TYPE_FAST) {
+   for (j = 0; j < dc->res_pool->pipe_count; j++) {
+   struct pipe_ctx *pipe_ctx =
+   >res_ctx.pipe_ctx[j];
+
+   if (!pipe_ctx->stream)
+   continue;
 
if (stream_update != NULL &&
-   stream_update->out_transfer_func != 
NULL) {
+   stream_update->out_transfer_func != NULL) {
dc->hwss.set_output_transfer_func(
pipe_ctx, pipe_ctx->stream);
}
 
-   if (srf_updates[i].hdr_static_metadata) {
+   if (stream_update != NULL &&
+   stream_update->hdr_static_metadata) {
resource_build_info_frame(pipe_ctx);
dc->hwss.update_info_frame(pipe_ctx);
}
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
index 6acee5426e4b..2e509382935f 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_debug.c
@@ -137,6 +137,7 @@ void pre_surface_trace(
"plane_state->tiling_info.gfx8.pipe_config = 
%d;\n"
"plane_state->tiling_info.gfx8.array_mode = 
%d;\n"
"plane_state->color_space = %d;\n"
+   "plane_state->input_tf = %d;\n"
"plane_state->dcc.enable = %d;\n"
"plane_state->format = %d;\n"
"plane_state->rotation = %d;\n"

[PATCH 14/29] drm/amd/display: fix split recout calculation

2017-10-26 Thread Harry Wentland
From: Dmytro Laktyushkin 

Recout split rounding code was wrong

Signed-off-by: Dmytro Laktyushkin 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index a2f9be3716cf..ced339a145c6 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -580,14 +580,12 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx, 
struct view *recout_skip
if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state ==
pipe_ctx->plane_state) {
if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
-   pipe_ctx->plane_res.scl_data.recout.height /= 2;
-   pipe_ctx->plane_res.scl_data.recout.y += 
pipe_ctx->plane_res.scl_data.recout.height;
/* Floor primary pipe, ceil 2ndary pipe */
-   pipe_ctx->plane_res.scl_data.recout.height += 
pipe_ctx->plane_res.scl_data.recout.height % 2;
+   pipe_ctx->plane_res.scl_data.recout.height = 
(pipe_ctx->plane_res.scl_data.recout.height + 1) / 2;
+   pipe_ctx->plane_res.scl_data.recout.y += 
pipe_ctx->plane_res.scl_data.recout.height;
} else {
-   pipe_ctx->plane_res.scl_data.recout.width /= 2;
+   pipe_ctx->plane_res.scl_data.recout.width = 
(pipe_ctx->plane_res.scl_data.recout.width + 1) / 2;
pipe_ctx->plane_res.scl_data.recout.x += 
pipe_ctx->plane_res.scl_data.recout.width;
-   pipe_ctx->plane_res.scl_data.recout.width += 
pipe_ctx->plane_res.scl_data.recout.width % 2;
}
} else if (pipe_ctx->bottom_pipe &&
pipe_ctx->bottom_pipe->plane_state == 
pipe_ctx->plane_state) {
-- 
2.14.1

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[PATCH 21/29] drm/amd/display: fix split recout offset

2017-10-26 Thread Harry Wentland
From: Dmytro Laktyushkin 

Previous recout calculation fix changed recout size rounding
and affected the offset when it should not have

Signed-off-by: Dmytro Laktyushkin 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index c20aa1cdd2ec..8a823422896a 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -580,12 +580,12 @@ static void calculate_recout(struct pipe_ctx *pipe_ctx, 
struct view *recout_skip
if (pipe_ctx->top_pipe && pipe_ctx->top_pipe->plane_state ==
pipe_ctx->plane_state) {
if (stream->view_format == VIEW_3D_FORMAT_TOP_AND_BOTTOM) {
+   pipe_ctx->plane_res.scl_data.recout.y += 
pipe_ctx->plane_res.scl_data.recout.height / 2;
/* Floor primary pipe, ceil 2ndary pipe */
pipe_ctx->plane_res.scl_data.recout.height = 
(pipe_ctx->plane_res.scl_data.recout.height + 1) / 2;
-   pipe_ctx->plane_res.scl_data.recout.y += 
pipe_ctx->plane_res.scl_data.recout.height;
} else {
+   pipe_ctx->plane_res.scl_data.recout.x += 
pipe_ctx->plane_res.scl_data.recout.width / 2;
pipe_ctx->plane_res.scl_data.recout.width = 
(pipe_ctx->plane_res.scl_data.recout.width + 1) / 2;
-   pipe_ctx->plane_res.scl_data.recout.x += 
pipe_ctx->plane_res.scl_data.recout.width;
}
} else if (pipe_ctx->bottom_pipe &&
pipe_ctx->bottom_pipe->plane_state == 
pipe_ctx->plane_state) {
-- 
2.14.1

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[PATCH 12/29] drm/amd/display: Added disconnect dchub.

2017-10-26 Thread Harry Wentland
From: Yongqiang Sun 

Add disable ttu interface to dcn10, when remove
mpc, disable ttu as well.

Signed-off-by: Yongqiang Sun 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 9 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h  | 2 ++
 3 files changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index a19fac70b056..584e82cc5df3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -56,6 +56,14 @@ void hubp1_set_blank(struct hubp *hubp, bool blank)
}
 }
 
+static void hubp1_disconnect(struct hubp *hubp)
+{
+   struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
+
+   REG_UPDATE(DCHUBP_CNTL,
+   HUBP_TTU_DISABLE, 1);
+}
+
 static void hubp1_set_hubp_blank_en(struct hubp *hubp, bool blank)
 {
struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
@@ -933,6 +941,7 @@ static struct hubp_funcs dcn10_hubp_funcs = {
.set_hubp_blank_en = hubp1_set_hubp_blank_en,
.set_cursor_attributes  = hubp1_cursor_set_attributes,
.set_cursor_position= hubp1_cursor_set_position,
+   .hubp_disconnect = hubp1_disconnect,
 };
 
 /*/
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 77ba1bfbef25..4ae0a94188c5 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2019,6 +2019,7 @@ static void dcn10_apply_ctx_for_surface(
struct pipe_ctx *pipe_ctx = >res_ctx.pipe_ctx[i];
struct pipe_ctx *old_pipe_ctx =
>current_state->res_ctx.pipe_ctx[i];
+   struct hubp *hubp = dc->res_pool->hubps[i];
 
if (!pipe_ctx->plane_state && !old_pipe_ctx->plane_state)
continue;
@@ -2067,6 +2068,9 @@ static void dcn10_apply_ctx_for_surface(
"[debug_mpo: apply_ctx disconnect 
pending on mpcc %d]\n",
old_pipe_ctx->mpcc->inst);*/
 
+   if (hubp->funcs->hubp_disconnect)
+   hubp->funcs->hubp_disconnect(hubp);
+
if (dc->debug.sanity_checks)
verify_allow_pstate_change_high(dc->hwseq);
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h 
b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 0d186be24cf4..3286585bd6cd 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -100,6 +100,8 @@ struct hubp_funcs {
const struct dc_cursor_position *pos,
const struct dc_cursor_mi_param *param);
 
+   void (*hubp_disconnect)(struct hubp *hubp);
+
 };
 
 #endif
-- 
2.14.1

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[PATCH 04/29] drm/amd/display: Add timing validation against dongle cap

2017-10-26 Thread Harry Wentland
From: Eric Yang 

For DP active dongles, the dpcd dongle caps are read but not
used to validate mode timing. This addresses this.

In particular, this change fixes light up on the HDMI 4k TV
connected through DP active dongle. Since the 4k TV defaults
to YCbCr420, which the dongle don't support.

This change does not address MST cases, a more generalized
approach must be taken for that.

Signed-off-by: Eric Yang 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc.c |  1 +
 drivers/gpu/drm/amd/display/dc/core/dc_link.c| 70 +++-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 21 ++-
 drivers/gpu/drm/amd/display/dc/inc/core_status.h |  2 +-
 4 files changed, 91 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 503817ac0429..748490633932 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -128,6 +128,7 @@ static bool create_links(
link->link_id.id = CONNECTOR_ID_VIRTUAL;
link->link_id.enum_id = ENUM_ID_1;
link->link_enc = kzalloc(sizeof(*link->link_enc), GFP_KERNEL);
+   link->link_status.dpcd_caps = >dpcd_caps;
 
enc_init.ctx = dc->ctx;
enc_init.channel = CHANNEL_ID_UNKNOWN;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index c47da645d3b8..b2ba1c215b44 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1801,12 +1801,75 @@ static void disable_link(struct dc_link *link, enum 
signal_type signal)
link->link_enc->funcs->disable_output(link->link_enc, signal, 
link);
 }
 
+bool dp_active_dongle_validate_timing(
+   const struct dc_crtc_timing *timing,
+   const struct dc_dongle_caps *dongle_caps)
+{
+   unsigned int required_pix_clk = timing->pix_clk_khz;
+
+   if (dongle_caps->dongle_type != DISPLAY_DONGLE_DP_HDMI_CONVERTER ||
+   dongle_caps->extendedCapValid == false)
+   return true;
+
+   /* Check Pixel Encoding */
+   switch (timing->pixel_encoding) {
+   case PIXEL_ENCODING_RGB:
+   case PIXEL_ENCODING_YCBCR444:
+   break;
+   case PIXEL_ENCODING_YCBCR422:
+   if (!dongle_caps->is_dp_hdmi_ycbcr422_pass_through)
+   return false;
+   break;
+   case PIXEL_ENCODING_YCBCR420:
+   if (!dongle_caps->is_dp_hdmi_ycbcr420_pass_through)
+   return false;
+   break;
+   default:
+   /* Invalid Pixel Encoding*/
+   return false;
+   }
+
+
+   /* Check Color Depth and Pixel Clock */
+   if (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420)
+   required_pix_clk /= 2;
+
+   switch (timing->display_color_depth) {
+   case COLOR_DEPTH_666:
+   case COLOR_DEPTH_888:
+   /*888 and 666 should always be supported*/
+   break;
+   case COLOR_DEPTH_101010:
+   if (dongle_caps->dp_hdmi_max_bpc < 10)
+   return false;
+   required_pix_clk = required_pix_clk * 10 / 8;
+   break;
+   case COLOR_DEPTH_121212:
+   if (dongle_caps->dp_hdmi_max_bpc < 12)
+   return false;
+   required_pix_clk = required_pix_clk * 12 / 8;
+   break;
+
+   case COLOR_DEPTH_141414:
+   case COLOR_DEPTH_161616:
+   default:
+   /* These color depths are currently not supported */
+   return false;
+   }
+
+   if (required_pix_clk > dongle_caps->dp_hdmi_max_pixel_clk)
+   return false;
+
+   return true;
+}
+
 enum dc_status dc_link_validate_mode_timing(
const struct dc_stream_state *stream,
struct dc_link *link,
const struct dc_crtc_timing *timing)
 {
uint32_t max_pix_clk = stream->sink->dongle_max_pix_clk;
+   struct dc_dongle_caps *dongle_caps = 
>link_status.dpcd_caps->dongle_caps;
 
/* A hack to avoid failing any modes for EDID override feature on
 * topology change such as lower quality cable for DP or different 
dongle
@@ -1814,8 +1877,13 @@ enum dc_status dc_link_validate_mode_timing(
if (link->remote_sinks[0])
return DC_OK;
 
+   /* Passive Dongle */
if (0 != max_pix_clk && timing->pix_clk_khz > max_pix_clk)
-   return DC_EXCEED_DONGLE_MAX_CLK;
+   return DC_EXCEED_DONGLE_CAP;
+
+   /* Active Dongle*/
+   if (!dp_active_dongle_validate_timing(timing, dongle_caps))
+   return DC_EXCEED_DONGLE_CAP;
 
switch 

[PATCH 09/29] drm/amd/display: Not reset front end when program back end.

2017-10-26 Thread Harry Wentland
From: Yongqiang Sun 

Since front end is programmed before back end programming,
no need to reset front end in back end programming.

Signed-off-by: Yongqiang Sun 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc.c   |  3 +-
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 76 --
 2 files changed, 2 insertions(+), 77 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 748490633932..63dd2caa7576 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -809,6 +809,8 @@ static enum dc_status dc_commit_state_no_check(struct dc 
*dc, struct dc_state *c
if (!dcb->funcs->is_accelerated_mode(dcb))
dc->hwss.enable_accelerated_mode(dc);
 
+
+
for (i = 0; i < context->stream_count; i++) {
const struct dc_sink *sink = context->streams[i]->sink;
 
@@ -889,7 +891,6 @@ bool dc_commit_state(struct dc *dc, struct dc_state 
*context)
return (result == DC_OK);
 }
 
-
 bool dc_post_update_surfaces_to_stream(struct dc *dc)
 {
int i;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 4fc2bc4b3dc4..77ba1bfbef25 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -617,32 +617,6 @@ static void plane_atomic_disable(struct dc *dc,
verify_allow_pstate_change_high(dc->hwseq);
 }
 
-/*
- * kill power to plane hw
- * note: cannot power down until plane is disable
- */
-static void plane_atomic_power_down(struct dc *dc, int fe_idx)
-{
-   struct dce_hwseq *hws = dc->hwseq;
-   struct dpp *dpp = dc->res_pool->dpps[fe_idx];
-
-   if (REG(DC_IP_REQUEST_CNTL)) {
-   REG_SET(DC_IP_REQUEST_CNTL, 0,
-   IP_REQUEST_EN, 1);
-   dpp_pg_control(hws, fe_idx, false);
-   hubp_pg_control(hws, fe_idx, false);
-   dpp->funcs->dpp_reset(dpp);
-   REG_SET(DC_IP_REQUEST_CNTL, 0,
-   IP_REQUEST_EN, 0);
-   dm_logger_write(dc->ctx->logger, LOG_DEBUG,
-   "Power gated front end %d\n", fe_idx);
-
-   if (dc->debug.sanity_checks)
-   verify_allow_pstate_change_high(dc->hwseq);
-   }
-}
-
-
 static void reset_front_end(
struct dc *dc,
int fe_idx)
@@ -792,56 +766,6 @@ static void reset_hw_ctx_wrap(
 {
int i;
 
-   /* Reset Front End*/
-   /* Lock*/
-   for (i = 0; i < dc->res_pool->pipe_count; i++) {
-   struct pipe_ctx *cur_pipe_ctx = 
>current_state->res_ctx.pipe_ctx[i];
-   struct timing_generator *tg = cur_pipe_ctx->stream_res.tg;
-
-   if (cur_pipe_ctx->stream)
-   tg->funcs->lock(tg);
-   }
-   /* Disconnect*/
-   for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
-   struct pipe_ctx *pipe_ctx_old =
-   >current_state->res_ctx.pipe_ctx[i];
-   struct pipe_ctx *pipe_ctx = >res_ctx.pipe_ctx[i];
-
-   if (!pipe_ctx->stream ||
-   !pipe_ctx->plane_state ||
-   pipe_need_reprogram(pipe_ctx_old, pipe_ctx)) {
-
-   plane_atomic_disconnect(dc, i);
-   }
-   }
-   /* Unlock*/
-   for (i = dc->res_pool->pipe_count - 1; i >= 0; i--) {
-   struct pipe_ctx *cur_pipe_ctx = 
>current_state->res_ctx.pipe_ctx[i];
-   struct timing_generator *tg = cur_pipe_ctx->stream_res.tg;
-
-   if (cur_pipe_ctx->stream)
-   tg->funcs->unlock(tg);
-   }
-
-   /* Disable and Powerdown*/
-   for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
-   struct pipe_ctx *pipe_ctx_old =
-   >current_state->res_ctx.pipe_ctx[i];
-   struct pipe_ctx *pipe_ctx = >res_ctx.pipe_ctx[i];
-
-   /*if (!pipe_ctx_old->stream)
-   continue;*/
-
-   if (pipe_ctx->stream && pipe_ctx->plane_state
-   && !pipe_need_reprogram(pipe_ctx_old, pipe_ctx))
-   continue;
-
-   plane_atomic_disable(dc, i);
-
-   if (!pipe_ctx->stream || !pipe_ctx->plane_state)
-   plane_atomic_power_down(dc, i);
-   }
-
/* Reset Back End*/
for (i = dc->res_pool->pipe_count - 1; i >= 0 ; i--) {
struct pipe_ctx *pipe_ctx_old =
-- 
2.14.1

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[PATCH 05/29] drm/amd/display: create new files for hubbub functions

2017-10-26 Thread Harry Wentland
From: Yue Hin Lau 

moving hubbub functions to new file

Signed-off-by: Yue Hin Lau 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dcn10/Makefile  |   3 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c| 494 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h|  67 +++
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 490 +---
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h  |   1 +
 5 files changed, 579 insertions(+), 476 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/Makefile 
b/drivers/gpu/drm/amd/display/dc/dcn10/Makefile
index ebeb88283a14..a6ca1f97f748 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/Makefile
@@ -4,7 +4,8 @@
 DCN10 = dcn10_resource.o dcn10_ipp.o dcn10_hw_sequencer.o \
dcn10_dpp.o dcn10_opp.o dcn10_timing_generator.o \
dcn10_hubp.o dcn10_mpc.o \
-   dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o
+   dcn10_dpp_dscl.o dcn10_dpp_cm.o dcn10_cm_common.o \
+   dcn10_hubbub.o
 
 AMD_DAL_DCN10 = $(addprefix $(AMDDALPATH)/dc/dcn10/,$(DCN10))
 
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
new file mode 100644
index ..e6670f6a1b97
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
@@ -0,0 +1,494 @@
+/*
+ * Copyright 2016 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include "dm_services.h"
+#include "dcn10_hubp.h"
+#include "dcn10_hubbub.h"
+#include "dcn10_hw_sequencer.h"
+#include "dce110/dce110_hw_sequencer.h"
+#include "dce/dce_hwseq.h"
+#include "reg_helper.h"
+
+#define CTX \
+   hws->ctx
+#define REG(reg)\
+   hws->regs->reg
+
+#undef FN
+#define FN(reg_name, field_name) \
+   hws->shifts->field_name, hws->masks->field_name
+
+void dcn10_hubbub_wm_read_state(struct dce_hwseq *hws,
+   struct dcn_hubbub_wm *wm)
+{
+   struct dcn_hubbub_wm_set *s;
+
+   s = >sets[0];
+   s->wm_set = 0;
+   s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A);
+   s->pte_meta_urgent = 
REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A);
+   s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A);
+   s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_A);
+   s->dram_clk_chanage = 
REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_A);
+
+   s = >sets[1];
+   s->wm_set = 1;
+   s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_B);
+   s->pte_meta_urgent = 
REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_B);
+   s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_B);
+   s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_B);
+   s->dram_clk_chanage = 
REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_B);
+
+   s = >sets[2];
+   s->wm_set = 2;
+   s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_C);
+   s->pte_meta_urgent = 
REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_C);
+   s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_C);
+   s->sr_exit = REG_READ(DCHUBBUB_ARB_ALLOW_SR_EXIT_WATERMARK_C);
+   s->dram_clk_chanage = 
REG_READ(DCHUBBUB_ARB_ALLOW_DRAM_CLK_CHANGE_WATERMARK_C);
+
+   s = >sets[3];
+   s->wm_set = 3;
+   s->data_urgent = REG_READ(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_D);
+   s->pte_meta_urgent = 
REG_READ(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_D);
+   s->sr_enter = REG_READ(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_D);
+  

[PATCH 06/29] drm/amd/display: Fix S3 topology change

2017-10-26 Thread Harry Wentland
From: Roman Li 

Clean fake sink flag on resume if real sink connected.
Fixing S3 topology change problem like this:
1) x desktop with 1 or > displays
2) unplug display
3) suspend
4) replug same display
5) resume
without this change replugged display doesn't light up

Signed-off-by: Roman Li 
Reviewed-by: Sun peng Li 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 590f80d29b56..427fd17f7624 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -670,6 +670,10 @@ int amdgpu_dm_display_resume(struct amdgpu_device *adev)
 
mutex_lock(>hpd_lock);
dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD);
+
+   if (aconnector->fake_enable && aconnector->dc_link->local_sink)
+   aconnector->fake_enable = false;
+
aconnector->dc_sink = NULL;
amdgpu_dm_update_connector_after_detect(aconnector);
mutex_unlock(>hpd_lock);
-- 
2.14.1

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[PATCH 00/29] DC Linux Patches Oct 25, 2017

2017-10-26 Thread Harry Wentland
 * Remove annoyning Freesync warning
 * Fix Freesync and amd-stg which was broken in last set of patches
 * Fix issue with plugging in displays during S3
 * Bunch of generic fixes found during Raven bringup
 * Whole bunch of Raven fixes and work

Andrew Jiang (3):
  drm/amd/display: Reject PPLib clock values if they are invalid
  drm/amd/display: Use constants from atom.h for HDMI caps read
  drm/amd/display: Don't reject 3D timings

Anthony Koo (1):
  drm/amd/display: Move hdr_metadata from plane to stream

Charlene Liu (1):
  drm/amd/display: correct DP is always in full range or bt609

Dmytro Laktyushkin (2):
  drm/amd/display: fix split recout calculation
  drm/amd/display: fix split recout offset

Eric Yang (1):
  drm/amd/display: Add timing validation against dongle cap

Harry Wentland (7):
  drm/amdgpu: Remove immutable flag from freesync_capable property
  drm/amd/display: Move conn_state to header
  drm/amd/display: Use plane pointer to avoid line breaks
  drm/amd/display: Use single fail label in init_drm_dev
  drm/amd/display: Explicitly call ->reset for each object
  drm/amd/display: Don't access legacy properties
  drm/amd/display: Fix Freesync enablement

Hersen Wu (1):
  drm/amd/display: Handle as MST first and then DP dongle if sink
support both

Leo (Sunpeng) Li (2):
  drm/amd/display: Fix styling of freesync code in commit_tail
  drm/amd/display: Complete TODO item: use new DRM iterator

Roman Li (1):
  drm/amd/display: Fix S3 topology change

SivapiriyanKumarasamy (1):
  drm/amd/display: Apply VQ adjustments in MPO case

Tony Cheng (3):
  drm/amd/display: dal 3.1.08
  drm/amd/display: dal 3.1.09
  drm/amd/display: dal 3.1.10

Yongqiang Sun (3):
  drm/amd/display: Power down front end in init_hw.
  drm/amd/display: Not reset front end when program back end.
  drm/amd/display: Added disconnect dchub.

Yue Hin Lau (3):
  drm/amd/display: create new files for hubbub functions
  drm/amd/display: create new structure for hubbub
  drm/amd/display: fix bug from last commit for hubbub

 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c|   2 +-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c  | 198 ++---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h  |  13 +
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c   |  68 +-
 drivers/gpu/drm/amd/display/dc/core/dc.c   |  23 +-
 drivers/gpu/drm/amd/display/dc/core/dc_debug.c |   4 +
 drivers/gpu/drm/amd/display/dc/core/dc_link.c  | 108 ++-
 drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c   |  21 +-
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |  51 +-
 drivers/gpu/drm/amd/display/dc/dc.h|  44 +-
 drivers/gpu/drm/amd/display/dc/dc_hw_types.h   |   9 +
 drivers/gpu/drm/amd/display/dc/dc_types.h  |   5 -
 .../drm/amd/display/dc/dce/dce_stream_encoder.c|  34 +-
 .../amd/display/dc/dce110/dce110_hw_sequencer.c|   3 +-
 drivers/gpu/drm/amd/display/dc/dcn10/Makefile  |   3 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c   |  31 +-
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h   |  47 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c|  44 +-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c| 510 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h| 217 ++
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c  |   9 +
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 841 +
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.h  |   1 +
 .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |  44 ++
 .../amd/display/dc/dcn10/dcn10_timing_generator.c  |   3 -
 drivers/gpu/drm/amd/display/dc/inc/core_status.h   |   2 +-
 drivers/gpu/drm/amd/display/dc/inc/core_types.h|   1 +
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h|  10 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h   |   2 +
 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h  |  14 +
 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h|   6 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h  |   6 +-
 32 files changed, 1468 insertions(+), 906 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
 create mode 100644 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h

-- 
2.14.1

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[PATCH 03/29] drm/amd/display: Complete TODO item: use new DRM iterator

2017-10-26 Thread Harry Wentland
From: "Leo (Sunpeng) Li" 

Abandon new_crtcs array and use for_each_new iterator to acquire new
crtcs.

Signed-off-by: Leo (Sunpeng) Li 
Reviewed-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 36 +--
 1 file changed, 14 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 442b399a9400..590f80d29b56 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4013,10 +4013,8 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
struct amdgpu_display_manager *dm = >dm;
struct dm_atomic_state *dm_state;
uint32_t i, j;
-   uint32_t new_crtcs_count = 0;
struct drm_crtc *crtc;
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
-   struct amdgpu_crtc *new_crtcs[MAX_STREAMS];
unsigned long flags;
bool wait_for_vblank = true;
struct drm_connector *connector;
@@ -4075,25 +4073,9 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
continue;
}
 
-
if (dm_old_crtc_state->stream)
remove_stream(adev, acrtc, 
dm_old_crtc_state->stream);
 
-
-   /*
-* this loop saves set mode crtcs
-* we needed to enable vblanks once all
-* resources acquired in dc after dc_commit_streams
-*/
-
-   /*TODO move all this into dm_crtc_state, get rid of
-* new_crtcs array and use old and new atomic states
-* instead
-*/
-   new_crtcs[new_crtcs_count] = acrtc;
-   new_crtcs_count++;
-
-   new_crtc_state = drm_atomic_get_new_crtc_state(state, 
crtc);
acrtc->enabled = true;
acrtc->hw_mode = new_crtc_state->mode;
crtc->hwmode = new_crtc_state->mode;
@@ -4221,18 +4203,28 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
dm_error("%s: Failed to update stream scaling!\n", 
__func__);
}
 
-   for (i = 0; i < new_crtcs_count; i++) {
+   for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
+   new_crtc_state, i) {
/*
 * loop to enable interrupts on newly arrived crtc
 */
-   struct amdgpu_crtc *acrtc = new_crtcs[i];
+   struct amdgpu_crtc *acrtc = to_amdgpu_crtc(crtc);
+   bool modeset_needed;
 
-   new_crtc_state = drm_atomic_get_new_crtc_state(state, 
>base);
dm_new_crtc_state = to_dm_crtc_state(new_crtc_state);
+   dm_old_crtc_state = to_dm_crtc_state(old_crtc_state);
+   modeset_needed = modeset_required(
+   new_crtc_state,
+   dm_new_crtc_state->stream,
+   dm_old_crtc_state->stream);
+
+   if (dm_new_crtc_state->stream == NULL || !modeset_needed)
+   continue;
 
if (adev->dm.freesync_module)
mod_freesync_notify_mode_change(
-   adev->dm.freesync_module, 
_new_crtc_state->stream, 1);
+   adev->dm.freesync_module,
+   _new_crtc_state->stream, 1);
 
manage_dm_interrupts(adev, acrtc, true);
}
-- 
2.14.1

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[PATCH 17/29] drm/amd/display: Apply VQ adjustments in MPO case

2017-10-26 Thread Harry Wentland
From: SivapiriyanKumarasamy 

Signed-off-by: SivapiriyanKumarasamy 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc.c   |  4 +-
 drivers/gpu/drm/amd/display/dc/dc.h|  7 ++
 drivers/gpu/drm/amd/display/dc/dc_types.h  |  5 --
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c   | 31 +++--
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h   | 47 ++
 .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp_cm.c| 44 ++---
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  | 75 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h| 10 ++-
 drivers/gpu/drm/amd/display/dc/inc/hw/hw_shared.h  | 14 
 drivers/gpu/drm/amd/display/dc/inc/hw/ipp.h|  6 +-
 drivers/gpu/drm/amd/display/dc/inc/hw/transform.h  |  6 +-
 11 files changed, 211 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 63dd2caa7576..5120e5eaa025 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1090,6 +1090,7 @@ static enum surface_update_type 
get_plane_info_update_type(
temp_plane_info.plane_size = u->surface->plane_size;
temp_plane_info.rotation = u->surface->rotation;
temp_plane_info.stereo_format = u->surface->stereo_format;
+   temp_plane_info.input_csc_enabled = 
u->surface->input_csc_color_matrix.enable_adjustment;
 
if (surface_index == 0)
temp_plane_info.visible = u->plane_info->visible;
@@ -1170,7 +1171,8 @@ static enum surface_update_type det_surface_update(
overall_type = type;
 
if (u->in_transfer_func ||
-   u->hdr_static_metadata) {
+   u->hdr_static_metadata ||
+   u->input_csc_color_matrix) {
if (overall_type < UPDATE_TYPE_MED)
overall_type = UPDATE_TYPE_MED;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 45874fa888fc..9833b9de650f 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -431,6 +431,9 @@ struct dc_plane_state {
 
struct dc_gamma *gamma_correction;
struct dc_transfer_func *in_transfer_func;
+   struct dc_bias_and_scale *bias_and_scale;
+   struct csc_transform input_csc_color_matrix;
+   struct fixed31_32 coeff_reduction_factor;
 
// sourceContentAttribute cache
bool is_source_input_valid;
@@ -468,6 +471,7 @@ struct dc_plane_info {
bool horizontal_mirror;
bool visible;
bool per_pixel_alpha;
+   bool input_csc_enabled;
 };
 
 struct dc_scaling_info {
@@ -491,6 +495,9 @@ struct dc_surface_update {
struct dc_gamma *gamma;
struct dc_transfer_func *in_transfer_func;
struct dc_hdr_static_metadata *hdr_static_metadata;
+
+   struct csc_transform *input_csc_color_matrix;
+   struct fixed31_32 *coeff_reduction_factor;
 };
 
 /*
diff --git a/drivers/gpu/drm/amd/display/dc/dc_types.h 
b/drivers/gpu/drm/amd/display/dc/dc_types.h
index a8698e399111..9291a60126ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_types.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_types.h
@@ -638,11 +638,6 @@ struct colorspace_transform {
bool enable_remap;
 };
 
-struct csc_transform {
-   uint16_t matrix[12];
-   bool enable_adjustment;
-};
-
 enum i2c_mot_mode {
I2C_MOT_UNDEF,
I2C_MOT_TRUE,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
index 74e7c82bdc76..c5f4d5caf976 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c
@@ -264,8 +264,10 @@ static void dpp1_set_degamma_format_float(
 
 void dpp1_cnv_setup (
struct dpp *dpp_base,
-   enum surface_pixel_format input_format,
-   enum expansion_mode mode)
+   enum surface_pixel_format format,
+   enum expansion_mode mode,
+   struct csc_transform input_csc_color_matrix,
+   enum dc_color_space input_color_space)
 {
uint32_t pixel_format;
uint32_t alpha_en;
@@ -275,8 +277,10 @@ void dpp1_cnv_setup (
bool is_float;
struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);
bool force_disable_cursor = false;
+   struct out_csc_color_matrix tbl_entry;
+   int i = 0;
 
-   dpp1_setup_format_flags(input_format, );
+   dpp1_setup_format_flags(format, );
alpha_en = 1;
pixel_format = 0;
color_space = COLOR_SPACE_SRGB;
@@ -306,7 +310,7 @@ void dpp1_cnv_setup (
 
dpp1_set_degamma_format_float(dpp_base, is_float);
 
-   switch (input_format) {
+   switch (format) {
case 

[PATCH 16/29] drm/amd/display: create new structure for hubbub

2017-10-26 Thread Harry Wentland
From: Yue Hin Lau 

instantiating new structure hubbub in resource.c

Signed-off-by: Yue Hin Lau 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c|  88 ++-
 .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.h| 162 -
 .../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c  |  45 +++---
 .../gpu/drm/amd/display/dc/dcn10/dcn10_resource.c  |  38 +
 drivers/gpu/drm/amd/display/dc/inc/core_types.h|   1 +
 5 files changed, 269 insertions(+), 65 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
index e6670f6a1b97..f60e90cff1bb 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
@@ -26,21 +26,18 @@
 #include "dm_services.h"
 #include "dcn10_hubp.h"
 #include "dcn10_hubbub.h"
-#include "dcn10_hw_sequencer.h"
-#include "dce110/dce110_hw_sequencer.h"
-#include "dce/dce_hwseq.h"
 #include "reg_helper.h"
 
 #define CTX \
-   hws->ctx
+   hubbub->ctx
 #define REG(reg)\
-   hws->regs->reg
+   hubbub->regs->reg
 
 #undef FN
 #define FN(reg_name, field_name) \
-   hws->shifts->field_name, hws->masks->field_name
+   hubbub->shifts->field_name, hubbub->masks->field_name
 
-void dcn10_hubbub_wm_read_state(struct dce_hwseq *hws,
+void hubbub1_wm_read_state(struct hubbub *hubbub,
struct dcn_hubbub_wm *wm)
 {
struct dcn_hubbub_wm_set *s;
@@ -79,7 +76,7 @@ void dcn10_hubbub_wm_read_state(struct dce_hwseq *hws,
 }
 
 void verify_allow_pstate_change_high(
-   struct dce_hwseq *hws)
+   struct hubbub *hubbub)
 {
/* pstate latency is ~20us so if we wait over 40us and pstate allow
 * still not asserted, we are probably stuck and going to hang
@@ -139,7 +136,7 @@ void verify_allow_pstate_change_high(
if (debug_data & (1 << 30)) {
 
if (i > pstate_wait_expected_timeout_us)
-   dm_logger_write(hws->ctx->logger, LOG_WARNING,
+   dm_logger_write(hubbub->ctx->logger, 
LOG_WARNING,
"pstate took longer than 
expected ~%dus\n",
i);
 
@@ -160,10 +157,10 @@ void verify_allow_pstate_change_high(
forced_pstate_allow = true;
 
if (should_log_hw_state) {
-   dcn10_log_hw_state(hws->ctx->dc);
+   dcn10_log_hw_state(hubbub->ctx->dc);
}
 
-   dm_logger_write(hws->ctx->logger, LOG_WARNING,
+   dm_logger_write(hubbub->ctx->logger, LOG_WARNING,
"pstate TEST_DEBUG_DATA: 0x%X\n",
debug_data);
BREAK_TO_DEBUGGER();
@@ -186,11 +183,11 @@ static uint32_t convert_and_clamp(
 
 
 void program_watermarks(
-   struct dce_hwseq *hws,
+   struct hubbub *hubbub,
struct dcn_watermark_set *watermarks,
unsigned int refclk_mhz)
 {
-   uint32_t force_en = hws->ctx->dc->debug.disable_stutter ? 1 : 0;
+   uint32_t force_en = hubbub->ctx->dc->debug.disable_stutter ? 1 : 0;
/*
 * Need to clamp to max of the register values (i.e. no wrap)
 * for dcn1, all wm registers are 21-bit wide
@@ -206,7 +203,7 @@ void program_watermarks(
refclk_mhz, 0x1f);
REG_WRITE(DCHUBBUB_ARB_DATA_URGENCY_WATERMARK_A, prog_wm_value);
 
-   dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
+   dm_logger_write(hubbub->ctx->logger, LOG_BANDWIDTH_CALCS,
"URGENCY_WATERMARK_A calculated =%d\n"
"HW register value = 0x%x\n",
watermarks->a.urgent_ns, prog_wm_value);
@@ -214,7 +211,7 @@ void program_watermarks(
prog_wm_value = convert_and_clamp(watermarks->a.pte_meta_urgent_ns,
refclk_mhz, 0x1f);
REG_WRITE(DCHUBBUB_ARB_PTE_META_URGENCY_WATERMARK_A, prog_wm_value);
-   dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
+   dm_logger_write(hubbub->ctx->logger, LOG_BANDWIDTH_CALCS,
"PTE_META_URGENCY_WATERMARK_A calculated =%d\n"
"HW register value = 0x%x\n",
watermarks->a.pte_meta_urgent_ns, prog_wm_value);
@@ -224,7 +221,7 @@ void program_watermarks(

watermarks->a.cstate_pstate.cstate_enter_plus_exit_ns,
refclk_mhz, 0x1f);
REG_WRITE(DCHUBBUB_ARB_ALLOW_SR_ENTER_WATERMARK_A, 
prog_wm_value);
-   dm_logger_write(hws->ctx->logger, LOG_BANDWIDTH_CALCS,
+   dm_logger_write(hubbub->ctx->logger, LOG_BANDWIDTH_CALCS,
"SR_ENTER_EXIT_WATERMARK_A calculated =%d\n"
"HW register value = 0x%x\n",
   

[PATCH 13/29] drm/amd/display: dal 3.1.09

2017-10-26 Thread Harry Wentland
From: Tony Cheng 

Signed-off-by: Tony Cheng 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 32d71ef20c67..45874fa888fc 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -38,7 +38,7 @@
 #include "inc/compressor.h"
 #include "dml/display_mode_lib.h"
 
-#define DC_VER "3.1.08"
+#define DC_VER "3.1.09"
 
 #define MAX_SURFACES 3
 #define MAX_STREAMS 6
-- 
2.14.1

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[PATCH 10/29] drm/amd/display: dal 3.1.08

2017-10-26 Thread Harry Wentland
From: Tony Cheng 

Signed-off-by: Tony Cheng 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 9ca838b3c4d7..32d71ef20c67 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -38,7 +38,7 @@
 #include "inc/compressor.h"
 #include "dml/display_mode_lib.h"
 
-#define DC_VER "3.1.07"
+#define DC_VER "3.1.08"
 
 #define MAX_SURFACES 3
 #define MAX_STREAMS 6
-- 
2.14.1

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[PATCH 07/29] drm/amd/display: Reject PPLib clock values if they are invalid

2017-10-26 Thread Harry Wentland
From: Andrew Jiang 

We should be sticking with the default clock values if the values
obtained from PPLib are bogus.

Signed-off-by: Andrew Jiang 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c | 68 
 1 file changed, 45 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c 
b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
index e1515230c661..01f92f88aea8 100644
--- a/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
+++ b/drivers/gpu/drm/amd/display/dc/calcs/dcn_calcs.c
@@ -1231,40 +1231,62 @@ unsigned int dcn_find_dcfclk_suits_all(
return dcf_clk;
 }
 
+static bool verify_clock_values(struct dm_pp_clock_levels_with_voltage *clks)
+{
+   int i;
+
+   if (clks->num_levels == 0)
+   return false;
+
+   for (i = 0; i < clks->num_levels; i++)
+   /* Ensure that the result is sane */
+   if (clks->data[i].clocks_in_khz == 0)
+   return false;
+
+   return true;
+}
+
 void dcn_bw_update_from_pplib(struct dc *dc)
 {
struct dc_context *ctx = dc->ctx;
-   struct dm_pp_clock_levels_with_voltage clks = {0};
+   struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0};
+   bool res;
 
kernel_fpu_begin();
 
/* TODO: This is not the proper way to obtain 
fabric_and_dram_bandwidth, should be min(fclk, memclk) */
-
-   if (dm_pp_get_clock_levels_by_type_with_voltage(
-   ctx, DM_PP_CLOCK_TYPE_FCLK, ) &&
-   clks.num_levels != 0) {
-   ASSERT(clks.num_levels >= 3);
-   dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 = 32 * 
(clks.data[0].clocks_in_khz / 1000.0) / 1000.0;
-   if (clks.num_levels > 2) {
-   dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72 = 
dc->dcn_soc->number_of_channels *
-   (clks.data[clks.num_levels - 
3].clocks_in_khz / 1000.0) * ddr4_dram_factor_single_Channel / 1000.0;
-   } else {
-   dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72 = 
dc->dcn_soc->number_of_channels *
-   (clks.data[clks.num_levels - 
2].clocks_in_khz / 1000.0) * ddr4_dram_factor_single_Channel / 1000.0;
-   }
+   res = dm_pp_get_clock_levels_by_type_with_voltage(
+   ctx, DM_PP_CLOCK_TYPE_FCLK, );
+
+   if (res)
+   res = verify_clock_values();
+
+   if (res) {
+   ASSERT(fclks.num_levels >= 3);
+   dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 = 32 * 
(fclks.data[0].clocks_in_khz / 1000.0) / 1000.0;
+   dc->dcn_soc->fabric_and_dram_bandwidth_vmid0p72 = 
dc->dcn_soc->number_of_channels *
+   (fclks.data[fclks.num_levels - 
(fclks.num_levels > 2 ? 3 : 2)].clocks_in_khz / 1000.0)
+   * ddr4_dram_factor_single_Channel / 1000.0;
dc->dcn_soc->fabric_and_dram_bandwidth_vnom0p8 = 
dc->dcn_soc->number_of_channels *
-   (clks.data[clks.num_levels - 2].clocks_in_khz / 
1000.0) * ddr4_dram_factor_single_Channel / 1000.0;
+   (fclks.data[fclks.num_levels - 2].clocks_in_khz 
/ 1000.0)
+   * ddr4_dram_factor_single_Channel / 1000.0;
dc->dcn_soc->fabric_and_dram_bandwidth_vmax0p9 = 
dc->dcn_soc->number_of_channels *
-   (clks.data[clks.num_levels - 1].clocks_in_khz / 
1000.0) * ddr4_dram_factor_single_Channel / 1000.0;
+   (fclks.data[fclks.num_levels - 1].clocks_in_khz 
/ 1000.0)
+   * ddr4_dram_factor_single_Channel / 1000.0;
} else
BREAK_TO_DEBUGGER();
-   if (dm_pp_get_clock_levels_by_type_with_voltage(
-   ctx, DM_PP_CLOCK_TYPE_DCFCLK, ) &&
-   clks.num_levels >= 3) {
-   dc->dcn_soc->dcfclkv_min0p65 = clks.data[0].clocks_in_khz / 
1000.0;
-   dc->dcn_soc->dcfclkv_mid0p72 = clks.data[clks.num_levels - 
3].clocks_in_khz / 1000.0;
-   dc->dcn_soc->dcfclkv_nom0p8 = clks.data[clks.num_levels - 
2].clocks_in_khz / 1000.0;
-   dc->dcn_soc->dcfclkv_max0p9 = clks.data[clks.num_levels - 
1].clocks_in_khz / 1000.0;
+
+   res = dm_pp_get_clock_levels_by_type_with_voltage(
+   ctx, DM_PP_CLOCK_TYPE_DCFCLK, );
+
+   if (res)
+   res = verify_clock_values();
+
+   if (res && dcfclks.num_levels >= 3) {
+   dc->dcn_soc->dcfclkv_min0p65 = dcfclks.data[0].clocks_in_khz / 
1000.0;
+   dc->dcn_soc->dcfclkv_mid0p72 = dcfclks.data[dcfclks.num_levels 
- 3].clocks_in_khz / 1000.0;
+ 

[PATCH 11/29] drm/amd/display: Use constants from atom.h for HDMI caps read

2017-10-26 Thread Harry Wentland
From: Andrew Jiang 

Get rid of the constant we copied over before and just directly use the
constants from the file.

Signed-off-by: Andrew Jiang 
Reviewed-by: Tony Cheng 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index b2ba1c215b44..18294df189b3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -24,6 +24,7 @@
  */
 
 #include "dm_services.h"
+#include "atom.h"
 #include "dm_helpers.h"
 #include "dc.h"
 #include "grph_object_id.h"
@@ -45,7 +46,6 @@
 #include "dce/dce_11_0_enum.h"
 #include "dce/dce_11_0_sh_mask.h"
 
-#define EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK   0x007C /* Copied from 
atombios.h */
 #define LINK_INFO(...) \
dm_logger_write(dc_ctx->logger, LOG_HW_HOTPLUG, \
__VA_ARGS__)
@@ -1696,7 +1696,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
if (dc_is_hdmi_signal(pipe_ctx->stream->signal)) {
unsigned short masked_chip_caps = 
pipe_ctx->stream->sink->link->chip_caps &
EXT_DISPLAY_PATH_CAPS__EXT_CHIP_MASK;
-   if (masked_chip_caps == (0x2 << 2)) {
+   if (masked_chip_caps == 
EXT_DISPLAY_PATH_CAPS__HDMI20_TISN65DP159RSBT) {
/* DP159, Retimer settings */
eng_id = pipe_ctx->stream_res.stream_enc->id;
 
@@ -1707,7 +1707,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx)
write_i2c_default_retimer_setting(pipe_ctx,
is_vga_mode, is_over_340mhz);
}
-   } else if (masked_chip_caps == (0x1 << 2)) {
+   } else if (masked_chip_caps == 
EXT_DISPLAY_PATH_CAPS__HDMI20_PI3EQX1204) {
/* PI3EQX1204, Redriver settings */
write_i2c_redriver_setting(pipe_ctx, is_over_340mhz);
}
-- 
2.14.1

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[PATCH 01/29] drm/amdgpu: Remove immutable flag from freesync_capable property

2017-10-26 Thread Harry Wentland
Atomic drivers should not use legacy properties but atomic properties
don't support the immutable flag. Remove the immutable flag for now.

This will be followed by a bunch of DC patches to start treating
freesync_capable as an atomic property on a connector_state.

Eventually we'll want to remove the these properties and replace them
with new atomic adaptive sync properties that we define in DRM.

Signed-off-by: Harry Wentland 
Reviewed-by: Andrey Grodzovsky 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6744e0cd1373..d704a45c866b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -638,7 +638,7 @@ int amdgpu_modeset_create_props(struct amdgpu_device *adev)
return -ENOMEM;
adev->mode_info.freesync_capable_property =
drm_property_create_bool(adev->ddev,
-DRM_MODE_PROP_IMMUTABLE,
+0,
 "freesync_capable");
if (!adev->mode_info.freesync_capable_property)
return -ENOMEM;
-- 
2.14.1

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[PATCH 02/29] drm/amd/display: Fix styling of freesync code in commit_tail

2017-10-26 Thread Harry Wentland
From: "Leo (Sunpeng) Li" 

For better readability.

Signed-off-by: Leo (Sunpeng) Li 
Reviewed-by: Bhawanpreet Lakha 
Acked-by: Harry Wentland 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2188f205eed2..442b399a9400 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -4111,7 +4111,8 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
 * are removed from freesync module
 */
if (adev->dm.freesync_module) {
-   for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, 
new_crtc_state, i) {
+   for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state,
+ new_crtc_state, i) {
struct amdgpu_dm_connector *aconnector = NULL;
struct dm_connector_state *dm_new_con_state = NULL;
struct amdgpu_crtc *acrtc = NULL;
@@ -4139,9 +4140,11 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
amdgpu_dm_find_first_crtc_matching_connector(
state, crtc);
if (!aconnector) {
-   DRM_DEBUG_DRIVER("Atomic commit: Failed to find 
connector for acrtc id:%d "
-"skipping freesync init\n",
-acrtc->crtc_id);
+   DRM_DEBUG_DRIVER("Atomic commit: Failed to "
+"find connector for acrtc "
+"id:%d skipping freesync "
+"init\n",
+acrtc->crtc_id);
continue;
}
 
-- 
2.14.1

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Re: [PATCH 02/16] drm/amdkfd: Don't dereference kfd_process.mm

2017-10-26 Thread Christian König

Am 26.10.2017 um 18:47 schrieb Felix Kuehling:

On 2017-10-26 03:33 AM, Christian König wrote:

Am 21.10.2017 um 02:23 schrieb Felix Kuehling:

The kfd_process doesn't own a reference to the mm_struct, so it can
disappear without warning even while the kfd_process still exists.
In fact, the delayed kfd_process teardown is triggered by an MMU
notifier when the mm_struct is destroyed. Permanently holding a
reference to the mm_struct would prevent this from happening.

Therefore, avoid dereferencing the kfd_process.mm pointer and make
it opaque. Use get_task_mm to get a temporary reference to the mm
when it's needed.

Actually that patch is unnecessary.

Process tear down (and calling the MMU release callback) is triggered
when mm_struct->mm_users reaches zero.

The mm_struct is freed up when mm_struct->mm_count becomes zero.

So what you can do is grab a reference to the mm_struct with mmgrab()
and still be notified by process tear down.

Hmm, the mm_struct has two different reference counters. So if I grab
the right type of reference it would work. Either way, one of two
changes is needed:

   * Take a permanent reference to the mm-struct, or
   * Don't dereference the mm pointer because I'm not holding a reference

IMO, KFD doesn't need to hold a reference to the mm_struct permanently.


Ah! From the patch description I was assuming that you took a reference 
(but the wrong one) and tried to fix a memory leak with that approach.



So I believe my change still makes sense. I should probably just remove
the comment "Permanently holding a reference to the mm_struct would
prevent ...". Like you say, that's not accurate.


Yeah, good idea.

But now reading the patch there is something else which I stumbled over:

+    /*
+ * This cast should be safe here because we grabbed a
+ * reference to the mm in kfd_process_notifier_release
+ */
+    WARN_ON(atomic_read(&((struct mm_struct *)p->mm)->mm_count) <= 0);
     mmdrop(p->mm);
Well that isn't good coding style. You shouldn't obfuscate what pointer 
it is by changing it to "void*", but rather set it to NULL as soon as 
you know that it is stale.


Additional to that it is certainly not job of the driver to warn on a 
run over mm_count.


Regards,
Christian.



Regards,
   Felix


Regards,
Christian.


Signed-off-by: Felix Kuehling 
---
   drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 19 +++
   drivers/gpu/drm/amd/amdkfd/kfd_priv.h    |  7 ++-
   drivers/gpu/drm/amd/amdkfd/kfd_process.c |  6 +-
   3 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index 944abfa..61ce547 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
@@ -24,8 +24,8 @@
   #include 
   #include 
   #include 
+#include 
   #include 
-#include 
   #include 
   #include 
   #include "kfd_priv.h"
@@ -904,14 +904,24 @@ void kfd_signal_iommu_event(struct kfd_dev
*dev, unsigned int pasid,
    * running so the lookup function returns a locked process.
    */
   struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
+    struct mm_struct *mm;
     if (!p)
   return; /* Presumably process exited. */
   +    /* Take a safe reference to the mm_struct, which may otherwise
+ * disappear even while the kfd_process is still referenced.
+ */
+    mm = get_task_mm(p->lead_thread);
+    if (!mm) {
+    mutex_unlock(>mutex);
+    return; /* Process is exiting */
+    }
+
   memset(_exception_data, 0, sizeof(memory_exception_data));
   -    down_read(>mm->mmap_sem);
-    vma = find_vma(p->mm, address);
+    down_read(>mmap_sem);
+    vma = find_vma(mm, address);
     memory_exception_data.gpu_id = dev->id;
   memory_exception_data.va = address;
@@ -937,7 +947,8 @@ void kfd_signal_iommu_event(struct kfd_dev *dev,
unsigned int pasid,
   }
   }
   -    up_read(>mm->mmap_sem);
+    up_read(>mmap_sem);
+    mmput(mm);
     mutex_lock(>event_mutex);
   diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
index 7d86ec9..1a483a7 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -494,7 +494,12 @@ struct kfd_process {
    */
   struct hlist_node kfd_processes;
   -    struct mm_struct *mm;
+    /*
+ * Opaque pointer to mm_struct. We don't hold a reference to
+ * it so it should never be dereferenced from here. This is
+ * only used for looking up processes by their mm.
+ */
+    void *mm;
     struct mutex mutex;
   diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
index 3ccb3b5..21d27e5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -200,7 +200,11 @@ static void kfd_process_destroy_delayed(struct
rcu_head *rcu)
   struct kfd_process 

RE: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> amdgpu_ttm_bind
> 
> From: Christian König 
> 
> Just unbind and rebind to force updates of the GART space.
> 
> This prevents forcing the BO to be idle.

Is there a chance something could change like the caching on a  rebind that we 
need to account for?

Alex

> 
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++-
> -
>  1 file changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 3045701..b40d2f3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
> *bo, struct ttm_mem_reg *bo_mem)
>   if (unlikely(r))
>   return r;
> 
> - r = ttm_bo_move_ttm(bo, true, false, );
> - if (unlikely(r))
> + if (ttm->state == tt_bound) {
> + r = ttm->func->unbind(ttm);
> + if (unlikely(r))
> + return r;
> +
> + ttm->state = tt_unbound;
> + }
> +
> + r = ttm_tt_bind(ttm, );
> + if (unlikely(r)) {
>   ttm_bo_mem_put(bo, );
> - else
> - bo->offset = (bo->mem.start << PAGE_SHIFT) +
> - bo->bdev->man[bo->mem.mem_type].gpu_offset;
> + return r;
> + }
> 
> - return r;
> + ttm_bo_mem_put(bo, bo_mem);
> + bo->mem = tmp;
> + bo->offset = (bo->mem.start << PAGE_SHIFT) +
> + bo->bdev->man[bo->mem.mem_type].gpu_offset;
> +
> + return 0;
>  }
> 
>  int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
> --
> 2.7.4
> 
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

2017-10-26 Thread Andrey Grodzovsky

Reviewed-by: Andrey Grodzovsky


On 2017-10-26 12:06 PM, Christian König wrote:

From: Christian König 

Just set the bit so that DC does the hardware programming.

Signed-off-by: Christian König 
---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2188f20..ed4351a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
  
  	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
  
+	init_data.flags.gpu_vm_support = true;

+
if (amdgpu_dc_log)
init_data.log_mask = DC_DEFAULT_LOG_MASK;
else


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RE: [PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as well

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as
> well
> 
> From: Christian König 
> 
> On CZ and newer APUs we can pin the fb into GART as well as VRAM.
> 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 13 -
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13
> ++---
>  4 files changed, 29 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 6744e0c..71823f7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -29,6 +29,7 @@
>  #include "amdgpu_i2c.h"
>  #include "atom.h"
>  #include "amdgpu_connectors.h"
> +#include "amdgpu_display.h"
>  #include 
> 
>  #include 
> @@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc
> *crtc,
>   goto cleanup;
>   }
> 
> - r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM,
> );
> + r = amdgpu_bo_pin(new_abo,
> amdgpu_framebuffer_domains(adev), );
>   if (unlikely(r != 0)) {
>   DRM_ERROR("failed to pin new abo buffer before flip\n");
>   goto unreserve;
> @@ -501,6 +502,16 @@ static const struct drm_framebuffer_funcs
> amdgpu_fb_funcs = {
>   .create_handle = amdgpu_user_framebuffer_create_handle,
>  };
> 
> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
> +{
> + uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
> +
> + if (adev->asic_type >= CHIP_CARRIZO && adev->flags &
> AMD_IS_APU)
> + domain |= AMDGPU_GEM_DOMAIN_GTT;
> +
> + return domain;
> +}
> +
>  int
>  amdgpu_framebuffer_init(struct drm_device *dev,
>   struct amdgpu_framebuffer *rfb,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> index 11ae4ab..f241949 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> @@ -23,6 +23,7 @@
>  #ifndef __AMDGPU_DISPLAY_H__
>  #define __AMDGPU_DISPLAY_H__
> 
> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
>  struct drm_framebuffer *
>  amdgpu_user_framebuffer_create(struct drm_device *dev,
>  struct drm_file *file_priv,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index 90fa8e8..9be3228 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -38,6 +38,8 @@
> 
>  #include 
> 
> +#include "amdgpu_display.h"
> +
>  /* object hierarchy -
> this contains a helper + a amdgpu fb
> the helper contains a pointer to amdgpu framebuffer baseclass.
> @@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>   struct drm_gem_object *gobj = NULL;
>   struct amdgpu_bo *abo = NULL;
>   bool fb_tiled = false; /* useful for testing */
> - u32 tiling_flags = 0;
> + u32 tiling_flags = 0, domain;
>   int ret;
>   int aligned_size, size;
>   int height = mode_cmd->height;
> @@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>   /* need to align pitch with crtc limits */
>   mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd-
> >width, cpp,
> fb_tiled);
> + domain = amdgpu_framebuffer_domains(adev);
> 
>   height = ALIGN(mode_cmd->height, 8);
>   size = mode_cmd->pitches[0] * height;
>   aligned_size = ALIGN(size, PAGE_SIZE);
> - ret = amdgpu_gem_object_create(adev, aligned_size, 0,
> -AMDGPU_GEM_DOMAIN_VRAM,
> + ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
> 
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> 
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
> 
> AMDGPU_GEM_CREATE_VRAM_CLEARED,
> @@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>   }
> 
> 
> - ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM,
> NULL);
> + ret = amdgpu_bo_pin(abo, domain, NULL);
>   if (ret) {
>   amdgpu_bo_unreserve(abo);
>   goto out_unref;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index ed4351a..f42804a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2934,10 +2934,12 @@ 

RE: [PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h
> 
> From: Christian König 
> 
> That was somehow completely of.
> 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> index 3cc0ef0..11ae4ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> @@ -25,9 +25,8 @@
> 
>  struct drm_framebuffer *
>  amdgpu_user_framebuffer_create(struct drm_device *dev,
> -struct drm_file 
> *file_priv,
> -const struct
> drm_mode_fb_cmd2 *mode_cmd);
> -
> +struct drm_file *file_priv,
> +const struct drm_mode_fb_cmd2 *mode_cmd);
>  void amdgpu_output_poll_changed(struct drm_device *dev);
> 
>  #endif
> --
> 2.7.4
> 
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RE: [PATCH 6/8] drm/amd/display: enable GPU VM support

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 6/8] drm/amd/display: enable GPU VM support
> 
> From: Christian König 
> 
> Just set the bit so that DC does the hardware programming.
> 
> Signed-off-by: Christian König 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2188f20..ed4351a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device
> *adev)
> 
>   init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
> 
> + init_data.flags.gpu_vm_support = true;
> +
>   if (amdgpu_dc_log)
>   init_data.log_mask = DC_DEFAULT_LOG_MASK;
>   else
> --
> 2.7.4
> 
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RE: [PATCH 2/8] drm/amdgpu: always bind pinned BOs

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 2/8] drm/amdgpu: always bind pinned BOs
> 
> From: Christian König 
> 
> We always need to bind pinned BOs, not just when the caller requested the
> address.
> 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

Should this go to stable as well?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++---
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 76551cd..0b76d83 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>   goto error;
>   }
> 
> + r = amdgpu_ttm_bind(>tbo, >tbo.mem);
> + if (unlikely(r)) {
> + dev_err(adev->dev, "%p bind failed\n", bo);
> + goto error;
> + }
> +
>   bo->pin_count = 1;
> - if (gpu_addr != NULL) {
> - r = amdgpu_ttm_bind(>tbo, >tbo.mem);
> - if (unlikely(r)) {
> - dev_err(adev->dev, "%p bind failed\n", bo);
> - goto error;
> - }
> + if (gpu_addr != NULL)
>   *gpu_addr = amdgpu_bo_gpu_offset(bo);
> - }
> 
>   domain = amdgpu_mem_type_to_domain(bo-
> >tbo.mem.mem_type);
>   if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
> --
> 2.7.4
> 
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RE: [PATCH 3/8] drm/amdgpu: fix pin domain compatibility check

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 3/8] drm/amdgpu: fix pin domain compatibility check
> 
> From: Christian König 
> 
> We need to test if any domain fits, not all of them.
> 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 0b76d83..65289de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -647,7 +647,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>   if (bo->pin_count) {
>   uint32_t mem_type = bo->tbo.mem.mem_type;
> 
> - if (domain != amdgpu_mem_type_to_domain(mem_type))
> + if (!(domain &
> amdgpu_mem_type_to_domain(mem_type)))
>   return -EINVAL;
> 
>   bo->pin_count++;
> --
> 2.7.4
> 
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RE: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
> GART space
> 
> From: Christian König 
> 
> Display can't seem to handle this correctly.
> 
> Signed-off-by: Christian König 

Acked-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e5cab4b..3045701 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
> struct ttm_mem_reg *bo_mem)
>   placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
> |
>   TTM_PL_FLAG_TT;
> 
> - r = ttm_bo_mem_space(bo, , , true, false);
> + r = ttm_bo_mem_space(bo, , , false, false);
>   if (unlikely(r))
>   return r;
> 
> --
> 2.7.4
> 
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RE: [PATCH 1/8] drm/amdgpu: use the actual placement for pin accounting

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 1/8] drm/amdgpu: use the actual placement for pin
> accounting
> 
> From: Christian König 
> 
> This allows us to specify multiple possible placements again.
> 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index e527c16..76551cd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -697,6 +697,8 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>   }
>   *gpu_addr = amdgpu_bo_gpu_offset(bo);
>   }
> +
> + domain = amdgpu_mem_type_to_domain(bo-
> >tbo.mem.mem_type);
>   if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
>   adev->vram_pin_size += amdgpu_bo_size(bo);
>   if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
> --
> 2.7.4
> 
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Re: [pull] amdgpu dc drm-next-4.15-dc

2017-10-26 Thread Alex Deucher
On Thu, Oct 26, 2017 at 10:10 AM, Dieter Nützel  wrote:
> Hello Alex & Rex,
>
> any progress?
> The 'screen blank' (monitor standby mode) is really annoying.

Does this patch help?
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=amd-staging-drm-next=ddabbf65aae36e21b4c79354940f80eae6c36104

Alex

>
> Thanks,
> Dieter
>
> Am 23.10.2017 03:03, schrieb Dieter Nützel:
>>
>> Am 22.10.2017 23:48, schrieb Dieter Nützel:
>>>
>>> Am 21.10.2017 23:22, schrieb Alex Deucher:

 Hi Dave,

 Last batch of new stuff for DC. Highlights:
 - Fix some memory leaks
 - S3 fixes
 - Hotplug fixes
 - Fix some CX multi-display issues
 - MST fixes
 - DML updates from the hw team
 - Various code cleanups
 - Misc bug fixes
>>>
>>>
>>> Now this tree has the same fan regression as 'amd-staging-drm-next'
>>> startet with 0944c350c8eddf4064e7abb881dd245032fdfa23.
>>>
>>> Look here:
>>> [amd-staging-drm-next] regression - no fan info (sensors) on RX580
>>> https://lists.freedesktop.org/archives/amd-gfx/2017-October/014065.html
>>>
>>> Second:
>>> KDE's greeter 'kdm_greet' (login screen went into dpms) and KDE's
>>> 'screen blank' (energy saving / dpms off) never came back. All I can
>>> do is a clean reboot. So I have to disable all 'dpms'.
>>> But I could attach gdb remotely on it.
>>> 'kdm_greet' hang in 'poll'.
>>> Nothing alarming in 'dmesg' and 'Xorg.0.log'. (Both available taken
>>> from 'amd-staging-drm-next' if needed).
>>
>>
>> Hello Alex and Rex,
>>
>> I've found good hint from Jan (randomsalad) on phoronix for the
>> 'screen blank' (monitor standby mode):
>>
>> https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984555#post984555
>>
>> My Reply:
>>
>> https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984581#post984581
>>
>> I can swear, that I could 'return' one time (the first time, maybe due
>> to only warm reboot) on 'drm-next-4.15-dc-wip' directly from within
>> KDE session with replugging the video cable, but for all later tests
>> on both kernels I have to blindly switching back to login screen
>> (kdm_greet) and then replugging the video cable.
>>
>> For me these regression started with 'amd-staging-drm-next' much
>> earlier than with the latest commit.
>>
>> Dieter
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Re: Upstream repo for libhsakmt

2017-10-26 Thread Felix Kuehling
If a pull request would be a set of patches, that would be lots of
patches. The freedesktop.org repository has an amd-staging branch that
seems to be the closest to my WIP branch. The difference is 84 patches.

Regards,
  Felix


On 2017-10-26 03:48 AM, Oded Gabbay wrote:
> I have no problem.
> Do you think you could send me a pull request ?
>
> In any case, we probably should add more people to the project's git
> access list.
>
> Oded
>
> On Thu, Oct 26, 2017 at 6:37 AM, Tom Stellard  wrote:
>> On 10/24/2017 10:24 AM, Oded Gabbay wrote:
>>> Hi Tom,
>>> I have commit access.
>> What do you think about merging Felix's branch?
>>
>> -Tom
>>
>>> Oded
>>>
>>> On Oct 24, 2017 7:30 PM, "Tom Stellard" >> > wrote:
>>>
>>> On 10/17/2017 09:14 AM, Andres Rodriguez wrote:
>>> > If I remember correctly, it should be John B.
>>> >
>>>
>>> Hi John,
>>>
>>> Do you have commit access for this repo:
>>>
>>> https://cgit.freedesktop.org/amd/hsakmt/ 
>>> 
>>>
>>> Thanks,
>>> Tom
>>>
>>> > Regards,
>>> > Andres
>>> >
>>> > On 2017-10-17 11:42 AM, Felix Kuehling wrote:
>>> >> I didn't even know about the freedesktop repository. Do you know who 
>>> has
>>> >> commit access to that?
>>> >>
>>> >> Regards,
>>> >>Felix
>>> >>
>>> >>
>>> >> On 2017-10-16 10:44 PM, Tom Stellard wrote:
>>> >>> Hi Felix,
>>> >>>
>>> >>> What do you think about merging your fxkamd/drm-next-wip into the
>>> >>> master branch of the hsakmt repository of freedesktop[1]?
>>> >>>
>>> >>> Fedora is already packaging code from the freedesktop repository,
>>> >>> and it might help to distinguish between the ROCm thunk and the 
>>> upstream
>>> >>> thunk by keeping them in separate repos.
>>> >>>
>>> >>> -Tom
>>> >>>
>>> >>> [1]https://cgit.freedesktop.org/amd/hsakmt/ 
>>> 
>>> >>
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>>> >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx 
>>> 
>>> >>
>>>
>>>
>>>
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Re: [PATCH 02/16] drm/amdkfd: Don't dereference kfd_process.mm

2017-10-26 Thread Felix Kuehling
On 2017-10-26 03:33 AM, Christian König wrote:
> Am 21.10.2017 um 02:23 schrieb Felix Kuehling:
>> The kfd_process doesn't own a reference to the mm_struct, so it can
>> disappear without warning even while the kfd_process still exists.
>> In fact, the delayed kfd_process teardown is triggered by an MMU
>> notifier when the mm_struct is destroyed. Permanently holding a
>> reference to the mm_struct would prevent this from happening.
>>
>> Therefore, avoid dereferencing the kfd_process.mm pointer and make
>> it opaque. Use get_task_mm to get a temporary reference to the mm
>> when it's needed.
>
> Actually that patch is unnecessary.
>
> Process tear down (and calling the MMU release callback) is triggered
> when mm_struct->mm_users reaches zero.
>
> The mm_struct is freed up when mm_struct->mm_count becomes zero.
>
> So what you can do is grab a reference to the mm_struct with mmgrab()
> and still be notified by process tear down.

Hmm, the mm_struct has two different reference counters. So if I grab
the right type of reference it would work. Either way, one of two
changes is needed:

  * Take a permanent reference to the mm-struct, or
  * Don't dereference the mm pointer because I'm not holding a reference

IMO, KFD doesn't need to hold a reference to the mm_struct permanently.
So I believe my change still makes sense. I should probably just remove
the comment "Permanently holding a reference to the mm_struct would
prevent ...". Like you say, that's not accurate.

Regards,
  Felix

>
> Regards,
> Christian.
>
>>
>> Signed-off-by: Felix Kuehling 
>> ---
>>   drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 19 +++
>>   drivers/gpu/drm/amd/amdkfd/kfd_priv.h    |  7 ++-
>>   drivers/gpu/drm/amd/amdkfd/kfd_process.c |  6 +-
>>   3 files changed, 26 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
>> b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
>> index 944abfa..61ce547 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
>> @@ -24,8 +24,8 @@
>>   #include 
>>   #include 
>>   #include 
>> +#include 
>>   #include 
>> -#include 
>>   #include 
>>   #include 
>>   #include "kfd_priv.h"
>> @@ -904,14 +904,24 @@ void kfd_signal_iommu_event(struct kfd_dev
>> *dev, unsigned int pasid,
>>    * running so the lookup function returns a locked process.
>>    */
>>   struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
>> +    struct mm_struct *mm;
>>     if (!p)
>>   return; /* Presumably process exited. */
>>   +    /* Take a safe reference to the mm_struct, which may otherwise
>> + * disappear even while the kfd_process is still referenced.
>> + */
>> +    mm = get_task_mm(p->lead_thread);
>> +    if (!mm) {
>> +    mutex_unlock(>mutex);
>> +    return; /* Process is exiting */
>> +    }
>> +
>>   memset(_exception_data, 0, sizeof(memory_exception_data));
>>   -    down_read(>mm->mmap_sem);
>> -    vma = find_vma(p->mm, address);
>> +    down_read(>mmap_sem);
>> +    vma = find_vma(mm, address);
>>     memory_exception_data.gpu_id = dev->id;
>>   memory_exception_data.va = address;
>> @@ -937,7 +947,8 @@ void kfd_signal_iommu_event(struct kfd_dev *dev,
>> unsigned int pasid,
>>   }
>>   }
>>   -    up_read(>mm->mmap_sem);
>> +    up_read(>mmap_sem);
>> +    mmput(mm);
>>     mutex_lock(>event_mutex);
>>   diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>> b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>> index 7d86ec9..1a483a7 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
>> @@ -494,7 +494,12 @@ struct kfd_process {
>>    */
>>   struct hlist_node kfd_processes;
>>   -    struct mm_struct *mm;
>> +    /*
>> + * Opaque pointer to mm_struct. We don't hold a reference to
>> + * it so it should never be dereferenced from here. This is
>> + * only used for looking up processes by their mm.
>> + */
>> +    void *mm;
>>     struct mutex mutex;
>>   diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
>> b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
>> index 3ccb3b5..21d27e5 100644
>> --- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
>> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
>> @@ -200,7 +200,11 @@ static void kfd_process_destroy_delayed(struct
>> rcu_head *rcu)
>>   struct kfd_process *p;
>>     p = container_of(rcu, struct kfd_process, rcu);
>> -    WARN_ON(atomic_read(>mm->mm_count) <= 0);
>> +    /*
>> + * This cast should be safe here because we grabbed a
>> + * reference to the mm in kfd_process_notifier_release
>> + */
>> +    WARN_ON(atomic_read(&((struct mm_struct *)p->mm)->mm_count) <= 0);
>>     mmdrop(p->mm);
>>   
>
>

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[PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

2017-10-26 Thread Christian König
From: Christian König 

Just unbind and rebind to force updates of the GART space.

This prevents forcing the BO to be idle.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++--
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3045701..b40d2f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct 
ttm_mem_reg *bo_mem)
if (unlikely(r))
return r;
 
-   r = ttm_bo_move_ttm(bo, true, false, );
-   if (unlikely(r))
+   if (ttm->state == tt_bound) {
+   r = ttm->func->unbind(ttm);
+   if (unlikely(r))
+   return r;
+
+   ttm->state = tt_unbound;
+   }
+
+   r = ttm_tt_bind(ttm, );
+   if (unlikely(r)) {
ttm_bo_mem_put(bo, );
-   else
-   bo->offset = (bo->mem.start << PAGE_SHIFT) +
-   bo->bdev->man[bo->mem.mem_type].gpu_offset;
+   return r;
+   }
 
-   return r;
+   ttm_bo_mem_put(bo, bo_mem);
+   bo->mem = tmp;
+   bo->offset = (bo->mem.start << PAGE_SHIFT) +
+   bo->bdev->man[bo->mem.mem_type].gpu_offset;
+
+   return 0;
 }
 
 int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
-- 
2.7.4

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[PATCH 3/8] drm/amdgpu: fix pin domain compatibility check

2017-10-26 Thread Christian König
From: Christian König 

We need to test if any domain fits, not all of them.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 0b76d83..65289de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -647,7 +647,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
if (bo->pin_count) {
uint32_t mem_type = bo->tbo.mem.mem_type;
 
-   if (domain != amdgpu_mem_type_to_domain(mem_type))
+   if (!(domain & amdgpu_mem_type_to_domain(mem_type)))
return -EINVAL;
 
bo->pin_count++;
-- 
2.7.4

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[PATCH 6/8] drm/amd/display: enable GPU VM support

2017-10-26 Thread Christian König
From: Christian König 

Just set the bit so that DC does the hardware programming.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2188f20..ed4351a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
+   init_data.flags.gpu_vm_support = true;
+
if (amdgpu_dc_log)
init_data.log_mask = DC_DEFAULT_LOG_MASK;
else
-- 
2.7.4

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[PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as well

2017-10-26 Thread Christian König
From: Christian König 

On CZ and newer APUs we can pin the fb into GART as well as VRAM.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 13 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h   |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c| 10 ++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++---
 4 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6744e0c..71823f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -29,6 +29,7 @@
 #include "amdgpu_i2c.h"
 #include "atom.h"
 #include "amdgpu_connectors.h"
+#include "amdgpu_display.h"
 #include 
 
 #include 
@@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
goto cleanup;
}
 
-   r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, );
+   r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), );
if (unlikely(r != 0)) {
DRM_ERROR("failed to pin new abo buffer before flip\n");
goto unreserve;
@@ -501,6 +502,16 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs 
= {
.create_handle = amdgpu_user_framebuffer_create_handle,
 };
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
+{
+   uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
+
+   if (adev->asic_type >= CHIP_CARRIZO && adev->flags & AMD_IS_APU)
+   domain |= AMDGPU_GEM_DOMAIN_GTT;
+
+   return domain;
+}
+
 int
 amdgpu_framebuffer_init(struct drm_device *dev,
struct amdgpu_framebuffer *rfb,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 11ae4ab..f241949 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
   struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8..9be3228 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -38,6 +38,8 @@
 
 #include 
 
+#include "amdgpu_display.h"
+
 /* object hierarchy -
this contains a helper + a amdgpu fb
the helper contains a pointer to amdgpu framebuffer baseclass.
@@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
struct drm_gem_object *gobj = NULL;
struct amdgpu_bo *abo = NULL;
bool fb_tiled = false; /* useful for testing */
-   u32 tiling_flags = 0;
+   u32 tiling_flags = 0, domain;
int ret;
int aligned_size, size;
int height = mode_cmd->height;
@@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
/* need to align pitch with crtc limits */
mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
  fb_tiled);
+   domain = amdgpu_framebuffer_domains(adev);
 
height = ALIGN(mode_cmd->height, 8);
size = mode_cmd->pitches[0] * height;
aligned_size = ALIGN(size, PAGE_SIZE);
-   ret = amdgpu_gem_object_create(adev, aligned_size, 0,
-  AMDGPU_GEM_DOMAIN_VRAM,
+   ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
   AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
   AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
   AMDGPU_GEM_CREATE_VRAM_CLEARED,
@@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct 
amdgpu_fbdev *rfbdev,
}
 
 
-   ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
+   ret = amdgpu_bo_pin(abo, domain, NULL);
if (ret) {
amdgpu_bo_unreserve(abo);
goto out_unref;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ed4351a..f42804a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2934,10 +2934,12 @@ static int dm_plane_helper_prepare_fb(struct drm_plane 
*plane,
 {
struct amdgpu_framebuffer *afb;
struct drm_gem_object *obj;
+   struct amdgpu_device *adev;
struct amdgpu_bo *rbo;
-   int r;
struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old;
unsigned int awidth;
+   uint32_t domain;
+   int r;
 
dm_plane_state_old 

[PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h

2017-10-26 Thread Christian König
From: Christian König 

That was somehow completely of.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 3cc0ef0..11ae4ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -25,9 +25,8 @@
 
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
-  struct drm_file 
*file_priv,
-  const struct 
drm_mode_fb_cmd2 *mode_cmd);
-
+  struct drm_file *file_priv,
+  const struct drm_mode_fb_cmd2 *mode_cmd);
 void amdgpu_output_poll_changed(struct drm_device *dev);
 
 #endif
-- 
2.7.4

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[PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

2017-10-26 Thread Christian König
From: Christian König 

Display can't seem to handle this correctly.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e5cab4b..3045701 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct 
ttm_mem_reg *bo_mem)
placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM) |
TTM_PL_FLAG_TT;
 
-   r = ttm_bo_mem_space(bo, , , true, false);
+   r = ttm_bo_mem_space(bo, , , false, false);
if (unlikely(r))
return r;
 
-- 
2.7.4

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[PATCH 2/8] drm/amdgpu: always bind pinned BOs

2017-10-26 Thread Christian König
From: Christian König 

We always need to bind pinned BOs, not just when the caller requested the
address.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 76551cd..0b76d83 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
goto error;
}
 
+   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
+   if (unlikely(r)) {
+   dev_err(adev->dev, "%p bind failed\n", bo);
+   goto error;
+   }
+
bo->pin_count = 1;
-   if (gpu_addr != NULL) {
-   r = amdgpu_ttm_bind(>tbo, >tbo.mem);
-   if (unlikely(r)) {
-   dev_err(adev->dev, "%p bind failed\n", bo);
-   goto error;
-   }
+   if (gpu_addr != NULL)
*gpu_addr = amdgpu_bo_gpu_offset(bo);
-   }
 
domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
-- 
2.7.4

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[PATCH 1/8] drm/amdgpu: use the actual placement for pin accounting

2017-10-26 Thread Christian König
From: Christian König 

This allows us to specify multiple possible placements again.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index e527c16..76551cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -697,6 +697,8 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 
domain,
}
*gpu_addr = amdgpu_bo_gpu_offset(bo);
}
+
+   domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
adev->vram_pin_size += amdgpu_bo_size(bo);
if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
-- 
2.7.4

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Re: [PATCH] drm/amd/display: Remove fb_location parameter from get_fb_info

2017-10-26 Thread Christian König

Am 26.10.2017 um 17:09 schrieb Michel Dänzer:

From: Michel Dänzer 

It's dead code.

Signed-off-by: Michel Dänzer 


Just wanted to do the same thing while working on GART scanout on CZ.

Patch is Reviewed-by: Christian König .

Christian.


---
  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++---
  1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 91876e0fd85b..f2e3c37845fc 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1746,8 +1746,7 @@ static bool fill_rects_from_plane_state(const struct 
drm_plane_state *state,
return true;
  }
  static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb,
-  uint64_t *tiling_flags,
-  uint64_t *fb_location)
+  uint64_t *tiling_flags)
  {
struct amdgpu_bo *rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
int r = amdgpu_bo_reserve(rbo, false);
@@ -1759,9 +1758,6 @@ static int get_fb_info(const struct amdgpu_framebuffer 
*amdgpu_fb,
return r;
}
  
-	if (fb_location)

-   *fb_location = amdgpu_bo_gpu_offset(rbo);
-
if (tiling_flags)
amdgpu_bo_get_tiling_flags(rbo, tiling_flags);
  
@@ -1772,8 +1768,7 @@ static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb,
  
  static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,

 struct dc_plane_state *plane_state,
-const struct amdgpu_framebuffer 
*amdgpu_fb,
-bool addReq)
+const struct amdgpu_framebuffer 
*amdgpu_fb)
  {
uint64_t tiling_flags;
uint64_t fb_location = 0;
@@ -1785,8 +1780,7 @@ static int fill_plane_attributes_from_fb(struct 
amdgpu_device *adev,
  
  	ret = get_fb_info(

amdgpu_fb,
-   _flags,
-   addReq == true ? _location:NULL);
+   _flags);
  
  	if (ret)

return ret;
@@ -1956,8 +1950,7 @@ static void fill_gamma_from_crtc_state(const struct 
drm_crtc_state *crtc_state,
  static int fill_plane_attributes(struct amdgpu_device *adev,
 struct dc_plane_state *dc_plane_state,
 struct drm_plane_state *plane_state,
-struct drm_crtc_state *crtc_state,
-bool addrReq)
+struct drm_crtc_state *crtc_state)
  {
const struct amdgpu_framebuffer *amdgpu_fb =
to_amdgpu_framebuffer(plane_state->fb);
@@ -1971,8 +1964,7 @@ static int fill_plane_attributes(struct amdgpu_device 
*adev,
ret = fill_plane_attributes_from_fb(
crtc->dev->dev_private,
dc_plane_state,
-   amdgpu_fb,
-   addrReq);
+   amdgpu_fb);
  
  	if (ret)

return ret;
@@ -4663,8 +4655,7 @@ static int dm_update_planes_state(struct dc *dc,
new_plane_crtc->dev->dev_private,
dm_new_plane_state->dc_state,
new_plane_state,
-   new_crtc_state,
-   false);
+   new_crtc_state);
if (ret)
return ret;
  



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Re: [PATCH 1/3] amdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcs

2017-10-26 Thread Christian König

Am 26.10.2017 um 16:46 schrieb Michel Dänzer:

From: Michel Dänzer 

Hardcoding the maximum numbers could result in spurious error messages
from the IRQ state callbacks, e.g. on Polaris 11/12:

[drm:dce_v11_0_set_pageflip_irq_state [amdgpu]] *ERROR* invalid pageflip crtc 5
[drm:amdgpu_irq_disable_all [amdgpu]] *ERROR* error disabling interrupt (-22)

Signed-off-by: Michel Dänzer 


Acked-by: Christian König  for the whole series.


---
  drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 
  drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12 
  drivers/gpu/drm/amd/amdgpu/dce_v6_0.c  | 12 
  drivers/gpu/drm/amd/amdgpu/dce_v8_0.c  | 12 
  4 files changed, 32 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4e519dc42916..f3dd6b7bfd4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2773,7 +2773,6 @@ static int dce_v10_0_early_init(void *handle)
adev->audio_endpt_wreg = _v10_0_audio_endpt_wreg;
  
  	dce_v10_0_set_display_funcs(adev);

-   dce_v10_0_set_irq_funcs(adev);
  
  	adev->mode_info.num_crtc = dce_v10_0_get_num_crtc(adev);
  
@@ -2788,6 +2787,8 @@ static int dce_v10_0_early_init(void *handle)

return -EINVAL;
}
  
+	dce_v10_0_set_irq_funcs(adev);

+
return 0;
  }
  
@@ -3635,13 +3636,16 @@ static const struct amdgpu_irq_src_funcs dce_v10_0_hpd_irq_funcs = {
  
  static void dce_v10_0_set_irq_funcs(struct amdgpu_device *adev)

  {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v10_0_crtc_irq_funcs;
  
-	adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;

+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
adev->pageflip_irq.funcs = _v10_0_pageflip_irq_funcs;
  
-	adev->hpd_irq.num_types = AMDGPU_HPD_LAST;

+   adev->hpd_irq.num_types = adev->mode_info.num_hpd;
adev->hpd_irq.funcs = _v10_0_hpd_irq_funcs;
  }
  
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c

index 11edc75edaa9..be25706e5f07 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2876,7 +2876,6 @@ static int dce_v11_0_early_init(void *handle)
adev->audio_endpt_wreg = _v11_0_audio_endpt_wreg;
  
  	dce_v11_0_set_display_funcs(adev);

-   dce_v11_0_set_irq_funcs(adev);
  
  	adev->mode_info.num_crtc = dce_v11_0_get_num_crtc(adev);
  
@@ -2903,6 +2902,8 @@ static int dce_v11_0_early_init(void *handle)

return -EINVAL;
}
  
+	dce_v11_0_set_irq_funcs(adev);

+
return 0;
  }
  
@@ -3759,13 +3760,16 @@ static const struct amdgpu_irq_src_funcs dce_v11_0_hpd_irq_funcs = {
  
  static void dce_v11_0_set_irq_funcs(struct amdgpu_device *adev)

  {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v11_0_crtc_irq_funcs;
  
-	adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;

+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
adev->pageflip_irq.funcs = _v11_0_pageflip_irq_funcs;
  
-	adev->hpd_irq.num_types = AMDGPU_HPD_LAST;

+   adev->hpd_irq.num_types = adev->mode_info.num_hpd;
adev->hpd_irq.funcs = _v11_0_hpd_irq_funcs;
  }
  
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c

index a51e35f824a1..bd2c4f727df6 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2639,7 +2639,6 @@ static int dce_v6_0_early_init(void *handle)
adev->audio_endpt_wreg = _v6_0_audio_endpt_wreg;
  
  	dce_v6_0_set_display_funcs(adev);

-   dce_v6_0_set_irq_funcs(adev);
  
  	adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev);
  
@@ -2658,6 +2657,8 @@ static int dce_v6_0_early_init(void *handle)

return -EINVAL;
}
  
+	dce_v6_0_set_irq_funcs(adev);

+
return 0;
  }
  
@@ -3441,13 +3442,16 @@ static const struct amdgpu_irq_src_funcs dce_v6_0_hpd_irq_funcs = {
  
  static void dce_v6_0_set_irq_funcs(struct amdgpu_device *adev)

  {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v6_0_crtc_irq_funcs;
  
-	adev->pageflip_irq.num_types = 

RE: [PATCH 3/3] amdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, October 26, 2017 10:46 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 3/3] amdgpu: Remove
> AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST
> 
> From: Michel Dänzer 
> 
> Not used anymore.
> 
> Signed-off-by: Michel Dänzer 

Series is:
Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 3 ---
>  1 file changed, 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> index 2b1f96ce2a04..4069a3b2f55f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
> @@ -89,7 +89,6 @@ enum amdgpu_hpd_id {
>   AMDGPU_HPD_4,
>   AMDGPU_HPD_5,
>   AMDGPU_HPD_6,
> - AMDGPU_HPD_LAST,
>   AMDGPU_HPD_NONE = 0xff,
>  };
> 
> @@ -106,7 +105,6 @@ enum amdgpu_crtc_irq {
>   AMDGPU_CRTC_IRQ_VLINE4,
>   AMDGPU_CRTC_IRQ_VLINE5,
>   AMDGPU_CRTC_IRQ_VLINE6,
> - AMDGPU_CRTC_IRQ_LAST,
>   AMDGPU_CRTC_IRQ_NONE = 0xff
>  };
> 
> @@ -117,7 +115,6 @@ enum amdgpu_pageflip_irq {
>   AMDGPU_PAGEFLIP_IRQ_D4,
>   AMDGPU_PAGEFLIP_IRQ_D5,
>   AMDGPU_PAGEFLIP_IRQ_D6,
> - AMDGPU_PAGEFLIP_IRQ_LAST,
>   AMDGPU_PAGEFLIP_IRQ_NONE = 0xff
>  };
> 
> --
> 2.15.0.rc1
> 
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Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Christian König

Am 26.10.2017 um 13:08 schrieb Liu, Monk:

"Clear operation on the page table " is some kind of SDMA activity right? What 
if ASIC RESET from amd_gpu_recover() interrupted this activity in fly ???
I can't see any difference between the handling of existing VMs and new 
created ones.


Either we have correct handling and can redo the activity or we have 
corrupted VM page tables and crash again immediately.


So we need to handle this gracefully anyway,
Christian.



BR Monk

-Original Message-
From: Koenig, Christian
Sent: 2017年10月26日 18:54
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset


if we don't block device open while gpu doing recover, the vm init
(SDMA working on page table creating) would be ruined by ASIC RESET

That is not a problem at all. SDMA just does some clear operation on the page 
tables and those are either recovered from the shadow or run after the reset.

Regards,
Christian.

Am 26.10.2017 um 10:17 schrieb Liu, Monk:

When amdgpu_gpu_recover() routine is in the fly, we shouldn't let UMD open our 
device, otherwise the VM init would be ruined by gpu_recover().

e.g. VM init need to create page table, but keep In mind that
gpu_recover() calls ASIC RESET,

if we don't block device open while gpu doing recover, the vm init
(SDMA working on page table creating) would be ruined by ASIC RESET

do you have any good solution ? the key point is avoid/delay/push_back
hw activities from UMD side when we are running in gpu_recover()
function

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: 2017年10月26日 15:18
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

NAK, why the heck should we do this? It would just block all new processes from 
using the device.

Christian.

Am 25.10.2017 um 11:22 schrieb Monk Liu:

Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
Signed-off-by: Monk Liu 
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 4a9f749..c155ce4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (r < 0)
return r;

+	if (adev->in_gpu_reset)

+   return -ENODEV;
+
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
if (unlikely(!fpriv)) {
r = -ENOMEM;

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Re: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

2017-10-26 Thread Christian König

Unnecessary, we know that the scheduler is already awake because it is 
processing this function.

[ml] WHAT ??? this wake_up operate on job_scheduled, like the one at the bottom of sched_main(), It is 
used to wake up the thread waiting in "sched_entity_fini" on this 
"sched->job_scheduled", I don't understand why not necessary
Ah! You not wake up the scheduler, but the waiter for the scheduler. In 
this case the order is incorrect, but let's focus on your other idea.



The simple way I can think of to remove the @skip param for run_job is that we introduce 
a new member "skip" in sched_job, and remove fake_signal() function,
So we always set "skip" in sched_job before run_job(), and in run_job() we skip 
the real ib_schedule if found job->skip == true,
Cool idea. How about setting the fence error code? Then we test if the 
error code is already set and skip calling run_job() altogether when it is.



my current approach won't do begin_job(), won't link job in mirror list, 
etc  but above approach actually go through all steps
This is just for error recovery and doesn't need to be very efficient, 
but I see what you mean.


I think we should just keep one straight handling as much as possible 
and not to many corner cases. So your idea to skip the job when a flag 
is set sounds really good to me.


Regards,
Christian.

Am 26.10.2017 um 14:04 schrieb Liu, Monk:

The simple way I can think of to remove the @skip param for run_job is that we introduce 
a new member "skip" in sched_job, and remove fake_signal() function,
So we always set "skip" in sched_job before run_job(), and in run_job() we skip 
the real ib_schedule if found job->skip == true,

That way the skipping logic can be unified, but that satisfies the efficiency 
because:

my current approach won't do begin_job(), won't link job in mirror list, 
etc  but above approach actually go through all steps

what do you think

BR Monk

-Original Message-
From: Liu, Monk
Sent: 2017年10月26日 19:07
To: Koenig, Christian ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)


+   dma_fence_set_error(_fence->finished, -ECANCELED);
+
+   /* fake signaling the scheduled fence */
+   atomic_inc(>hw_rq_count);
+   amd_sched_fence_scheduled(s_fence);
+   wake_up(>job_scheduled);

Unnecessary, we know that the scheduler is already awake because it is 
processing this function.

[ml] WHAT ??? this wake_up operate on job_scheduled, like the one at the bottom of sched_main(), It is 
used to wake up the thread waiting in "sched_entity_fini" on this 
"sched->job_scheduled", I don't understand why not necessary



+   guilty_context = s_job->s_fence->scheduled.context;
+   }
   
+		skip = (found_guilty && s_job->s_fence->scheduled.context ==

+guilty_context);
spin_unlock(>job_list_lock);
-   fence = sched->ops->run_job(s_job);
+   fence = sched->ops->run_job(s_job, skip);

As far as I can see you can use amd_sched_job_fake_signal() here as well, no 
need for the extra skip parameter to run_job().

[ML] no you still didn't get my point, in sched_main() we use fake_signal() because the 
job hadn't been linked in mirror list, so "job_finish()"
Cannot be invoked for those jobs,

But for job_recovery(), it go through mirror list and only focus on jobs from that list, 
thus all jobs must be handled by "job_finis()" callback,
So we need let those jobs go through the run_job() again, only except that it 
didn't need to submit to ring really , that way the job_finish() callback
Can handle that job safely and seemless

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: 2017年10月26日 18:52
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

Am 26.10.2017 um 12:30 schrieb Monk Liu:

jobs are skipped under two cases
1)when the entity behind this job marked guilty, the job poped from
this entity's queue will be dropped in sched_main loop.

2)in job_recovery(), skip the scheduling job if its karma detected
above limit, and also skipped as well for other jobs sharing the same
fence context. this approach is becuase job_recovery() cannot access
job->entity due to entity may already dead.

v2:
some logic fix

with this feature we can introduce new gpu recover feature.

Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
Signed-off-by: Monk Liu 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++--
   drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 54 
---
   drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
   3 files changed, 47 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index a58e3c5..f08fde9 100644
--- 

[PATCH] drm/amd/display: Remove fb_location parameter from get_fb_info

2017-10-26 Thread Michel Dänzer
From: Michel Dänzer 

It's dead code.

Signed-off-by: Michel Dänzer 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++---
 1 file changed, 6 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 91876e0fd85b..f2e3c37845fc 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1746,8 +1746,7 @@ static bool fill_rects_from_plane_state(const struct 
drm_plane_state *state,
return true;
 }
 static int get_fb_info(const struct amdgpu_framebuffer *amdgpu_fb,
-  uint64_t *tiling_flags,
-  uint64_t *fb_location)
+  uint64_t *tiling_flags)
 {
struct amdgpu_bo *rbo = gem_to_amdgpu_bo(amdgpu_fb->obj);
int r = amdgpu_bo_reserve(rbo, false);
@@ -1759,9 +1758,6 @@ static int get_fb_info(const struct amdgpu_framebuffer 
*amdgpu_fb,
return r;
}
 
-   if (fb_location)
-   *fb_location = amdgpu_bo_gpu_offset(rbo);
-
if (tiling_flags)
amdgpu_bo_get_tiling_flags(rbo, tiling_flags);
 
@@ -1772,8 +1768,7 @@ static int get_fb_info(const struct amdgpu_framebuffer 
*amdgpu_fb,
 
 static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
 struct dc_plane_state *plane_state,
-const struct amdgpu_framebuffer 
*amdgpu_fb,
-bool addReq)
+const struct amdgpu_framebuffer 
*amdgpu_fb)
 {
uint64_t tiling_flags;
uint64_t fb_location = 0;
@@ -1785,8 +1780,7 @@ static int fill_plane_attributes_from_fb(struct 
amdgpu_device *adev,
 
ret = get_fb_info(
amdgpu_fb,
-   _flags,
-   addReq == true ? _location:NULL);
+   _flags);
 
if (ret)
return ret;
@@ -1956,8 +1950,7 @@ static void fill_gamma_from_crtc_state(const struct 
drm_crtc_state *crtc_state,
 static int fill_plane_attributes(struct amdgpu_device *adev,
 struct dc_plane_state *dc_plane_state,
 struct drm_plane_state *plane_state,
-struct drm_crtc_state *crtc_state,
-bool addrReq)
+struct drm_crtc_state *crtc_state)
 {
const struct amdgpu_framebuffer *amdgpu_fb =
to_amdgpu_framebuffer(plane_state->fb);
@@ -1971,8 +1964,7 @@ static int fill_plane_attributes(struct amdgpu_device 
*adev,
ret = fill_plane_attributes_from_fb(
crtc->dev->dev_private,
dc_plane_state,
-   amdgpu_fb,
-   addrReq);
+   amdgpu_fb);
 
if (ret)
return ret;
@@ -4663,8 +4655,7 @@ static int dm_update_planes_state(struct dc *dc,
new_plane_crtc->dev->dev_private,
dm_new_plane_state->dc_state,
new_plane_state,
-   new_crtc_state,
-   false);
+   new_crtc_state);
if (ret)
return ret;
 
-- 
2.15.0.rc1

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[PATCH 2/3] drm/amd/display: Use real number of CRTCs and HPDs in set_irq_funcs

2017-10-26 Thread Michel Dänzer
From: Michel Dänzer 

Corresponding to the previous non-DC change.

Signed-off-by: Michel Dänzer 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 ++-
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c | 9 ++---
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index f0b50d97159f..91876e0fd85b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1561,7 +1561,6 @@ static int dm_early_init(void *handle)
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
adev->ddev->driver->driver_features |= DRIVER_ATOMIC;
-   amdgpu_dm_set_irq_funcs(adev);
 
switch (adev->asic_type) {
case CHIP_BONAIRE:
@@ -1635,6 +1634,8 @@ static int dm_early_init(void *handle)
return -EINVAL;
}
 
+   amdgpu_dm_set_irq_funcs(adev);
+
if (adev->mode_info.funcs == NULL)
adev->mode_info.funcs = _display_funcs;
 
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
index ca5d0d1581dc..1874b6cee6af 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_irq.c
@@ -683,13 +683,16 @@ static const struct amdgpu_irq_src_funcs dm_hpd_irq_funcs 
= {
 
 void amdgpu_dm_set_irq_funcs(struct amdgpu_device *adev)
 {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _crtc_irq_funcs;
 
-   adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;
+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
adev->pageflip_irq.funcs = _pageflip_irq_funcs;
 
-   adev->hpd_irq.num_types = AMDGPU_HPD_LAST;
+   adev->hpd_irq.num_types = adev->mode_info.num_hpd;
adev->hpd_irq.funcs = _hpd_irq_funcs;
 }
 
-- 
2.15.0.rc1

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[PATCH 1/3] amdgpu/dce: Use actual number of CRTCs and HPDs in set_irq_funcs

2017-10-26 Thread Michel Dänzer
From: Michel Dänzer 

Hardcoding the maximum numbers could result in spurious error messages
from the IRQ state callbacks, e.g. on Polaris 11/12:

[drm:dce_v11_0_set_pageflip_irq_state [amdgpu]] *ERROR* invalid pageflip crtc 5
[drm:amdgpu_irq_disable_all [amdgpu]] *ERROR* error disabling interrupt (-22)

Signed-off-by: Michel Dänzer 
---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 12 
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 12 
 drivers/gpu/drm/amd/amdgpu/dce_v6_0.c  | 12 
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c  | 12 
 4 files changed, 32 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 4e519dc42916..f3dd6b7bfd4d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2773,7 +2773,6 @@ static int dce_v10_0_early_init(void *handle)
adev->audio_endpt_wreg = _v10_0_audio_endpt_wreg;
 
dce_v10_0_set_display_funcs(adev);
-   dce_v10_0_set_irq_funcs(adev);
 
adev->mode_info.num_crtc = dce_v10_0_get_num_crtc(adev);
 
@@ -2788,6 +2787,8 @@ static int dce_v10_0_early_init(void *handle)
return -EINVAL;
}
 
+   dce_v10_0_set_irq_funcs(adev);
+
return 0;
 }
 
@@ -3635,13 +3636,16 @@ static const struct amdgpu_irq_src_funcs 
dce_v10_0_hpd_irq_funcs = {
 
 static void dce_v10_0_set_irq_funcs(struct amdgpu_device *adev)
 {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v10_0_crtc_irq_funcs;
 
-   adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;
+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
adev->pageflip_irq.funcs = _v10_0_pageflip_irq_funcs;
 
-   adev->hpd_irq.num_types = AMDGPU_HPD_LAST;
+   adev->hpd_irq.num_types = adev->mode_info.num_hpd;
adev->hpd_irq.funcs = _v10_0_hpd_irq_funcs;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 11edc75edaa9..be25706e5f07 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2876,7 +2876,6 @@ static int dce_v11_0_early_init(void *handle)
adev->audio_endpt_wreg = _v11_0_audio_endpt_wreg;
 
dce_v11_0_set_display_funcs(adev);
-   dce_v11_0_set_irq_funcs(adev);
 
adev->mode_info.num_crtc = dce_v11_0_get_num_crtc(adev);
 
@@ -2903,6 +2902,8 @@ static int dce_v11_0_early_init(void *handle)
return -EINVAL;
}
 
+   dce_v11_0_set_irq_funcs(adev);
+
return 0;
 }
 
@@ -3759,13 +3760,16 @@ static const struct amdgpu_irq_src_funcs 
dce_v11_0_hpd_irq_funcs = {
 
 static void dce_v11_0_set_irq_funcs(struct amdgpu_device *adev)
 {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v11_0_crtc_irq_funcs;
 
-   adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;
+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;
adev->pageflip_irq.funcs = _v11_0_pageflip_irq_funcs;
 
-   adev->hpd_irq.num_types = AMDGPU_HPD_LAST;
+   adev->hpd_irq.num_types = adev->mode_info.num_hpd;
adev->hpd_irq.funcs = _v11_0_hpd_irq_funcs;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c 
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index a51e35f824a1..bd2c4f727df6 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2639,7 +2639,6 @@ static int dce_v6_0_early_init(void *handle)
adev->audio_endpt_wreg = _v6_0_audio_endpt_wreg;
 
dce_v6_0_set_display_funcs(adev);
-   dce_v6_0_set_irq_funcs(adev);
 
adev->mode_info.num_crtc = dce_v6_0_get_num_crtc(adev);
 
@@ -2658,6 +2657,8 @@ static int dce_v6_0_early_init(void *handle)
return -EINVAL;
}
 
+   dce_v6_0_set_irq_funcs(adev);
+
return 0;
 }
 
@@ -3441,13 +3442,16 @@ static const struct amdgpu_irq_src_funcs 
dce_v6_0_hpd_irq_funcs = {
 
 static void dce_v6_0_set_irq_funcs(struct amdgpu_device *adev)
 {
-   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_LAST;
+   if (adev->mode_info.num_crtc > 0)
+   adev->crtc_irq.num_types = AMDGPU_CRTC_IRQ_VLINE1 + 
adev->mode_info.num_crtc;
+   else
+   adev->crtc_irq.num_types = 0;
adev->crtc_irq.funcs = _v6_0_crtc_irq_funcs;
 
-   adev->pageflip_irq.num_types = AMDGPU_PAGEFLIP_IRQ_LAST;
+   adev->pageflip_irq.num_types = adev->mode_info.num_crtc;

[PATCH 3/3] amdgpu: Remove AMDGPU_{HPD,CRTC_IRQ,PAGEFLIP_IRQ}_LAST

2017-10-26 Thread Michel Dänzer
From: Michel Dänzer 

Not used anymore.

Signed-off-by: Michel Dänzer 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
index 2b1f96ce2a04..4069a3b2f55f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h
@@ -89,7 +89,6 @@ enum amdgpu_hpd_id {
AMDGPU_HPD_4,
AMDGPU_HPD_5,
AMDGPU_HPD_6,
-   AMDGPU_HPD_LAST,
AMDGPU_HPD_NONE = 0xff,
 };
 
@@ -106,7 +105,6 @@ enum amdgpu_crtc_irq {
AMDGPU_CRTC_IRQ_VLINE4,
AMDGPU_CRTC_IRQ_VLINE5,
AMDGPU_CRTC_IRQ_VLINE6,
-   AMDGPU_CRTC_IRQ_LAST,
AMDGPU_CRTC_IRQ_NONE = 0xff
 };
 
@@ -117,7 +115,6 @@ enum amdgpu_pageflip_irq {
AMDGPU_PAGEFLIP_IRQ_D4,
AMDGPU_PAGEFLIP_IRQ_D5,
AMDGPU_PAGEFLIP_IRQ_D6,
-   AMDGPU_PAGEFLIP_IRQ_LAST,
AMDGPU_PAGEFLIP_IRQ_NONE = 0xff
 };
 
-- 
2.15.0.rc1

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Re: [pull] amdgpu dc drm-next-4.15-dc

2017-10-26 Thread Dieter Nützel

Hello Alex & Rex,

any progress?
The 'screen blank' (monitor standby mode) is really annoying.

Thanks,
Dieter

Am 23.10.2017 03:03, schrieb Dieter Nützel:

Am 22.10.2017 23:48, schrieb Dieter Nützel:

Am 21.10.2017 23:22, schrieb Alex Deucher:

Hi Dave,

Last batch of new stuff for DC. Highlights:
- Fix some memory leaks
- S3 fixes
- Hotplug fixes
- Fix some CX multi-display issues
- MST fixes
- DML updates from the hw team
- Various code cleanups
- Misc bug fixes


Now this tree has the same fan regression as 'amd-staging-drm-next'
startet with 0944c350c8eddf4064e7abb881dd245032fdfa23.

Look here:
[amd-staging-drm-next] regression - no fan info (sensors) on RX580
https://lists.freedesktop.org/archives/amd-gfx/2017-October/014065.html

Second:
KDE's greeter 'kdm_greet' (login screen went into dpms) and KDE's
'screen blank' (energy saving / dpms off) never came back. All I can
do is a clean reboot. So I have to disable all 'dpms'.
But I could attach gdb remotely on it.
'kdm_greet' hang in 'poll'.
Nothing alarming in 'dmesg' and 'Xorg.0.log'. (Both available taken
from 'amd-staging-drm-next' if needed).


Hello Alex and Rex,

I've found good hint from Jan (randomsalad) on phoronix for the
'screen blank' (monitor standby mode):
https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984555#post984555

My Reply:
https://www.phoronix.com/forums/forum/phoronix/latest-phoronix-articles/984483-amdgpu-dc-gets-a-final-batch-of-changes-before-linux-4-15?p=984581#post984581

I can swear, that I could 'return' one time (the first time, maybe due
to only warm reboot) on 'drm-next-4.15-dc-wip' directly from within
KDE session with replugging the video cable, but for all later tests
on both kernels I have to blindly switching back to login screen
(kdm_greet) and then replugging the video cable.

For me these regression started with 'amd-staging-drm-next' much
earlier than with the latest commit.

Dieter
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RE: [PATCH] drm/amd/powerplay: describe the PCIE link speed in right GT/s

2017-10-26 Thread Deucher, Alexander
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Evan Quan
> Sent: Thursday, October 26, 2017 5:36 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Quan, Evan
> Subject: [PATCH] drm/amd/powerplay: describe the PCIE link speed in right
> GT/s
> 
> Change-Id: Icfd2c50ce168d8ccf3cc329eb906a56bab0a8c1d
> Signed-off-by: Evan Quan 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/ci_dpm.c| 6 +++---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   | 6 +++---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 +++---
>  3 files changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> index 68b505c..5a60c16 100644
> --- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
> @@ -6625,9 +6625,9 @@ static int ci_dpm_print_clock_levels(void *handle,
> 
>   for (i = 0; i < pcie_table->count; i++)
>   size += sprintf(buf + size, "%d: %s %s\n", i,
> - (pcie_table->dpm_levels[i].value ==
> 0) ? "2.5GB, x1" :
> - (pcie_table->dpm_levels[i].value ==
> 1) ? "5.0GB, x16" :
> - (pcie_table->dpm_levels[i].value ==
> 2) ? "8.0GB, x16" : "",
> + (pcie_table->dpm_levels[i].value ==
> 0) ? "2.5GT/s, x1" :
> + (pcie_table->dpm_levels[i].value ==
> 1) ? "5.0GT/s, x16" :
> + (pcie_table->dpm_levels[i].value ==
> 2) ? "8.0GT/s, x16" : "",
>   (i == now) ? "*" : "");
>   break;
>   default:
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> index 4466469..ed17af4 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
> @@ -4339,9 +4339,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr
> *hwmgr,
> 
>   for (i = 0; i < pcie_table->count; i++)
>   size += sprintf(buf + size, "%d: %s %s\n", i,
> - (pcie_table->dpm_levels[i].value ==
> 0) ? "2.5GB, x8" :
> - (pcie_table->dpm_levels[i].value ==
> 1) ? "5.0GB, x16" :
> - (pcie_table->dpm_levels[i].value ==
> 2) ? "8.0GB, x16" : "",
> + (pcie_table->dpm_levels[i].value ==
> 0) ? "2.5GT/s, x8" :
> + (pcie_table->dpm_levels[i].value ==
> 1) ? "5.0GT/s, x16" :
> + (pcie_table->dpm_levels[i].value ==
> 2) ? "8.0GT/s, x16" : "",
>   (i == now) ? "*" : "");
>   break;
>   default:
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 203ef10..d947e17 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -4647,9 +4647,9 @@ static int vega10_print_clock_levels(struct
> pp_hwmgr *hwmgr,
> 
>   for (i = 0; i < pcie_table->count; i++)
>   size += sprintf(buf + size, "%d: %s %s\n", i,
> - (pcie_table->pcie_gen[i] == 0) ?
> "2.5GB, x1" :
> - (pcie_table->pcie_gen[i] == 1) ?
> "5.0GB, x16" :
> - (pcie_table->pcie_gen[i] == 2) ?
> "8.0GB, x16" : "",
> + (pcie_table->pcie_gen[i] == 0) ?
> "2.5GT/s, x1" :
> + (pcie_table->pcie_gen[i] == 1) ?
> "5.0GT/s, x16" :
> + (pcie_table->pcie_gen[i] == 2) ?
> "8.0GT/s, x16" : "",
>   (i == now) ? "*" : "");
>   break;
>   default:
> --
> 2.7.4
> 
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RE: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

2017-10-26 Thread Liu, Monk
The simple way I can think of to remove the @skip param for run_job is that we 
introduce a new member "skip" in sched_job, and remove fake_signal() function,
So we always set "skip" in sched_job before run_job(), and in run_job() we skip 
the real ib_schedule if found job->skip == true,

That way the skipping logic can be unified, but that satisfies the efficiency 
because:

my current approach won't do begin_job(), won't link job in mirror list, 
etc  but above approach actually go through all steps 

what do you think 

BR Monk

-Original Message-
From: Liu, Monk 
Sent: 2017年10月26日 19:07
To: Koenig, Christian ; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

> + dma_fence_set_error(_fence->finished, -ECANCELED);
> +
> + /* fake signaling the scheduled fence */
> + atomic_inc(>hw_rq_count);
> + amd_sched_fence_scheduled(s_fence);
> + wake_up(>job_scheduled);

Unnecessary, we know that the scheduler is already awake because it is 
processing this function.

[ml] WHAT ??? this wake_up operate on job_scheduled, like the one at the bottom 
of sched_main(), It is used to wake up the thread waiting in 
"sched_entity_fini" on this "sched->job_scheduled", I don't understand why not 
necessary 


> + guilty_context = s_job->s_fence->scheduled.context;
> + }
>   
> + skip = (found_guilty && s_job->s_fence->scheduled.context == 
> +guilty_context);
>   spin_unlock(>job_list_lock);
> - fence = sched->ops->run_job(s_job);
> + fence = sched->ops->run_job(s_job, skip);

As far as I can see you can use amd_sched_job_fake_signal() here as well, no 
need for the extra skip parameter to run_job().

[ML] no you still didn't get my point, in sched_main() we use fake_signal() 
because the job hadn't been linked in mirror list, so "job_finish()" 
Cannot be invoked for those jobs,

But for job_recovery(), it go through mirror list and only focus on jobs from 
that list, thus all jobs must be handled by "job_finis()" callback,
So we need let those jobs go through the run_job() again, only except that it 
didn't need to submit to ring really , that way the job_finish() callback
Can handle that job safely and seemless 

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] 
Sent: 2017年10月26日 18:52
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

Am 26.10.2017 um 12:30 schrieb Monk Liu:
> jobs are skipped under two cases
> 1)when the entity behind this job marked guilty, the job poped from 
> this entity's queue will be dropped in sched_main loop.
>
> 2)in job_recovery(), skip the scheduling job if its karma detected 
> above limit, and also skipped as well for other jobs sharing the same 
> fence context. this approach is becuase job_recovery() cannot access 
> job->entity due to entity may already dead.
>
> v2:
> some logic fix
>
> with this feature we can introduce new gpu recover feature.
>
> Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++--
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 54 
> ---
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
>   3 files changed, 47 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index a58e3c5..f08fde9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -177,7 +177,7 @@ static struct dma_fence *amdgpu_job_dependency(struct 
> amd_sched_job *sched_job)
>   return fence;
>   }
>   
> -static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> *sched_job)
> +static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> +*sched_job, bool skip)
>   {
>   struct dma_fence *fence = NULL;
>   struct amdgpu_device *adev;
> @@ -194,10 +194,11 @@ static struct dma_fence *amdgpu_job_run(struct 
> amd_sched_job *sched_job)
>   BUG_ON(amdgpu_sync_peek_fence(>sync, NULL));
>   
>   trace_amdgpu_sched_run_job(job);
> - /* skip ib schedule when vram is lost */
> - if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
> +
> + if (skip || job->vram_lost_counter != 
> atomic_read(>vram_lost_counter)) {
> + /* skip ib schedule if looks needed, and set error */
>   dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
> - DRM_ERROR("Skip scheduling IBs!\n");
> + DRM_INFO("Skip scheduling IBs!\n");
>   } else {
>   r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
>  );
> diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c 
> 

RE: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Liu, Monk
"Clear operation on the page table " is some kind of SDMA activity right? What 
if ASIC RESET from amd_gpu_recover() interrupted this activity in fly ???

BR Monk

-Original Message-
From: Koenig, Christian 
Sent: 2017年10月26日 18:54
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

> if we don't block device open while gpu doing recover, the vm init 
> (SDMA working on page table creating) would be ruined by ASIC RESET
That is not a problem at all. SDMA just does some clear operation on the page 
tables and those are either recovered from the shadow or run after the reset.

Regards,
Christian.

Am 26.10.2017 um 10:17 schrieb Liu, Monk:
> When amdgpu_gpu_recover() routine is in the fly, we shouldn't let UMD open 
> our device, otherwise the VM init would be ruined by gpu_recover().
>
> e.g. VM init need to create page table, but keep In mind that 
> gpu_recover() calls ASIC RESET,
>
> if we don't block device open while gpu doing recover, the vm init 
> (SDMA working on page table creating) would be ruined by ASIC RESET
>
> do you have any good solution ? the key point is avoid/delay/push_back 
> hw activities from UMD side when we are running in gpu_recover() 
> function
>
> BR Monk
>
> -Original Message-
> From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
> Sent: 2017年10月26日 15:18
> To: Liu, Monk ; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset
>
> NAK, why the heck should we do this? It would just block all new processes 
> from using the device.
>
> Christian.
>
> Am 25.10.2017 um 11:22 schrieb Monk Liu:
>> Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
>> Signed-off-by: Monk Liu 
>> ---
>>drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
>>1 file changed, 3 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 4a9f749..c155ce4 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, 
>> struct drm_file *file_priv)
>>  if (r < 0)
>>  return r;
>>
>> +if (adev->in_gpu_reset)
>> +return -ENODEV;
>> +
>>  fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
>>  if (unlikely(!fpriv)) {
>>  r = -ENOMEM;
>

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RE: [PATCH] drm/amd/display: assign fb_location only if bo is pinned

2017-10-26 Thread S, Shirish

I have reverted 
[PATCH 2/2] drm/amd/display: cleanup addReq and fix fb_location
and applied 
[PATCH] drm/amd/display: fix high part address in dm_plane_helper_prepare_fb()
onto amd-drm-staging kernel.


Regards,
Shirish S


-Original Message-
From: Michel Dänzer [mailto:mic...@daenzer.net] 
Sent: Wednesday, October 25, 2017 3:54 PM
To: S, Shirish ; Grodzovsky, Andrey 

Cc: Deucher, Alexander ; 
dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/display: assign fb_location only if bo is pinned

On 25/10/17 12:05 PM, S, Shirish wrote:
> Hi Alex, Michel & Andrey,
> 
>  [PATCH] drm/amd/display: assign fb_location only if bo is pinned  
> [PATCH 2/2] drm/amd/display: cleanup addReq and fix fb_location
> 
> should be dropped and instead:

Since you pushed the latter to amd-staging-drm-next, please revert it there, or 
maybe submit another patch removing all fb_location related code from 
get_fb_info and fill_plane_attributes_from_fb.


> [PATCH] drm/amd/display: fix high part address in 
> dm_plane_helper_prepare_fb()
> 
> should be reviewed .

Reviewed-by: Michel Dänzer 

But please wait for review from DC folks.


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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RE: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

2017-10-26 Thread Liu, Monk
> + dma_fence_set_error(_fence->finished, -ECANCELED);
> +
> + /* fake signaling the scheduled fence */
> + atomic_inc(>hw_rq_count);
> + amd_sched_fence_scheduled(s_fence);
> + wake_up(>job_scheduled);

Unnecessary, we know that the scheduler is already awake because it is 
processing this function.

[ml] WHAT ??? this wake_up operate on job_scheduled, like the one at the bottom 
of sched_main(), 
It is used to wake up the thread waiting in "sched_entity_fini" on this 
"sched->job_scheduled",
I don't understand why not necessary 


> + guilty_context = s_job->s_fence->scheduled.context;
> + }
>   
> + skip = (found_guilty && s_job->s_fence->scheduled.context == 
> +guilty_context);
>   spin_unlock(>job_list_lock);
> - fence = sched->ops->run_job(s_job);
> + fence = sched->ops->run_job(s_job, skip);

As far as I can see you can use amd_sched_job_fake_signal() here as well, no 
need for the extra skip parameter to run_job().

[ML] no you still didn't get my point, in sched_main() we use fake_signal() 
because the job hadn't been linked in mirror list, so "job_finish()" 
Cannot be invoked for those jobs,

But for job_recovery(), it go through mirror list and only focus on jobs from 
that list, thus all jobs must be handled by "job_finis()" callback,
So we need let those jobs go through the run_job() again, only except that it 
didn't need to submit to ring really , that way the job_finish() callback
Can handle that job safely and seemless 

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] 
Sent: 2017年10月26日 18:52
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

Am 26.10.2017 um 12:30 schrieb Monk Liu:
> jobs are skipped under two cases
> 1)when the entity behind this job marked guilty, the job poped from 
> this entity's queue will be dropped in sched_main loop.
>
> 2)in job_recovery(), skip the scheduling job if its karma detected 
> above limit, and also skipped as well for other jobs sharing the same 
> fence context. this approach is becuase job_recovery() cannot access 
> job->entity due to entity may already dead.
>
> v2:
> some logic fix
>
> with this feature we can introduce new gpu recover feature.
>
> Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++--
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 54 
> ---
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
>   3 files changed, 47 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index a58e3c5..f08fde9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -177,7 +177,7 @@ static struct dma_fence *amdgpu_job_dependency(struct 
> amd_sched_job *sched_job)
>   return fence;
>   }
>   
> -static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> *sched_job)
> +static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> +*sched_job, bool skip)
>   {
>   struct dma_fence *fence = NULL;
>   struct amdgpu_device *adev;
> @@ -194,10 +194,11 @@ static struct dma_fence *amdgpu_job_run(struct 
> amd_sched_job *sched_job)
>   BUG_ON(amdgpu_sync_peek_fence(>sync, NULL));
>   
>   trace_amdgpu_sched_run_job(job);
> - /* skip ib schedule when vram is lost */
> - if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
> +
> + if (skip || job->vram_lost_counter != 
> atomic_read(>vram_lost_counter)) {
> + /* skip ib schedule if looks needed, and set error */
>   dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
> - DRM_ERROR("Skip scheduling IBs!\n");
> + DRM_INFO("Skip scheduling IBs!\n");
>   } else {
>   r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
>  );
> diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c 
> b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
> index 9cbeade..995661e 100644
> --- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
> +++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
> @@ -330,6 +330,28 @@ static bool amd_sched_entity_add_dependency_cb(struct 
> amd_sched_entity *entity)
>   return false;
>   }
>   
> +static void amd_sched_job_fake_signal(struct amd_sched_job *job) {
> + struct amd_sched_fence *s_fence = job->s_fence;
> + struct amd_gpu_scheduler *sched = job->sched;
> + struct amd_sched_entity *entity = job->s_entity;
> +
> + dma_fence_set_error(_fence->finished, -ECANCELED);
> +
> + /* fake signaling the scheduled fence */
> + atomic_inc(>hw_rq_count);
> + amd_sched_fence_scheduled(s_fence);
> + 

Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Christian König

if we don't block device open while gpu doing recover, the vm init (SDMA 
working on page table creating) would be ruined by ASIC RESET
That is not a problem at all. SDMA just does some clear operation on the 
page tables and those are either recovered from the shadow or run after 
the reset.


Regards,
Christian.

Am 26.10.2017 um 10:17 schrieb Liu, Monk:

When amdgpu_gpu_recover() routine is in the fly, we shouldn't let UMD open our 
device, otherwise the VM init would be ruined by gpu_recover().

e.g. VM init need to create page table, but keep In mind that gpu_recover() 
calls ASIC RESET,

if we don't block device open while gpu doing recover, the vm init (SDMA 
working on page table creating) would be ruined by ASIC RESET

do you have any good solution ? the key point is avoid/delay/push_back hw 
activities from UMD side when we are running in gpu_recover() function

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: 2017年10月26日 15:18
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

NAK, why the heck should we do this? It would just block all new processes from 
using the device.

Christian.

Am 25.10.2017 um 11:22 schrieb Monk Liu:

Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
Signed-off-by: Monk Liu 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
   1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 4a9f749..c155ce4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (r < 0)
return r;
   
+	if (adev->in_gpu_reset)

+   return -ENODEV;
+
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
if (unlikely(!fpriv)) {
r = -ENOMEM;




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Re: [PATCH 1/7] amd/scheduler:imple job skip feature(v2)

2017-10-26 Thread Christian König

Am 26.10.2017 um 12:30 schrieb Monk Liu:

jobs are skipped under two cases
1)when the entity behind this job marked guilty, the job
poped from this entity's queue will be dropped in sched_main loop.

2)in job_recovery(), skip the scheduling job if its karma detected
above limit, and also skipped as well for other jobs sharing the
same fence context. this approach is becuase job_recovery() cannot
access job->entity due to entity may already dead.

v2:
some logic fix

with this feature we can introduce new gpu recover feature.

Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
Signed-off-by: Monk Liu 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++--
  drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 54 ---
  drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
  3 files changed, 47 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index a58e3c5..f08fde9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -177,7 +177,7 @@ static struct dma_fence *amdgpu_job_dependency(struct 
amd_sched_job *sched_job)
return fence;
  }
  
-static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)

+static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job, bool 
skip)
  {
struct dma_fence *fence = NULL;
struct amdgpu_device *adev;
@@ -194,10 +194,11 @@ static struct dma_fence *amdgpu_job_run(struct 
amd_sched_job *sched_job)
BUG_ON(amdgpu_sync_peek_fence(>sync, NULL));
  
  	trace_amdgpu_sched_run_job(job);

-   /* skip ib schedule when vram is lost */
-   if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
+
+   if (skip || job->vram_lost_counter != 
atomic_read(>vram_lost_counter)) {
+   /* skip ib schedule if looks needed, and set error */
dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
-   DRM_ERROR("Skip scheduling IBs!\n");
+   DRM_INFO("Skip scheduling IBs!\n");
} else {
r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
   );
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c 
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 9cbeade..995661e 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -330,6 +330,28 @@ static bool amd_sched_entity_add_dependency_cb(struct 
amd_sched_entity *entity)
return false;
  }
  
+static void amd_sched_job_fake_signal(struct amd_sched_job *job)

+{
+   struct amd_sched_fence *s_fence = job->s_fence;
+   struct amd_gpu_scheduler *sched = job->sched;
+   struct amd_sched_entity *entity = job->s_entity;
+
+   dma_fence_set_error(_fence->finished, -ECANCELED);
+
+   /* fake signaling the scheduled fence */
+   atomic_inc(>hw_rq_count);
+   amd_sched_fence_scheduled(s_fence);
+   wake_up(>job_scheduled);


Unnecessary, we know that the scheduler is already awake because it is 
processing this function.



+
+   /* fake signaling the finished fence */
+   job->s_entity = NULL;
+   spsc_queue_pop(>job_queue);


That code isn't up to date any more, Andrey removed job->s_entity yesterday.

Please rebase on amd-staging-drm-next before resending.


+
+   amd_sched_process_job(NULL, _fence->cb);
+   dma_fence_put(_fence->finished);
+   sched->ops->free_job(job);
+}
+
  static struct amd_sched_job *
  amd_sched_entity_pop_job(struct amd_sched_entity *entity)
  {
@@ -344,6 +366,11 @@ amd_sched_entity_pop_job(struct amd_sched_entity *entity)
if (amd_sched_entity_add_dependency_cb(entity))
return NULL;
  
+	if (entity->guilty && atomic_read(entity->guilty)) {

+   amd_sched_job_fake_signal(sched_job);
+   return NULL;
+   }
+


Better move this after spsc_queue_pop below and remove the extra 
spsc_queue_pop from amd_sched_job_fake_signal.



sched_job->s_entity = NULL;
spsc_queue_pop(>job_queue);
return sched_job;
@@ -441,13 +468,6 @@ static void amd_sched_job_timedout(struct work_struct 
*work)
job->sched->ops->timedout_job(job);
  }
  
-static void amd_sched_set_guilty(struct amd_sched_job *s_job)

-{
-   if (atomic_inc_return(_job->karma) > s_job->sched->hang_limit)
-   if (s_job->s_entity->guilty)
-   atomic_set(s_job->s_entity->guilty, 1);
-}
-
  void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched, struct 
amd_sched_job *bad)
  {
struct amd_sched_job *s_job;
@@ -466,7 +486,7 @@ void amd_sched_hw_job_reset(struct amd_gpu_scheduler 
*sched, struct amd_sched_jo
}
spin_unlock(>job_list_lock);
  
-	if (bad) {

+   if (bad && atomic_inc_return(>karma) > bad->sched->hang_limit) {

[PATCH 4/7] drm/amdgpu:cleanup ucode_init_bo

2017-10-26 Thread Monk Liu
1,no sriov check since gpu recover is unified
2,need CPU_ACCESS_REQUIRED flag for VRAM if SRIOV
because otherwise after following PIN the first allocated
VRAM bo is wasted due to some TTM mgr reason.

Change-Id: I4d029f2da8bb463942c7861d3e52f309bdba9576
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index edc37cc..ab9b2d4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -370,10 +370,10 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
return 0;
}
 
-   if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) {
+   if (!adev->in_gpu_reset) {
err = amdgpu_bo_create(adev, adev->firmware.fw_size, PAGE_SIZE, 
true,
amdgpu_sriov_vf(adev) ? 
AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT,
-   AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
+   
AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS|AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
NULL, NULL, 0, bo);
if (err) {
dev_err(adev->dev, "(%d) Firmware buffer allocate 
failed\n", err);
-- 
2.7.4

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[PATCH 5/7] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Monk Liu
Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 4a9f749..c155ce4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (r < 0)
return r;
 
+   if (adev->in_gpu_reset)
+   return -ENODEV;
+
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
if (unlikely(!fpriv)) {
r = -ENOMEM;
-- 
2.7.4

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[PATCH 2/7] drm/amdgpu:implement new GPU recover(v3)

2017-10-26 Thread Monk Liu
1,new imple names amdgpu_gpu_recover which gives more hint
on what it does compared with gpu_reset

2,gpu_recover unify bare-metal and SR-IOV, only the asic reset
part is implemented differently

3,gpu_recover will increase hang job karma and mark its entity/context
as guilty if exceeds limit

V2:

4,in scheduler main routine the job from guilty context  will be immedialy
fake signaled after it poped from queue and its fence be set with
"-ECANCELED" error

5,in scheduler recovery routine all jobs from the guilty entity would be
dropped

6,in run_job() routine the real IB submission would be skipped if @skip 
parameter
equales true or there was VRAM lost occured.

V3:

7,replace deprecated gpu reset, use new gpu recover

Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h|   6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 310 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  |  10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c|   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c|   5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   |   1 -
 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c  |   2 +-
 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c  |   2 +-
 8 files changed, 151 insertions(+), 187 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ba1ab97..335df11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -178,6 +178,10 @@ extern int amdgpu_cik_support;
 #define CIK_CURSOR_WIDTH 128
 #define CIK_CURSOR_HEIGHT 128
 
+/* GPU RESET flags */
+#define AMDGPU_RESET_INFO_VRAM_LOST  (1 << 0)
+#define AMDGPU_RESET_INFO_FULLRESET  (1 << 1)
+
 struct amdgpu_device;
 struct amdgpu_ib;
 struct amdgpu_cs_parser;
@@ -1840,7 +1844,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
 #define amdgpu_psp_check_fw_loading_status(adev, i) 
(adev)->firmware.funcs->check_fw_loading_status((adev), (i))
 
 /* Common functions */
-int amdgpu_gpu_reset(struct amdgpu_device *adev);
+int amdgpu_gpu_recover(struct amdgpu_device *adev, struct amdgpu_job* job);
 bool amdgpu_need_backup(struct amdgpu_device *adev);
 void amdgpu_pci_config_reset(struct amdgpu_device *adev);
 bool amdgpu_need_post(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a07544d..a2f9a7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2818,163 +2818,154 @@ static int amdgpu_recover_vram_from_shadow(struct 
amdgpu_device *adev,
return r;
 }
 
-/**
- * amdgpu_sriov_gpu_reset - reset the asic
- *
- * @adev: amdgpu device pointer
- * @job: which job trigger hang
- *
- * Attempt the reset the GPU if it has hung (all asics).
- * for SRIOV case.
- * Returns 0 for success or an error on failure.
- */
-int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job)
+static int amdgpu_reset(struct amdgpu_device *adev, uint64_t* reset_flags)
 {
-   int i, j, r = 0;
-   int resched;
-   struct amdgpu_bo *bo, *tmp;
-   struct amdgpu_ring *ring;
-   struct dma_fence *fence = NULL, *next = NULL;
+   int r;
+   bool need_full_reset, vram_lost = 0;
 
-   mutex_lock(>virt.lock_reset);
-   atomic_inc(>gpu_reset_counter);
-   adev->in_sriov_reset = true;
+   need_full_reset = amdgpu_need_full_reset(adev);
 
-   /* block TTM */
-   resched = ttm_bo_lock_delayed_workqueue(>mman.bdev);
+   if (!need_full_reset) {
+   amdgpu_pre_soft_reset(adev);
+   r = amdgpu_soft_reset(adev);
+   amdgpu_post_soft_reset(adev);
+   if (r || amdgpu_check_soft_reset(adev)) {
+   DRM_INFO("soft reset failed, will fallback to full 
reset!\n");
+   need_full_reset = true;
+   }
 
-   /* we start from the ring trigger GPU hang */
-   j = job ? job->ring->idx : 0;
+   }
 
-   /* block scheduler */
-   for (i = j; i < j + AMDGPU_MAX_RINGS; ++i) {
-   ring = adev->rings[i % AMDGPU_MAX_RINGS];
-   if (!ring || !ring->sched.thread)
-   continue;
+   if (need_full_reset) {
+   r = amdgpu_suspend(adev);
 
-   kthread_park(ring->sched.thread);
+retry:
+   amdgpu_atombios_scratch_regs_save(adev);
+   r = amdgpu_asic_reset(adev);
+   amdgpu_atombios_scratch_regs_restore(adev);
+   /* post card */
+   amdgpu_atom_asic_init(adev->mode_info.atom_context);
 
-   if (job && j != i)
-   continue;
+   if (!r) {
+   dev_info(adev->dev, "GPU reset succeeded, trying to 
resume\n");
+   r = amdgpu_resume_phase1(adev);
+   if (r)
+   goto out;
 
-   /* here 

[PATCH 7/7] drm/amdgpu:fix random missing of FLR NOTIFY

2017-10-26 Thread Monk Liu
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 14 +++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 
b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
index f8522a0..a43cffb 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
@@ -282,9 +282,17 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device 
*adev,
/* see what event we get */
r = xgpu_ai_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION);
 
-   /* only handle FLR_NOTIFY now */
-   if (!r)
-   schedule_work(>virt.flr_work);
+   /* sometimes the interrupt is delayed to inject to VM, so under 
such case
+* the IDH_FLR_NOTIFICATION is overwritten by VF FLR from GIM 
side, thus
+* above recieve message could be failed, we should schedule 
the flr_work
+* anyway
+*/
+   if (r) {
+   DRM_ERROR("FLR_NOTIFICATION is missed\n");
+   xgpu_ai_mailbox_send_ack(adev);
+   }
+
+   schedule_work(>virt.flr_work);
}
 
return 0;
-- 
2.7.4

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[PATCH 1/7] amd/scheduler:imple job skip feature(v2)

2017-10-26 Thread Monk Liu
jobs are skipped under two cases
1)when the entity behind this job marked guilty, the job
poped from this entity's queue will be dropped in sched_main loop.

2)in job_recovery(), skip the scheduling job if its karma detected
above limit, and also skipped as well for other jobs sharing the
same fence context. this approach is becuase job_recovery() cannot
access job->entity due to entity may already dead.

v2:
some logic fix

with this feature we can introduce new gpu recover feature.

Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++--
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 54 ---
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
 3 files changed, 47 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
index a58e3c5..f08fde9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
@@ -177,7 +177,7 @@ static struct dma_fence *amdgpu_job_dependency(struct 
amd_sched_job *sched_job)
return fence;
 }
 
-static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job)
+static struct dma_fence *amdgpu_job_run(struct amd_sched_job *sched_job, bool 
skip)
 {
struct dma_fence *fence = NULL;
struct amdgpu_device *adev;
@@ -194,10 +194,11 @@ static struct dma_fence *amdgpu_job_run(struct 
amd_sched_job *sched_job)
BUG_ON(amdgpu_sync_peek_fence(>sync, NULL));
 
trace_amdgpu_sched_run_job(job);
-   /* skip ib schedule when vram is lost */
-   if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
+
+   if (skip || job->vram_lost_counter != 
atomic_read(>vram_lost_counter)) {
+   /* skip ib schedule if looks needed, and set error */
dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
-   DRM_ERROR("Skip scheduling IBs!\n");
+   DRM_INFO("Skip scheduling IBs!\n");
} else {
r = amdgpu_ib_schedule(job->ring, job->num_ibs, job->ibs, job,
   );
diff --git a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c 
b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
index 9cbeade..995661e 100644
--- a/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
+++ b/drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
@@ -330,6 +330,28 @@ static bool amd_sched_entity_add_dependency_cb(struct 
amd_sched_entity *entity)
return false;
 }
 
+static void amd_sched_job_fake_signal(struct amd_sched_job *job)
+{
+   struct amd_sched_fence *s_fence = job->s_fence;
+   struct amd_gpu_scheduler *sched = job->sched;
+   struct amd_sched_entity *entity = job->s_entity;
+
+   dma_fence_set_error(_fence->finished, -ECANCELED);
+
+   /* fake signaling the scheduled fence */
+   atomic_inc(>hw_rq_count);
+   amd_sched_fence_scheduled(s_fence);
+   wake_up(>job_scheduled);
+
+   /* fake signaling the finished fence */
+   job->s_entity = NULL;
+   spsc_queue_pop(>job_queue);
+
+   amd_sched_process_job(NULL, _fence->cb);
+   dma_fence_put(_fence->finished);
+   sched->ops->free_job(job);
+}
+
 static struct amd_sched_job *
 amd_sched_entity_pop_job(struct amd_sched_entity *entity)
 {
@@ -344,6 +366,11 @@ amd_sched_entity_pop_job(struct amd_sched_entity *entity)
if (amd_sched_entity_add_dependency_cb(entity))
return NULL;
 
+   if (entity->guilty && atomic_read(entity->guilty)) {
+   amd_sched_job_fake_signal(sched_job);
+   return NULL;
+   }
+
sched_job->s_entity = NULL;
spsc_queue_pop(>job_queue);
return sched_job;
@@ -441,13 +468,6 @@ static void amd_sched_job_timedout(struct work_struct 
*work)
job->sched->ops->timedout_job(job);
 }
 
-static void amd_sched_set_guilty(struct amd_sched_job *s_job)
-{
-   if (atomic_inc_return(_job->karma) > s_job->sched->hang_limit)
-   if (s_job->s_entity->guilty)
-   atomic_set(s_job->s_entity->guilty, 1);
-}
-
 void amd_sched_hw_job_reset(struct amd_gpu_scheduler *sched, struct 
amd_sched_job *bad)
 {
struct amd_sched_job *s_job;
@@ -466,7 +486,7 @@ void amd_sched_hw_job_reset(struct amd_gpu_scheduler 
*sched, struct amd_sched_jo
}
spin_unlock(>job_list_lock);
 
-   if (bad) {
+   if (bad && atomic_inc_return(>karma) > bad->sched->hang_limit) {
bool found = false;
 
for (i = AMD_SCHED_PRIORITY_MIN; i < AMD_SCHED_PRIORITY_MAX; 
i++ ) {
@@ -476,7 +496,8 @@ void amd_sched_hw_job_reset(struct amd_gpu_scheduler 
*sched, struct amd_sched_jo
list_for_each_entry_safe(entity, tmp, >entities, 
list) {
if (bad->s_fence->scheduled.context == 
entity->fence_context) {
 

[PATCH 3/7] drm/amdgpu:cleanup in_sriov_reset and lock_reset

2017-10-26 Thread Monk Liu
since now gpu reset is unified with gpu_recover
for both bare-metal and SR-IOV:

1)rename in_sriov_reset to in_gpu_reset
2)move lock_reset from adev->virt to adev

Change-Id: I9f4dbab9a4c916fbc156f669824d15ddcd0f2322
Signed-off-by: Monk Liu 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 9 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c   | 2 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   | 1 -
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c  | 6 +++---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c  | 6 +++---
 8 files changed, 15 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 335df11..6e89be5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1650,7 +1650,8 @@ struct amdgpu_device {
 
/* record last mm index being written through WREG32*/
unsigned long last_mm_index;
-   boolin_sriov_reset;
+   boolin_gpu_reset;
+   struct mutex  lock_reset;
 };
 
 static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a2f9a7f..4cf1146 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2161,6 +2161,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
mutex_init(>mn_lock);
mutex_init(>virt.vf_errors.lock);
hash_init(adev->mn_hash);
+   mutex_init(>lock_reset);
 
amdgpu_check_arguments(adev);
 
@@ -2963,9 +2964,9 @@ int amdgpu_gpu_recover(struct amdgpu_device *adev, struct 
amdgpu_job *job)
 
dev_info(adev->dev, "GPU reset begin!\n");
 
-   mutex_lock(>virt.lock_reset);
+   mutex_lock(>lock_reset);
atomic_inc(>gpu_reset_counter);
-   adev->in_sriov_reset = 1;
+   adev->in_gpu_reset = 1;
 
/* block TTM */
resched = ttm_bo_lock_delayed_workqueue(>mman.bdev);
@@ -3075,8 +3076,8 @@ int amdgpu_gpu_recover(struct amdgpu_device *adev, struct 
amdgpu_job *job)
}
 
amdgpu_vf_error_trans_all(adev);
-   adev->in_sriov_reset = 0;
-   mutex_unlock(>virt.lock_reset);
+   adev->in_gpu_reset = 0;
+   mutex_unlock(>lock_reset);
return r;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 447d446..76f531b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -264,7 +264,7 @@ static int psp_hw_start(struct psp_context *psp)
struct amdgpu_device *adev = psp->adev;
int ret;
 
-   if (!amdgpu_sriov_vf(adev) || !adev->in_sriov_reset) {
+   if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) {
ret = psp_bootloader_load_sysdrv(psp);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index 6564902..edc37cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -370,7 +370,7 @@ int amdgpu_ucode_init_bo(struct amdgpu_device *adev)
return 0;
}
 
-   if (!amdgpu_sriov_vf(adev) || !adev->in_sriov_reset) {
+   if (!amdgpu_sriov_vf(adev) || !adev->in_gpu_reset) {
err = amdgpu_bo_create(adev, adev->firmware.fw_size, PAGE_SIZE, 
true,
amdgpu_sriov_vf(adev) ? 
AMDGPU_GEM_DOMAIN_VRAM : AMDGPU_GEM_DOMAIN_GTT,
AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index e97f80f..c249725 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -107,8 +107,6 @@ void amdgpu_virt_init_setting(struct amdgpu_device *adev)
adev->enable_virtual_display = true;
adev->cg_flags = 0;
adev->pg_flags = 0;
-
-   mutex_init(>virt.lock_reset);
 }
 
 uint32_t amdgpu_virt_kiq_rreg(struct amdgpu_device *adev, uint32_t reg)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
index 3a661aa..a710384 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
@@ -238,7 +238,6 @@ struct amdgpu_virt {
uint64_tcsa_vmid0_addr;
bool chained_ib_support;
uint32_treg_val_offs;
-   struct mutexlock_reset;
struct amdgpu_irq_src   ack_irq;
struct amdgpu_irq_src   rcv_irq;
struct work_struct  flr_work;
diff 

[PATCH 0/7] *** gpu recover patches series v2 ***

2017-10-26 Thread Monk Liu
v2 series:

fixed some logic error in "imple job skip feature"
merge two patches into "implement new GPU recover(v3)"


Monk Liu (7):
  amd/scheduler:imple job skip feature(v2)
  drm/amdgpu:implement new GPU recover(v3)
  drm/amdgpu:cleanup in_sriov_reset and lock_reset
  drm/amdgpu:cleanup ucode_init_bo
  drm/amdgpu:block kms open during gpu_reset
  drm/amdgpu/sriov:fix memory leak in psp_load_fw
  drm/amdgpu:fix random missing of FLR NOTIFY

 drivers/gpu/drm/amd/amdgpu/amdgpu.h   |   9 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 311 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c |  10 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c   |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  14 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c   |   3 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c   |  22 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c |   4 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c  |   2 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h  |   2 -
 drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c |   6 +-
 drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c |   6 +-
 drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c |  16 +-
 drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c |   2 +-
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.c |  54 +++--
 drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |   2 +-
 16 files changed, 236 insertions(+), 229 deletions(-)

-- 
2.7.4

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[PATCH] drm/amd/powerplay: describe the PCIE link speed in right GT/s

2017-10-26 Thread Evan Quan
Change-Id: Icfd2c50ce168d8ccf3cc329eb906a56bab0a8c1d
Signed-off-by: Evan Quan 
---
 drivers/gpu/drm/amd/amdgpu/ci_dpm.c| 6 +++---
 drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c   | 6 +++---
 drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c 
b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index 68b505c..5a60c16 100644
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -6625,9 +6625,9 @@ static int ci_dpm_print_clock_levels(void *handle,
 
for (i = 0; i < pcie_table->count; i++)
size += sprintf(buf + size, "%d: %s %s\n", i,
-   (pcie_table->dpm_levels[i].value == 0) 
? "2.5GB, x1" :
-   (pcie_table->dpm_levels[i].value == 1) 
? "5.0GB, x16" :
-   (pcie_table->dpm_levels[i].value == 2) 
? "8.0GB, x16" : "",
+   (pcie_table->dpm_levels[i].value == 0) 
? "2.5GT/s, x1" :
+   (pcie_table->dpm_levels[i].value == 1) 
? "5.0GT/s, x16" :
+   (pcie_table->dpm_levels[i].value == 2) 
? "8.0GT/s, x16" : "",
(i == now) ? "*" : "");
break;
default:
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 4466469..ed17af4 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4339,9 +4339,9 @@ static int smu7_print_clock_levels(struct pp_hwmgr *hwmgr,
 
for (i = 0; i < pcie_table->count; i++)
size += sprintf(buf + size, "%d: %s %s\n", i,
-   (pcie_table->dpm_levels[i].value == 0) 
? "2.5GB, x8" :
-   (pcie_table->dpm_levels[i].value == 1) 
? "5.0GB, x16" :
-   (pcie_table->dpm_levels[i].value == 2) 
? "8.0GB, x16" : "",
+   (pcie_table->dpm_levels[i].value == 0) 
? "2.5GT/s, x8" :
+   (pcie_table->dpm_levels[i].value == 1) 
? "5.0GT/s, x16" :
+   (pcie_table->dpm_levels[i].value == 2) 
? "8.0GT/s, x16" : "",
(i == now) ? "*" : "");
break;
default:
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c 
b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
index 203ef10..d947e17 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
@@ -4647,9 +4647,9 @@ static int vega10_print_clock_levels(struct pp_hwmgr 
*hwmgr,
 
for (i = 0; i < pcie_table->count; i++)
size += sprintf(buf + size, "%d: %s %s\n", i,
-   (pcie_table->pcie_gen[i] == 0) ? 
"2.5GB, x1" :
-   (pcie_table->pcie_gen[i] == 1) ? 
"5.0GB, x16" :
-   (pcie_table->pcie_gen[i] == 2) ? 
"8.0GB, x16" : "",
+   (pcie_table->pcie_gen[i] == 0) ? 
"2.5GT/s, x1" :
+   (pcie_table->pcie_gen[i] == 1) ? 
"5.0GT/s, x16" :
+   (pcie_table->pcie_gen[i] == 2) ? 
"8.0GT/s, x16" : "",
(i == now) ? "*" : "");
break;
default:
-- 
2.7.4

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RE: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Liu, Monk
When amdgpu_gpu_recover() routine is in the fly, we shouldn't let UMD open our 
device, otherwise the VM init would be ruined by gpu_recover().

e.g. VM init need to create page table, but keep In mind that gpu_recover() 
calls ASIC RESET, 

if we don't block device open while gpu doing recover, the vm init (SDMA 
working on page table creating) would be ruined by ASIC RESET

do you have any good solution ? the key point is avoid/delay/push_back hw 
activities from UMD side when we are running in gpu_recover() function 

BR Monk

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] 
Sent: 2017年10月26日 15:18
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

NAK, why the heck should we do this? It would just block all new processes from 
using the device.

Christian.

Am 25.10.2017 um 11:22 schrieb Monk Liu:
> Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 4a9f749..c155ce4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
> drm_file *file_priv)
>   if (r < 0)
>   return r;
>   
> + if (adev->in_gpu_reset)
> + return -ENODEV;
> +
>   fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
>   if (unlikely(!fpriv)) {
>   r = -ENOMEM;


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Re: [PATCH 4/9] drm/amdgpu:replace deprecated gpu reset

2017-10-26 Thread Christian König

I spit the patch due to convenience for reviewing

Thought so, but this way we can't see the delta for reviewing.

Splitting up in multiple patches makes only sense if you can limit the 
patch to one component or functionality change at a time.


Christian.

Am 26.10.2017 um 10:13 schrieb Liu, Monk:

Yeah I know I can squash them,

I spit the patch due to convenience for reviewing

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com]
Sent: 2017年10月26日 15:13
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/9] drm/amdgpu:replace deprecated gpu reset

Am 25.10.2017 um 11:22 schrieb Monk Liu:

now use new gpu recover

Might be better to squash together with the previous patch.

This one doesn't introduce new functionality, but only removes the old code and 
switches over to the new one.




Change-Id: Ieccd25772c47c0e710ad81537a3dd0c1767585a1
Signed-off-by: Monk Liu 
---
   drivers/gpu/drm/amd/amdgpu/amdgpu.h|   2 +-
   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 298 
-
   drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  |  10 +-
   drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c|   2 +-
   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c|   5 +-
   drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   |   1 -
   drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c  |   2 +-
   drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c  |   2 +-
   8 files changed, 10 insertions(+), 312 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 003668f..335df11 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1844,7 +1844,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
   #define amdgpu_psp_check_fw_loading_status(adev, i) 
(adev)->firmware.funcs->check_fw_loading_status((adev), (i))
   
   /* Common functions */

-int amdgpu_gpu_reset(struct amdgpu_device *adev);
+int amdgpu_gpu_recover(struct amdgpu_device *adev, struct amdgpu_job* job);
   bool amdgpu_need_backup(struct amdgpu_device *adev);
   void amdgpu_pci_config_reset(struct amdgpu_device *adev);
   bool amdgpu_need_post(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 0db3b3c..a2f9a7f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2818,304 +2818,6 @@ static int amdgpu_recover_vram_from_shadow(struct 
amdgpu_device *adev,
return r;
   }
   
-/**

- * amdgpu_sriov_gpu_reset - reset the asic
- *
- * @adev: amdgpu device pointer
- * @job: which job trigger hang
- *
- * Attempt the reset the GPU if it has hung (all asics).
- * for SRIOV case.
- * Returns 0 for success or an error on failure.
- */
-int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job)
-{
-   int i, j, r = 0;
-   int resched;
-   struct amdgpu_bo *bo, *tmp;
-   struct amdgpu_ring *ring;
-   struct dma_fence *fence = NULL, *next = NULL;
-
-   mutex_lock(>virt.lock_reset);
-   atomic_inc(>gpu_reset_counter);
-   adev->in_sriov_reset = true;
-
-   /* block TTM */
-   resched = ttm_bo_lock_delayed_workqueue(>mman.bdev);
-
-   /* we start from the ring trigger GPU hang */
-   j = job ? job->ring->idx : 0;
-
-   /* block scheduler */
-   for (i = j; i < j + AMDGPU_MAX_RINGS; ++i) {
-   ring = adev->rings[i % AMDGPU_MAX_RINGS];
-   if (!ring || !ring->sched.thread)
-   continue;
-
-   kthread_park(ring->sched.thread);
-
-   if (job && j != i)
-   continue;
-
-   /* here give the last chance to check if job removed from 
mirror-list
-* since we already pay some time on kthread_park */
-   if (job && list_empty(>base.node)) {
-   kthread_unpark(ring->sched.thread);
-   goto give_up_reset;
-   }
-
-   if (amd_sched_invalidate_job(>base, amdgpu_job_hang_limit))
-   amd_sched_job_kickout(>base);
-
-   /* only do job_reset on the hang ring if @job not NULL */
-   amd_sched_hw_job_reset(>sched, NULL);
-
-   /* after all hw jobs are reset, hw fence is meaningless, so 
force_completion */
-   amdgpu_fence_driver_force_completion(ring);
-   }
-
-   /* request to take full control of GPU before re-initialization  */
-   if (job)
-   amdgpu_virt_reset_gpu(adev);
-   else
-   amdgpu_virt_request_full_gpu(adev, true);
-
-
-   /* Resume IP prior to SMC */
-   amdgpu_sriov_reinit_early(adev);
-
-   /* we need recover gart prior to run SMC/CP/SDMA resume */
-   amdgpu_ttm_recover_gart(adev);
-
-   /* now we are okay to resume SMC/CP/SDMA */
-   amdgpu_sriov_reinit_late(adev);
-
-   

RE: [PATCH 4/9] drm/amdgpu:replace deprecated gpu reset

2017-10-26 Thread Liu, Monk
Yeah I know I can squash them,

I spit the patch due to convenience for reviewing 

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] 
Sent: 2017年10月26日 15:13
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 4/9] drm/amdgpu:replace deprecated gpu reset

Am 25.10.2017 um 11:22 schrieb Monk Liu:
> now use new gpu recover

Might be better to squash together with the previous patch.

This one doesn't introduce new functionality, but only removes the old code and 
switches over to the new one.



>
> Change-Id: Ieccd25772c47c0e710ad81537a3dd0c1767585a1
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu.h|   2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 298 
> -
>   drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c  |  10 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c|   2 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c|   5 +-
>   drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h   |   1 -
>   drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c  |   2 +-
>   drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c  |   2 +-
>   8 files changed, 10 insertions(+), 312 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> index 003668f..335df11 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
> @@ -1844,7 +1844,7 @@ amdgpu_get_sdma_instance(struct amdgpu_ring *ring)
>   #define amdgpu_psp_check_fw_loading_status(adev, i) 
> (adev)->firmware.funcs->check_fw_loading_status((adev), (i))
>   
>   /* Common functions */
> -int amdgpu_gpu_reset(struct amdgpu_device *adev);
> +int amdgpu_gpu_recover(struct amdgpu_device *adev, struct amdgpu_job* job);
>   bool amdgpu_need_backup(struct amdgpu_device *adev);
>   void amdgpu_pci_config_reset(struct amdgpu_device *adev);
>   bool amdgpu_need_post(struct amdgpu_device *adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 0db3b3c..a2f9a7f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -2818,304 +2818,6 @@ static int amdgpu_recover_vram_from_shadow(struct 
> amdgpu_device *adev,
>   return r;
>   }
>   
> -/**
> - * amdgpu_sriov_gpu_reset - reset the asic
> - *
> - * @adev: amdgpu device pointer
> - * @job: which job trigger hang
> - *
> - * Attempt the reset the GPU if it has hung (all asics).
> - * for SRIOV case.
> - * Returns 0 for success or an error on failure.
> - */
> -int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job 
> *job)
> -{
> - int i, j, r = 0;
> - int resched;
> - struct amdgpu_bo *bo, *tmp;
> - struct amdgpu_ring *ring;
> - struct dma_fence *fence = NULL, *next = NULL;
> -
> - mutex_lock(>virt.lock_reset);
> - atomic_inc(>gpu_reset_counter);
> - adev->in_sriov_reset = true;
> -
> - /* block TTM */
> - resched = ttm_bo_lock_delayed_workqueue(>mman.bdev);
> -
> - /* we start from the ring trigger GPU hang */
> - j = job ? job->ring->idx : 0;
> -
> - /* block scheduler */
> - for (i = j; i < j + AMDGPU_MAX_RINGS; ++i) {
> - ring = adev->rings[i % AMDGPU_MAX_RINGS];
> - if (!ring || !ring->sched.thread)
> - continue;
> -
> - kthread_park(ring->sched.thread);
> -
> - if (job && j != i)
> - continue;
> -
> - /* here give the last chance to check if job removed from 
> mirror-list
> -  * since we already pay some time on kthread_park */
> - if (job && list_empty(>base.node)) {
> - kthread_unpark(ring->sched.thread);
> - goto give_up_reset;
> - }
> -
> - if (amd_sched_invalidate_job(>base, amdgpu_job_hang_limit))
> - amd_sched_job_kickout(>base);
> -
> - /* only do job_reset on the hang ring if @job not NULL */
> - amd_sched_hw_job_reset(>sched, NULL);
> -
> - /* after all hw jobs are reset, hw fence is meaningless, so 
> force_completion */
> - amdgpu_fence_driver_force_completion(ring);
> - }
> -
> - /* request to take full control of GPU before re-initialization  */
> - if (job)
> - amdgpu_virt_reset_gpu(adev);
> - else
> - amdgpu_virt_request_full_gpu(adev, true);
> -
> -
> - /* Resume IP prior to SMC */
> - amdgpu_sriov_reinit_early(adev);
> -
> - /* we need recover gart prior to run SMC/CP/SDMA resume */
> - amdgpu_ttm_recover_gart(adev);
> -
> - /* now we are okay to resume SMC/CP/SDMA */
> - amdgpu_sriov_reinit_late(adev);
> -
> - amdgpu_irq_gpu_reset_resume_helper(adev);
> -
> - if (amdgpu_ib_ring_tests(adev))
> - dev_err(adev->dev, "[GPU_RESET] ib ring test failed (%d).\n", 
> r);
> -
> -  

RE: [PATCH 2/9] amd/scheduler:imple job skip feature

2017-10-26 Thread Liu, Monk
Christian

Looks something is misunderstanding in this patch:
> - if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
> +
> + if (skip || job->vram_lost_counter != 
> atomic_read(>vram_lost_counter)) {
> + /* skip ib schedule if looks needed, and set error */
>   dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
> - DRM_ERROR("Skip scheduling IBs!\n");
> + DRM_INFO("Skip scheduling IBs!\n");

Not really needed, we could just use amd_sched_job_fake_signal() here as well.

[ml] the @skip parameter is needed, and we cannot use "fake signal", because 
"fake signal" may already called in entity_pop_job() stage
We skip job at two place, one is in entity_pop_job() if scheduler can detect 
the job is guilty in that time
Another one is in run_job() by this @skip in job_recovery(),

> @@ -510,9 +524,17 @@ void amd_sched_job_recovery(struct amd_gpu_scheduler 
> *sched)
>   list_for_each_entry_safe(s_job, tmp, >ring_mirror_list, node) {
>   struct amd_sched_fence *s_fence = s_job->s_fence;
>   struct dma_fence *fence;
> + bool found_guilty = false, skip;
> + uint64_t guilty_context;

Well if you want the variables to have an effect you should probably move them 
outside the loop. Otherwise the code doesn't make much sense to me.

[ML] yeah, that's an error, will fix it !



> +static void amd_sched_job_fake_signal(struct amd_sched_job *job) {
> + struct amd_sched_fence *s_fence = job->s_fence;
> +
> + dma_fence_set_error(>s_fence->finished, -ECANCELED);
> + /* fake signaling the scheduled fence */
> + amd_sched_fence_scheduled(s_fence);
> + /* fake signaling the finished fence */
> + dma_fence_put(>s_fence->finished);
> + job->sched->ops->free_job(job);

Well signaling the finished fence will free the job as well, won't it?

[ML] no, fake signal is invoked before begin_job(), so the job_finish_cb 
callback haven't been hooked in "finished" fence, that's why
I manually call "free_job()", but keep in mind that WAIT_CS may already called 
so we still rely on signaling the "finished" fence to wakeup
The WAIT_CS,


> + if (entity->guilty && atomic_read(entity->guilty)) {
> + amd_sched_job_fake_signal(sched_job);
> + sched_job = NULL;
> + }
> +

This must come after the spsc_queue_pop() below, otherwise you mess up the spsc 
queue.

[ML] yes, I also noticed that error, will fix the sequence !

-Original Message-
From: Christian König [mailto:ckoenig.leichtzumer...@gmail.com] 
Sent: 2017年10月26日 15:06
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/9] amd/scheduler:imple job skip feature

Am 25.10.2017 um 11:22 schrieb Monk Liu:
> jobs are skipped under two cases
> 1)when the entity behind this job marked guilty, the job poped from 
> this entity's queue will be dropped in sched_main loop.
>
> 2)in job_recovery(), skip the scheduling job if its karma detected 
> above limit, and also skipped as well for other jobs sharing the same 
> fence context. this approach is becuase job_recovery() cannot access 
> job->entity due to entity may already dead.
>
> with this feature we can introduce new gpu recover feature.

Sorry for the delay, totally swamped once more at the moment.

>
> Change-Id: I268b1c752c94e6ecd4ea78c87eb226ea3f52908a
> Signed-off-by: Monk Liu 
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_job.c   |  9 +++---
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.c | 46 
> +++
>   drivers/gpu/drm/amd/scheduler/gpu_scheduler.h |  2 +-
>   3 files changed, 39 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> index a58e3c5..f08fde9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
> @@ -177,7 +177,7 @@ static struct dma_fence *amdgpu_job_dependency(struct 
> amd_sched_job *sched_job)
>   return fence;
>   }
>   
> -static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> *sched_job)
> +static struct dma_fence *amdgpu_job_run(struct amd_sched_job 
> +*sched_job, bool skip)
>   {
>   struct dma_fence *fence = NULL;
>   struct amdgpu_device *adev;
> @@ -194,10 +194,11 @@ static struct dma_fence *amdgpu_job_run(struct 
> amd_sched_job *sched_job)
>   BUG_ON(amdgpu_sync_peek_fence(>sync, NULL));
>   
>   trace_amdgpu_sched_run_job(job);
> - /* skip ib schedule when vram is lost */
> - if (job->vram_lost_counter != atomic_read(>vram_lost_counter)) {
> +
> + if (skip || job->vram_lost_counter != 
> atomic_read(>vram_lost_counter)) {
> + /* skip ib schedule if looks needed, and set error */
>   dma_fence_set_error(>base.s_fence->finished, -ECANCELED);
> - DRM_ERROR("Skip scheduling IBs!\n");
> + DRM_INFO("Skip scheduling IBs!\n");

Not 

Re: Upstream repo for libhsakmt

2017-10-26 Thread Oded Gabbay
I have no problem.
Do you think you could send me a pull request ?

In any case, we probably should add more people to the project's git
access list.

Oded

On Thu, Oct 26, 2017 at 6:37 AM, Tom Stellard  wrote:
> On 10/24/2017 10:24 AM, Oded Gabbay wrote:
>> Hi Tom,
>> I have commit access.
>
> What do you think about merging Felix's branch?
>
> -Tom
>
>> Oded
>>
>> On Oct 24, 2017 7:30 PM, "Tom Stellard" > > wrote:
>>
>> On 10/17/2017 09:14 AM, Andres Rodriguez wrote:
>> > If I remember correctly, it should be John B.
>> >
>>
>> Hi John,
>>
>> Do you have commit access for this repo:
>>
>> https://cgit.freedesktop.org/amd/hsakmt/ 
>> 
>>
>> Thanks,
>> Tom
>>
>> > Regards,
>> > Andres
>> >
>> > On 2017-10-17 11:42 AM, Felix Kuehling wrote:
>> >> I didn't even know about the freedesktop repository. Do you know who 
>> has
>> >> commit access to that?
>> >>
>> >> Regards,
>> >>Felix
>> >>
>> >>
>> >> On 2017-10-16 10:44 PM, Tom Stellard wrote:
>> >>> Hi Felix,
>> >>>
>> >>> What do you think about merging your fxkamd/drm-next-wip into the
>> >>> master branch of the hsakmt repository of freedesktop[1]?
>> >>>
>> >>> Fedora is already packaging code from the freedesktop repository,
>> >>> and it might help to distinguish between the ROCm thunk and the 
>> upstream
>> >>> thunk by keeping them in separate repos.
>> >>>
>> >>> -Tom
>> >>>
>> >>> [1]https://cgit.freedesktop.org/amd/hsakmt/ 
>> 
>> >>
>> >> ___
>> >> amd-gfx mailing list
>> >> amd-gfx@lists.freedesktop.org 
>> >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx 
>> 
>> >>
>>
>>
>>
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>>
>
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Re: [PATCH 02/16] drm/amdkfd: Don't dereference kfd_process.mm

2017-10-26 Thread Christian König

Am 21.10.2017 um 02:23 schrieb Felix Kuehling:

The kfd_process doesn't own a reference to the mm_struct, so it can
disappear without warning even while the kfd_process still exists.
In fact, the delayed kfd_process teardown is triggered by an MMU
notifier when the mm_struct is destroyed. Permanently holding a
reference to the mm_struct would prevent this from happening.

Therefore, avoid dereferencing the kfd_process.mm pointer and make
it opaque. Use get_task_mm to get a temporary reference to the mm
when it's needed.


Actually that patch is unnecessary.

Process tear down (and calling the MMU release callback) is triggered 
when mm_struct->mm_users reaches zero.


The mm_struct is freed up when mm_struct->mm_count becomes zero.

So what you can do is grab a reference to the mm_struct with mmgrab() 
and still be notified by process tear down.


Regards,
Christian.



Signed-off-by: Felix Kuehling 
---
  drivers/gpu/drm/amd/amdkfd/kfd_events.c  | 19 +++
  drivers/gpu/drm/amd/amdkfd/kfd_priv.h|  7 ++-
  drivers/gpu/drm/amd/amdkfd/kfd_process.c |  6 +-
  3 files changed, 26 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_events.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
index 944abfa..61ce547 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_events.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_events.c
@@ -24,8 +24,8 @@
  #include 
  #include 
  #include 
+#include 
  #include 
-#include 
  #include 
  #include 
  #include "kfd_priv.h"
@@ -904,14 +904,24 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, unsigned 
int pasid,
 * running so the lookup function returns a locked process.
 */
struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
+   struct mm_struct *mm;
  
  	if (!p)

return; /* Presumably process exited. */
  
+	/* Take a safe reference to the mm_struct, which may otherwise

+* disappear even while the kfd_process is still referenced.
+*/
+   mm = get_task_mm(p->lead_thread);
+   if (!mm) {
+   mutex_unlock(>mutex);
+   return; /* Process is exiting */
+   }
+
memset(_exception_data, 0, sizeof(memory_exception_data));
  
-	down_read(>mm->mmap_sem);

-   vma = find_vma(p->mm, address);
+   down_read(>mmap_sem);
+   vma = find_vma(mm, address);
  
  	memory_exception_data.gpu_id = dev->id;

memory_exception_data.va = address;
@@ -937,7 +947,8 @@ void kfd_signal_iommu_event(struct kfd_dev *dev, unsigned 
int pasid,
}
}
  
-	up_read(>mm->mmap_sem);

+   up_read(>mmap_sem);
+   mmput(mm);
  
  	mutex_lock(>event_mutex);
  
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h

index 7d86ec9..1a483a7 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h
@@ -494,7 +494,12 @@ struct kfd_process {
 */
struct hlist_node kfd_processes;
  
-	struct mm_struct *mm;

+   /*
+* Opaque pointer to mm_struct. We don't hold a reference to
+* it so it should never be dereferenced from here. This is
+* only used for looking up processes by their mm.
+*/
+   void *mm;
  
  	struct mutex mutex;
  
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_process.c b/drivers/gpu/drm/amd/amdkfd/kfd_process.c

index 3ccb3b5..21d27e5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_process.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_process.c
@@ -200,7 +200,11 @@ static void kfd_process_destroy_delayed(struct rcu_head 
*rcu)
struct kfd_process *p;
  
  	p = container_of(rcu, struct kfd_process, rcu);

-   WARN_ON(atomic_read(>mm->mm_count) <= 0);
+   /*
+* This cast should be safe here because we grabbed a
+* reference to the mm in kfd_process_notifier_release
+*/
+   WARN_ON(atomic_read(&((struct mm_struct *)p->mm)->mm_count) <= 0);
  
  	mmdrop(p->mm);
  



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Re: [PATCH 9/9] drm/amdgpu:fix random missing of FLR NOTIFY

2017-10-26 Thread Christian König

Am 25.10.2017 um 11:22 schrieb Monk Liu:

Signed-off-by: Monk Liu 


No idea if this is correct or not, but it looks like an important fix 
which should go into the branch first.


Feel free to add my Acked-by: Christian König .

Regards,
Christian.


---
  drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 14 +++---
  1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c 
b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
index f8522a0..a43cffb 100644
--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c
@@ -282,9 +282,17 @@ static int xgpu_ai_mailbox_rcv_irq(struct amdgpu_device 
*adev,
/* see what event we get */
r = xgpu_ai_mailbox_rcv_msg(adev, IDH_FLR_NOTIFICATION);
  
-		/* only handle FLR_NOTIFY now */

-   if (!r)
-   schedule_work(>virt.flr_work);
+   /* sometimes the interrupt is delayed to inject to VM, so under 
such case
+* the IDH_FLR_NOTIFICATION is overwritten by VF FLR from GIM 
side, thus
+* above recieve message could be failed, we should schedule 
the flr_work
+* anyway
+*/
+   if (r) {
+   DRM_ERROR("FLR_NOTIFICATION is missed\n");
+   xgpu_ai_mailbox_send_ack(adev);
+   }
+
+   schedule_work(>virt.flr_work);
}
  
  	return 0;



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Re: [PATCH 8/9] drm/amdgpu/sriov:fix memory leak in psp_load_fw

2017-10-26 Thread Christian König

Am 25.10.2017 um 11:22 schrieb Monk Liu:

for SR-IOV when doing gpu reset this routine shouldn't do
resource allocating otherwise memory leak


Can't judge if this patch is correct or not, but fixing the whitespaces 
should be a separate patch.


Christian.



Change-Id: I25da3a5b475196c75c7e639adc40751754625968
Signed-off-by: Monk Liu 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 20 
  1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 76f531b..2157d45 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -334,23 +334,26 @@ static int psp_load_fw(struct amdgpu_device *adev)
int ret;
struct psp_context *psp = >psp;
  
+	if (amdgpu_sriov_vf(adev) && adev->in_gpu_reset != 0)

+   goto skip_memalloc;
+
psp->cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!psp->cmd)
return -ENOMEM;
  
  	ret = amdgpu_bo_create_kernel(adev, PSP_1_MEG, PSP_1_MEG,

- AMDGPU_GEM_DOMAIN_GTT,
- >fw_pri_bo,
- >fw_pri_mc_addr,
- >fw_pri_buf);
+   AMDGPU_GEM_DOMAIN_GTT,
+   >fw_pri_bo,
+   >fw_pri_mc_addr,
+   >fw_pri_buf);
if (ret)
goto failed;
  
  	ret = amdgpu_bo_create_kernel(adev, PSP_FENCE_BUFFER_SIZE, PAGE_SIZE,

- AMDGPU_GEM_DOMAIN_VRAM,
- >fence_buf_bo,
- >fence_buf_mc_addr,
- >fence_buf);
+   AMDGPU_GEM_DOMAIN_VRAM,
+   >fence_buf_bo,
+   >fence_buf_mc_addr,
+   >fence_buf);
if (ret)
goto failed_mem2;
  
@@ -375,6 +378,7 @@ static int psp_load_fw(struct amdgpu_device *adev)

if (ret)
goto failed_mem;
  
+skip_memalloc:

ret = psp_hw_start(psp);
if (ret)
goto failed_mem;



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Re: [PATCH 7/9] drm/amdgpu:block kms open during gpu_reset

2017-10-26 Thread Christian König
NAK, why the heck should we do this? It would just block all new 
processes from using the device.


Christian.

Am 25.10.2017 um 11:22 schrieb Monk Liu:

Change-Id: Ibdb0ea9e3769d572fbbc13bbf1ef73f1af2ab7be
Signed-off-by: Monk Liu 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 3 +++
  1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 4a9f749..c155ce4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -813,6 +813,9 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
if (r < 0)
return r;
  
+	if (adev->in_gpu_reset)

+   return -ENODEV;
+
fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
if (unlikely(!fpriv)) {
r = -ENOMEM;



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