RE: [PATCH] drm/amdgpu: handle userptr corner cases with HMM path
Since you're addressing two distinct bugs, please split this into two patches.
For the multiple VMAs, should we generalize that to handle any number of VMAs?
It's not a typical case, but you could easily construct situations with
mprotect where different parts of the same buffer have different VMAs and then
register that as a single user pointer. Or you could user MAP_FIXED to map
multiple files to adjacent virtual addresses.
There may be two ways to handle this:
1. If the userptr address range spans more than one VMA, fail
2. Loop over all the VMAs in the address range
Thanks,
Felix
-Original Message-
From: amd-gfx On Behalf Of Yang, Philip
Sent: Friday, March 01, 2019 12:30 PM
To: amd-gfx@lists.freedesktop.org
Cc: Yang, Philip
Subject: [PATCH] drm/amdgpu: handle userptr corner cases with HMM path
Those corner cases are found by kfdtest.KFDIPCTest.
userptr may cross two vmas if the forked child process (not call exec
after fork) malloc buffer, then free it, and then malloc larger size
buf, kerenl will create new vma adjacent to old vma which was cloned
from parent process, some pages of userptr are in the first vma, the
rest pages are in the second vma. HMM expects range only have one vma,
we have to use two ranges to handle this case. See is_mergeable_anon_vma
in mm/mmap.c for details.
kfd userptr restore may have concurrent userptr invalidation, reschedule
to restore and then needs call hmm_vma_range_done to remove range from
hmm->ranges list, otherwise hmm_vma_fault add same range to the list
will cause loop in the list because range->next point to range itself.
Change-Id: I641ba7406c32bd8b7ae715f52bd896d53fe56801
Signed-off-by: Philip Yang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 28 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 73 +--
2 files changed, 71 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index f8104760f1e6..179af9d3ab19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1738,6 +1738,23 @@ static int update_invalid_user_pages(struct
amdkfd_process_info *process_info,
return 0;
}
+/* Untrack invalid userptr BOs
+ *
+ * Stop HMM track the userptr update
+ */
+static void untrack_invalid_user_pages(struct amdkfd_process_info
*process_info)
+{
+ struct kgd_mem *mem, *tmp_mem;
+ struct amdgpu_bo *bo;
+
+ list_for_each_entry_safe(mem, tmp_mem,
+_info->userptr_inval_list,
+validate_list.head) {
+ bo = mem->bo;
+ amdgpu_ttm_tt_get_user_pages_done(bo->tbo.ttm);
+ }
+}
+
/* Validate invalid userptr BOs
*
* Validates BOs on the userptr_inval_list, and moves them back to the
@@ -1855,12 +1872,7 @@ static int validate_invalid_user_pages(struct
amdkfd_process_info *process_info)
out_free:
kfree(pd_bo_list_entries);
out_no_mem:
- list_for_each_entry_safe(mem, tmp_mem,
-_info->userptr_inval_list,
-validate_list.head) {
- bo = mem->bo;
- amdgpu_ttm_tt_get_user_pages_done(bo->tbo.ttm);
- }
+ untrack_invalid_user_pages(process_info);
return ret;
}
@@ -1904,8 +1916,10 @@ static void amdgpu_amdkfd_restore_userptr_worker(struct
work_struct *work)
* and we can just restart the queues.
*/
if (!list_empty(_info->userptr_inval_list)) {
- if (atomic_read(_info->evicted_bos) != evicted_bos)
+ if (atomic_read(_info->evicted_bos) != evicted_bos) {
+ untrack_invalid_user_pages(process_info);
goto unlock_out; /* Concurrent eviction, try again */
+ }
if (validate_invalid_user_pages(process_info))
goto unlock_out;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index cd0ccfbbcb84..e5736225f513 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -711,7 +711,7 @@ struct amdgpu_ttm_tt {
struct task_struct *usertask;
uint32_tuserflags;
#if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
- struct hmm_rangerange;
+ struct hmm_rangerange, range2;
#endif
};
@@ -727,58 +727,81 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm,
struct page **pages)
{
struct amdgpu_ttm_tt *gtt = (void *)ttm;
struct mm_struct *mm = gtt->usertask->mm;
- unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
+ unsigned long start = gtt->userptr;
+ unsigned long end = start + ttm->num_pages * PAGE_SIZE;
struct hmm_range *range = >range;
+ struct hmm_range *range2 = >range2;
+ struct
Re: [PATCH] drm/amdgpu/powerplay: Fix missing break in switch statement
On Fri, Mar 1, 2019 at 4:51 PM Gustavo A. R. Silva
wrote:
>
> Add missing break statement in order to prevent the code from falling
> through to case SMU_Discrete_DpmTable.
>
> This bug was found thanks to the ongoing efforts to enable
> -Wimplicit-fallthrough.
>
> Fixes: 34a564eaf528 ("drm/amd/powerplay: implement fw image related smum
> interface for Polaris.")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Gustavo A. R. Silva
Already fixed:
https://cgit.freedesktop.org/~agd5f/linux/commit/?h=drm-next-5.2-wip=6feaa4194c18578623565017f95d1b2f6b243567
Alex
> ---
> drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> index 52abca065764..222fb79d319e 100644
> --- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
> @@ -2330,6 +2330,7 @@ static uint32_t polaris10_get_offsetof(uint32_t type,
> uint32_t member)
> case DRAM_LOG_BUFF_SIZE:
> return offsetof(SMU74_SoftRegisters,
> DRAM_LOG_BUFF_SIZE);
> }
> + break;
> case SMU_Discrete_DpmTable:
> switch (member) {
> case UvdBootLevel:
> --
> 2.21.0
>
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Re: [PATCH] drm/amdgpu/gfx_v8_0: Mark expected switch fall-through
On Fri, Mar 1, 2019 at 3:58 PM Gustavo A. R. Silva wrote: > > In preparation to enabling -Wimplicit-fallthrough, mark switch > cases where we are expecting to fall through. > > This patch fixes the following warning: > > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function > ‘gfx_v8_0_tiling_mode_table_init’: > ./include/linux/device.h:1487:2: warning: this statement may fall through > [-Wimplicit-fallthrough=] > _dev_warn(dev, dev_fmt(fmt), ##__VA_ARGS__) > ^~~ > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:3236:3: note: in expansion of macro > ‘dev_warn’ >dev_warn(adev->dev, >^~~~ > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:3240:2: note: here > case CHIP_CARRIZO: > ^~~~ > > Warning level 3 was used: -Wimplicit-fallthrough=3 > > This patch is part of the ongoing efforts to enable > -Wimplicit-fallthrough. > > Signed-off-by: Gustavo A. R. Silva Applied. thanks! Alex > --- > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > index b8e50a34bdb3..02955e6e9dd9 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > @@ -3236,6 +3236,7 @@ static void gfx_v8_0_tiling_mode_table_init(struct > amdgpu_device *adev) > dev_warn(adev->dev, > "Unknown chip type (%d) in function > gfx_v8_0_tiling_mode_table_init() falling through to CHIP_CARRIZO\n", > adev->asic_type); > + /* fall through */ > > case CHIP_CARRIZO: > modearray[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | > -- > 2.21.0 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amd/powerplay: fix semicolon code style issue
On Thu, Feb 28, 2019 at 8:12 PM Yang Wei wrote:
>
> From: Yang Wei
>
> Delete superfluous semicolons.
>
> Signed-off-by: Yang Wei
Applied. thanks!
Alex
> ---
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8
> drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 2 +-
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> index 9bc27f4..b12c828 100644
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c
> @@ -1304,7 +1304,7 @@ static int pp_notify_smu_enable_pwe(void *handle)
>
> if (hwmgr->hwmgr_func->smus_notify_pwe == NULL) {
> pr_info_ratelimited("%s was not implemented.\n", __func__);
> - return -EINVAL;;
> + return -EINVAL;
> }
>
> mutex_lock(>smu_lock);
> @@ -1341,7 +1341,7 @@ static int pp_set_min_deep_sleep_dcefclk(void *handle,
> uint32_t clock)
>
> if (hwmgr->hwmgr_func->set_min_deep_sleep_dcefclk == NULL) {
> pr_debug("%s was not implemented.\n", __func__);
> - return -EINVAL;;
> + return -EINVAL;
> }
>
> mutex_lock(>smu_lock);
> @@ -1360,7 +1360,7 @@ static int pp_set_hard_min_dcefclk_by_freq(void
> *handle, uint32_t clock)
>
> if (hwmgr->hwmgr_func->set_hard_min_dcefclk_by_freq == NULL) {
> pr_debug("%s was not implemented.\n", __func__);
> - return -EINVAL;;
> + return -EINVAL;
> }
>
> mutex_lock(>smu_lock);
> @@ -1379,7 +1379,7 @@ static int pp_set_hard_min_fclk_by_freq(void *handle,
> uint32_t clock)
>
> if (hwmgr->hwmgr_func->set_hard_min_fclk_by_freq == NULL) {
> pr_debug("%s was not implemented.\n", __func__);
> - return -EINVAL;;
> + return -EINVAL;
> }
>
> mutex_lock(>smu_lock);
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> index 1f92a9f..ffa7d46 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
> @@ -76,7 +76,7 @@ int phm_set_power_state(struct pp_hwmgr *hwmgr,
> int phm_enable_dynamic_state_management(struct pp_hwmgr *hwmgr)
> {
> struct amdgpu_device *adev = NULL;
> - int ret = -EINVAL;;
> + int ret = -EINVAL;
> PHM_FUNC_CHECK(hwmgr);
> adev = hwmgr->adev;
>
> --
> 2.7.4
>
>
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[PATCH] drm/amdgpu/powerplay: Fix missing break in switch statement
Add missing break statement in order to prevent the code from falling
through to case SMU_Discrete_DpmTable.
This bug was found thanks to the ongoing efforts to enable
-Wimplicit-fallthrough.
Fixes: 34a564eaf528 ("drm/amd/powerplay: implement fw image related smum
interface for Polaris.")
Cc: sta...@vger.kernel.org
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index 52abca065764..222fb79d319e 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -2330,6 +2330,7 @@ static uint32_t polaris10_get_offsetof(uint32_t type,
uint32_t member)
case DRAM_LOG_BUFF_SIZE:
return offsetof(SMU74_SoftRegisters,
DRAM_LOG_BUFF_SIZE);
}
+ break;
case SMU_Discrete_DpmTable:
switch (member) {
case UvdBootLevel:
--
2.21.0
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[PATCH] drm/amdgpu/gfx_v8_0: Mark expected switch fall-through
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warning: drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c: In function ‘gfx_v8_0_tiling_mode_table_init’: ./include/linux/device.h:1487:2: warning: this statement may fall through [-Wimplicit-fallthrough=] _dev_warn(dev, dev_fmt(fmt), ##__VA_ARGS__) ^~~ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:3236:3: note: in expansion of macro ‘dev_warn’ dev_warn(adev->dev, ^~~~ drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c:3240:2: note: here case CHIP_CARRIZO: ^~~~ Warning level 3 was used: -Wimplicit-fallthrough=3 This patch is part of the ongoing efforts to enable -Wimplicit-fallthrough. Signed-off-by: Gustavo A. R. Silva --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index b8e50a34bdb3..02955e6e9dd9 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -3236,6 +3236,7 @@ static void gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) dev_warn(adev->dev, "Unknown chip type (%d) in function gfx_v8_0_tiling_mode_table_init() falling through to CHIP_CARRIZO\n", adev->asic_type); + /* fall through */ case CHIP_CARRIZO: modearray[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) | -- 2.21.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH xf86-video-ati 2/2] dri2: Call drm_queue_handle_deferred in dri2_deferred_event
Series is:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Michel
Dänzer
Sent: Friday, March 1, 2019 12:35 PM
To: amd-gfx@lists.freedesktop.org
Subject: [PATCH xf86-video-ati 2/2] dri2: Call drm_queue_handle_deferred in
dri2_deferred_event
From: Michel Dänzer
drm_queue_handler just puts the event on the signalled list; without
calling drm_queue_handle_deferred, actual processing of the event may be
delayed indefinitely, e.g. until another event arrives from the kernel.
This could result in DRI2 clients hanging during DPMS off.
Fixes: ba83a866af5a "Add radeon_drm_handle_event wrapper for
drmHandleEvent"
(Ported from amdgpu commit 09be74a3d1dd9604336d9a27f98d132b262dcbaf)
Signed-off-by: Michel Dänzer
---
src/radeon_dri2.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index b5d6835c9..a9f14e8d8 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -979,12 +979,18 @@ CARD32 radeon_dri2_deferred_event(OsTimerPtr timer,
CARD32 now, pointer data)
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
- if (event_info->drm_queue_seq)
+
+ if (event_info->drm_queue_seq) {
drmmode_crtc->drmmode->event_context.
vblank_handler(pRADEONEnt->fd, 0, 0, 0,
(void*)event_info->drm_queue_seq);
- else
+ drmmode_crtc->wait_flip_nesting_level++;
+ radeon_drm_queue_handle_deferred(crtc);
+
+ } else {
radeon_dri2_frame_event_handler(crtc, 0, 0, data);
+ }
+
return 0;
}
/*
@@ -995,13 +1001,18 @@ CARD32 radeon_dri2_deferred_event(OsTimerPtr timer,
CARD32 now, pointer data)
delta_seq = delta_t * drmmode_crtc->dpms_last_fps;
delta_seq /= 100;
frame = (CARD64)drmmode_crtc->dpms_last_seq + delta_seq;
-if (event_info->drm_queue_seq)
+
+if (event_info->drm_queue_seq) {
drmmode_crtc->drmmode->event_context.
vblank_handler(pRADEONEnt->fd, frame, drm_now / 100,
drm_now % 100,
(void*)event_info->drm_queue_seq);
-else
+ drmmode_crtc->wait_flip_nesting_level++;
+ radeon_drm_queue_handle_deferred(crtc);
+} else {
radeon_dri2_frame_event_handler(crtc, frame, drm_now, data);
+}
+
return 0;
}
--
2.20.1
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[PATCH] drm/amdgpu: handle userptr corner cases with HMM path
Those corner cases are found by kfdtest.KFDIPCTest.
userptr may cross two vmas if the forked child process (not call exec
after fork) malloc buffer, then free it, and then malloc larger size
buf, kerenl will create new vma adjacent to old vma which was cloned
from parent process, some pages of userptr are in the first vma, the
rest pages are in the second vma. HMM expects range only have one vma,
we have to use two ranges to handle this case. See is_mergeable_anon_vma
in mm/mmap.c for details.
kfd userptr restore may have concurrent userptr invalidation, reschedule
to restore and then needs call hmm_vma_range_done to remove range from
hmm->ranges list, otherwise hmm_vma_fault add same range to the list
will cause loop in the list because range->next point to range itself.
Change-Id: I641ba7406c32bd8b7ae715f52bd896d53fe56801
Signed-off-by: Philip Yang
---
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 28 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 73 +--
2 files changed, 71 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index f8104760f1e6..179af9d3ab19 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -1738,6 +1738,23 @@ static int update_invalid_user_pages(struct
amdkfd_process_info *process_info,
return 0;
}
+/* Untrack invalid userptr BOs
+ *
+ * Stop HMM track the userptr update
+ */
+static void untrack_invalid_user_pages(struct amdkfd_process_info
*process_info)
+{
+ struct kgd_mem *mem, *tmp_mem;
+ struct amdgpu_bo *bo;
+
+ list_for_each_entry_safe(mem, tmp_mem,
+_info->userptr_inval_list,
+validate_list.head) {
+ bo = mem->bo;
+ amdgpu_ttm_tt_get_user_pages_done(bo->tbo.ttm);
+ }
+}
+
/* Validate invalid userptr BOs
*
* Validates BOs on the userptr_inval_list, and moves them back to the
@@ -1855,12 +1872,7 @@ static int validate_invalid_user_pages(struct
amdkfd_process_info *process_info)
out_free:
kfree(pd_bo_list_entries);
out_no_mem:
- list_for_each_entry_safe(mem, tmp_mem,
-_info->userptr_inval_list,
-validate_list.head) {
- bo = mem->bo;
- amdgpu_ttm_tt_get_user_pages_done(bo->tbo.ttm);
- }
+ untrack_invalid_user_pages(process_info);
return ret;
}
@@ -1904,8 +1916,10 @@ static void amdgpu_amdkfd_restore_userptr_worker(struct
work_struct *work)
* and we can just restart the queues.
*/
if (!list_empty(_info->userptr_inval_list)) {
- if (atomic_read(_info->evicted_bos) != evicted_bos)
+ if (atomic_read(_info->evicted_bos) != evicted_bos) {
+ untrack_invalid_user_pages(process_info);
goto unlock_out; /* Concurrent eviction, try again */
+ }
if (validate_invalid_user_pages(process_info))
goto unlock_out;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index cd0ccfbbcb84..e5736225f513 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -711,7 +711,7 @@ struct amdgpu_ttm_tt {
struct task_struct *usertask;
uint32_tuserflags;
#if IS_ENABLED(CONFIG_DRM_AMDGPU_USERPTR)
- struct hmm_rangerange;
+ struct hmm_rangerange, range2;
#endif
};
@@ -727,58 +727,81 @@ int amdgpu_ttm_tt_get_user_pages(struct ttm_tt *ttm,
struct page **pages)
{
struct amdgpu_ttm_tt *gtt = (void *)ttm;
struct mm_struct *mm = gtt->usertask->mm;
- unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
+ unsigned long start = gtt->userptr;
+ unsigned long end = start + ttm->num_pages * PAGE_SIZE;
struct hmm_range *range = >range;
+ struct hmm_range *range2 = >range2;
+ struct vm_area_struct *vma, *vma_next = NULL;
+ uint64_t *pfns, f;
int r = 0, i;
if (!mm) /* Happens during process shutdown */
return -ESRCH;
- amdgpu_hmm_init_range(range);
-
down_read(>mmap_sem);
- range->vma = find_vma(mm, gtt->userptr);
- if (!range_in_vma(range->vma, gtt->userptr, end))
- r = -EFAULT;
- else if ((gtt->userflags & AMDGPU_GEM_USERPTR_ANONONLY) &&
- range->vma->vm_file)
+ /* user pages may cross vma bound */
+ vma = find_vma(mm, start);
+ if (unlikely(!range_in_vma(vma, start, end))) {
+ vma_next = find_extend_vma(mm, end);
+ if (unlikely(!vma_next)) {
+ r = -EFAULT;
+ goto out;
+ }
+
[PATCH xf86-video-ati 1/2] present: Check that flip and screen pixmap pitches match
From: Michel Dänzer If they don't, flipping will result in corrupted display. Test case: * Run Xorg at 1920x1080 with no window manager * glxgears -geometry 2048x1080 The Present extension code in xserver 1.21 will check for this. (Ported from amdgpu commit a636f42b496b0604ca00a144690ece61d1a88a27) Signed-off-by: Michel Dänzer --- src/radeon_present.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/radeon_present.c b/src/radeon_present.c index 0b55117eb..38a9a6b79 100644 --- a/src/radeon_present.c +++ b/src/radeon_present.c @@ -256,7 +256,7 @@ radeon_present_check_flip(RRCrtcPtr crtc, WindowPtr window, PixmapPtr pixmap, ScrnInfoPtr scrn = xf86_crtc->scrn; xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn); RADEONInfoPtr info = RADEONPTR(scrn); -PixmapPtr screen_pixmap; +PixmapPtr screen_pixmap = screen->GetScreenPixmap(screen); int num_crtcs_on; int i; @@ -272,10 +272,14 @@ radeon_present_check_flip(RRCrtcPtr crtc, WindowPtr window, PixmapPtr pixmap, if (info->drmmode.dri2_flipping) return FALSE; +#if XORG_VERSION_CURRENT <= XORG_VERSION_NUMERIC(1, 20, 99, 1, 0) +if (pixmap->devKind != screen_pixmap->devKind) + return FALSE; +#endif + /* The kernel driver doesn't handle flipping between BOs with different * tiling parameters correctly yet */ -screen_pixmap = screen->GetScreenPixmap(screen); if (radeon_present_get_pixmap_tiling_flags(info, pixmap) != radeon_present_get_pixmap_tiling_flags(info, screen_pixmap)) return FALSE; -- 2.20.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH xf86-video-ati 2/2] dri2: Call drm_queue_handle_deferred in dri2_deferred_event
From: Michel Dänzer
drm_queue_handler just puts the event on the signalled list; without
calling drm_queue_handle_deferred, actual processing of the event may be
delayed indefinitely, e.g. until another event arrives from the kernel.
This could result in DRI2 clients hanging during DPMS off.
Fixes: ba83a866af5a "Add radeon_drm_handle_event wrapper for
drmHandleEvent"
(Ported from amdgpu commit 09be74a3d1dd9604336d9a27f98d132b262dcbaf)
Signed-off-by: Michel Dänzer
---
src/radeon_dri2.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
index b5d6835c9..a9f14e8d8 100644
--- a/src/radeon_dri2.c
+++ b/src/radeon_dri2.c
@@ -979,12 +979,18 @@ CARD32 radeon_dri2_deferred_event(OsTimerPtr timer,
CARD32 now, pointer data)
if (ret) {
xf86DrvMsg(scrn->scrnIndex, X_ERROR,
"%s cannot get current time\n", __func__);
- if (event_info->drm_queue_seq)
+
+ if (event_info->drm_queue_seq) {
drmmode_crtc->drmmode->event_context.
vblank_handler(pRADEONEnt->fd, 0, 0, 0,
(void*)event_info->drm_queue_seq);
- else
+ drmmode_crtc->wait_flip_nesting_level++;
+ radeon_drm_queue_handle_deferred(crtc);
+
+ } else {
radeon_dri2_frame_event_handler(crtc, 0, 0, data);
+ }
+
return 0;
}
/*
@@ -995,13 +1001,18 @@ CARD32 radeon_dri2_deferred_event(OsTimerPtr timer,
CARD32 now, pointer data)
delta_seq = delta_t * drmmode_crtc->dpms_last_fps;
delta_seq /= 100;
frame = (CARD64)drmmode_crtc->dpms_last_seq + delta_seq;
-if (event_info->drm_queue_seq)
+
+if (event_info->drm_queue_seq) {
drmmode_crtc->drmmode->event_context.
vblank_handler(pRADEONEnt->fd, frame, drm_now / 100,
drm_now % 100,
(void*)event_info->drm_queue_seq);
-else
+ drmmode_crtc->wait_flip_nesting_level++;
+ radeon_drm_queue_handle_deferred(crtc);
+} else {
radeon_dri2_frame_event_handler(crtc, frame, drm_now, data);
+}
+
return 0;
}
--
2.20.1
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Re: [PATCH] drm/amdgpu: fix compile warnings
On 2019-03-01 11:46 a.m., Wentland, Harry wrote:
> On 2019-03-01 11:43 a.m., Bhawanpreet Lakha wrote:
>> Fixes the warnings below
>>
>> warning: ‘ta_hdr’ may be used uninitialized in this function
>> [-Wmaybe-uninitialized]
>> warning: ISO C90 forbids mixed declarations and code
>> [-Wdeclaration-after-statement]
>> warning: unused variable ‘ras_cmd’ [-Wunused-variable]
>> warning: comparison of distinct pointer types lacks a cast
>> Signed-off-by: Bhawanpreet Lakha
>
> If these are all based on the one RAS patch please leave a Fixes: tag with
> that patch.
>
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
>> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 -
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++--
>> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
>> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 2 +-
>> 5 files changed, 5 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 933822eb1227..0bbbc7cd2bea 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -927,7 +927,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file
>> if (!ras)
>> return -EINVAL;
>> return copy_to_user(out, >features,
>> -min(size, sizeof(ras->features))) ? -EFAULT : 0;
>> +min((size_t)size, sizeof(ras->features))) ?
>> -EFAULT : 0;
>
> shouldn't need the 2nd size_t case (on sizeof)
whoops, copy-pasted the comment from an earlier iteration. just ignore.
Harry
>
>> }
>> default:
>> DRM_DEBUG_KMS("Invalid request %d\n", info->query);
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>> index 607c696db56b..7e3e1d588d74 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
>> @@ -654,7 +654,6 @@ static int psp_ras_terminate(struct psp_context *psp)
>>
>> static int psp_ras_initialize(struct psp_context *psp)
>> {
>> -struct ta_ras_shared_memory *ras_cmd;
>> int ret;
>>
>> if (!psp->ras.ras_initialized) {
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> index 604762263221..29552e39816c 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
>> @@ -142,7 +142,7 @@ static ssize_t amdgpu_ras_debugfs_read(struct file *f,
>> char __user *buf,
>> return 0;
>>
>> s -= *pos;
>> -s = min(s, size);
>> +s = min((size_t)s, size);
>
> size is already size_t, no need to cast that again
>
> With those fixed this patch is
> Reviewed-by: Harry Wentland
>
> Harry
>
>>
>> if (copy_to_user(buf, [*pos], s))
>> return -EINVAL;
>> @@ -159,7 +159,7 @@ static ssize_t amdgpu_ras_debugfs_write(struct file *f,
>> const char __user *buf,
>> struct ras_inject_if info = {
>> .head = obj->head,
>> };
>> -ssize_t s = min(64ULL, size);
>> +ssize_t s = min((size_t)64ULL, size);
>> char val[64];
>> char *str = val;
>> memset(val, 0, sizeof(val));
>> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> index e1d3bef5a60c..88c45f990f05 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
>> @@ -4813,11 +4813,11 @@ static int gfx_v9_0_cp_ecc_error_irq(struct
>> amdgpu_device *adev,
>>struct amdgpu_irq_src *source,
>>struct amdgpu_iv_entry *entry)
>> {
>> -DRM_ERROR("CP ECC ERROR IRQ\n");
>> struct ras_dispatch_if ih_data = {
>> .head = *adev->gfx.ras_if,
>> .entry = entry,
>> };
>> +DRM_ERROR("CP ECC ERROR IRQ\n");
>> amdgpu_ras_interrupt_dispatch(adev, _data);
>> return 0;
>> }
>> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
>> b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
>> index 8f694968c0ad..2f6f82d13cc8 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
>> @@ -48,7 +48,7 @@ static int psp_v11_0_init_microcode(struct psp_context
>> *psp)
>> int err = 0;
>> const struct psp_firmware_header_v1_0 *sos_hdr;
>> const struct psp_firmware_header_v1_0 *asd_hdr;
>> -const struct ta_firmware_header_v1_0 *ta_hdr;
>> +const struct ta_firmware_header_v1_0 *ta_hdr = NULL;
>>
>> DRM_DEBUG("\n");
>>
>>
> ___
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> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
___
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Re: [PATCH] drm/amdgpu: fix compile warnings
On 2019-03-01 11:43 a.m., Bhawanpreet Lakha wrote:
> Fixes the warnings below
>
> warning: ‘ta_hdr’ may be used uninitialized in this function
> [-Wmaybe-uninitialized]
> warning: ISO C90 forbids mixed declarations and code
> [-Wdeclaration-after-statement]
> warning: unused variable ‘ras_cmd’ [-Wunused-variable]
> warning: comparison of distinct pointer types lacks a cast
> Signed-off-by: Bhawanpreet Lakha
If these are all based on the one RAS patch please leave a Fixes: tag with that
patch.
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 -
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 2 +-
> 5 files changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> index 933822eb1227..0bbbc7cd2bea 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
> @@ -927,7 +927,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
> *data, struct drm_file
> if (!ras)
> return -EINVAL;
> return copy_to_user(out, >features,
> - min(size, sizeof(ras->features))) ? -EFAULT : 0;
> + min((size_t)size, sizeof(ras->features))) ?
> -EFAULT : 0;
shouldn't need the 2nd size_t case (on sizeof)
> }
> default:
> DRM_DEBUG_KMS("Invalid request %d\n", info->query);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 607c696db56b..7e3e1d588d74 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -654,7 +654,6 @@ static int psp_ras_terminate(struct psp_context *psp)
>
> static int psp_ras_initialize(struct psp_context *psp)
> {
> - struct ta_ras_shared_memory *ras_cmd;
> int ret;
>
> if (!psp->ras.ras_initialized) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 604762263221..29552e39816c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -142,7 +142,7 @@ static ssize_t amdgpu_ras_debugfs_read(struct file *f,
> char __user *buf,
> return 0;
>
> s -= *pos;
> - s = min(s, size);
> + s = min((size_t)s, size);
size is already size_t, no need to cast that again
With those fixed this patch is
Reviewed-by: Harry Wentland
Harry
>
> if (copy_to_user(buf, [*pos], s))
> return -EINVAL;
> @@ -159,7 +159,7 @@ static ssize_t amdgpu_ras_debugfs_write(struct file *f,
> const char __user *buf,
> struct ras_inject_if info = {
> .head = obj->head,
> };
> - ssize_t s = min(64ULL, size);
> + ssize_t s = min((size_t)64ULL, size);
> char val[64];
> char *str = val;
> memset(val, 0, sizeof(val));
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index e1d3bef5a60c..88c45f990f05 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -4813,11 +4813,11 @@ static int gfx_v9_0_cp_ecc_error_irq(struct
> amdgpu_device *adev,
> struct amdgpu_irq_src *source,
> struct amdgpu_iv_entry *entry)
> {
> - DRM_ERROR("CP ECC ERROR IRQ\n");
> struct ras_dispatch_if ih_data = {
> .head = *adev->gfx.ras_if,
> .entry = entry,
> };
> + DRM_ERROR("CP ECC ERROR IRQ\n");
> amdgpu_ras_interrupt_dispatch(adev, _data);
> return 0;
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index 8f694968c0ad..2f6f82d13cc8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -48,7 +48,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> int err = 0;
> const struct psp_firmware_header_v1_0 *sos_hdr;
> const struct psp_firmware_header_v1_0 *asd_hdr;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> + const struct ta_firmware_header_v1_0 *ta_hdr = NULL;
>
> DRM_DEBUG("\n");
>
>
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[PATCH] drm/amdgpu: fix compile warnings
Fixes the warnings below
warning: ‘ta_hdr’ may be used uninitialized in this function
[-Wmaybe-uninitialized]
warning: ISO C90 forbids mixed declarations and code
[-Wdeclaration-after-statement]
warning: unused variable ‘ras_cmd’ [-Wunused-variable]
warning: comparison of distinct pointer types lacks a cast
Signed-off-by: Bhawanpreet Lakha
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 2 +-
5 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 933822eb1227..0bbbc7cd2bea 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -927,7 +927,7 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
if (!ras)
return -EINVAL;
return copy_to_user(out, >features,
- min(size, sizeof(ras->features))) ? -EFAULT : 0;
+ min((size_t)size, sizeof(ras->features))) ?
-EFAULT : 0;
}
default:
DRM_DEBUG_KMS("Invalid request %d\n", info->query);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 607c696db56b..7e3e1d588d74 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -654,7 +654,6 @@ static int psp_ras_terminate(struct psp_context *psp)
static int psp_ras_initialize(struct psp_context *psp)
{
- struct ta_ras_shared_memory *ras_cmd;
int ret;
if (!psp->ras.ras_initialized) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 604762263221..29552e39816c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -142,7 +142,7 @@ static ssize_t amdgpu_ras_debugfs_read(struct file *f, char
__user *buf,
return 0;
s -= *pos;
- s = min(s, size);
+ s = min((size_t)s, size);
if (copy_to_user(buf, [*pos], s))
return -EINVAL;
@@ -159,7 +159,7 @@ static ssize_t amdgpu_ras_debugfs_write(struct file *f,
const char __user *buf,
struct ras_inject_if info = {
.head = obj->head,
};
- ssize_t s = min(64ULL, size);
+ ssize_t s = min((size_t)64ULL, size);
char val[64];
char *str = val;
memset(val, 0, sizeof(val));
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index e1d3bef5a60c..88c45f990f05 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -4813,11 +4813,11 @@ static int gfx_v9_0_cp_ecc_error_irq(struct
amdgpu_device *adev,
struct amdgpu_irq_src *source,
struct amdgpu_iv_entry *entry)
{
- DRM_ERROR("CP ECC ERROR IRQ\n");
struct ras_dispatch_if ih_data = {
.head = *adev->gfx.ras_if,
.entry = entry,
};
+ DRM_ERROR("CP ECC ERROR IRQ\n");
amdgpu_ras_interrupt_dispatch(adev, _data);
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
index 8f694968c0ad..2f6f82d13cc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
@@ -48,7 +48,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
int err = 0;
const struct psp_firmware_header_v1_0 *sos_hdr;
const struct psp_firmware_header_v1_0 *asd_hdr;
- const struct ta_firmware_header_v1_0 *ta_hdr;
+ const struct ta_firmware_header_v1_0 *ta_hdr = NULL;
DRM_DEBUG("\n");
--
2.17.1
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RE: [PATCH] drm/amdgpu: add thick tile mode settings for Oland of gfx6
Reviewed-by: Hawking Zhang Regards, Hawking -Original Message- From: amd-gfx On Behalf Of Tao Zhou Sent: 2019年3月1日 15:47 To: amd-gfx@lists.freedesktop.org Cc: Zhou1, Tao ; Deng, Hui Subject: [PATCH] drm/amdgpu: add thick tile mode settings for Oland of gfx6 Adding thick tile mode for Oland to prevent UMD from getting mode value 0 Change-Id: Ic73265c89e075361452830d673dfd8af9c18ab53 Signed-off-by: Tao Zhou Tested-by: Hui.Deng --- drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c index 305276c7e4bf..c0cb244f58cd 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c @@ -782,6 +782,25 @@ static void gfx_v6_0_tiling_mode_table_init(struct amdgpu_device *adev) BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2); + tilemode[18] = MICRO_TILE_MODE(ADDR_SURF_THIN_MICRO_TILING) | + ARRAY_MODE(ARRAY_1D_TILED_THICK) | + PIPE_CONFIG(ADDR_SURF_P4_8x16); + tilemode[19] = MICRO_TILE_MODE(ADDR_SURF_THIN_MICRO_TILING) | + ARRAY_MODE(ARRAY_2D_TILED_XTHICK) | + PIPE_CONFIG(ADDR_SURF_P4_8x16) | + BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | + BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | + MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | + NUM_BANKS(ADDR_SURF_16_BANK) | + TILE_SPLIT(split_equal_to_row_size); + tilemode[20] = MICRO_TILE_MODE(ADDR_SURF_THIN_MICRO_TILING) | + ARRAY_MODE(ARRAY_2D_TILED_THICK) | + PIPE_CONFIG(ADDR_SURF_P4_8x16) | + BANK_WIDTH(ADDR_SURF_BANK_WIDTH_1) | + BANK_HEIGHT(ADDR_SURF_BANK_HEIGHT_1) | + MACRO_TILE_ASPECT(ADDR_SURF_MACRO_ASPECT_2) | + NUM_BANKS(ADDR_SURF_16_BANK) | + TILE_SPLIT(split_equal_to_row_size); tilemode[21] = MICRO_TILE_MODE(ADDR_SURF_THIN_MICRO_TILING) | ARRAY_MODE(ARRAY_2D_TILED_THIN1) | PIPE_CONFIG(ADDR_SURF_P8_32x32_8x16) | -- 2.17.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH xf86-video-amdgpu] Fix hang when entering into dpms-off mode
> -Original Message- > From: Michel Dänzer > Sent: Friday, March 01, 2019 4:43 PM > To: Liu, Aaron > Cc: amd-gfx@lists.freedesktop.org > Subject: Re: [PATCH xf86-video-amdgpu] Fix hang when entering into dpms- > off mode > > On 2019-03-01 7:37 a.m., Liu, Aaron wrote: > > @Michel Dänzer, > > > > I have reviewed your patch and verified it passed. > > Thanks Aaron, so I assume I can add > > Reviewed-by: Aaron Liu > Tested-by: Aaron Liu > > ? Sure > > > > I couldn't merge this merge request to your master manually. > > Don't worry, I'll merge it via the GitLab merge request UI. > > > -- > Earthling Michel Dänzer | https://www.amd.com > Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH xf86-video-amdgpu] Allow changing DCC parameters between flips
Thanks Marek for the patch, but xf86-video-amdgpu patches are being reviewed as GitLab merge requests since the last release[0]. I'll create a merge request with this patch and some follow-up changes. [0] Isn't README.md clear enough on this? -- Earthling Michel Dänzer | https://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [patch] ras fix patch set
Okay, Thanks for the clarifying. Yes, we will need the interrupt handler. So
let’s just keep the set function as is.
Regards,
Hawking
From: Pan, Xinhui
Sent: 2019年3月1日 16:18
To: Zhang, Hawking ; brahma_sw_dev
; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: RE: [patch] ras fix patch set
#1 can’t drop it, Need install irq handler. irq_get will fail it ->set is empty.
#4, move all codes in the {}… I did not notice it too….
From: Zhang, Hawking mailto:hawking.zh...@amd.com>>
Sent: 2019年3月1日 14:57
To: Pan, Xinhui mailto:xinhui@amd.com>>; brahma_sw_dev
mailto:brahma_sw_...@amd.com>>;
amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
mailto:alexander.deuc...@amd.com>>
Subject: RE: [patch] ras fix patch set
Patch #1
Can you just drop the whole function (sdma_v4_0_ecc_irq_funcs) ?
Patch #4
What the patch actually do seems doesn’t match with the description. I only see
you adjust some code alignment in patch #4, anything I missed?
From: Pan, Xinhui mailto:xinhui@amd.com>>
Sent: 2019年3月1日 14:06
To: brahma_sw_dev mailto:brahma_sw_...@amd.com>>;
amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking mailto:hawking.zh...@amd.com>>;
Deucher, Alexander mailto:alexander.deuc...@amd.com>>
Subject: [patch] ras fix patch set
Hi,
This is to fix some issues reported recently.
1) no need to do sdma irq setting. Ras ta do it.
2) gpu reset is not stable on some boards, so make amdgpu_ras_reset_gpu a
empty function.
3) fix build warnings.
4) ta might be missing, in such case, hit null pointer.
xinhui pan (4):
drm/amdgpu: do not set sdma ecc interrupt
drm/amdgpu: skip gpu reset when ras error occured
drm/amdgpu: fix compile warning
drm/amdgpu: fix NULL pointer when ta is missing
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 3 +++
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 12 ++--
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 11 ---
7 files changed, 14 insertions(+), 22 deletions(-)
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Re: [PATCH xf86-video-amdgpu] Fix hang when entering into dpms-off mode
On 2019-03-01 7:37 a.m., Liu, Aaron wrote: > @Michel Dänzer, > > I have reviewed your patch and verified it passed. Thanks Aaron, so I assume I can add Reviewed-by: Aaron Liu Tested-by: Aaron Liu ? > I couldn't merge this merge request to your master manually. Don't worry, I'll merge it via the GitLab merge request UI. -- Earthling Michel Dänzer | https://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
