Re: [PATCH v3 02/14] mm/mmu_notifier: add an interval tree notifier
On 11/13/19 8:46 AM, Jason Gunthorpe wrote: On Wed, Nov 13, 2019 at 05:59:52AM -0800, Christoph Hellwig wrote: +int mmu_interval_notifier_insert(struct mmu_interval_notifier *mni, + struct mm_struct *mm, unsigned long start, + unsigned long length, + const struct mmu_interval_notifier_ops *ops); +int mmu_interval_notifier_insert_locked( + struct mmu_interval_notifier *mni, struct mm_struct *mm, + unsigned long start, unsigned long length, + const struct mmu_interval_notifier_ops *ops); Very inconsistent indentation between these two related functions. clang-format.. The kernel config is set to prefer a line up under the ( if all the arguments will fit within the 80 cols otherwise it does a 1 tab continuation indent. + /* +* The inv_end incorporates a deferred mechanism like +* rtnl_unlock(). Adds and removes are queued until the final inv_end +* happens then they are progressed. This arrangement for tree updates +* is used to avoid using a blocking lock during +* invalidate_range_start. Nitpick: That comment can be condensed into one less line: The rtnl_unlock can move up a line too. My editor is failing me on this. + /* +* TODO: Since we already have a spinlock above, this would be faster +* as wake_up_q +*/ + if (need_wake) + wake_up_all(_mm->wq); So why is this important enough for a TODO comment, but not important enough to do right away? Lets drop the comment, I'm noto sure wake_up_q is even a function this layer should be calling. Actually, I think you can remove the "need_wake" variable since it is unconditionally set to "true". Also, the comment in__mmu_interval_notifier_insert() says "mni->mr_invalidate_seq" and I think that should be "mni->invalidate_seq". ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu: Apply noretry setting for mmhub9.4
On 2019-11-22 5:55 p.m., Oak Zeng wrote:
Config the translation retry behavior according to noretry
kernel parameter
Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
Signed-off-by: Oak Zeng
Suggested-by: Jay Cornwall
Reviewed-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 753eea2..8599bfd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -314,7 +314,8 @@ static void mmhub_v9_4_setup_vmid_config(struct
amdgpu_device *adev, int hubid)
adev->vm_manager.block_size - 9);
/* Send no-retry XNACK on fault to suppress VM fault storm. */
tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT1_CNTL,
- RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
+ RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
+ !amdgpu_noretry);
WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
tmp);
@@ -905,4 +906,4 @@ static void mmhub_v9_4_query_ras_error_count(struct
amdgpu_device *adev,
const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
.ras_late_init = amdgpu_mmhub_ras_late_init,
.query_ras_error_count = mmhub_v9_4_query_ras_error_count,
-};
\ No newline at end of file
+};
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RE: [PATCH] drm/amdgpu: Apply noretry setting for gfx10 and mmhub9.4
I didn't have new information about the retry_mode setting for gfx10. I just
saw the noretry kernel parameter wasn't applied to gfx10 but I didn't know
gfx10 is excluded purposely. Let me drop the gfx10 part for now.
Oak
-Original Message-
From: Kuehling, Felix
Sent: Friday, November 22, 2019 3:51 PM
To: Zeng, Oak ; amd-gfx@lists.freedesktop.org
Cc: Cornwall, Jay
Subject: Re: [PATCH] drm/amdgpu: Apply noretry setting for gfx10 and mmhub9.4
On 2019-11-22 3:23 p.m., Oak Zeng wrote:
> Config the translation retry behavior according to noretry kernel
> parameter
>
> Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
> Signed-off-by: Oak Zeng
> Suggested-by: Jay Cornwall
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++-
> drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 5 +++--
> 2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> index 4d6df35..7435487 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
> @@ -1751,7 +1751,9 @@ static void gfx_v10_0_constants_init(struct
> amdgpu_device *adev)
> for (i = 0; i < adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids; i++) {
> nv_grbm_select(adev, 0, 0, 0, i);
> /* CP and shaders */
> - WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);
> + tmp = REG_SET_FIELD(DEFAULT_SH_MEM_CONFIG, SH_MEM_CONFIG,
> + RETRY_MODE, amdgpu_noretry ? 2 : 0);
> + WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
I didn't fix gfx_v10_0 on purpose last time I worked on this
("75ee64875e75 drm/amdkfd: Consistently apply noretry setting"), because the
retry works differently on GFXv10. Do you have new information about how the
RETRY_MODE setting works on GFXv10? Does it affect performance?
> if (i != 0) {
> tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
> (adev->gmc.private_aperture_start >> 48)); diff
> --git
> a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> index 753eea2..8599bfd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
> @@ -314,7 +314,8 @@ static void mmhub_v9_4_setup_vmid_config(struct
> amdgpu_device *adev, int hubid)
> adev->vm_manager.block_size - 9);
> /* Send no-retry XNACK on fault to suppress VM fault storm. */
> tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT1_CNTL,
> - RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
> + RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
> + !amdgpu_noretry);
Right, this was missed in my previous commit because mmhub_v9_4 was added later.
Regards,
Felix
> WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
> hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
> tmp);
> @@ -905,4 +906,4 @@ static void mmhub_v9_4_query_ras_error_count(struct
> amdgpu_device *adev,
> const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
> .ras_late_init = amdgpu_mmhub_ras_late_init,
> .query_ras_error_count = mmhub_v9_4_query_ras_error_count, -}; \ No
> newline at end of file
> +};
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[PATCH] drm/amdgpu: Apply noretry setting for mmhub9.4
Config the translation retry behavior according to noretry
kernel parameter
Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
Signed-off-by: Oak Zeng
Suggested-by: Jay Cornwall
---
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 753eea2..8599bfd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -314,7 +314,8 @@ static void mmhub_v9_4_setup_vmid_config(struct
amdgpu_device *adev, int hubid)
adev->vm_manager.block_size - 9);
/* Send no-retry XNACK on fault to suppress VM fault storm. */
tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT1_CNTL,
- RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
+ RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
+ !amdgpu_noretry);
WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
tmp);
@@ -905,4 +906,4 @@ static void mmhub_v9_4_query_ras_error_count(struct
amdgpu_device *adev,
const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
.ras_late_init = amdgpu_mmhub_ras_late_init,
.query_ras_error_count = mmhub_v9_4_query_ras_error_count,
-};
\ No newline at end of file
+};
--
2.7.4
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Re: [PATCH 2/2] drm/amdkfd: Move pm_create_runlist_ib() out of pm_send_runlist()
[AMD Official Use Only - Internal Distribution Only]
Hi Felix,
There is no big picture unfortunately, just some improvements that I came to
when navigating the code.
Regarding your suggestion, I have a concern. With the original code in
unmap_queues_cpsch(), if amdkfd_fence_wait_timeout() fails, we won't release
the runlist ib. I am not sure it is by design or just a small bug. If it is by
design (probably for debugging when HWS hang), merging pm_send_unmap_queue and
pm_release_ib together will break the design.
If we agree to move in that direction, I agree with the part of the name
changes because the original names are prone to cause confusion.
Regards,
Yong
From: Kuehling, Felix
Sent: Friday, November 22, 2019 4:21 PM
To: Zhao, Yong ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdkfd: Move pm_create_runlist_ib() out of
pm_send_runlist()
I'm not sure about this one. Looks like the interface is getting
needlessly more complicated. Now the caller has to keep track of the
runlist IB address and size just to pass those to another function. I
could understand this if there was a use case that needs to separate the
allocation of the runlist and sending it to the HW. But I don't see that.
Some background for why I think the interface is the way it is: The
runlist IB is continuously executed by the HWS firmware. If the runlist
is oversubscribed, the HWS firmware will loop through it. So the IB must
remain allocated until pm_send_unmap_queue is called. Currently
pm_send_runlist creates the runlist IB and sends it to the HWS. You're
separating that into creation and sending. Do you see a case where you
need to send the same runlist multiple times? Or do something else
between creating the runlist and sending it to the HWS?
pm_release_ib releases the runlist IB, assuming that he HWS is no longer
using it. Maybe this could be combined with pm_send_unmap_queue. I'm not
100% sure because there are some filter parameters that may leave some
queues mapped. If the two can be combined, I'd suggest the following
name and interface changes to reflect how I think this is being used today:
* pm_send_runlist -> pm_create_and_send_runlist
* pm_send_unmap_queue + pm_release_ib -> pm_preempt_and_free_runlist
I see you're doing a lot of cleanup and refactoring in this area of the
code. Is there some bigger picture here, some idea of the end-state
you're trying to get to? Knowing where you're going with this may make
it easier to review the code.
Regards,
Felix
On 2019-11-21 4:26 p.m., Yong Zhao wrote:
> This is consistent with the calling sequence in unmap_queues_cpsch().
>
> Change-Id: Ieb6714422c812d4f6ebbece34e339871471e4b5e
> Signed-off-by: Yong Zhao
> ---
> .../drm/amd/amdkfd/kfd_device_queue_manager.c | 18 +++--
> .../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 20 +--
> drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 7 ++-
> 3 files changed, 27 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 510f2d1bb8bb..fd7d90136b94 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -1302,6 +1302,8 @@ static int unmap_sdma_queues(struct
> device_queue_manager *dqm)
> static int map_queues_cpsch(struct device_queue_manager *dqm)
> {
>int retval;
> + uint64_t rl_ib_gpu_addr;
> + size_t rl_ib_size;
>
>if (!dqm->sched_running)
>return 0;
> @@ -1310,15 +1312,27 @@ static int map_queues_cpsch(struct
> device_queue_manager *dqm)
>if (dqm->active_runlist)
>return 0;
>
> - retval = pm_send_runlist(>packets, >queues);
> + retval = pm_create_runlist_ib(>packets, >queues,
> + _ib_gpu_addr, _ib_size);
> + if (retval)
> + goto fail_create_runlist_ib;
> +
> + pr_debug("runlist IB address: 0x%llX\n", rl_ib_gpu_addr);
> +
> + retval = pm_send_runlist(>packets, >queues,
> + rl_ib_gpu_addr, rl_ib_size);
>pr_debug("%s sent runlist\n", __func__);
>if (retval) {
>pr_err("failed to execute runlist\n");
> - return retval;
> + goto fail_create_runlist_ib;
>}
>dqm->active_runlist = true;
>
>return retval;
> +
> +fail_create_runlist_ib:
> + pm_destroy_runlist_ib(>packets);
> + return retval;
> }
>
> /* dqm->lock mutex has to be locked before calling this function */
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> index 4a9433257428..6ec54e9f9392 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
> @@ -116,7 +116,7 @@ static int pm_allocate_runlist_ib(struct packet_manager
[PATCH 3/4] ALSA: hda/hdmi - enable runtime pm for newer AMD display audio
We are able to power down the GPU and audio via the GPU driver
so flag these asics as supporting runtime pm.
Reviewed-by: Takashi Iwai
Acked-by: Evan Quan
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 35 +++
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 79ca97d6c811..111b9a869162 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2599,27 +2599,38 @@ static const struct pci_device_id azx_ids[] = {
{ PCI_DEVICE(0x1002, 0xaac8),
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
{ PCI_DEVICE(0x1002, 0xaad8),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
- { PCI_DEVICE(0x1002, 0xaae8),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xaae0),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
+ { PCI_DEVICE(0x1002, 0xaae8),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xaaf0),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xaaf8),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab00),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab08),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab10),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab18),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab20),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
{ PCI_DEVICE(0x1002, 0xab38),
- .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS |
+ AZX_DCAPS_PM_RUNTIME },
/* VIA VT8251/VT8237A */
{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
/* VIA GFX VT7122/VX900 */
--
2.23.0
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[PATCH 0/4] add runtime pm support for AMD display audio
These patches were originally part of a larger set of patches to enabled runtime pm support on the GPU side[1]. However, the patches are useful on their own there are really no dependencies, other than the fact that you need both for runtime pm to kick in on the GPU side. The GPU side will be landing for 5.6; I'd like to land the audio side as well. Thanks, Alex [1]: https://patchwork.freedesktop.org/series/67885/ Alex Deucher (4): ALSA: hda/hdmi - fix vgaswitcheroo detection for AMD ALSA: hda/hdmi - Add new pci ids for AMD GPU display audio ALSA: hda/hdmi - enable runtime pm for newer AMD display audio ALSA: hda/hdmi - enable automatic runtime pm for AMD HDMI codecs by default sound/pci/hda/hda_intel.c | 80 +++--- sound/pci/hda/patch_hdmi.c | 1 + 2 files changed, 76 insertions(+), 5 deletions(-) -- 2.23.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/4] ALSA: hda/hdmi - fix vgaswitcheroo detection for AMD
Only enable the vga_switcheroo logic on systems with the
ATPX ACPI method. This logic is not needed for asics
that are not part of a PX (PowerXpress)/HG (Hybrid Graphics)
platform.
Reviewed-by: Takashi Iwai
Acked-by: Evan Quan
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 45 +++
1 file changed, 45 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 240f4ca76391..3ebc7b2a897f 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -35,6 +35,7 @@
#include
#include
#include
+#include
#ifdef CONFIG_X86
/* for snoop control */
@@ -1393,6 +1394,34 @@ static int azx_dev_free(struct snd_device *device)
}
#ifdef SUPPORT_VGA_SWITCHEROO
+#ifdef CONFIG_ACPI
+/* ATPX is in the integrated GPU's namespace */
+static bool atpx_present(void)
+{
+ struct pci_dev *pdev = NULL;
+ acpi_handle dhandle, atpx_handle;
+ acpi_status status;
+
+ while ((pdev = pci_get_class(PCI_BASE_CLASS_DISPLAY << 16, pdev)) !=
NULL) {
+ dhandle = ACPI_HANDLE(>dev);
+ if (dhandle) {
+ status = acpi_get_handle(dhandle, "ATPX", _handle);
+ if (!ACPI_FAILURE(status)) {
+ pci_dev_put(pdev);
+ return true;
+ }
+ }
+ pci_dev_put(pdev);
+ }
+ return false;
+}
+#else
+static bool atpx_present(void)
+{
+ return false;
+}
+#endif
+
/*
* Check of disabled HDMI controller by vga_switcheroo
*/
@@ -1404,6 +1433,22 @@ static struct pci_dev *get_bound_vga(struct pci_dev *pci)
switch (pci->vendor) {
case PCI_VENDOR_ID_ATI:
case PCI_VENDOR_ID_AMD:
+ if (pci->devfn == 1) {
+ p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
+ pci->bus->number, 0);
+ if (p) {
+ /* ATPX is in the integrated GPU's ACPI
namespace
+* rather than the dGPU's namespace. However,
+* the dGPU is the one who is involved in
+* vgaswitcheroo.
+*/
+ if (((p->class >> 16) ==
PCI_BASE_CLASS_DISPLAY) &&
+ atpx_present())
+ return p;
+ pci_dev_put(p);
+ }
+ }
+ break;
case PCI_VENDOR_ID_NVIDIA:
if (pci->devfn == 1) {
p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
--
2.23.0
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[PATCH 4/4] ALSA: hda/hdmi - enable automatic runtime pm for AMD HDMI codecs by default
So that we can power down the GPU and audio to save power. Reviewed-by: Takashi Iwai Acked-by: Evan Quan Signed-off-by: Alex Deucher --- sound/pci/hda/patch_hdmi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c index 795cbda32cbb..8785fcc850b9 100644 --- a/sound/pci/hda/patch_hdmi.c +++ b/sound/pci/hda/patch_hdmi.c @@ -3961,6 +3961,7 @@ static int atihdmi_init(struct hda_codec *codec) ATI_VERB_SET_MULTICHANNEL_MODE, ATI_MULTICHANNEL_MODE_SINGLE); } + codec->auto_runtime_pm = 1; return 0; } -- 2.23.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 2/4] ALSA: hda/hdmi - Add new pci ids for AMD GPU display audio
These are needed so we can enable runtime pm in a subsequent
patch.
Reviewed-by: Takashi Iwai
Signed-off-by: Alex Deucher
---
sound/pci/hda/hda_intel.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 3ebc7b2a897f..79ca97d6c811 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -2606,6 +2606,20 @@ static const struct pci_device_id azx_ids[] = {
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
{ PCI_DEVICE(0x1002, 0xaaf0),
.driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xaaf8),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab00),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab08),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab10),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab18),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab20),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
+ { PCI_DEVICE(0x1002, 0xab38),
+ .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
/* VIA VT8251/VT8237A */
{ PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
/* VIA GFX VT7122/VX900 */
--
2.23.0
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Re: [PATCH 2/2] drm/amdkfd: Move pm_create_runlist_ib() out of pm_send_runlist()
I'm not sure about this one. Looks like the interface is getting
needlessly more complicated. Now the caller has to keep track of the
runlist IB address and size just to pass those to another function. I
could understand this if there was a use case that needs to separate the
allocation of the runlist and sending it to the HW. But I don't see that.
Some background for why I think the interface is the way it is: The
runlist IB is continuously executed by the HWS firmware. If the runlist
is oversubscribed, the HWS firmware will loop through it. So the IB must
remain allocated until pm_send_unmap_queue is called. Currently
pm_send_runlist creates the runlist IB and sends it to the HWS. You're
separating that into creation and sending. Do you see a case where you
need to send the same runlist multiple times? Or do something else
between creating the runlist and sending it to the HWS?
pm_release_ib releases the runlist IB, assuming that he HWS is no longer
using it. Maybe this could be combined with pm_send_unmap_queue. I'm not
100% sure because there are some filter parameters that may leave some
queues mapped. If the two can be combined, I'd suggest the following
name and interface changes to reflect how I think this is being used today:
* pm_send_runlist -> pm_create_and_send_runlist
* pm_send_unmap_queue + pm_release_ib -> pm_preempt_and_free_runlist
I see you're doing a lot of cleanup and refactoring in this area of the
code. Is there some bigger picture here, some idea of the end-state
you're trying to get to? Knowing where you're going with this may make
it easier to review the code.
Regards,
Felix
On 2019-11-21 4:26 p.m., Yong Zhao wrote:
This is consistent with the calling sequence in unmap_queues_cpsch().
Change-Id: Ieb6714422c812d4f6ebbece34e339871471e4b5e
Signed-off-by: Yong Zhao
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 18 +++--
.../gpu/drm/amd/amdkfd/kfd_packet_manager.c | 20 +--
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 7 ++-
3 files changed, 27 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 510f2d1bb8bb..fd7d90136b94 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -1302,6 +1302,8 @@ static int unmap_sdma_queues(struct device_queue_manager
*dqm)
static int map_queues_cpsch(struct device_queue_manager *dqm)
{
int retval;
+ uint64_t rl_ib_gpu_addr;
+ size_t rl_ib_size;
if (!dqm->sched_running)
return 0;
@@ -1310,15 +1312,27 @@ static int map_queues_cpsch(struct device_queue_manager
*dqm)
if (dqm->active_runlist)
return 0;
- retval = pm_send_runlist(>packets, >queues);
+ retval = pm_create_runlist_ib(>packets, >queues,
+ _ib_gpu_addr, _ib_size);
+ if (retval)
+ goto fail_create_runlist_ib;
+
+ pr_debug("runlist IB address: 0x%llX\n", rl_ib_gpu_addr);
+
+ retval = pm_send_runlist(>packets, >queues,
+ rl_ib_gpu_addr, rl_ib_size);
pr_debug("%s sent runlist\n", __func__);
if (retval) {
pr_err("failed to execute runlist\n");
- return retval;
+ goto fail_create_runlist_ib;
}
dqm->active_runlist = true;
return retval;
+
+fail_create_runlist_ib:
+ pm_destroy_runlist_ib(>packets);
+ return retval;
}
/* dqm->lock mutex has to be locked before calling this function */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
index 4a9433257428..6ec54e9f9392 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c
@@ -116,7 +116,7 @@ static int pm_allocate_runlist_ib(struct packet_manager *pm,
return retval;
}
-static int pm_create_runlist_ib(struct packet_manager *pm,
+int pm_create_runlist_ib(struct packet_manager *pm,
struct list_head *queues,
uint64_t *rl_gpu_addr,
size_t *rl_size_bytes)
@@ -149,7 +149,6 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
/* build map process packet */
if (proccesses_mapped >= pm->dqm->processes_count) {
pr_debug("Not enough space left in runlist IB\n");
- pm_destroy_runlist_ib(pm);
return -ENOMEM;
}
@@ -299,20 +298,13 @@ int pm_send_set_resources(struct packet_manager *pm,
return retval;
}
-int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues)
+int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues,
+
Re: [PATCH] drm/amdgpu: Apply noretry setting for gfx10 and mmhub9.4
On 2019-11-22 3:23 p.m., Oak Zeng wrote:
Config the translation retry behavior according to noretry
kernel parameter
Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
Signed-off-by: Oak Zeng
Suggested-by: Jay Cornwall
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 5 +++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..7435487 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1751,7 +1751,9 @@ static void gfx_v10_0_constants_init(struct amdgpu_device
*adev)
for (i = 0; i < adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids; i++) {
nv_grbm_select(adev, 0, 0, 0, i);
/* CP and shaders */
- WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);
+ tmp = REG_SET_FIELD(DEFAULT_SH_MEM_CONFIG, SH_MEM_CONFIG,
+ RETRY_MODE, amdgpu_noretry ? 2 : 0);
+ WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
I didn't fix gfx_v10_0 on purpose last time I worked on this
("75ee64875e75 drm/amdkfd: Consistently apply noretry setting"), because
the retry works differently on GFXv10. Do you have new information about
how the RETRY_MODE setting works on GFXv10? Does it affect performance?
if (i != 0) {
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
(adev->gmc.private_aperture_start >> 48));
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 753eea2..8599bfd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -314,7 +314,8 @@ static void mmhub_v9_4_setup_vmid_config(struct
amdgpu_device *adev, int hubid)
adev->vm_manager.block_size - 9);
/* Send no-retry XNACK on fault to suppress VM fault storm. */
tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT1_CNTL,
- RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
+ RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
+ !amdgpu_noretry);
Right, this was missed in my previous commit because mmhub_v9_4 was
added later.
Regards,
Felix
WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
tmp);
@@ -905,4 +906,4 @@ static void mmhub_v9_4_query_ras_error_count(struct
amdgpu_device *adev,
const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
.ras_late_init = amdgpu_mmhub_ras_late_init,
.query_ras_error_count = mmhub_v9_4_query_ras_error_count,
-};
\ No newline at end of file
+};
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[pull] radeon, amdgpu drm-next-5.5
Hi Dave, Daniel, Fixes for 5.5. The following changes since commit 17eee668b3cad423a47c090fe2275733c55db910: Merge tag 'drm-misc-next-fixes-2019-11-20' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2019-11-21 10:19:45 +1000) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux tags/drm-next-5.5-2019-11-22 for you to fetch changes up to f920d1bb9c4e77efb08c41d70b6d442f46fd8902: drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10 (2019-11-22 14:55:19 -0500) drm-next-5.5-2019-11-22: amdgpu: - Fix bad DMA on some PPC platforms - MMHUB fix for powergating - BACO fix for Navi - Misc raven fixes - Enable vbios fetch directly from rom on navi - debugfs fix for DC - SR-IOV fixes for arcturus - Misc power fixes radeon: - Fix bad DMA on some PPC platforms Alex Deucher (6): drm/amdgpu/nv: add asic func for fetching vbios from rom directly drm/amdgpu/powerplay: properly set PP_GFXOFF_MASK (v2) drm/amdgpu: disable gfxoff when using register read interface drm/amdgpu: remove experimental flag for Navi14 drm/amdgpu: disable gfxoff on original raven Revert "drm/amd/display: enable S/G for RAVEN chip" Evan Quan (4): drm/amd/powerplay: avoid DPM reenable process on Navi1x ASICs V2 drm/amd/powerplay: issue BTC on Navi during SMU setup drm/amd/powerplay: issue no PPSMC_MSG_GetCurrPkgPwr on unsupported ASICs drm/amd/powerplay: correct fine grained dpm force level setting Jack Zhang (2): drm/amd/amdgpu/sriov temporarily skip ras,dtm,hdcp for arcturus VF drm/amd/amdgpu/sriov skip RLCG s/r list for arcturus VF. Jay Cornwall (1): drm/amdgpu: Update Arcturus golden registers Leo Liu (1): drm/amdgpu/vcn2.5: fix the enc loop with hw fini Mikita Lipski (1): drm/amd/display: Fix debugfs on MST connectors Sam Bobroff (2): drm/radeon: fix bad DMA from INTERRUPT_CNTL2 drm/amdgpu: fix bad DMA from INTERRUPT_CNTL2 Stephen Rothwell (1): merge fix for "ftrace: Rework event_create_dir()" Xiaojie Yuan (4): drm/amdgpu/gfx10: fix mqd backup/restore for gfx rings (v2) drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt drm/amdgpu/gfx10: fix out-of-bound mqd_backup array access drm/amdgpu/gfx10: re-init clear state buffer after gpu reset Yintian Tao (1): drm/amdgpu: put flush_delayed_work at first changzhu (2): drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 8 +-- drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c| 2 - drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h| 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 6 +- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c| 41 +- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 2 +- drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 66 ++ drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 +++- drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c | 2 + drivers/gpu/drm/amd/amdgpu/gfxhub_v2_0.c | 2 + drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 57 +++ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 57 +++ drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c| 2 + drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c| 2 + drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c| 4 ++ drivers/gpu/drm/amd/amdgpu/nv.c| 24 +++- drivers/gpu/drm/amd/amdgpu/si_ih.c | 3 +- drivers/gpu/drm/amd/amdgpu/soc15.h | 4 +- drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 6 +- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +- .../amd/display/amdgpu_dm/amdgpu_dm_mst_types.c| 10 +++- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 33 +-- drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c| 9 +++ drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 23 ++-- drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h | 1 + drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 18 ++ drivers/gpu/drm/radeon/cik.c | 4 +- drivers/gpu/drm/radeon/r600.c | 4 +- drivers/gpu/drm/radeon/si.c| 4 +- 32 files changed, 362 insertions(+), 53 deletions(-) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: Apply noretry setting for gfx10 and mmhub9.4
Config the translation retry behavior according to noretry
kernel parameter
Change-Id: I5b91ea77715137cf8cb84e258ccdfbb19c7a4ed1
Signed-off-by: Oak Zeng
Suggested-by: Jay Cornwall
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 +++-
drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c | 5 +++--
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 4d6df35..7435487 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -1751,7 +1751,9 @@ static void gfx_v10_0_constants_init(struct amdgpu_device
*adev)
for (i = 0; i < adev->vm_manager.id_mgr[AMDGPU_GFXHUB_0].num_ids; i++) {
nv_grbm_select(adev, 0, 0, 0, i);
/* CP and shaders */
- WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG);
+ tmp = REG_SET_FIELD(DEFAULT_SH_MEM_CONFIG, SH_MEM_CONFIG,
+ RETRY_MODE, amdgpu_noretry ? 2 : 0);
+ WREG32_SOC15(GC, 0, mmSH_MEM_CONFIG, tmp);
if (i != 0) {
tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE,
(adev->gmc.private_aperture_start >> 48));
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
index 753eea2..8599bfd 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c
@@ -314,7 +314,8 @@ static void mmhub_v9_4_setup_vmid_config(struct
amdgpu_device *adev, int hubid)
adev->vm_manager.block_size - 9);
/* Send no-retry XNACK on fault to suppress VM fault storm. */
tmp = REG_SET_FIELD(tmp, VML2VC0_VM_CONTEXT1_CNTL,
- RETRY_PERMISSION_OR_INVALID_PAGE_FAULT, 0);
+ RETRY_PERMISSION_OR_INVALID_PAGE_FAULT,
+ !amdgpu_noretry);
WREG32_SOC15_OFFSET(MMHUB, 0, mmVML2VC0_VM_CONTEXT1_CNTL,
hubid * MMHUB_INSTANCE_REGISTER_OFFSET + i,
tmp);
@@ -905,4 +906,4 @@ static void mmhub_v9_4_query_ras_error_count(struct
amdgpu_device *adev,
const struct amdgpu_mmhub_funcs mmhub_v9_4_funcs = {
.ras_late_init = amdgpu_mmhub_ras_late_init,
.query_ras_error_count = mmhub_v9_4_query_ras_error_count,
-};
\ No newline at end of file
+};
--
2.7.4
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Re: [PATCH] drm/amd/display: add default clocks if not able to fetch them
Reviewed-by: Nicholas Kazlauskas
On 2019-11-22 1:09 p.m., Alex Deucher wrote:
Ping?
On Tue, Nov 19, 2019 at 3:56 PM Alex Deucher wrote:
dm_pp_get_clock_levels_by_type needs to add the default clocks
to the powerplay case as well. This was accidently dropped.
Fixes: b3ea88fef321de ("drm/amd/powerplay: add get_clock_by_type interface for
display")
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 229788bee544..a2e1a73f66b8 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -342,7 +342,8 @@ bool dm_pp_get_clock_levels_by_type(
if (adev->powerplay.pp_funcs &&
adev->powerplay.pp_funcs->get_clock_by_type) {
if (adev->powerplay.pp_funcs->get_clock_by_type(pp_handle,
dc_to_pp_clock_type(clk_type), _clks)) {
- /* Error in pplib. Provide default values. */
+ /* Error in pplib. Provide default values. */
+ get_default_clock_levels(clk_type, dc_clks);
return true;
}
} else if (adev->smu.ppt_funcs &&
adev->smu.ppt_funcs->get_clock_by_type) {
--
2.23.0
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[PATCH] MAINTAINERS: Drop Rex Zhu for amdgpu powerplay
No longer works on the driver. Signed-off-by: Alex Deucher --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index b63c291ad029..d518588b9879 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -856,7 +856,6 @@ S: Maintained F: drivers/i2c/busses/i2c-amd-mp2* AMD POWERPLAY -M: Rex Zhu M: Evan Quan L: amd-gfx@lists.freedesktop.org S: Supported -- 2.23.0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH v2] drm/dsc: Return unsigned long on compute offset
From: Mikita Lipski
We shouldn't compare int with unsigned long to find the max value
and since we are not expecting negative value returned from
compute_offset we should make this function return unsigned long
so we can compare the values when computing rc parameters.
v2: Modified function parameters to unsigned type for type
consistency
Cc: Ville Syrjälä
Cc: Nikola Cornij
Cc: Harry Wentland
Signed-off-by: Mikita Lipski
---
drivers/gpu/drm/drm_dsc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/drm_dsc.c b/drivers/gpu/drm/drm_dsc.c
index 74f3527f567d..ccce0297da64 100644
--- a/drivers/gpu/drm/drm_dsc.c
+++ b/drivers/gpu/drm/drm_dsc.c
@@ -245,11 +245,11 @@ void drm_dsc_pps_payload_pack(struct
drm_dsc_picture_parameter_set *pps_payload,
}
EXPORT_SYMBOL(drm_dsc_pps_payload_pack);
-static int compute_offset(struct drm_dsc_config *vdsc_cfg, int
pixels_per_group,
- int groups_per_line, int grpcnt)
+static unsigned long compute_offset(struct drm_dsc_config *vdsc_cfg, unsigned
int pixels_per_group,
+ unsigned long groups_per_line, unsigned long
grpcnt)
{
- int offset = 0;
- int grpcnt_id = DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay,
pixels_per_group);
+ unsigned long offset = 0;
+ unsigned long grpcnt_id = DIV_ROUND_UP(vdsc_cfg->initial_xmit_delay,
pixels_per_group);
if (grpcnt <= grpcnt_id)
offset = DIV_ROUND_UP(grpcnt * pixels_per_group *
vdsc_cfg->bits_per_pixel, 16);
--
2.17.1
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Re: [PATCH 0/2] drm/amd: Use ARRAY_SIZE
Applied the series. Thanks! Alex On Fri, Nov 22, 2019 at 4:01 AM zhengbin wrote: > > zhengbin (2): > drm/amd/powerplay: Use ARRAY_SIZE for smu7_profiling > drm/amdgpu: Use ARRAY_SIZE for sos_old_versions > > drivers/gpu/drm/amd/amdgpu/psp_v3_1.c| 2 +- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > -- > 2.7.4 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH v2 2/2] drm: share address space for dma bufs
On Fri, Nov 22, 2019 at 4:17 AM Daniel Vetter wrote:
>
> On Fri, Nov 22, 2019 at 7:37 AM Gerd Hoffmann wrote:
> >
> > Use the shared address space of the drm device (see drm_open() in
> > drm_file.c) for dma-bufs too. That removes a difference betweem drm
> > device mmap vmas and dma-buf mmap vmas and fixes corner cases like
> > dropping ptes (using madvise(DONTNEED) for example) not working
> > properly.
> >
> > Also remove amdgpu driver's private dmabuf update. It is not needed
> > any more now that we are doing this for everybody.
> >
> > Signed-off-by: Gerd Hoffmann
>
> Reviewed-by: Daniel Vetter
>
> But I think you want at least an ack from amd guys for double checking here.
> -Daniel
Looks correct to me.
Reviewed-by: Alex Deucher
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 4 +---
> > drivers/gpu/drm/drm_prime.c | 4 +++-
> > 2 files changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > index d5bcdfefbad6..586db4fb46bd 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> > @@ -361,10 +361,8 @@ struct dma_buf *amdgpu_gem_prime_export(struct
> > drm_gem_object *gobj,
> > return ERR_PTR(-EPERM);
> >
> > buf = drm_gem_prime_export(gobj, flags);
> > - if (!IS_ERR(buf)) {
> > - buf->file->f_mapping = gobj->dev->anon_inode->i_mapping;
> > + if (!IS_ERR(buf))
> > buf->ops = _dmabuf_ops;
> > - }
> >
> > return buf;
> > }
> > diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> > index a9633bd241bb..c3fc341453c0 100644
> > --- a/drivers/gpu/drm/drm_prime.c
> > +++ b/drivers/gpu/drm/drm_prime.c
> > @@ -240,6 +240,7 @@ void drm_prime_destroy_file_private(struct
> > drm_prime_file_private *prime_fpriv)
> > struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
> > struct dma_buf_export_info *exp_info)
> > {
> > + struct drm_gem_object *obj = exp_info->priv;
> > struct dma_buf *dma_buf;
> >
> > dma_buf = dma_buf_export(exp_info);
> > @@ -247,7 +248,8 @@ struct dma_buf *drm_gem_dmabuf_export(struct drm_device
> > *dev,
> > return dma_buf;
> >
> > drm_dev_get(dev);
> > - drm_gem_object_get(exp_info->priv);
> > + drm_gem_object_get(obj);
> > + dma_buf->file->f_mapping = obj->dev->anon_inode->i_mapping;
> >
> > return dma_buf;
> > }
> > --
> > 2.18.1
> >
>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch
> ___
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> dri-de...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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Re: [PATCH] drm/amdkfd: Remove duplicate functions update_mqd_hiq()
Pushed. Thanks!
Yong
On 2019-11-21 11:21 p.m., Liu, Zhan wrote:
Looks good to me.
Reviewed-by: Zhan Liu
-Original Message-
From: amd-gfx On Behalf Of
Yong Zhao
Sent: 2019/November/21, Thursday 4:25 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhao, Yong
Subject: [PATCH] drm/amdkfd: Remove duplicate functions
update_mqd_hiq()
The functions are the same as update_mqd().
Change-Id: Ic8d8f23cdde6b7806ab766ddf3d71fa668cca5fb
Signed-off-by: Yong Zhao
---
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c | 16 ++--
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c | 16 ++--
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c | 4
3 files changed, 4 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
index 8d21325b5cbb..7832ec6e480b 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v10.c
@@ -282,18 +282,6 @@ static void init_mqd_hiq(struct mqd_manager *mm,
void **mqd,
1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
}
-static void update_mqd_hiq(struct mqd_manager *mm, void *mqd,
- struct queue_properties *q)
-{
- struct v10_compute_mqd *m;
-
- update_mqd(mm, mqd, q);
-
- /* TODO: what's the point? update_mqd already does this. */
- m = get_mqd(mqd);
- m->cp_hqd_vmid = q->vmid;
-}
-
static void init_mqd_sdma(struct mqd_manager *mm, void **mqd,
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
struct queue_properties *q)
@@ -422,7 +410,7 @@ struct mqd_manager *mqd_manager_init_v10(enum
KFD_MQD_TYPE type,
mqd->init_mqd = init_mqd_hiq;
mqd->free_mqd = free_mqd_hiq_sdma;
mqd->load_mqd = load_mqd;
- mqd->update_mqd = update_mqd_hiq;
+ mqd->update_mqd = update_mqd;
mqd->destroy_mqd = destroy_mqd;
mqd->is_occupied = is_occupied;
mqd->mqd_size = sizeof(struct v10_compute_mqd); @@ -
436,7 +424,7 @@ struct mqd_manager *mqd_manager_init_v10(enum
KFD_MQD_TYPE type,
mqd->init_mqd = init_mqd_hiq;
mqd->free_mqd = free_mqd;
mqd->load_mqd = load_mqd;
- mqd->update_mqd = update_mqd_hiq;
+ mqd->update_mqd = update_mqd;
mqd->destroy_mqd = destroy_mqd;
mqd->is_occupied = is_occupied;
mqd->mqd_size = sizeof(struct v10_compute_mqd); diff --git
a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
index df77d67ec9aa..aa9010995eaf 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v9.c
@@ -325,18 +325,6 @@ static void init_mqd_hiq(struct mqd_manager *mm,
void **mqd,
1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
}
-static void update_mqd_hiq(struct mqd_manager *mm, void *mqd,
- struct queue_properties *q)
-{
- struct v9_mqd *m;
-
- update_mqd(mm, mqd, q);
-
- /* TODO: what's the point? update_mqd already does this. */
- m = get_mqd(mqd);
- m->cp_hqd_vmid = q->vmid;
-}
-
static void init_mqd_sdma(struct mqd_manager *mm, void **mqd,
struct kfd_mem_obj *mqd_mem_obj, uint64_t *gart_addr,
struct queue_properties *q)
@@ -462,7 +450,7 @@ struct mqd_manager *mqd_manager_init_v9(enum
KFD_MQD_TYPE type,
mqd->init_mqd = init_mqd_hiq;
mqd->free_mqd = free_mqd_hiq_sdma;
mqd->load_mqd = load_mqd;
- mqd->update_mqd = update_mqd_hiq;
+ mqd->update_mqd = update_mqd;
mqd->destroy_mqd = destroy_mqd;
mqd->is_occupied = is_occupied;
mqd->mqd_size = sizeof(struct v9_mqd); @@ -475,7 +463,7
@@ struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE
type,
mqd->init_mqd = init_mqd_hiq;
mqd->free_mqd = free_mqd;
mqd->load_mqd = load_mqd;
- mqd->update_mqd = update_mqd_hiq;
+ mqd->update_mqd = update_mqd;
mqd->destroy_mqd = destroy_mqd;
mqd->is_occupied = is_occupied;
mqd->mqd_size = sizeof(struct v9_mqd); diff --git
a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
index 3b6b5671964c..a5e8ff1e5945 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_vi.c
@@ -312,11 +312,7 @@ static void init_mqd_hiq(struct mqd_manager *mm,
void **mqd, static void update_mqd_hiq(struct mqd_manager *mm, void
*mqd,
struct queue_properties *q)
{
- struct vi_mqd *m;
__update_mqd(mm, mqd, q, MTYPE_UC, 0);
-
- m = get_mqd(mqd);
-
Re: [PATCH] drm/amd/display: add default clocks if not able to fetch them
Ping?
On Tue, Nov 19, 2019 at 3:56 PM Alex Deucher wrote:
>
> dm_pp_get_clock_levels_by_type needs to add the default clocks
> to the powerplay case as well. This was accidently dropped.
>
> Fixes: b3ea88fef321de ("drm/amd/powerplay: add get_clock_by_type interface
> for display")
> Bug: https://gitlab.freedesktop.org/drm/amd/issues/906
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> index 229788bee544..a2e1a73f66b8 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
> @@ -342,7 +342,8 @@ bool dm_pp_get_clock_levels_by_type(
> if (adev->powerplay.pp_funcs &&
> adev->powerplay.pp_funcs->get_clock_by_type) {
> if (adev->powerplay.pp_funcs->get_clock_by_type(pp_handle,
> dc_to_pp_clock_type(clk_type), _clks)) {
> - /* Error in pplib. Provide default values. */
> + /* Error in pplib. Provide default values. */
> + get_default_clock_levels(clk_type, dc_clks);
> return true;
> }
> } else if (adev->smu.ppt_funcs &&
> adev->smu.ppt_funcs->get_clock_by_type) {
> --
> 2.23.0
>
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Re: [PATCH] drm/amdgpu: always reset asic when going into suspend
On Wed, Oct 16, 2019 at 3:24 AM Daniel Drake wrote: > > On Wed, Oct 16, 2019 at 2:43 AM Alex Deucher wrote: > > Is s2idle actually powering down the GPU? > > My understanding is that s2idle (at a high level) just calls all > devices suspend routines and then puts the CPU into its deepest > running state. > So if there is something special to be done to power off the GPU, I > believe that amdgpu is responsible for making arrangements for that to > happen. > In this case the amdgpu code already does: > > pci_disable_device(dev->pdev); > pci_set_power_state(dev->pdev, PCI_D3hot); > > And the PCI layer will call through to any appropriate ACPI methods > related to that low power state. > > > Do you see a difference in power usage? I think you are just working > > around the fact that the > > GPU never actually gets powered down. > > I ran a series of experiments. > > Base setup: no UI running, ran "setterm -powersave 1; setterm -blank > 1" and waited 1 minute for screen to turn off. > Base power usage in this state is 4.7W as reported by BAT0/power_now > > 1. Run amdgpu_device_suspend(ddev, true, true); before my change > --> Power usage increases to 6.1W > > 2. Run amdgpu_device_suspend(ddev, true, true); with my change applied > --> Power usage increases to 6.0W > > 3. Put amdgpu device in runtime suspend > --> Power usage increases to 6.2W > > 4. Try unmodified suspend path but d3cold instead of d3hot > --> Power usage increases to 6.1W > > So, all of the suspend schemes actually increase the power usage by > roughly the same amount, reset or not, with and without my patch :/ > Any ideas? Do these patches help? https://patchwork.freedesktop.org/patch/341775/ https://patchwork.freedesktop.org/patch/341968/ Alex > > Thanks, > Daniel ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH v2] drm/amd/display: Fix Apple dongle cannot be successfully detected
On 2019-11-22 1:33 a.m., Louis Li wrote: > On Thu, Nov 21, 2019 at 08:47:50AM -0500, Kazlauskas, Nicholas wrote: >> On 2019-11-21 8:40 a.m., Kazlauskas, Nicholas wrote: >>> On 2019-11-21 3:31 a.m., Li, Ching-shih (Louis) wrote: Hi reviewers, What is the review result for this patch? Customer is pushing on this change to merge. TKS for your attention. BR, Louis -Original Message- From: Louis Li Sent: Thursday, November 14, 2019 11:42 AM To: amd-gfx@lists.freedesktop.org Cc: Kazlauskas, Nicholas ; Wentland, Harry ; Li, Ching-shih (Louis) Subject: [PATCH v2] drm/amd/display: Fix Apple dongle cannot be successfully detected [Why] External monitor cannot be displayed consistently, if connecting via this Apple dongle (A1621, USB Type-C to HDMI). By experiments, it is confirmed that the dongle needs 200ms at least to be ready for communication, after it sets HPD signal high. [How] When receiving HPD IRQ, delay 300ms at the beginning of handle_hpd_irq(). Then run the original procedure. With this patch applied, the problem cannot be reproduced. With other dongles, test results are PASS. Test result is PASS to plug in HDMI cable while playing video, and the video is being playing smoothly. Test result is PASS after system resumes from suspend. Signed-off-by: Louis Li >>> >>> This is still a NAK from me since the logic hasn't changed from the first >>> patch. >>> >>> Sleeps don't belong in IRQ handlers. >>> >>> Regards, >>> Nicholas Kazlauskas >> >> Actually, this lives in the low IRQ context which means that it's already >> been queued off to a work thread so it's safe to sleep. >> >> I'm not sure we want a general 300ms sleep (even by experiment you said that >> it only needed 200ms) for all connectors. >> >> Nicholas Kazlauskas >> > > Yes, it is IRQ context. Safe to call sleep(). Moreover, in current driver, > even udelay() is called in wait_for_training_aux_rd_interval() in the flow > of handle_hpd_irq(). > > For 2nd question, of course not all connectors have this behavior. > Based on real cases we ever dealt, some dongles like this, or some > monitors driven by TCON, have same behavior. And no chance to read > out anything to decide if delay is needed. This change does help > to have our driver gain better compatibility. Truly this should be > problem of dongles/monitors. We are not the only one to > workaround such a problem. This change does not hurt other connects, > and some other dongles are tested ok, e.g. HP/Huwai dongles, etc. > I still don't like this change. It might impact other use cases, such as SST-to-MST switching on MST displays. Have you checked how Windows deals with this dongle and how the Windows team solved this? Have you checked how other drivers (such as i915) deal with this dongle? Have you checked whether you can pass DP compliance with this change? Harry >>> --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 0aef92b7c037..5b844b6a5a59 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -1025,6 +1025,11 @@ static void handle_hpd_irq(void *param) struct drm_device *dev = connector->dev; enum dc_connection_type new_connection_type = dc_connection_none; + /* Some monitors/dongles need around 200ms to be ready for communication + * after those devices drive HPD signal high. + */ + msleep(300); + /* In case of failure or MST no need to update connector status or notify the OS * since (for MST case) MST does this in it's own context. */ -- 2.21.0 >>> >>> ___ >>> amd-gfx mailing list >>> amd-gfx@lists.freedesktop.org >>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx >> ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH] drm/amdgpu: invalidate mmhub semphore workaround in gmc9/gmc10
Thanks, Ray
I 'll submit the patch and continue to see the gfxhub semaphore problem.
BR,
Changfeng.
-Original Message-
From: Huang, Ray
Sent: Friday, November 22, 2019 5:16 PM
To: Zhu, Changfeng
Cc: Koenig, Christian ; Xiao, Jack
; Zhou1, Tao ; Huang, Shimmer
; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: invalidate mmhub semphore workaround in
gmc9/gmc10
[AMD Official Use Only - Internal Distribution Only]
On Thu, Nov 21, 2019 at 11:47:15PM +0800, Zhu, Changfeng wrote:
> From: changzhu
>
> It may lose gpuvm invalidate acknowldege state across power-gating off
> cycle. To avoid this issue in gmc9/gmc10 invalidation, add semaphore
> acquire before invalidation and semaphore release after invalidation.
>
> After adding semaphore acquire before invalidation, the semaphore
> register become read-only if another process try to acquire semaphore.
> Then it will not be able to release this semaphore. Then it may cause
> deadlock problem. If this deadlock problem happens, it needs a
> semaphore firmware fix.
>
> Change-Id: I9942a2f451265c1f1038ccfe2f70042c7c8118af
Please remove the chang-id, we don't do gerrit review.
> Signed-off-by: changzhu
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 52
> ++ drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 52
> ++
> drivers/gpu/drm/amd/amdgpu/soc15.h | 4 +-
> 3 files changed, 106 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index af2615ba52aa..e0104b985c42 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -234,6 +234,27 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device
> *adev, uint32_t vmid,
> const unsigned eng = 17;
> unsigned int i;
>
> + spin_lock(>gmc.invalidate_lock);
> + /*
> + * It may lose gpuvm invalidate acknowldege state across power-gating
> + * off cycle, add semaphore acquire before invalidation and semaphore
> + * release after invalidation to avoid entering power gated state
> + * to WA the Issue
> + */
Please add the TODO here, and mention you will continue working on debugging
with semaphore for GFXHUB as well. And remove the checking once you addressed
the issue with CP designer.
And the comments should be added before all checking here for "MMHUB".
With that fixed, the patch is Acked-by: Huang Rui
> + if (vmhub == AMDGPU_MMHUB_0 ||
> + vmhub == AMDGPU_MMHUB_1) {
> + for (i = 0; i < adev->usec_timeout; i++) {
> + /* a read return value of 1 means semaphore acuqire */
> + tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
> + if (tmp & 0x1)
> + break;
> + udelay(1);
> + }
> +
> + if (i >= adev->usec_timeout)
> + DRM_ERROR("Timeout waiting for sem acquire in VM
> flush!\n");
> + }
> +
> WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
>
> /*
> @@ -253,6 +274,16 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device
> *adev, uint32_t vmid,
> udelay(1);
> }
>
> + /*
> + * add semaphore release after invalidation,
> + * write with 0 means semaphore release
> + */
> + if (vmhub == AMDGPU_MMHUB_0 ||
> + vmhub == AMDGPU_MMHUB_1)
> + WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
> +
> + spin_unlock(>gmc.invalidate_lock);
> +
> if (i < adev->usec_timeout)
> return;
>
> @@ -338,6 +369,19 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct
> amdgpu_ring *ring,
> uint32_t req = gmc_v10_0_get_invalidate_req(vmid, 0);
> unsigned eng = ring->vm_inv_eng;
>
> + /*
> + * It may lose gpuvm invalidate acknowldege state across power-gating
> + * off cycle, add semaphore acquire before invalidation and semaphore
> + * release after invalidation to avoid entering power gated state
> + * to WA the Issue
> + */
> +
> + /* a read return value of 1 means semaphore acuqire */
> + if (ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> + ring->funcs->vmhub == AMDGPU_MMHUB_1)
> + amdgpu_ring_emit_reg_wait(ring,
> + hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
> +
> amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),
> lower_32_bits(pd_addr));
>
> @@ -348,6 +392,14 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct
> amdgpu_ring *ring,
> hub->vm_inv_eng0_ack + eng,
> req, 1 << vmid);
>
> + /*
> + * add semaphore release after invalidation,
> + * write with 0 means semaphore release
> + */
> + if (ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> +
Re: [PATCH v2 2/2] drm: share address space for dma bufs
On Fri, Nov 22, 2019 at 7:37 AM Gerd Hoffmann wrote:
>
> Use the shared address space of the drm device (see drm_open() in
> drm_file.c) for dma-bufs too. That removes a difference betweem drm
> device mmap vmas and dma-buf mmap vmas and fixes corner cases like
> dropping ptes (using madvise(DONTNEED) for example) not working
> properly.
>
> Also remove amdgpu driver's private dmabuf update. It is not needed
> any more now that we are doing this for everybody.
>
> Signed-off-by: Gerd Hoffmann
Reviewed-by: Daniel Vetter
But I think you want at least an ack from amd guys for double checking here.
-Daniel
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c | 4 +---
> drivers/gpu/drm/drm_prime.c | 4 +++-
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> index d5bcdfefbad6..586db4fb46bd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
> @@ -361,10 +361,8 @@ struct dma_buf *amdgpu_gem_prime_export(struct
> drm_gem_object *gobj,
> return ERR_PTR(-EPERM);
>
> buf = drm_gem_prime_export(gobj, flags);
> - if (!IS_ERR(buf)) {
> - buf->file->f_mapping = gobj->dev->anon_inode->i_mapping;
> + if (!IS_ERR(buf))
> buf->ops = _dmabuf_ops;
> - }
>
> return buf;
> }
> diff --git a/drivers/gpu/drm/drm_prime.c b/drivers/gpu/drm/drm_prime.c
> index a9633bd241bb..c3fc341453c0 100644
> --- a/drivers/gpu/drm/drm_prime.c
> +++ b/drivers/gpu/drm/drm_prime.c
> @@ -240,6 +240,7 @@ void drm_prime_destroy_file_private(struct
> drm_prime_file_private *prime_fpriv)
> struct dma_buf *drm_gem_dmabuf_export(struct drm_device *dev,
> struct dma_buf_export_info *exp_info)
> {
> + struct drm_gem_object *obj = exp_info->priv;
> struct dma_buf *dma_buf;
>
> dma_buf = dma_buf_export(exp_info);
> @@ -247,7 +248,8 @@ struct dma_buf *drm_gem_dmabuf_export(struct drm_device
> *dev,
> return dma_buf;
>
> drm_dev_get(dev);
> - drm_gem_object_get(exp_info->priv);
> + drm_gem_object_get(obj);
> + dma_buf->file->f_mapping = obj->dev->anon_inode->i_mapping;
>
> return dma_buf;
> }
> --
> 2.18.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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Re: [PATCH] drm/amdgpu: invalidate mmhub semphore workaround in gmc9/gmc10
[AMD Official Use Only - Internal Distribution Only]
On Thu, Nov 21, 2019 at 11:47:15PM +0800, Zhu, Changfeng wrote:
> From: changzhu
>
> It may lose gpuvm invalidate acknowldege state across power-gating off
> cycle. To avoid this issue in gmc9/gmc10 invalidation, add semaphore acquire
> before invalidation and semaphore release after invalidation.
>
> After adding semaphore acquire before invalidation, the semaphore
> register become read-only if another process try to acquire semaphore.
> Then it will not be able to release this semaphore. Then it may cause
> deadlock problem. If this deadlock problem happens, it needs a semaphore
> firmware fix.
>
> Change-Id: I9942a2f451265c1f1038ccfe2f70042c7c8118af
Please remove the chang-id, we don't do gerrit review.
> Signed-off-by: changzhu
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 52 ++
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 52 ++
> drivers/gpu/drm/amd/amdgpu/soc15.h | 4 +-
> 3 files changed, 106 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index af2615ba52aa..e0104b985c42 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -234,6 +234,27 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device
> *adev, uint32_t vmid,
> const unsigned eng = 17;
> unsigned int i;
>
> + spin_lock(>gmc.invalidate_lock);
> + /*
> + * It may lose gpuvm invalidate acknowldege state across power-gating
> + * off cycle, add semaphore acquire before invalidation and semaphore
> + * release after invalidation to avoid entering power gated state
> + * to WA the Issue
> + */
Please add the TODO here, and mention you will continue working on
debugging with semaphore for GFXHUB as well. And remove the checking once
you addressed the issue with CP designer.
And the comments should be added before all checking here for "MMHUB".
With that fixed, the patch is Acked-by: Huang Rui
> + if (vmhub == AMDGPU_MMHUB_0 ||
> + vmhub == AMDGPU_MMHUB_1) {
> + for (i = 0; i < adev->usec_timeout; i++) {
> + /* a read return value of 1 means semaphore acuqire */
> + tmp = RREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng);
> + if (tmp & 0x1)
> + break;
> + udelay(1);
> + }
> +
> + if (i >= adev->usec_timeout)
> + DRM_ERROR("Timeout waiting for sem acquire in VM
> flush!\n");
> + }
> +
> WREG32_NO_KIQ(hub->vm_inv_eng0_req + eng, tmp);
>
> /*
> @@ -253,6 +274,16 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device
> *adev, uint32_t vmid,
> udelay(1);
> }
>
> + /*
> + * add semaphore release after invalidation,
> + * write with 0 means semaphore release
> + */
> + if (vmhub == AMDGPU_MMHUB_0 ||
> + vmhub == AMDGPU_MMHUB_1)
> + WREG32_NO_KIQ(hub->vm_inv_eng0_sem + eng, 0);
> +
> + spin_unlock(>gmc.invalidate_lock);
> +
> if (i < adev->usec_timeout)
> return;
>
> @@ -338,6 +369,19 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct
> amdgpu_ring *ring,
> uint32_t req = gmc_v10_0_get_invalidate_req(vmid, 0);
> unsigned eng = ring->vm_inv_eng;
>
> + /*
> + * It may lose gpuvm invalidate acknowldege state across power-gating
> + * off cycle, add semaphore acquire before invalidation and semaphore
> + * release after invalidation to avoid entering power gated state
> + * to WA the Issue
> + */
> +
> + /* a read return value of 1 means semaphore acuqire */
> + if (ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> + ring->funcs->vmhub == AMDGPU_MMHUB_1)
> + amdgpu_ring_emit_reg_wait(ring,
> + hub->vm_inv_eng0_sem + eng, 0x1, 0x1);
> +
> amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + (2 * vmid),
> lower_32_bits(pd_addr));
>
> @@ -348,6 +392,14 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct
> amdgpu_ring *ring,
> hub->vm_inv_eng0_ack + eng,
> req, 1 << vmid);
>
> + /*
> + * add semaphore release after invalidation,
> + * write with 0 means semaphore release
> + */
> + if (ring->funcs->vmhub == AMDGPU_MMHUB_0 ||
> + ring->funcs->vmhub == AMDGPU_MMHUB_1)
> + amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + eng, 0);
> +
> return pd_addr;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index b7f2b184e9b8..816fdd602c85 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -455,6
[PATCH 0/2] drm/amd: Use ARRAY_SIZE
zhengbin (2): drm/amd/powerplay: Use ARRAY_SIZE for smu7_profiling drm/amdgpu: Use ARRAY_SIZE for sos_old_versions drivers/gpu/drm/amd/amdgpu/psp_v3_1.c| 2 +- drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) -- 2.7.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/2] drm/amd/powerplay: Use ARRAY_SIZE for smu7_profiling
Fixes coccicheck warning:
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c:4946:28-29: WARNING: Use
ARRAY_SIZE
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index f754fbd..c3f5866 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4943,7 +4943,7 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr
*hwmgr, char *buf)
title[0], title[1], title[2], title[3],
title[4], title[5], title[6], title[7]);
- len = sizeof(smu7_profiling) / sizeof(struct profile_mode_setting);
+ len = ARRAY_SIZE(smu7_profiling);
for (i = 0; i < len; i++) {
if (i == hwmgr->power_profile_mode) {
--
2.7.4
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[PATCH 2/2] drm/amdgpu: Use ARRAY_SIZE for sos_old_versions
Fixes coccicheck warning:
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c:182:40-41: WARNING: Use ARRAY_SIZE
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
drivers/gpu/drm/amd/amdgpu/psp_v3_1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
index b4d6427..735c43c 100644
--- a/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/psp_v3_1.c
@@ -179,7 +179,7 @@ static bool psp_v3_1_match_version(struct amdgpu_device
*adev, uint32_t ver)
* Double check if the latest four legacy versions.
* If yes, it is still the right version.
*/
- for (i = 0; i < sizeof(sos_old_versions) / sizeof(uint32_t); i++) {
+ for (i = 0; i < ARRAY_SIZE(sos_old_versions); i++) {
if (sos_old_versions[i] == adev->psp.sos_fw_version)
return true;
}
--
2.7.4
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