[pull] amdgpu drm-fixes-5.8
Hi Dave, Daniel, Fixes for 5.8. The following changes since commit 5b83c254571b26e6b6110019929dc9729e5c59d1: Merge tag 'amd-drm-fixes-5.8-2020-06-24' of git://people.freedesktop.org/~agd5f/linux into drm-fixes (2020-06-25 14:51:14 +1000) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux tags/amd-drm-fixes-5.8-2020-07-01 for you to fetch changes up to beaf10efca64ac824240838ab1f054dfbefab5e6: drm/amdgpu: use %u rather than %d for sclk/mclk (2020-07-01 14:20:23 -0400) amd-drm-fixes-5.8-2020-07-01: amdgpu: - Fix for vega20 boards without RAS support - DC bandwidth revalidation fix - Fix Renoir vram info fetching - Fix hwmon freq printing Alex Deucher (2): drm/amdgpu/atomfirmware: fix vram_info fetching for renoir drm/amdgpu: use %u rather than %d for sclk/mclk Ivan Mironov (1): drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS Nicholas Kazlauskas (1): drm/amd/display: Only revalidate bandwidth on medium and fast updates drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 4 ++-- drivers/gpu/drm/amd/display/dc/core/dc.c | 10 ++ drivers/gpu/drm/amd/powerplay/smumgr/vega20_smumgr.c | 11 +++ 4 files changed, 16 insertions(+), 10 deletions(-) ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amd/display: remove redundant initialization of variable result
On Wed, Jul 1, 2020 at 10:59 AM Colin King wrote:
>
> From: Colin Ian King
>
> The variable result is being initialized with a value that is never read
> and it is being updated later with a new value. The initialization is
> redundant and can be removed.
>
> Addresses-Coverity: ("Unused value")
> Signed-off-by: Colin Ian King
Applied. Thanks!
Alex
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
> b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
> index 1b3474aa380d..d0a23b72e604 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
> @@ -151,7 +151,8 @@ bool edp_receiver_ready_T9(struct dc_link *link)
> unsigned int tries = 0;
> unsigned char sinkstatus = 0;
> unsigned char edpRev = 0;
> - enum dc_status result = DC_OK;
> + enum dc_status result;
> +
> result = core_link_read_dpcd(link, DP_EDP_DPCD_REV, ,
> sizeof(edpRev));
>
> /* start from eDP version 1.2, SINK_STAUS indicate the sink is ready.*/
> @@ -177,7 +178,7 @@ bool edp_receiver_ready_T7(struct dc_link *link)
> {
> unsigned char sinkstatus = 0;
> unsigned char edpRev = 0;
> - enum dc_status result = DC_OK;
> + enum dc_status result;
>
> /* use absolute time stamp to constrain max T7*/
> unsigned long long enter_timestamp = 0;
> --
> 2.27.0
>
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Re: [PATCH] drm/amdgpu: use %u rather than %d for sclk/mclk
Acked-by: Nirmoy Das On 7/1/20 6:02 PM, Alex Deucher wrote: Large clock values may overflow and show up as negative. Reported by prOMiNd on IRC. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index 26c8e39a78bd..838d6d51904c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c @@ -2960,7 +2960,7 @@ static ssize_t amdgpu_hwmon_show_sclk(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%d\n", sclk * 10 * 1000); + return snprintf(buf, PAGE_SIZE, "%u\n", sclk * 10 * 1000); } static ssize_t amdgpu_hwmon_show_sclk_label(struct device *dev, @@ -2997,7 +2997,7 @@ static ssize_t amdgpu_hwmon_show_mclk(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%d\n", mclk * 10 * 1000); + return snprintf(buf, PAGE_SIZE, "%u\n", mclk * 10 * 1000); } static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH] drm/amdgpu: use %u rather than %d for sclk/mclk
Large clock values may overflow and show up as negative. Reported by prOMiNd on IRC. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c index 26c8e39a78bd..838d6d51904c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c @@ -2960,7 +2960,7 @@ static ssize_t amdgpu_hwmon_show_sclk(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%d\n", sclk * 10 * 1000); + return snprintf(buf, PAGE_SIZE, "%u\n", sclk * 10 * 1000); } static ssize_t amdgpu_hwmon_show_sclk_label(struct device *dev, @@ -2997,7 +2997,7 @@ static ssize_t amdgpu_hwmon_show_mclk(struct device *dev, if (r) return r; - return snprintf(buf, PAGE_SIZE, "%d\n", mclk * 10 * 1000); + return snprintf(buf, PAGE_SIZE, "%u\n", mclk * 10 * 1000); } static ssize_t amdgpu_hwmon_show_mclk_label(struct device *dev, -- 2.25.4 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[pull] amdgpu, amdkfd, radeon drm-next-5.9
Hi Dave, Daniel, Same great flavor, now with 0.2% more S-o-b. The following changes since commit 9ca1f474cea0edc14a1d7ec933e5472c0ff115d3: Merge tag 'amd-drm-next-5.8-2020-05-27' of git://people.freedesktop.org/~agd5f/linux into drm-next (2020-05-28 16:10:17 +1000) are available in the Git repository at: git://people.freedesktop.org/~agd5f/linux tags/amd-drm-next-5.9-2020-07-01 for you to fetch changes up to 7808363154d622f9446bf4db97ff0f041dafa30b: drm/amd/powerplay: Fix NULL dereference in lock_bus() on Vega20 w/o RAS (2020-07-01 01:59:27 -0400) amd-drm-next-5.9-2020-07-01: amdgpu: - DC DMUB updates - HDCP fixes - Thermal interrupt fixes - Add initial support for Sienna Cichlid GPU - Add support for unique id on Arcturus - Major swSMU code cleanup - Skip BAR resizing if the bios already did id - Fixes for DCN bandwidth calculations - Runtime PM reference count fixes - Add initial UVD support for SI - Add support for ASSR on eDP links - Lots of misc fixes and cleanups - Enable runtime PM on vega10 boards that support BACO - RAS fixes - SR-IOV fixes - Use IP discovery table on renoir - DC stream synchronization fixes amdkfd: - Track SDMA usage per process - Fix GCC10 compiler warnings - Locking fix radeon: - Default to on chip GART for AGP boards on all arches - Runtime PM reference count fixes UAPI: - Update comments to clarify MTYPE Aditya Pakki (2): drm/radeon: fix multiple reference count leak drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync Alex Deucher (36): drm/amdgpu: simplify ATIF backlight handling drm/amdgpu/sdma4: add renoir to powergating setup drm/amdgpu/gfx10: add navi12 to gfxoff case drm/amdgpu: simplify raven and renoir checks drm/amdgpu: simplify CZ/ST and KV/KB/ML checks drm/amdgpu: simplify mec2 fw check drm/amdgpu/sdma4: simplify the logic around powering up sdma drm/amdgpu: put some case statments in family order drm/amdgpu/gmc10: program the smallK fragment size drm/amdgpu/pm: return an error during GPU reset or suspend (v2) drm/amdgpu: skip gpu_info firmware if discovery info is available drm/amdgpu: clean up discovery testing drm/amdgpu: use IP discovery table for renoir drm/amdgpu/nv: allow access to SDMA status registers drm/amdgpu/nv: remove some dead code drm/amdgpu/nv: enable init reset check drm/amdgpu/fru: fix header guard and include header drm/amdgpu/mes10.1: add no scheduler flag for mes drm/amdgpu/vcn3.0: schedule instance 0 for decode and 1 for encode drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0 Revert "drm/[radeon|amdgpu]: Replace one-element array and use struct_size() helper" drm/amdgpu/fence: use the no_scheduler flag drm/amdgpu/display: use blanked rather than plane state for sync groups drm/amdgpu: skip BAR resizing if the bios already did it drm/amdgpu/pm: update comment to clarify Overdrive interfaces drm/amdgpu: fix documentation around busy_percentage drm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync fails drm/amdkfd: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync fails drm/amdgpu/display bail early in dm_pp_get_static_clocks drm/amdgpu/display: properly guard the calls to swSMU functions drm/amdgpu/uvd3.x: fix register definition warnings drm/amdgpu: make sure to reserve tmr region on all asics which support it drm/amdgpu: rework runtime pm enablement for BACO drm/amdgpu: enable runtime pm on vega10 when noretry=0 Alvin Lee (5): drm/amd/display: Disable PG on NV12 drm/amd/display: Don't compare same stream for synchronized vblank drm/amd/display: Get num_chans from VBIOS table drm/amd/display: Update DCN3 bounding box drm/amd/display: Update bounding box states (v2) Anthony Koo (11): drm/amd/display: FW release 1.0.10 drm/amd/display: FW Release 1.0.11 drm/amd/display: combine public interfaces into single header drm/amd/display: [FW Promotion] Release 1.0.12 drm/amd/display: [FW Promotion] Release 1.0.13 drm/amd/display: [FW Promotion] Release 1.0.14 drm/amd/display: [FW Promotion] Release 1.0.15 drm/amd/display: [FW Promotion] Release 1.0.16 drm/amd/display: [FW Promotion] Release 1.0.17 drm/amd/display: [FW Promotion] Release 1.0.18 drm/amd/display: [FW Promotion] Release 1.0.19 Aric Cyr (10): drm/amd/display: 3.2.85 drm/amd/display: 3.2.86 drm/amd/display: Handle link loss interrupt better drm/amd/display: Guard against invalid array access drm/amd/display: 3.2.87
[PATCH] drm/amd/display: remove redundant initialization of variable result
From: Colin Ian King
The variable result is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
index 1b3474aa380d..d0a23b72e604 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c
@@ -151,7 +151,8 @@ bool edp_receiver_ready_T9(struct dc_link *link)
unsigned int tries = 0;
unsigned char sinkstatus = 0;
unsigned char edpRev = 0;
- enum dc_status result = DC_OK;
+ enum dc_status result;
+
result = core_link_read_dpcd(link, DP_EDP_DPCD_REV, ,
sizeof(edpRev));
/* start from eDP version 1.2, SINK_STAUS indicate the sink is ready.*/
@@ -177,7 +178,7 @@ bool edp_receiver_ready_T7(struct dc_link *link)
{
unsigned char sinkstatus = 0;
unsigned char edpRev = 0;
- enum dc_status result = DC_OK;
+ enum dc_status result;
/* use absolute time stamp to constrain max T7*/
unsigned long long enter_timestamp = 0;
--
2.27.0
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RE: [PATCH] drm/amdgpu: return an error for hw access in INFO ioctl when in reset
[AMD Official Use Only - Internal Distribution Only]
Hi, Christian and Alex
Not only amdgpu ioctls, but amdkfd ioctls also have the same issue.
Best Regards
Dennis Li
-Original Message-
From: amd-gfx On Behalf Of Christian
König
Sent: Wednesday, July 1, 2020 4:20 PM
To: Alex Deucher ; amd-gfx list
Cc: Deucher, Alexander
Subject: Re: [PATCH] drm/amdgpu: return an error for hw access in INFO ioctl
when in reset
I don't think this is a good idea, we should probably rather wait for the GPU
reset to finish by taking the appropriate lock.
Christian.
Am 01.07.20 um 07:33 schrieb Alex Deucher:
> ping?
>
> On Fri, Jun 26, 2020 at 10:04 AM Alex Deucher wrote:
>> When the GPU is in reset, accessing the hw is unreliable and could
>> interfere with the reset. Return an error in those cases.
>>
>> Signed-off-by: Alex Deucher
>> ---
>> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 ++
>> 1 file changed, 6 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> index 341d072edd95..fd51d6554ee2 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
>> @@ -684,6 +684,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev,
>> void *data, struct drm_file
>> if (info->read_mmr_reg.count > 128)
>> return -EINVAL;
>>
>> + if (adev->in_gpu_reset)
>> + return -EPERM;
>> +
>> regs = kmalloc_array(info->read_mmr_reg.count,
>> sizeof(*regs), GFP_KERNEL);
>> if (!regs)
>> return -ENOMEM; @@ -854,6 +857,9 @@ static
>> int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
>> if (!adev->pm.dpm_enabled)
>> return -ENOENT;
>>
>> + if (adev->in_gpu_reset)
>> + return -EPERM;
>> +
>> switch (info->sensor_info.type) {
>> case AMDGPU_INFO_SENSOR_GFX_SCLK:
>> /* get sclk in Mhz */
>> --
>> 2.25.4
>>
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RE: [PATCH 1/3] drm/amdgpu/atomfirmware: fix vram_info fetching for renoir
[AMD Official Use Only - Internal Distribution Only]
Series is acked-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Friday, June 26, 2020 6:05 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH 1/3] drm/amdgpu/atomfirmware: fix vram_info fetching for renoir
Renoir uses integrated_system_info table v12. The table has the same layout as
v11 with respect to this data. Just reuse the existing code for v12 for stable.
Fixes incorrectly reported vram info in the driver output.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index e249b22fef54..4b8aad1c0b51 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -206,6 +206,7 @@ amdgpu_atomfirmware_get_vram_info(struct amdgpu_device
*adev,
(mode_info->atom_context->bios + data_offset);
switch (crev) {
case 11:
+case 12:
mem_channel_number = igp_info->v11.umachannelnumber;
/* channel width is 64 */
if (vram_width)
--
2.25.4
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Re: [PATCH] drm/amdgpu: return an error for hw access in INFO ioctl when in reset
I don't think this is a good idea, we should probably rather wait for
the GPU reset to finish by taking the appropriate lock.
Christian.
Am 01.07.20 um 07:33 schrieb Alex Deucher:
ping?
On Fri, Jun 26, 2020 at 10:04 AM Alex Deucher wrote:
When the GPU is in reset, accessing the hw is unreliable and could
interfere with the reset. Return an error in those cases.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 341d072edd95..fd51d6554ee2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -684,6 +684,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
if (info->read_mmr_reg.count > 128)
return -EINVAL;
+ if (adev->in_gpu_reset)
+ return -EPERM;
+
regs = kmalloc_array(info->read_mmr_reg.count, sizeof(*regs),
GFP_KERNEL);
if (!regs)
return -ENOMEM;
@@ -854,6 +857,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
if (!adev->pm.dpm_enabled)
return -ENOENT;
+ if (adev->in_gpu_reset)
+ return -EPERM;
+
switch (info->sensor_info.type) {
case AMDGPU_INFO_SENSOR_GFX_SCLK:
/* get sclk in Mhz */
--
2.25.4
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