[PATCH] drm/amd/amdgpu: Fix incorrect logic to increment VCN doorbell index
- The original logic uses a counter based index assignment,
which is incorrect if we only assign VCN1 to this VF but no VCN0
The doorbell index is absolute, so we can calculate it by
using index variable i and j
Change-Id: Ica36b2bc80efa896f3753f2f2e2539ca2ca6649f
Signed-off-by: Bokun Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index 269002816109..3970a0ccb6a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -155,6 +155,13 @@ static int vcn_v3_0_sw_init(void *handle)
if (r)
return r;
+ /*
+* Note: doorbell assignment is fixed for SRIOV multiple VCN engines
+* Formula:
+* vcn_db_base = adev->doorbell_index.vcn.vcn_ring0_1 << 1;
+* dec_ring_i = vcn_db_base + i * (adev->vcn.num_enc_rings + 1)
+* enc_ring_i,j = vcn_db_base + i * (adev->vcn.num_enc_rings + 1) + 1
+ j
+*/
if (amdgpu_sriov_vf(adev)) {
vcn_doorbell_index = adev->doorbell_index.vcn.vcn_ring0_1;
/* get DWORD offset */
@@ -192,9 +199,7 @@ static int vcn_v3_0_sw_init(void *handle)
ring = >vcn.inst[i].ring_dec;
ring->use_doorbell = true;
if (amdgpu_sriov_vf(adev)) {
- ring->doorbell_index = vcn_doorbell_index;
- /* NOTE: increment so next VCN engine use next DOORBELL
DWORD */
- vcn_doorbell_index++;
+ ring->doorbell_index = vcn_doorbell_index + i *
(adev->vcn.num_enc_rings + 1);
} else {
ring->doorbell_index =
(adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;
}
@@ -216,9 +221,7 @@ static int vcn_v3_0_sw_init(void *handle)
ring = >vcn.inst[i].ring_enc[j];
ring->use_doorbell = true;
if (amdgpu_sriov_vf(adev)) {
- ring->doorbell_index = vcn_doorbell_index;
- /* NOTE: increment so next VCN engine use next
DOORBELL DWORD */
- vcn_doorbell_index++;
+ ring->doorbell_index = vcn_doorbell_index + i *
(adev->vcn.num_enc_rings + 1) + 1 + j;
} else {
ring->doorbell_index =
(adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 2 + j + 8 * i;
}
--
2.25.1
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[PATCH 07/14] drm/amd/display: force use sRGB for video TF is sRGB or BT709
From: Jing Zhou
[Why]
When mpo enabled, video comes is 709. Desktop use sRGB.
So color change easily noticeable especially when switch between
mpo/non-mpo.
[How]
Force use sRGB for video TF is sRGB or BT709.
DCN1/DCN2 use predefined type with YUV.
DCN3 use distributed points type with YUV.
Signed-off-by: Jing Zhou
Acked-by: Bindu Ramamurthy
Acked-by: Bindu Ramamurthy
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 1 +
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c | 1 +
7 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index e6b92683dc5b..c368de08969b 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -125,6 +125,7 @@ struct dpp_color_caps {
uint16_t hw_3d_lut : 1;
uint16_t ogam_ram : 1; // blnd gam
uint16_t ocsc : 1;
+ uint16_t dgam_rom_for_yuv : 1;
struct rom_curve_caps dgam_rom_caps;
struct rom_curve_caps ogam_rom_caps;
};
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
index e74bb2735885..bdc37831535e 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c
@@ -1439,6 +1439,7 @@ static bool dcn10_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 0;
dc->caps.color.dpp.post_csc = 0;
dc->caps.color.dpp.gamma_corr = 0;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 1;
dc->caps.color.dpp.hw_3d_lut = 0;
dc->caps.color.dpp.ogam_ram = 1; // RGAM on DCN1
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 86c21e463640..576a8f5e6f87 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -3839,6 +3839,7 @@ static bool dcn20_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 0;
dc->caps.color.dpp.post_csc = 0;
dc->caps.color.dpp.gamma_corr = 0;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 1;
dc->caps.color.dpp.hw_3d_lut = 1;
dc->caps.color.dpp.ogam_ram = 1;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 5eedc19662a3..abc8af0ef141 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -1978,6 +1978,7 @@ static bool dcn21_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 0;
dc->caps.color.dpp.post_csc = 0;
dc->caps.color.dpp.gamma_corr = 0;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 1;
dc->caps.color.dpp.hw_3d_lut = 1;
dc->caps.color.dpp.ogam_ram = 1;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index deeeab53ac87..a1edb829dc05 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2621,6 +2621,7 @@ static bool dcn30_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 1;
dc->caps.color.dpp.post_csc = 1;
dc->caps.color.dpp.gamma_corr = 1;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 0;
dc->caps.color.dpp.hw_3d_lut = 1;
dc->caps.color.dpp.ogam_ram = 1;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
index 5a47b4106b7b..8824dbce6f4a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
@@ -1748,6 +1748,7 @@ static bool dcn301_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 1;
dc->caps.color.dpp.post_csc = 1;
dc->caps.color.dpp.gamma_corr = 1;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 0;
dc->caps.color.dpp.hw_3d_lut = 1;
dc->caps.color.dpp.ogam_ram = 1;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index 2345f12ceab3..7a83a85d2c69 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -1327,6 +1327,7 @@ static bool dcn302_resource_construct(
dc->caps.color.dpp.dgam_rom_caps.hlg = 1;
dc->caps.color.dpp.post_csc = 1;
dc->caps.color.dpp.gamma_corr = 1;
+ dc->caps.color.dpp.dgam_rom_for_yuv = 0;
[PATCH 09/14] drm/amd/display: Explicitly disable cursor when disabling CRTC
From: Victor Lu
[why]
On DCE, the cursor is not being disabled on commits where there is no
CRTC or FB enabled.
[how]
Explicitly disable the cursor in the commit tail only if the pending
commit disables the CRTC.
Signed-off-by: Victor Lu
Acked-by: Bindu Ramamurthy
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 88893c9711cb..c147ef8120b9 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8176,6 +8176,16 @@ static void amdgpu_dm_atomic_commit_tail(struct
drm_atomic_state *state)
new_crtc_state->active_changed,
new_crtc_state->connectors_changed);
+ /* Disable cursor if disabling crtc */
+ if (old_crtc_state->active && !new_crtc_state->active) {
+ struct dc_cursor_position position;
+
+ memset(, 0, sizeof(position));
+ mutex_lock(>dc_lock);
+
dc_stream_set_cursor_position(dm_old_crtc_state->stream, );
+ mutex_unlock(>dc_lock);
+ }
+
/* Copy all transient state flags into dc state */
if (dm_new_crtc_state->stream) {
amdgpu_dm_crtc_copy_transient_flags(_new_crtc_state->base,
--
2.25.1
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[PATCH 05/14] drm/amd/display: Move common speakersToChannels definition to hw_shared.h
From: Eric Bernstein
Signed-off-by: Eric Bernstein
Acked-by: Bindu Ramamurthy
---
.../amd/display/dc/dce/dce_stream_encoder.c | 82 --
.../display/dc/dcn10/dcn10_stream_encoder.c | 82 --
.../gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c | 1 +
.../gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h | 83 --
.../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 84 +++
5 files changed, 85 insertions(+), 247 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index 5054bb567b74..ada57f745fd7 100644
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -1062,88 +1062,6 @@ static void dce110_reset_hdmi_stream_attribute(
#include "include/audio_types.h"
-/**
-* speakersToChannels
-*
-* @brief
-* translate speakers to channels
-*
-* FL - Front Left
-* FR - Front Right
-* RL - Rear Left
-* RR - Rear Right
-* RC - Rear Center
-* FC - Front Center
-* FLC - Front Left Center
-* FRC - Front Right Center
-* RLC - Rear Left Center
-* RRC - Rear Right Center
-* LFE - Low Freq Effect
-*
-* FC
-* FLC FRC
-*FLFR
-*
-*LFE
-* ()
-*
-*
-*RLRR
-* RLC RRC
-* RC
-*
-* ch 8 7 6 5 4 3 2 1
-* 0b0011 - - - - - - FR FL
-* 0b0111 - - - - - LFE FR FL
-* 0b1011 - - - - FC - FR FL
-* 0b - - - - FC LFE FR FL
-* 0b00010011 - - - RC - - FR FL
-* 0b00010111 - - - RC - LFE FR FL
-* 0b00011011 - - - RC FC - FR FL
-* 0b0001 - - - RC FC LFE FR FL
-* 0b00110011 - - RR RL - - FR FL
-* 0b00110111 - - RR RL - LFE FR FL
-* 0b00111011 - - RR RL FC - FR FL
-* 0b0011 - - RR RL FC LFE FR FL
-* 0b01110011 - RC RR RL - - FR FL
-* 0b01110111 - RC RR RL - LFE FR FL
-* 0b0011 - RC RR RL FC - FR FL
-* 0b0111 - RC RR RL FC LFE FR FL
-* 0b0011 RRC RLC RR RL - - FR FL
-* 0b0111 RRC RLC RR RL - LFE FR FL
-* 0b1011 RRC RLC RR RL FC - FR FL
-* 0b RRC RLC RR RL FC LFE FR FL
-* 0b1111 FRC FLC - - - - FR FL
-* 0b11000111 FRC FLC - - - LFE FR FL
-* 0b11001011 FRC FLC - - FC - FR FL
-* 0b1100 FRC FLC - - FC LFE FR FL
-* 0b11010011 FRC FLC - RC - - FR FL
-* 0b11010111 FRC FLC - RC - LFE FR FL
-* 0b11011011 FRC FLC - RC FC - FR FL
-* 0b1101 FRC FLC - RC FC LFE FR FL
-* 0b0011 FRC FLC RR RL - - FR FL
-* 0b0111 FRC FLC RR RL - LFE FR FL
-* 0b1011 FRC FLC RR RL FC - FR FL
-* 0b FRC FLC RR RL FC LFE FR FL
-*
-* @param
-* speakers - speaker information as it comes from CEA audio block
-*/
-/* translate speakers to channels */
-
-union audio_cea_channels {
- uint8_t all;
- struct audio_cea_channels_bits {
- uint32_t FL:1;
- uint32_t FR:1;
- uint32_t LFE:1;
- uint32_t FC:1;
- uint32_t RL_RC:1;
- uint32_t RR:1;
- uint32_t RC_RLC_FLC:1;
- uint32_t RRC_FRC:1;
- } channels;
-};
/* 25.2MHz/1.001*/
/* 25.2MHz/1.001*/
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index f70fcadf1ee5..73ac78b16bd4 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -1021,88 +1021,6 @@ void enc1_reset_hdmi_stream_attribute(
#include "include/audio_types.h"
-/**
-* speakersToChannels
-*
-* @brief
-* translate speakers to channels
-*
-* FL - Front Left
-* FR - Front Right
-* RL - Rear Left
-* RR - Rear Right
-* RC - Rear Center
-* FC - Front Center
-* FLC - Front Left Center
-* FRC - Front Right Center
-* RLC - Rear Left Center
-* RRC - Rear Right Center
-* LFE - Low Freq Effect
-*
-* FC
-* FLC FRC
-*FLFR
-*
-*LFE
-* ()
-*
-*
-*RLRR
-* RLC RRC
-* RC
-*
-* ch 8 7 6 5 4 3 2 1
-* 0b0011 - - - - - - FR FL
-* 0b0111 - - - - - LFE FR FL
-* 0b1011 - - - - FC - FR FL
-* 0b - - - - FC LFE FR FL
-* 0b00010011 - - - RC - - FR FL
-* 0b00010111 - - - RC - LFE FR FL
-* 0b00011011 - - - RC FC - FR FL
-*
[PATCH 14/14] drm/amd/display: cap dpp dto phase not more than modulo.
From: Yongqiang Sun
[Why]
4K monitor shows corruption if dpp dto phase is larger than modulo.
[How]
cap phase value never larger than modulo.
Signed-off-by: Yongqiang Sun
Acked-by: Bindu Ramamurthy
---
.../gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c | 46 ++-
1 file changed, 25 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
index f9e3a2337fbf..60cf3ff68cb0 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
@@ -50,43 +50,47 @@ void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst,
int req_dppclk)
if (dccg->ref_dppclk) {
int ref_dppclk = dccg->ref_dppclk;
int modulo = ref_dppclk / 1;
+ int phase;
if (req_dppclk) {
- int phase;
-
/*
* program DPP DTO phase and modulo as below
-* phase = dpp_pipe_clk_mhz / 10
-* module = dpp_global_clk_mhz / 10
-* dmub FW will read phase value to
-* determine minimum dpp clk and notify smu
-* to set clks for more power saving in PSR state
+* phase = ceiling(dpp_pipe_clk_mhz / 10)
+* module = trunc(dpp_global_clk_mhz / 10)
+*
+* storing frequencies in registers allow dmcub fw
+* to run time lower clocks when possible for power
saving
+*
+* ceiling phase and truncate modulo guarentees the
divided
+* down per pipe dpp clock has high enough frequency
*/
phase = (req_dppclk + ) / 1;
- if (phase > 0xff) {
- ASSERT(false);
- phase = 0xff;
+ if (phase > modulo) {
+ /* phase > modulo result in screen corruption
+* ie phase = 30, mod = 29 for 4k@60 HDMI
+* in these case we don't want pipe clock to be
divided
+*/
+ phase = modulo;
}
-
- REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
- DPPCLK0_DTO_PHASE, phase,
- DPPCLK0_DTO_MODULO, modulo);
- REG_UPDATE(DPPCLK_DTO_CTRL,
- DPPCLK_DTO_ENABLE[dpp_inst], 1);
} else {
/*
* set phase to 10 if dpp isn't used to
* prevent hard hang if access dpp register
* on unused pipe
+*
+* DTO should be on to divide down un-used
+* pipe clock for power saving
*/
- REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
- DPPCLK0_DTO_PHASE, 10,
+ phase = 10;
+ }
+
+ REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0,
+ DPPCLK0_DTO_PHASE, phase,
DPPCLK0_DTO_MODULO, modulo);
- REG_UPDATE(DPPCLK_DTO_CTRL,
- DPPCLK_DTO_ENABLE[dpp_inst], 0);
- }
+ REG_UPDATE(DPPCLK_DTO_CTRL,
+ DPPCLK_DTO_ENABLE[dpp_inst], 1);
}
dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk;
--
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[PATCH 03/14] drm/amd/display: Engage PSR synchronously
From: Krunoslav Kovac
[Why & How]
The intended use is to force PSR into active state and ignore all
events until explicit EXIT.
A new event force_static is added to power module. It is then sent
to FW.
Signed-off-by: Krunoslav Kovac
Acked-by: Bindu Ramamurthy
Acked-by: Bindu Ramamurthy
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +-
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 6 +-
.../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 5 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 18 ++-
.../gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 +-
drivers/gpu/drm/amd/display/dc/dc_link.h | 5 +-
drivers/gpu/drm/amd/display/dc/dc_types.h | 19 +++
drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 24 ++--
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 111 +++---
drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h | 3 +-
drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h | 2 +-
12 files changed, 129 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 84f11c05f12c..88893c9711cb 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -9738,7 +9738,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *stream)
, 1,
);
- return dc_link_set_psr_allow_active(link, true, false);
+ return dc_link_set_psr_allow_active(link, true, false, false);
}
/*
@@ -9752,7 +9752,7 @@ static bool amdgpu_dm_psr_disable(struct dc_stream_state
*stream)
DRM_DEBUG_DRIVER("Disabling psr...\n");
- return dc_link_set_psr_allow_active(stream->link, false, true);
+ return dc_link_set_psr_allow_active(stream->link, false, true, false);
}
/*
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index d31380ea57dc..11459fb09a37 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -2333,11 +2333,11 @@ static int psr_get(void *data, u64 *val)
{
struct amdgpu_dm_connector *connector = data;
struct dc_link *link = connector->dc_link;
- uint32_t psr_state = 0;
+ enum dc_psr_state state = PSR_STATE0;
- dc_link_get_psr_state(link, _state);
+ dc_link_get_psr_state(link, );
- *val = psr_state;
+ *val = state;
return 0;
}
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
index 19d97ed6beb8..710b54e065fa 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c
@@ -98,7 +98,7 @@ void clk_mgr_exit_optimized_pwr_state(const struct dc *dc,
struct clk_mgr *clk_m
if (edp_link) {
clk_mgr->psr_allow_active_cache =
edp_link->psr_settings.psr_allow_active;
- dc_link_set_psr_allow_active(edp_link, false, false);
+ dc_link_set_psr_allow_active(edp_link, false, false, false);
}
}
@@ -108,7 +108,8 @@ void clk_mgr_optimize_pwr_state(const struct dc *dc, struct
clk_mgr *clk_mgr)
struct dc_link *edp_link = get_edp_link(dc);
if (edp_link)
- dc_link_set_psr_allow_active(edp_link,
clk_mgr->psr_allow_active_cache, false);
+ dc_link_set_psr_allow_active(edp_link,
+ clk_mgr->psr_allow_active_cache, false, false);
if (dc->hwss.optimize_pwr_state)
dc->hwss.optimize_pwr_state(dc, dc->current_state);
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 34e76fdc1334..6b6127f3a82c 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -3058,9 +3058,9 @@ bool dc_set_psr_allow_active(struct dc *dc, bool enable)
if (link->psr_settings.psr_feature_enabled) {
if (enable && !link->psr_settings.psr_allow_active)
- return dc_link_set_psr_allow_active(link, true,
false);
+ return dc_link_set_psr_allow_active(link, true,
false, false);
else if (!enable && link->psr_settings.psr_allow_active)
- return dc_link_set_psr_allow_active(link,
false, true);
+ return dc_link_set_psr_allow_active(link,
false, true, false);
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 09b51fca3d44..46d415e183ff 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@
[PATCH 04/14] drm/amd/display: correct dml dsc bpc assignment
From: Dmytro Laktyushkin Signed-off-by: Dmytro Laktyushkin Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c index b32093136089..0fa489f9cb7f 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c +++ b/drivers/gpu/drm/amd/display/dc/dml/display_mode_vba.c @@ -471,8 +471,7 @@ static void fetch_pipe_params(struct display_mode_lib *mode_lib) mode_lib->vba.DSCEnable[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_enable; mode_lib->vba.NumberOfDSCSlices[mode_lib->vba.NumberOfActivePlanes] = dout->dsc_slices; - mode_lib->vba.DSCInputBitPerComponent[mode_lib->vba.NumberOfActivePlanes] = - dout->output_bpc == 0 ? 12 : dout->output_bpc; + mode_lib->vba.DSCInputBitPerComponent[mode_lib->vba.NumberOfActivePlanes] = dout->output_bpc; mode_lib->vba.WritebackEnable[mode_lib->vba.NumberOfActivePlanes] = dout->wb_enable; mode_lib->vba.ActiveWritebacksPerPlane[mode_lib->vba.NumberOfActivePlanes] = dout->num_active_wb; -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 06/14] drm/amd/display: Only wait for flip pending on immediate flips
From: Aric Cyr
[Why]
We want to make sure all immediate flips are completed before locking
the pipes, but not pipes that are not flip immediate as they will be
locked by the OTG
[How]
Skip non flip immediate pipes when checking for flip pending.
Signed-off-by: Aric Cyr
Acked-by: Bindu Ramamurthy
---
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 29 ++-
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 62788ad28230..da776de1dd1d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1172,27 +1172,28 @@ void dcn20_pipe_control_lock(
temp_pipe = pipe->bottom_pipe;
while (!flip_immediate && temp_pipe) {
- if (temp_pipe->plane_state != NULL)
- flip_immediate = temp_pipe->plane_state->flip_immediate;
- temp_pipe = temp_pipe->bottom_pipe;
+ if (temp_pipe->plane_state != NULL)
+ flip_immediate = temp_pipe->plane_state->flip_immediate;
+ temp_pipe = temp_pipe->bottom_pipe;
}
if (flip_immediate && lock) {
const int TIMEOUT_FOR_FLIP_PENDING = 10;
int i;
- for (i = 0; i < TIMEOUT_FOR_FLIP_PENDING; ++i) {
- if
(!pipe->plane_res.hubp->funcs->hubp_is_flip_pending(pipe->plane_res.hubp))
- break;
- udelay(1);
- }
-
- if (pipe->bottom_pipe != NULL) {
- for (i = 0; i < TIMEOUT_FOR_FLIP_PENDING; ++i) {
- if
(!pipe->bottom_pipe->plane_res.hubp->funcs->hubp_is_flip_pending(pipe->bottom_pipe->plane_res.hubp))
- break;
- udelay(1);
+ temp_pipe = pipe;
+ while (temp_pipe) {
+ if (temp_pipe->plane_state &&
temp_pipe->plane_state->flip_immediate) {
+ for (i = 0; i < TIMEOUT_FOR_FLIP_PENDING; ++i) {
+ if
(!temp_pipe->plane_res.hubp->funcs->hubp_is_flip_pending(temp_pipe->plane_res.hubp))
+ break;
+ udelay(1);
+ }
+
+ /* no reason it should take this long for
immediate flips */
+ ASSERT(i != TIMEOUT_FOR_FLIP_PENDING);
}
+ temp_pipe = temp_pipe->bottom_pipe;
}
}
--
2.25.1
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[PATCH 08/14] drm/amd/display: update dpp dto phase and modulo.
From: Yongqiang Sun
[Why & How]
Program modulo with ref dpp clk Mhz/10.
Program phase with pipe dpp clk Mhz /10.
DMUB FW could use these value to determine optimization clk
for PSR power saving.
Signed-off-by: Yongqiang Sun
Acked-by: Bindu Ramamurthy
---
.../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 6 +-
drivers/gpu/drm/amd/display/dc/dcn21/Makefile | 2 +-
.../gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c | 125 ++
.../gpu/drm/amd/display/dc/dcn21/dcn21_dccg.h | 36 +
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 3 +-
5 files changed, 166 insertions(+), 6 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.h
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index c42d2f4e81e8..f30f3fdba433 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -158,10 +158,8 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base,
// workaround: Limit dppclk to 100Mhz to avoid lower eDP panel switch
to plus 4K monitor underflow.
// Do not adjust dppclk if dppclk is 0 to avoid unexpected result
- if (!IS_DIAG_DC(dc->ctx->dce_environment)) {
- if (new_clocks->dppclk_khz < 10 && new_clocks->dppclk_khz >
0)
- new_clocks->dppclk_khz = 10;
- }
+ if (new_clocks->dppclk_khz < 10 && new_clocks->dppclk_khz > 0)
+ new_clocks->dppclk_khz = 10;
if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz,
clk_mgr->base.clks.dppclk_khz)) {
if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/Makefile
b/drivers/gpu/drm/amd/display/dc/dcn21/Makefile
index 51a2f3d4c194..1ee5fc03b7b3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/Makefile
@@ -3,7 +3,7 @@
# Makefile for DCN21.
DCN21 = dcn21_init.o dcn21_hubp.o dcn21_hubbub.o dcn21_resource.o \
-dcn21_hwseq.o dcn21_link_encoder.o
+dcn21_hwseq.o dcn21_link_encoder.o dcn21_dccg.o
ifdef CONFIG_X86
CFLAGS_$(AMDDALPATH)/dc/dcn21/dcn21_resource.o := -mhard-float -msse
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
new file mode 100644
index ..f9e3a2337fbf
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c
@@ -0,0 +1,125 @@
+/*
+ * Copyright 2018 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include "reg_helper.h"
+#include "core_types.h"
+#include "dcn20/dcn20_dccg.h"
+#include "dcn21_dccg.h"
+
+#define TO_DCN_DCCG(dccg)\
+ container_of(dccg, struct dcn_dccg, base)
+
+#define REG(reg) \
+ (dccg_dcn->regs->reg)
+
+#undef FN
+#define FN(reg_name, field_name) \
+ dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
+
+#define CTX \
+ dccg_dcn->base.ctx
+#define DC_LOGGER \
+ dccg->ctx->logger
+
+void dccg21_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk)
+{
+ struct dcn_dccg *dccg_dcn = TO_DCN_DCCG(dccg);
+
+ if (dccg->ref_dppclk) {
+ int ref_dppclk = dccg->ref_dppclk;
+ int modulo = ref_dppclk / 1;
+
+ if (req_dppclk) {
+ int phase;
+
+ /*
+* program DPP DTO phase and modulo as below
+* phase = dpp_pipe_clk_mhz / 10
+* module = dpp_global_clk_mhz / 10
+* dmub FW will read phase value to
+* determine minimum dpp clk and notify smu
+* to set clks for more
[PATCH 13/14] drm/amd/display: check actual clock value.
From: Yongqiang Sun
[Why]
Actual dpp/disp clock PMFW set are always equal or more than requested.
Need to cache the actual clock for debugging purpose.
[How]
Add actuall dpp/disp clk in clock manager and save it when set clocks.
Add an ASSERT in case of actual clock less than requested.
Signed-off-by: Yongqiang Sun
Acked-by: Bindu Ramamurthy
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c| 9 ++---
.../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 8
drivers/gpu/drm/amd/display/dc/dc.h | 2 ++
3 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index f30f3fdba433..ec394e3d8367 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -170,7 +170,7 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base,
if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz,
clk_mgr_base->clks.dispclk_khz)) {
clk_mgr_base->clks.dispclk_khz = new_clocks->dispclk_khz;
- rn_vbios_smu_set_dispclk(clk_mgr,
clk_mgr_base->clks.dispclk_khz);
+ clk_mgr_base->clks.actual_dispclk_khz =
rn_vbios_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz);
update_dispclk = true;
}
@@ -178,11 +178,14 @@ void rn_update_clocks(struct clk_mgr *clk_mgr_base,
if (dpp_clock_lowered) {
// increase per DPP DTO before lowering global dppclk
dcn20_update_clocks_update_dpp_dto(clk_mgr, context,
safe_to_lower);
- rn_vbios_smu_set_dppclk(clk_mgr, clk_mgr_base->clks.dppclk_khz);
+ clk_mgr_base->clks.actual_dppclk_khz =
+ rn_vbios_smu_set_dppclk(clk_mgr,
clk_mgr_base->clks.dppclk_khz);
+
} else {
// increase global DPPCLK before lowering per DPP DTO
if (update_dppclk || update_dispclk)
- rn_vbios_smu_set_dppclk(clk_mgr,
clk_mgr_base->clks.dppclk_khz);
+ clk_mgr_base->clks.actual_dppclk_khz =
+ rn_vbios_smu_set_dppclk(clk_mgr,
clk_mgr_base->clks.dppclk_khz);
// always update dtos unless clock is lowered and not safe to
lower
if (new_clocks->dppclk_khz >=
dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz)
dcn20_update_clocks_update_dpp_dto(clk_mgr, context,
safe_to_lower);
diff --git
a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
index 9a374522e963..ab2b9c61e565 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c
@@ -136,6 +136,10 @@ int rn_vbios_smu_set_dispclk(struct clk_mgr_internal
*clk_mgr, int requested_dis
}
}
+ // pmfw always set clock more than or equal requested clock
+ if (!IS_DIAG_DC(dc->ctx->dce_environment))
+ ASSERT(actual_dispclk_set_mhz >= requested_dispclk_khz / 1000);
+
return actual_dispclk_set_mhz * 1000;
}
@@ -194,12 +198,16 @@ void rn_vbios_smu_set_phyclk(struct clk_mgr_internal
*clk_mgr, int requested_phy
int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int
requested_dpp_khz)
{
int actual_dppclk_set_mhz = -1;
+ struct dc *dc = clk_mgr->base.ctx->dc;
actual_dppclk_set_mhz = rn_vbios_smu_send_msg_with_param(
clk_mgr,
VBIOSSMC_MSG_SetDppclkFreq,
requested_dpp_khz / 1000);
+ if (!IS_DIAG_DC(dc->ctx->dce_environment))
+ ASSERT(actual_dppclk_set_mhz >= requested_dpp_khz / 1000);
+
return actual_dppclk_set_mhz * 1000;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 67e9602c069d..962b20e607ef 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -342,7 +342,9 @@ enum dcn_pwr_state {
*/
struct dc_clocks {
int dispclk_khz;
+ int actual_dispclk_khz;
int dppclk_khz;
+ int actual_dppclk_khz;
int disp_dpp_voltage_level_khz;
int dcfclk_khz;
int socclk_khz;
--
2.25.1
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[PATCH 11/14] drm/amd/display: [FW Promotion] Release 0.0.41
From: Anthony Koo Signed-off-by: Anthony Koo Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index 81433c22fb51..b0d1347d13f0 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -36,10 +36,10 @@ /* Firmware versioning. */ #ifdef DMUB_EXPOSE_VERSION -#define DMUB_FW_VERSION_GIT_HASH 0x9f0af34af +#define DMUB_FW_VERSION_GIT_HASH 0x821097815 #define DMUB_FW_VERSION_MAJOR 0 #define DMUB_FW_VERSION_MINOR 0 -#define DMUB_FW_VERSION_REVISION 40 +#define DMUB_FW_VERSION_REVISION 41 #define DMUB_FW_VERSION_TEST 0 #define DMUB_FW_VERSION_VBIOS 0 #define DMUB_FW_VERSION_HOTFIX 0 -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 12/14] drm/amd/display: 3.2.111
From: Aric Cyr Signed-off-by: Aric Cyr Acked-by: Bindu Ramamurthy --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index c368de08969b..67e9602c069d 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -42,7 +42,7 @@ #include "inc/hw/dmcu.h" #include "dml/display_mode_lib.h" -#define DC_VER "3.2.110" +#define DC_VER "3.2.111" #define MAX_SURFACES 3 #define MAX_PLANES 6 -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 01/14] drm/amd/display: Add fallback to prefetch mode 1 if 0 fails
From: Isabel Zhang
[Why]
In some cases, prefetch mode 0 is unsupported but prefetch 1 is
supported. Due to previous change always forcing prefetch mode to 0, we
are failing bandwidth validation in cases where we should not.
[How]
By default try prefetch mode 0 but in the case validation fails, attempt
to do prefetch mode 1 to see if it is supported.
Signed-off-by: Isabel Zhang
Acked-by: Bindu Ramamurthy
---
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 28 +++
.../dc/dml/dcn21/display_mode_vba_21.c| 2 +-
2 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
index 5ae3419682c8..3d8b0875e905 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
@@ -301,9 +301,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_1_soc = {
.xfc_bus_transport_time_us = 4,
.xfc_xbuf_latency_tolerance_us = 4,
.use_urgent_burst_bw = 1,
- .num_states = 8,
- .allow_dram_self_refresh_or_dram_clock_change_in_vblank
- = dm_allow_self_refresh_and_mclk_switch
+ .num_states = 8
};
#ifndef MAX
@@ -1199,11 +1197,29 @@ static bool dcn21_fast_validate_bw(
out = true;
goto validate_out;
}
-
+ /*
+* DML favors voltage over p-state, but we're more interested in
+* supporting p-state over voltage. We can't support p-state in
+* prefetch mode > 0 so try capping the prefetch mode to start.
+*/
+
context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank =
+ dm_allow_self_refresh_and_mclk_switch;
vlevel = dml_get_voltage_level(>bw_ctx.dml, pipes, pipe_cnt);
- if (vlevel > context->bw_ctx.dml.soc.num_states)
- goto validate_fail;
+ if (vlevel > context->bw_ctx.dml.soc.num_states) {
+ /*
+* If mode is unsupported or there's still no p-state support
then
+* fall back to favoring voltage.
+*
+* We don't actually support prefetch mode 2, so require that we
+* at least support prefetch mode 1.
+*/
+
context->bw_ctx.dml.soc.allow_dram_self_refresh_or_dram_clock_change_in_vblank =
+ dm_allow_self_refresh;
+ vlevel = dml_get_voltage_level(>bw_ctx.dml, pipes,
pipe_cnt);
+ if (vlevel > context->bw_ctx.dml.soc.num_states)
+ goto validate_fail;
+ }
vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, vlevel,
split, NULL);
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 367c82b5ab4c..86ff24dffc3e 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -5477,7 +5477,7 @@ static void CalculateWatermarksAndDRAMSpeedChangeSupport(
}
}
- if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 0) {
+ if (mode_lib->vba.MinActiveDRAMClockChangeMargin > 0 && PrefetchMode ==
0) {
*DRAMClockChangeSupport = dm_dram_clock_change_vactive;
} else if (((mode_lib->vba.SynchronizedVBlank == true
|| mode_lib->vba.TotalNumberOfActiveOTG == 1
--
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[PATCH 02/14] drm/amd/display: Prevent freesync power optimization during validation
From: Isabel Zhang
[Why]
Due to the freesync power optimization increasing vtotal, the driver
believes that MPO is supported. MPO is turned on. Freesync then
exits, MPO can no longer be supported and immediate flip fails. This
causes corruption on the panel.
[How]
Avoid the freesync optimization when doing validation so in the case
freesync exits, driver can still support the configuration.
Signed-off-by: Isabel Zhang
Acked-by: Bindu Ramamurthy
---
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 22 +--
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 8 --
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 28 ---
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 9 +++---
.../drm/amd/display/dc/dcn30/dcn30_resource.h | 3 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 3 +-
6 files changed, 47 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 3e425d554f09..86c21e463640 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -2012,7 +2012,10 @@ void dcn20_populate_dml_writeback_from_context(
}
int dcn20_populate_dml_pipes_from_context(
- struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes)
+ struct dc *dc,
+ struct dc_state *context,
+ display_e2e_pipe_params_st *pipes,
+ bool fast_validate)
{
int pipe_cnt, i;
bool synchronized_vblank = true;
@@ -2052,6 +2055,7 @@ int dcn20_populate_dml_pipes_from_context(
v_total = timing->v_total;
front_porch = timing->v_front_porch;
+
/* todo:
pipes[pipe_cnt].pipe.src.dynamic_metadata_enable = 0;
pipes[pipe_cnt].pipe.src.dcc = 0;
@@ -2846,7 +2850,8 @@ bool dcn20_fast_validate_bw(
display_e2e_pipe_params_st *pipes,
int *pipe_cnt_out,
int *pipe_split_from,
- int *vlevel_out)
+ int *vlevel_out,
+ bool fast_validate)
{
bool out = false;
int split[MAX_PIPES] = { 0 };
@@ -2858,7 +2863,7 @@ bool dcn20_fast_validate_bw(
dcn20_merge_pipes_for_validate(dc, context);
- pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes);
+ pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes,
fast_validate);
*pipe_cnt_out = pipe_cnt;
@@ -2962,7 +2967,8 @@ static void dcn20_calculate_wm(
display_e2e_pipe_params_st *pipes,
int *out_pipe_cnt,
int *pipe_split_from,
- int vlevel)
+ int vlevel,
+ bool fast_validate)
{
int pipe_cnt, i, pipe_idx;
@@ -3007,10 +3013,10 @@ static void dcn20_calculate_wm(
if (pipe_cnt != pipe_idx) {
if (dc->res_pool->funcs->populate_dml_pipes)
pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc,
- context, pipes);
+ context, pipes, fast_validate);
else
pipe_cnt = dcn20_populate_dml_pipes_from_context(dc,
- context, pipes);
+ context, pipes, fast_validate);
}
*out_pipe_cnt = pipe_cnt;
@@ -3155,7 +3161,7 @@ static bool dcn20_validate_bandwidth_internal(struct dc
*dc, struct dc_state *co
BW_VAL_TRACE_COUNT();
- out = dcn20_fast_validate_bw(dc, context, pipes, _cnt,
pipe_split_from, );
+ out = dcn20_fast_validate_bw(dc, context, pipes, _cnt,
pipe_split_from, , fast_validate);
if (pipe_cnt == 0)
goto validate_out;
@@ -3170,7 +3176,7 @@ static bool dcn20_validate_bandwidth_internal(struct dc
*dc, struct dc_state *co
goto validate_out;
}
- dcn20_calculate_wm(dc, context, pipes, _cnt, pipe_split_from,
vlevel);
+ dcn20_calculate_wm(dc, context, pipes, _cnt, pipe_split_from,
vlevel, fast_validate);
dcn20_calculate_dlg_params(dc, context, pipes, pipe_cnt, vlevel);
BW_VAL_TRACE_END_WATERMARKS();
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
index 64bce14fefa3..c8f3127bbcdf 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.h
@@ -50,7 +50,10 @@ unsigned int dcn20_calc_max_scaled_time(
enum mmhubbub_wbif_mode mode,
unsigned int urgent_watermark);
int dcn20_populate_dml_pipes_from_context(
- struct dc *dc, struct dc_state *context,
display_e2e_pipe_params_st *pipes);
+ struct dc *dc,
+ struct dc_state *context,
+
[PATCH 10/14] drm/amd/display: Check other planes for iflip only if GSL already enabled
From: Alvin Lee
[Why]
We don't want GSL to be enabled when only updating
plane address
[How]
Only check other pipes for immediate flip if GSL is
already enabled
Signed-off-by: Alvin Lee
Acked-by: Bindu Ramamurthy
---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index da776de1dd1d..38bf6bfdbc44 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -1170,11 +1170,13 @@ void dcn20_pipe_control_lock(
if (pipe->plane_state != NULL)
flip_immediate = pipe->plane_state->flip_immediate;
- temp_pipe = pipe->bottom_pipe;
- while (!flip_immediate && temp_pipe) {
- if (temp_pipe->plane_state != NULL)
- flip_immediate = temp_pipe->plane_state->flip_immediate;
- temp_pipe = temp_pipe->bottom_pipe;
+ if (pipe->stream_res.gsl_group > 0) {
+ temp_pipe = pipe->bottom_pipe;
+ while (!flip_immediate && temp_pipe) {
+ if (temp_pipe->plane_state != NULL)
+ flip_immediate =
temp_pipe->plane_state->flip_immediate;
+ temp_pipe = temp_pipe->bottom_pipe;
+ }
}
if (flip_immediate && lock) {
--
2.25.1
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[PATCH 00/14] DC Patches 11 09,2020
This DC patchset brings improvements in multiple areas. In summary, we have: Alvin Lee (1): drm/amd/display: Check other planes for iflip only if GSL already enabled Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.41 Aric Cyr (2): drm/amd/display: Only wait for flip pending on immediate flips drm/amd/display: 3.2.111 Dmytro Laktyushkin (1): drm/amd/display: correct dml dsc bpc assignment Eric Bernstein (1): drm/amd/display: Move common speakersToChannels definition to hw_shared.h Isabel Zhang (2): drm/amd/display: Add fallback to prefetch mode 1 if 0 fails drm/amd/display: Prevent freesync power optimization during validation Jing Zhou (1): drm/amd/display: force use sRGB for video TF is sRGB or BT709 Krunoslav Kovac (1): drm/amd/display: Engage PSR synchronously Victor Lu (1): drm/amd/display: Explicitly disable cursor when disabling CRTC Yongqiang Sun (3): drm/amd/display: update dpp dto phase and modulo. drm/amd/display: check actual clock value. drm/amd/display: cap dpp dto phase not more than modulo. .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 6 +- .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 5 +- .../amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 15 +- .../dc/clk_mgr/dcn21/rn_clk_mgr_vbios_smu.c | 8 ++ drivers/gpu/drm/amd/display/dc/core/dc.c | 4 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 18 ++- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 4 +- drivers/gpu/drm/amd/display/dc/dc.h | 5 +- drivers/gpu/drm/amd/display/dc/dc_link.h | 5 +- drivers/gpu/drm/amd/display/dc/dc_types.h | 19 +++ drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c | 24 ++-- .../amd/display/dc/dce/dce_stream_encoder.c | 82 --- drivers/gpu/drm/amd/display/dc/dce/dmub_psr.c | 111 +-- drivers/gpu/drm/amd/display/dc/dce/dmub_psr.h | 3 +- .../drm/amd/display/dc/dcn10/dcn10_resource.c | 1 + .../display/dc/dcn10/dcn10_stream_encoder.c | 82 --- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c| 35 ++--- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 23 ++-- .../drm/amd/display/dc/dcn20/dcn20_resource.h | 8 +- drivers/gpu/drm/amd/display/dc/dcn21/Makefile | 2 +- .../gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c | 129 ++ .../gpu/drm/amd/display/dc/dcn21/dcn21_dccg.h | 36 + .../drm/amd/display/dc/dcn21/dcn21_resource.c | 60 +--- .../gpu/drm/amd/display/dc/dcn30/dcn30_afmt.c | 1 + .../gpu/drm/amd/display/dc/dcn30/dcn30_afmt.h | 83 --- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 10 +- .../drm/amd/display/dc/dcn30/dcn30_resource.h | 3 +- .../amd/display/dc/dcn301/dcn301_resource.c | 1 + .../amd/display/dc/dcn302/dcn302_resource.c | 1 + .../dc/dml/dcn21/display_mode_vba_21.c| 2 +- .../drm/amd/display/dc/dml/display_mode_vba.c | 3 +- .../gpu/drm/amd/display/dc/inc/core_types.h | 3 +- drivers/gpu/drm/amd/display/dc/inc/hw/dmcu.h | 2 +- .../gpu/drm/amd/display/dc/inc/hw/hw_shared.h | 84 .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +- 36 files changed, 510 insertions(+), 386 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.c create mode 100644 drivers/gpu/drm/amd/display/dc/dcn21/dcn21_dccg.h -- 2.25.1 Thanks, Bindu R ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH 00/19] [Set 2] Rid W=1 warnings from GPU
Hi Lee and DRM folks.
On Fri, Nov 06, 2020 at 09:49:30PM +, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> There are 5000 warnings to work through. It will take a couple more
> sets. Although, ("drm/amd/display/dc/basics/fixpt31_32: Move
> variables to where they're used") does take care of 2000 of them!
>
> Lee Jones (19):
> drm/ttm/ttm_range_manager: Demote non-conformant kernel-doc header
> drm/r128/ati_pcigart: Source file headers are not good candidates for
> kernel-doc
Applied
> drm/selftests/test-drm_dp_mst_helper: Move
> 'sideband_msg_req_encode_decode' onto the heap
> drm/mga/mga_dma: Demote kernel-doc abusers to standard comment blocks
> drm/mga/mga_state: Remove unused variable 'buf_priv'
Applied x2
> drm/radeon/atom: Move prototype into shared location
> drm/radeon/radeon_kms: Include header containing our own prototypes
> drm/omapdrm/omap_gem: Fix misnamed and missing parameter descriptions
> drm/omapdrm/omap_dmm_tiler: Demote abusive use of kernel-doc format
> drm/radeon/radeon: Move prototype into shared header
> drm/radeon/radeon_drv: Source file headers are not good candidates for
> kernel-doc
> drm/amd/display/dc/basics/fixpt31_32: Move variables to where they're
> used
> drm/radeon/radeon_drv: Move prototypes to a shared headerfile
> drm/amd/amdgpu/amdgpu_device: Provide documentation for 'reg_addr'
> params
> drm/radeon: Move prototypes to shared header
> drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device
> dev_info' from the stack
> drm/radeon/radeon_kms: Fix misnaming of 'radeon_info_ioctl's dev param
> drm/radeon/atombios_crtc: Remove description of non-existent function
> param 'encoder'
> drm/v3d/v3d_drv: Remove unused static variable 'v3d_v3d_pm_ops'
I have applied the three patches that has no obvious maintainer as indicated
above. I assume the respective maintaines to pick radeon, omapdrm, ttm,
amd, v3d and selftest patches.
Sam
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[PATCH 00/19] [Set 2] Rid W=1 warnings from GPU
This set is part of a larger effort attempting to clean-up W=1
kernel builds, which are currently overwhelmingly riddled with
niggly little warnings.
There are 5000 warnings to work through. It will take a couple more
sets. Although, ("drm/amd/display/dc/basics/fixpt31_32: Move
variables to where they're used") does take care of 2000 of them!
Lee Jones (19):
drm/ttm/ttm_range_manager: Demote non-conformant kernel-doc header
drm/r128/ati_pcigart: Source file headers are not good candidates for
kernel-doc
drm/selftests/test-drm_dp_mst_helper: Move
'sideband_msg_req_encode_decode' onto the heap
drm/mga/mga_dma: Demote kernel-doc abusers to standard comment blocks
drm/mga/mga_state: Remove unused variable 'buf_priv'
drm/radeon/atom: Move prototype into shared location
drm/radeon/radeon_kms: Include header containing our own prototypes
drm/omapdrm/omap_gem: Fix misnamed and missing parameter descriptions
drm/omapdrm/omap_dmm_tiler: Demote abusive use of kernel-doc format
drm/radeon/radeon: Move prototype into shared header
drm/radeon/radeon_drv: Source file headers are not good candidates for
kernel-doc
drm/amd/display/dc/basics/fixpt31_32: Move variables to where they're
used
drm/radeon/radeon_drv: Move prototypes to a shared headerfile
drm/amd/amdgpu/amdgpu_device: Provide documentation for 'reg_addr'
params
drm/radeon: Move prototypes to shared header
drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device
dev_info' from the stack
drm/radeon/radeon_kms: Fix misnaming of 'radeon_info_ioctl's dev param
drm/radeon/atombios_crtc: Remove description of non-existent function
param 'encoder'
drm/v3d/v3d_drv: Remove unused static variable 'v3d_v3d_pm_ops'
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 2 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 104 +-
.../drm/amd/display/dc/basics/fixpt31_32.c| 5 +
.../gpu/drm/amd/display/include/fixed31_32.h | 6 -
drivers/gpu/drm/mga/mga_dma.c | 10 +-
drivers/gpu/drm/mga/mga_state.c | 2 -
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c | 6 +-
drivers/gpu/drm/omapdrm/omap_gem.c| 3 +-
drivers/gpu/drm/r128/ati_pcigart.c| 2 +-
drivers/gpu/drm/radeon/atom.h | 6 +
drivers/gpu/drm/radeon/atombios_crtc.c| 1 -
drivers/gpu/drm/radeon/atombios_encoders.c| 4 -
drivers/gpu/drm/radeon/radeon.h | 6 +
drivers/gpu/drm/radeon/radeon_device.c| 1 +
drivers/gpu/drm/radeon/radeon_device.h| 32 ++
drivers/gpu/drm/radeon/radeon_display.c | 4 -
drivers/gpu/drm/radeon/radeon_drv.c | 11 +-
drivers/gpu/drm/radeon/radeon_drv.h | 7 ++
drivers/gpu/drm/radeon/radeon_kms.c | 3 +-
.../drm/selftests/test-drm_dp_mst_helper.c| 11 +-
drivers/gpu/drm/ttm/ttm_range_manager.c | 2 +-
drivers/gpu/drm/v3d/v3d_drv.c | 36 --
22 files changed, 138 insertions(+), 126 deletions(-)
create mode 100644 drivers/gpu/drm/radeon/radeon_device.h
Cc: Alex Deucher
Cc: amd-gfx@lists.freedesktop.org
Cc: Andy Gross
Cc: by
Cc: Christian Koenig
Cc: "Christian König"
Cc: Daniel Vetter
Cc: David Airlie
Cc: dri-de...@lists.freedesktop.org
Cc: Eric Anholt
Cc: Faith
Cc: Gareth Hughes
Cc: Harry Wentland
Cc: Huang Rui
Cc: Jeff Hartmann
Cc: Keith Whitwell
Cc: Leo Li
Cc: linaro-mm-...@lists.linaro.org
Cc: linux-me...@vger.kernel.org
Cc: Philipp Zabel
Cc: Rob Clark
Cc: Rob Clark
Cc: Sumit Semwal
Cc: Tomi Valkeinen
--
2.25.1
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[PATCH 12/19] drm/amd/display/dc/basics/fixpt31_32: Move variables to where they're used
Also rid some unused ones.
This patch solves 2000 warnings!
Fixes the following W=1 kernel build warning(s):
In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services.h:35,
from drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_helpers.c:35:
At top level:
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning:
‘dc_fixpt_ln2_div_2’ defined but not used [-Wunused-const-variable=]
76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
| ^~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning:
‘dc_fixpt_ln2’ defined but not used [-Wunused-const-variable=]
75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
| ^~~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning:
‘dc_fixpt_e’ defined but not used [-Wunused-const-variable=]
74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
| ^~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning:
‘dc_fixpt_two_pi’ defined but not used [-Wunused-const-variable=]
73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
| ^~~
drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning:
‘dc_fixpt_pi’ defined but not used [-Wunused-const-variable=]
72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
| ^~~
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
---
drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c | 5 +
drivers/gpu/drm/amd/display/include/fixed31_32.h | 6 --
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
b/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
index 1e9a2d3520684..59f37563704ad 100644
--- a/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
+++ b/drivers/gpu/drm/amd/display/dc/basics/fixpt31_32.c
@@ -26,6 +26,11 @@
#include "dm_services.h"
#include "include/fixed31_32.h"
+static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
+static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
+static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
+static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
+
static inline unsigned long long abs_i64(
long long arg)
{
diff --git a/drivers/gpu/drm/amd/display/include/fixed31_32.h
b/drivers/gpu/drm/amd/display/include/fixed31_32.h
index 16df2a485dd0d..22053d7ea6ced 100644
--- a/drivers/gpu/drm/amd/display/include/fixed31_32.h
+++ b/drivers/gpu/drm/amd/display/include/fixed31_32.h
@@ -69,12 +69,6 @@ static const struct fixed31_32 dc_fixpt_epsilon = { 1LL };
static const struct fixed31_32 dc_fixpt_half = { 0x8000LL };
static const struct fixed31_32 dc_fixpt_one = { 0x1LL };
-static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
-static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
-static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
-static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
-static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
-
/*
* @brief
* Initialization routines
--
2.25.1
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[PATCH 10/19] drm/radeon/radeon: Move prototype into shared header
Unfortunately, a suitable one didn't already exist.
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/radeon_device.c:637:6: warning: no previous prototype
for ‘radeon_device_is_virtual’ [-Wmissing-prototypes]
637 | bool radeon_device_is_virtual(void)
| ^~~~
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Sumit Semwal
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Cc: linux-me...@vger.kernel.org
Cc: linaro-mm-...@lists.linaro.org
Signed-off-by: Lee Jones
---
drivers/gpu/drm/radeon/radeon_device.c | 1 +
drivers/gpu/drm/radeon/radeon_device.h | 32 ++
drivers/gpu/drm/radeon/radeon_drv.c| 3 +--
3 files changed, 34 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/radeon/radeon_device.h
diff --git a/drivers/gpu/drm/radeon/radeon_device.c
b/drivers/gpu/drm/radeon/radeon_device.c
index 7f384ffe848a7..ad572f965190b 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -42,6 +42,7 @@
#include
#include
+#include "radeon_device.h"
#include "radeon_reg.h"
#include "radeon.h"
#include "atom.h"
diff --git a/drivers/gpu/drm/radeon/radeon_device.h
b/drivers/gpu/drm/radeon/radeon_device.h
new file mode 100644
index 0..c8e6dd2005224
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_device.h
@@ -0,0 +1,32 @@
+/* radeon_drv.h -- Private header for radeon device -*- linux-c -*-
+ *
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __RADEON_DEV_H__
+#define __RADEON_DEV_H__
+
+bool radeon_device_is_virtual(void);
+
+#endif /* __RADEON_DEV_H__ */
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c
b/drivers/gpu/drm/radeon/radeon_drv.c
index f5f1cb700d873..560267cc25892 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -51,6 +51,7 @@
#include
#include "radeon_drv.h"
+#include "radeon_device.h"
/*
* KMS wrapper.
@@ -300,8 +301,6 @@ MODULE_DEVICE_TABLE(pci, pciidlist);
static struct drm_driver kms_driver;
-bool radeon_device_is_virtual(void);
-
static int radeon_pci_probe(struct pci_dev *pdev,
const struct pci_device_id *ent)
{
--
2.25.1
___
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amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 11/19] drm/radeon/radeon_drv: Source file headers are not good candidates for kernel-doc
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/radeon_drv.c:2: warning: Cannot understand * file radeon_drv.c Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Gareth Hughes Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/radeon_drv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 560267cc25892..bb7b33e535f81 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -1,4 +1,4 @@ -/** +/* * \file radeon_drv.c * ATI Radeon driver * -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 15/19] drm/radeon: Move prototypes to shared header
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/radeon/radeon_kms.c:756:5: warning: no previous prototype for
‘radeon_get_vblank_counter_kms’ [-Wmissing-prototypes]
756 | u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc)
| ^
drivers/gpu/drm/radeon/radeon_kms.c:826:5: warning: no previous prototype for
‘radeon_enable_vblank_kms’ [-Wmissing-prototypes]
826 | int radeon_enable_vblank_kms(struct drm_crtc *crtc)
| ^~~~
drivers/gpu/drm/radeon/radeon_kms.c:853:6: warning: no previous prototype for
‘radeon_disable_vblank_kms’ [-Wmissing-prototypes]
853 | void radeon_disable_vblank_kms(struct drm_crtc *crtc)
| ^
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Sumit Semwal
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Cc: linux-me...@vger.kernel.org
Cc: linaro-mm-...@lists.linaro.org
Signed-off-by: Lee Jones
---
drivers/gpu/drm/radeon/radeon.h | 6 ++
drivers/gpu/drm/radeon/radeon_display.c | 4
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index e1132d86d2507..961a31b8805c2 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -2832,6 +2832,12 @@ extern void radeon_program_register_sequence(struct
radeon_device *rdev,
const u32 array_size);
struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev);
+/* KMS */
+
+u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc);
+int radeon_enable_vblank_kms(struct drm_crtc *crtc);
+void radeon_disable_vblank_kms(struct drm_crtc *crtc);
+
/*
* vm
*/
diff --git a/drivers/gpu/drm/radeon/radeon_display.c
b/drivers/gpu/drm/radeon/radeon_display.c
index b79686cf8bdbd..bd60f16fd0d78 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -45,10 +45,6 @@
#include "atom.h"
#include "radeon.h"
-u32 radeon_get_vblank_counter_kms(struct drm_crtc *crtc);
-int radeon_enable_vblank_kms(struct drm_crtc *crtc);
-void radeon_disable_vblank_kms(struct drm_crtc *crtc);
-
static void avivo_crtc_load_lut(struct drm_crtc *crtc)
{
struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
--
2.25.1
___
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 17/19] drm/radeon/radeon_kms: Fix misnaming of 'radeon_info_ioctl's dev param
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/radeon_kms.c:226: warning: Function parameter or member 'dev' not described in 'radeon_info_ioctl' drivers/gpu/drm/radeon/radeon_kms.c:226: warning: Excess function parameter 'rdev' description in 'radeon_info_ioctl' Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/radeon_kms.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 0d8fbabffcead..21c206795c364 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -213,7 +213,7 @@ static void radeon_set_filp_rights(struct drm_device *dev, /** * radeon_info_ioctl - answer a device specific request. * - * @rdev: radeon device pointer + * @dev: radeon device pointer * @data: request object * @filp: drm filp * -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 06/19] drm/radeon/atom: Move prototype into shared location
Both source files include atom.h, which seems like a reasonable location to place an atom based function into. Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/radeon_atombios.c:1791:6: warning: no previous prototype for ‘radeon_atom_get_tv_timings’ [-Wmissing-prototypes] 1791 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | ^~ Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/atom.h | 6 ++ drivers/gpu/drm/radeon/atombios_encoders.c | 4 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h index 1bf06c91cd959..cb93b83114dbe 100644 --- a/drivers/gpu/drm/radeon/atom.h +++ b/drivers/gpu/drm/radeon/atom.h @@ -154,6 +154,12 @@ bool atom_parse_data_header(struct atom_context *ctx, int index, uint16_t *size, bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t *frev, uint8_t *crev); int atom_allocate_fb_scratch(struct atom_context *ctx); + +struct drm_display_mode; +struct radeon_device; +bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, + struct drm_display_mode *mode); + #include "atom-types.h" #include "atombios.h" #include "ObjectID.h" diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index cc5ee1b3af84f..85f903caf12e1 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c @@ -296,10 +296,6 @@ static void radeon_atom_backlight_exit(struct radeon_encoder *encoder) #endif -/* evil but including atombios.h is much worse */ -bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, - struct drm_display_mode *mode); - static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 16/19] drm/amd/amdgpu/amdgpu_kms: Remove 'struct drm_amdgpu_info_device dev_info' from the stack
Place it on the heap instead.
Fixes the following W=1 kernel build warning(s):
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c: In function ‘amdgpu_info_ioctl’:
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c:979:1: warning: the frame size of 1128
bytes is larger than 1024 bytes [-Wframe-larger-than=]
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Lee Jones
---
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 104 +---
1 file changed, 55 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 918d4e9c6461a..ef6fa5007d135 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -721,38 +721,42 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
return n ? -EFAULT : 0;
}
case AMDGPU_INFO_DEV_INFO: {
- struct drm_amdgpu_info_device dev_info;
+ struct drm_amdgpu_info_device *dev_info;
uint64_t vm_size;
+ int ret;
+
+ dev_info = kzalloc(sizeof(*dev_info), GFP_KERNEL);
+ if (!dev_info)
+ return -ENOMEM;
- memset(_info, 0, sizeof(dev_info));
- dev_info.device_id = dev->pdev->device;
- dev_info.chip_rev = adev->rev_id;
- dev_info.external_rev = adev->external_rev_id;
- dev_info.pci_rev = dev->pdev->revision;
- dev_info.family = adev->family;
- dev_info.num_shader_engines =
adev->gfx.config.max_shader_engines;
- dev_info.num_shader_arrays_per_engine =
adev->gfx.config.max_sh_per_se;
+ dev_info->device_id = dev->pdev->device;
+ dev_info->chip_rev = adev->rev_id;
+ dev_info->external_rev = adev->external_rev_id;
+ dev_info->pci_rev = dev->pdev->revision;
+ dev_info->family = adev->family;
+ dev_info->num_shader_engines =
adev->gfx.config.max_shader_engines;
+ dev_info->num_shader_arrays_per_engine =
adev->gfx.config.max_sh_per_se;
/* return all clocks in KHz */
- dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
+ dev_info->gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
if (adev->pm.dpm_enabled) {
- dev_info.max_engine_clock = amdgpu_dpm_get_sclk(adev,
false) * 10;
- dev_info.max_memory_clock = amdgpu_dpm_get_mclk(adev,
false) * 10;
+ dev_info->max_engine_clock = amdgpu_dpm_get_sclk(adev,
false) * 10;
+ dev_info->max_memory_clock = amdgpu_dpm_get_mclk(adev,
false) * 10;
} else {
- dev_info.max_engine_clock = adev->clock.default_sclk *
10;
- dev_info.max_memory_clock = adev->clock.default_mclk *
10;
+ dev_info->max_engine_clock = adev->clock.default_sclk *
10;
+ dev_info->max_memory_clock = adev->clock.default_mclk *
10;
}
- dev_info.enabled_rb_pipes_mask =
adev->gfx.config.backend_enable_mask;
- dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *
+ dev_info->enabled_rb_pipes_mask =
adev->gfx.config.backend_enable_mask;
+ dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se *
adev->gfx.config.max_shader_engines;
- dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts;
- dev_info._pad = 0;
- dev_info.ids_flags = 0;
+ dev_info->num_hw_gfx_contexts =
adev->gfx.config.max_hw_contexts;
+ dev_info->_pad = 0;
+ dev_info->ids_flags = 0;
if (adev->flags & AMD_IS_APU)
- dev_info.ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
+ dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
if (amdgpu_mcbp || amdgpu_sriov_vf(adev))
- dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
+ dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
if (amdgpu_is_tmz(adev))
- dev_info.ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
+ dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
vm_size -= AMDGPU_VA_RESERVED_SIZE;
@@ -762,45 +766,47 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void
*data, struct drm_file
adev->vce.fw_version < AMDGPU_VCE_FW_53_45)
vm_size = min(vm_size, 1ULL << 40);
- dev_info.virtual_address_offset =
[PATCH 13/19] drm/radeon/radeon_drv: Move prototypes to a shared headerfile
Fixes the following W=1 kernel build warning(s): 62 | void radeon_driver_unload_kms(struct drm_device *dev) | ^~~~ drivers/gpu/drm/radeon/radeon_kms.c:105:5: warning: no previous prototype for ‘radeon_driver_load_kms’ [-Wmissing-prototypes] 105 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) | ^~ drivers/gpu/drm/radeon/radeon_kms.c:619:6: warning: no previous prototype for ‘radeon_driver_lastclose_kms’ [-Wmissing-prototypes] 619 | void radeon_driver_lastclose_kms(struct drm_device *dev) | ^~~ drivers/gpu/drm/radeon/radeon_kms.c:634:5: warning: no previous prototype for ‘radeon_driver_open_kms’ [-Wmissing-prototypes] 634 | int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) | ^~ drivers/gpu/drm/radeon/radeon_kms.c:705:6: warning: no previous prototype for ‘radeon_driver_postclose_kms’ [-Wmissing-prototypes] 705 | void radeon_driver_postclose_kms(struct drm_device *dev, | ^~~ Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Gareth Hughes Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/radeon_drv.c | 6 -- drivers/gpu/drm/radeon/radeon_drv.h | 7 +++ 2 files changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index bb7b33e535f81..e0d664e9e2feb 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c @@ -112,12 +112,6 @@ #define KMS_DRIVER_MAJOR 2 #define KMS_DRIVER_MINOR 50 #define KMS_DRIVER_PATCHLEVEL 0 -int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); -void radeon_driver_unload_kms(struct drm_device *dev); -void radeon_driver_lastclose_kms(struct drm_device *dev); -int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); -void radeon_driver_postclose_kms(struct drm_device *dev, -struct drm_file *file_priv); int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon, bool freeze); int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon); diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 173deb4634146..ac7970919c4d3 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h @@ -118,4 +118,11 @@ long radeon_drm_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); +int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); +void radeon_driver_unload_kms(struct drm_device *dev); +void radeon_driver_lastclose_kms(struct drm_device *dev); +int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv); +void radeon_driver_postclose_kms(struct drm_device *dev, +struct drm_file *file_priv); + #endif /* __RADEON_DRV_H__ */ -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 18/19] drm/radeon/atombios_crtc: Remove description of non-existent function param 'encoder'
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/atombios_crtc.c:1796: warning: Excess function parameter 'encoder' description in 'radeon_get_shared_nondp_ppll' Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/atombios_crtc.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 91811757104c0..1979ed3d65472 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c @@ -1787,7 +1787,6 @@ static int radeon_get_shared_dp_ppll(struct drm_crtc *crtc) * radeon_get_shared_nondp_ppll - return the PPLL used by another non-DP crtc * * @crtc: drm crtc - * @encoder: drm encoder * * Returns the PPLL (Pixel PLL) used by another non-DP crtc/encoder which can * be shared (i.e., same clock). -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 07/19] drm/radeon/radeon_kms: Include header containing our own prototypes
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/radeon/radeon_kms.c:61:6: warning: no previous prototype for ‘radeon_driver_unload_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:104:5: warning: no previous prototype for ‘radeon_driver_load_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:618:6: warning: no previous prototype for ‘radeon_driver_lastclose_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:633:5: warning: no previous prototype for ‘radeon_driver_open_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:704:6: warning: no previous prototype for ‘radeon_driver_postclose_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:755:5: warning: no previous prototype for ‘radeon_get_vblank_counter_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:825:5: warning: no previous prototype for ‘radeon_enable_vblank_kms’ [-Wmissing-prototypes] drivers/gpu/drm/radeon/radeon_kms.c:852:6: warning: no previous prototype for ‘radeon_disable_vblank_kms’ [-Wmissing-prototypes] Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Signed-off-by: Lee Jones --- drivers/gpu/drm/radeon/radeon_kms.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 99ee60f8b604d..0d8fbabffcead 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c @@ -40,6 +40,7 @@ #include "radeon.h" #include "radeon_asic.h" +#include "radeon_drv.h" #if defined(CONFIG_VGA_SWITCHEROO) bool radeon_has_atpx(void); -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 14/19] drm/amd/amdgpu/amdgpu_device: Provide documentation for 'reg_addr' params
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:594: warning: Function parameter or member 'reg_addr' not described in 'amdgpu_device_indirect_rreg' drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:624: warning: Function parameter or member 'reg_addr' not described in 'amdgpu_device_indirect_rreg64' Cc: Alex Deucher Cc: "Christian König" Cc: David Airlie Cc: Daniel Vetter Cc: Sumit Semwal Cc: amd-gfx@lists.freedesktop.org Cc: dri-de...@lists.freedesktop.org Cc: linux-me...@vger.kernel.org Cc: linaro-mm-...@lists.linaro.org Signed-off-by: Lee Jones --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 300fcade4a2b1..63374d12e00fe 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -585,6 +585,7 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v) * @adev: amdgpu_device pointer * @pcie_index: mmio register offset * @pcie_data: mmio register offset + * @reg_addr: indirect register address to read from * * Returns the value of indirect register @reg_addr */ @@ -615,6 +616,7 @@ u32 amdgpu_device_indirect_rreg(struct amdgpu_device *adev, * @adev: amdgpu_device pointer * @pcie_index: mmio register offset * @pcie_data: mmio register offset + * @reg_addr: indirect register address to read from * * Returns the value of indirect register @reg_addr */ -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH] drm/amd/amdgpu: Import amdgpu_amdkfd_gfx_v9 header file into implementation
[AMD Official Use Only - Internal Distribution Only]
Reviewed-By: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Ramesh
Errabolu
Sent: Friday, November 6, 2020 2:05 PM
To: amd-gfx@lists.freedesktop.org
Cc: Errabolu, Ramesh
Subject: [PATCH] drm/amd/amdgpu: Import amdgpu_amdkfd_gfx_v9 header file into
implementation
[Why]
Prevent compiler warnings when building amdgpu kernel module
[How]
Add the include directive for amdgpu_amdkfd_gfx_v9 header file
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index b75bf0bb05ae..c70d8cadaf18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -37,6 +37,7 @@
#include "soc15.h"
#include "soc15d.h"
#include "gfx_v9_0.h"
+#include "amdgpu_amdkfd_gfx_v9.h"
enum hqd_dequeue_request_type {
NO_ACTION = 0,
--
2.17.1
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[PATCH] drm/amd/amdgpu: Import amdgpu_amdkfd_gfx_v9 header file into implementation
[Why]
Prevent compiler warnings when building amdgpu kernel module
[How]
Add the include directive for amdgpu_amdkfd_gfx_v9 header file
Signed-off-by: Ramesh Errabolu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
index b75bf0bb05ae..c70d8cadaf18 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
@@ -37,6 +37,7 @@
#include "soc15.h"
#include "soc15d.h"
#include "gfx_v9_0.h"
+#include "amdgpu_amdkfd_gfx_v9.h"
enum hqd_dequeue_request_type {
NO_ACTION = 0,
--
2.17.1
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[PATCH 2/2] drm/amdgpu/pm/smu11: cache smu firmware version
So we print the proper SMU firmware version in debugfs, ioctls, etc.
for vangogh.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
index b6453ee6f8e6..6b7d1335b46d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c
@@ -216,6 +216,7 @@ int smu_v11_0_check_fw_status(struct smu_context *smu)
int smu_v11_0_check_fw_version(struct smu_context *smu)
{
+ struct amdgpu_device *adev = smu->adev;
uint32_t if_version = 0xff, smu_version = 0xff;
uint16_t smu_major;
uint8_t smu_minor, smu_debug;
@@ -228,6 +229,8 @@ int smu_v11_0_check_fw_version(struct smu_context *smu)
smu_major = (smu_version >> 16) & 0x;
smu_minor = (smu_version >> 8) & 0xff;
smu_debug = (smu_version >> 0) & 0xff;
+ if (smu->is_apu)
+ adev->pm.fw_version = smu_version;
switch (smu->adev->asic_type) {
case CHIP_ARCTURUS:
--
2.25.4
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[PATCH 1/2] drm/amdgpu/pm/smu12: cache smu firmware version
So we print the proper SMU firmware version in debugfs, ioctls, etc.
for Renoir.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
index 660f403d5770..522d55004655 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
@@ -71,6 +71,7 @@ int smu_v12_0_check_fw_status(struct smu_context *smu)
int smu_v12_0_check_fw_version(struct smu_context *smu)
{
+ struct amdgpu_device *adev = smu->adev;
uint32_t if_version = 0xff, smu_version = 0xff;
uint16_t smu_major;
uint8_t smu_minor, smu_debug;
@@ -83,6 +84,8 @@ int smu_v12_0_check_fw_version(struct smu_context *smu)
smu_major = (smu_version >> 16) & 0x;
smu_minor = (smu_version >> 8) & 0xff;
smu_debug = (smu_version >> 0) & 0xff;
+ if (smu->is_apu)
+ adev->pm.fw_version = smu_version;
/*
* 1. if_version mismatch is not critical as our fw is designed
--
2.25.4
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Re: [PATCH] drm/amdgpu: enable DCN for navi10 headless SKU
[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Alex Deucher From: amd-gfx on behalf of Tianci Yin Sent: Friday, November 6, 2020 2:36 AM To: amd-gfx@lists.freedesktop.org Cc: Long, Gang ; Chen, Guchun ; Xu, Feifei ; Yin, Tianci (Rico) ; Tuikov, Luben ; Deucher, Alexander ; Cui, Flora ; Zhang, Hawking Subject: [PATCH] drm/amdgpu: enable DCN for navi10 headless SKU From: "Tianci.Yin" There is a NULL pointer crash when DCN disabled on headless SKU. On normal SKU, the variable adev->ddev.mode_config.funcs is initialized in dm_hw_init(), and it is fine to access it in amdgpu_device_resume(). But on headless SKU, DCN is disabled, the funcs variable is not initialized, then crash arises. Enable DCN to fix this issue. Change-Id: I33bc30210e3420e60ceb59175e39855d00b05b06 Signed-off-by: Tianci.Yin --- drivers/gpu/drm/amd/amdgpu/nv.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c index e33d8022cc32..67375b2948f5 100644 --- a/drivers/gpu/drm/amd/amdgpu/nv.c +++ b/drivers/gpu/drm/amd/amdgpu/nv.c @@ -535,8 +535,7 @@ int nv_set_ip_blocks(struct amdgpu_device *adev) if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) amdgpu_device_ip_block_add(adev, _virtual_ip_block); #if defined(CONFIG_DRM_AMD_DC) - else if (amdgpu_device_has_dc_support(adev) && -!nv_is_headless_sku(adev->pdev)) + else if (amdgpu_device_has_dc_support(adev)) amdgpu_device_ip_block_add(adev, _ip_block); #endif amdgpu_device_ip_block_add(adev, _v10_0_ip_block); -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfxdata=04%7C01%7Calexander.deucher%40amd.com%7C516e3593f84a45811bd908d88226c8e8%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637402450426333203%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000sdata=RzbVAu02p9LVSSOXx3M0QwQztABgpf8FRiWhDyU6BOY%3Dreserved=0 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] Fix bug to get average GPU power
For whatever reason when I download this message and try to add it with
"git am" it says the patch is empty.
Can you attach the patch as an attachment please?
Thanks,
Tom
On Mon, Oct 26, 2020 at 11:29 PM Quan, Evan wrote:
> [AMD Official Use Only - Internal Distribution Only]
>
> Reviewed-by: Evan Quan
>
>
>
> *From:* amd-gfx *On Behalf Of *Lei
> Guo
> *Sent:* Friday, October 23, 2020 11:03 AM
> *To:* amd-gfx@lists.freedesktop.org
> *Subject:* [PATCH] Fix bug to get average GPU power
>
>
>
> From 0277318fc1799d17878d9f407254773fc2bb964c Mon Sep 17 00:00:00 2001
>
> From: Guo Lei
>
> Date: Fri, 16 Oct 2020 17:03:44 +0800
>
> Subject: [PATCH] Fix bug to get average GPU power
>
>
>
> Synchronize emu amd_pp_sensors with kgd_pp_interface.h
>
>
>
> Signed-off-by: Guo Lei
>
> Change-Id: I531fa006ecdd1d42e589bbfe79a7d6699ae5b2b6
>
> ---
>
> src/umr.h | 3 +++
>
> 1 file changed, 3 insertions(+)
>
>
>
> diff --git a/src/umr.h b/src/umr.h
>
> index c928fad..8c45f12 100644
>
> --- a/src/umr.h
>
> +++ b/src/umr.h
>
> @@ -79,6 +79,9 @@ enum amd_pp_sensors {
>
> AMDGPU_PP_SENSOR_MEM_LOAD,
>
> AMDGPU_PP_SENSOR_GFX_MCLK,
>
> AMDGPU_PP_SENSOR_GPU_TEMP,
>
> +AMDGPU_PP_SENSOR_EDGE_TEMP = AMDGPU_PP_SENSOR_GPU_TEMP,
>
> +AMDGPU_PP_SENSOR_HOTSPOT_TEMP,
>
> +AMDGPU_PP_SENSOR_MEM_TEMP,
>
> AMDGPU_PP_SENSOR_VCE_POWER,
>
> AMDGPU_PP_SENSOR_UVD_POWER,
>
> AMDGPU_PP_SENSOR_GPU_POWER,
>
> --
>
> 2.17.1
>
>
>
>
>
>
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