Re: [PATCH V2 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
Nice cleanup, feel free to add an Acked-by: Christian König
as well.
Christian.
Am 14.01.22 um 07:44 schrieb Zhou1, Tao:
[AMD Official Use Only]
The series is:
Reviewed-by: Tao Zhou
-Original Message-
From: Chai, Thomas
Sent: Friday, January 14, 2022 1:34 PM
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking
; Zhou1, Tao ; Clements,
John ; Chai, Thomas
Subject: [PATCH V2 1/5] drm/amdgpu: Fix the code style warnings in
amdgpu_ras
Fix the code style warnings in amdgpu_ras:
1. ERROR: space required before the open parenthesis '('.
2. WARNING: line length of xxx exceeds 100 columns.
3. ERROR: "foo* bar" should be "foo *bar".
4. WARNING: unnecessary whitespace before a quoted newline.
5. WARNING: space prohibited before semicolon.
6. WARNING: suspect code indent for conditional statements.
7. WARNING: braces {} are not necessary for single statement blocks.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
2 files changed, 30 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 0bb6b5354802..23502b2b0770 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
amdgpu_device *adev, static int amdgpu_ras_block_match_default(struct
amdgpu_ras_block_object *block_obj,
enum amdgpu_ras_block block)
{
- if(!block_obj)
+ if (!block_obj)
return -EINVAL;
if (block_obj->block == block)
@@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
amdgpu_ras_block_object *block_
return -EINVAL;
}
-static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
amdgpu_device *adev,
+static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
+amdgpu_device *adev,
enum amdgpu_ras_block block,
uint32_t sub_block_index) {
struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@
static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct
ras_err_d int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj = NULL;
+ struct amdgpu_ras_block_object *block_obj = NULL;
struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
struct ras_err_data err_data = {0, 0, 0, NULL};
@@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
amdgpu_device *adev,
} else {
block_obj = amdgpu_ras_get_ras_block(adev, info->head.block,
0);
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
get_ras_block_str(>head));
return -EINVAL;
}
@@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
amdgpu_device *adev, int amdgpu_ras_reset_error_status(struct
amdgpu_device *adev,
enum amdgpu_ras_block block)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, block, 0);
+ struct amdgpu_ras_block_object *block_obj =
+amdgpu_ras_get_ras_block(adev, block, 0);
if (!amdgpu_ras_is_supported(adev, block))
return -EINVAL;
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
ras_block_str(block));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ ras_block_str(block));
return -EINVAL;
}
@@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device
*adev,
return -EINVAL;
if (!block_obj || !block_obj->hw_ops){
- dev_info(adev->dev, "%s doesn't config ras function \n",
get_ras_block_str(>head));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ get_ras_block_str(>head));
return -EINVAL;
}
@@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
amdgpu_device *adev) static void amdgpu_ras_error_status_query(struct
amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, info->head.block, info-
head.sub_block_index);
+ struct amdgpu_ras_block_object *block_obj =
amdgpu_ras_get_ras_block(adev,
+ info-
head.block,
+
RE: [PATCH v4] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[AMD Official Use Only]
Reviewed-by: Horace Chen
-Original Message-
From: Chen, JingWen
Sent: Friday, January 14, 2022 2:54 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk ; Chen, Horace ;
Skvortsov, Victor ; Chen, JingWen
Subject: [PATCH v4] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init.
patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the
right base in the right sequence.
v2:
call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange
workqueue run
v3:
clean up the code logic
v4:
add some comment and make the code more readable
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 20 +++-
2 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index da3348fa7b0e..5610eae8ef0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2353,7 +2353,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device
*adev)
}
if (amdgpu_sriov_vf(adev))
- amdgpu_virt_exchange_data(adev);
+ amdgpu_virt_init_data_exchange(adev);
r = amdgpu_ib_pool_init(adev);
if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..07bc0f504713 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,20 +625,20 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
- adev->virt.vf2pf_update_interval_ms = 2000;
+ if (adev->mman.fw_vram_usage_va != NULL) {
+ /* go through this logic in ip_init and reset to init
workqueue*/
+ amdgpu_virt_exchange_data(adev);
+ INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
+ schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
+ } else if (adev->bios != NULL) {
+ /* got through this logic in early init stage to get necessary
flags,
+e.g. rlcg_acc related*/
adev->virt.fw_reserve.p_pf2vf =
(struct amd_sriov_msg_pf2vf_info_header *)
(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
amdgpu_virt_read_pf2vf_data(adev);
}
-
- if (adev->virt.vf2pf_update_interval_ms != 0) {
- INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
- schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
- }
}
@@ -674,12 +674,6 @@ void amdgpu_virt_exchange_data(struct amdgpu_device *adev)
if (adev->virt.ras_init_done)
amdgpu_virt_add_bad_page(adev,
bp_block_offset, bp_block_size);
}
- } else if (adev->bios != NULL) {
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
}
--
2.30.2
[PATCH v4] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc
sw_init. patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to
set the right base in the right sequence.
v2:
call amdgpu_virt_init_data_exchange after gmc sw_init to make data
exchange workqueue run
v3:
clean up the code logic
v4:
add some comment and make the code more readable
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 20 +++-
2 files changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index da3348fa7b0e..5610eae8ef0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2353,7 +2353,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device
*adev)
}
if (amdgpu_sriov_vf(adev))
- amdgpu_virt_exchange_data(adev);
+ amdgpu_virt_init_data_exchange(adev);
r = amdgpu_ib_pool_init(adev);
if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..07bc0f504713 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,20 +625,20 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
- adev->virt.vf2pf_update_interval_ms = 2000;
+ if (adev->mman.fw_vram_usage_va != NULL) {
+ /* go through this logic in ip_init and reset to init
workqueue*/
+ amdgpu_virt_exchange_data(adev);
+ INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
+ schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
+ } else if (adev->bios != NULL) {
+ /* got through this logic in early init stage to get necessary
flags, e.g. rlcg_acc related*/
adev->virt.fw_reserve.p_pf2vf =
(struct amd_sriov_msg_pf2vf_info_header *)
(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
amdgpu_virt_read_pf2vf_data(adev);
}
-
- if (adev->virt.vf2pf_update_interval_ms != 0) {
- INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
- schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
- }
}
@@ -674,12 +674,6 @@ void amdgpu_virt_exchange_data(struct amdgpu_device *adev)
if (adev->virt.ras_init_done)
amdgpu_virt_add_bad_page(adev,
bp_block_offset, bp_block_size);
}
- } else if (adev->bios != NULL) {
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
}
--
2.30.2
RE: [PATCH V2 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
[AMD Official Use Only]
The series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Chai, Thomas
> Sent: Friday, January 14, 2022 1:34 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH V2 1/5] drm/amdgpu: Fix the code style warnings in
> amdgpu_ras
>
> Fix the code style warnings in amdgpu_ras:
> 1. ERROR: space required before the open parenthesis '('.
> 2. WARNING: line length of xxx exceeds 100 columns.
> 3. ERROR: "foo* bar" should be "foo *bar".
> 4. WARNING: unnecessary whitespace before a quoted newline.
> 5. WARNING: space prohibited before semicolon.
> 6. WARNING: suspect code indent for conditional statements.
> 7. WARNING: braces {} are not necessary for single statement blocks.
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
> 2 files changed, 30 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 0bb6b5354802..23502b2b0770 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev, static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_obj,
> enum amdgpu_ras_block block)
> {
> - if(!block_obj)
> + if (!block_obj)
> return -EINVAL;
>
> if (block_obj->block == block)
> @@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_
> return -EINVAL;
> }
>
> -static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
> amdgpu_device *adev,
> +static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
> +amdgpu_device *adev,
> enum amdgpu_ras_block block,
> uint32_t sub_block_index) {
> struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@
> static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct
> ras_err_d int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj = NULL;
> + struct amdgpu_ras_block_object *block_obj = NULL;
> struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
> struct ras_err_data err_data = {0, 0, 0, NULL};
>
> @@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,
> } else {
> block_obj = amdgpu_ras_get_ras_block(adev, info->head.block,
> 0);
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> get_ras_block_str(>head));
> return -EINVAL;
> }
> @@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev, int amdgpu_ras_reset_error_status(struct
> amdgpu_device *adev,
> enum amdgpu_ras_block block)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, block, 0);
> + struct amdgpu_ras_block_object *block_obj =
> +amdgpu_ras_get_ras_block(adev, block, 0);
>
> if (!amdgpu_ras_is_supported(adev, block))
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> ras_block_str(block));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + ras_block_str(block));
> return -EINVAL;
> }
>
> @@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device
> *adev,
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(>head));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + get_ras_block_str(>head));
> return -EINVAL;
> }
>
> @@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
> amdgpu_device *adev) static void amdgpu_ras_error_status_query(struct
> amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
> + struct amdgpu_ras_block_object *block_obj =
> amdgpu_ras_get_ras_block(adev,
> + info-
> >head.block,
> +
RE: [PATCH v3] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[AMD Official Use Only]
+Shaoyun
-Original Message-
From: Chen, JingWen
Sent: Thursday, January 13, 2022 11:09 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Monk ; Chen, Horace ;
Skvortsov, Victor ; Chen, JingWen
Subject: [PATCH v3] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc sw_init.
patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to set the
right base in the right sequence.
v2:
call amdgpu_virt_init_data_exchange after gmc sw_init to make data exchange
workqueue run
v3:
clean up the code logic
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 12
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index da3348fa7b0e..5610eae8ef0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2353,7 +2353,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device
*adev)
}
if (amdgpu_sriov_vf(adev))
- amdgpu_virt_exchange_data(adev);
+ amdgpu_virt_init_data_exchange(adev);
r = amdgpu_ib_pool_init(adev);
if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..d83dfdc64d49 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,14 +625,16 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
+ if (adev->mman.fw_vram_usage_va != NULL) {
adev->virt.vf2pf_update_interval_ms = 2000;
-
+ amdgpu_virt_exchange_data(adev);
+ } else if (adev->bios != NULL) {
adev->virt.fw_reserve.p_pf2vf =
(struct amd_sriov_msg_pf2vf_info_header *)
(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
amdgpu_virt_read_pf2vf_data(adev);
+ return;
}
if (adev->virt.vf2pf_update_interval_ms != 0) { @@ -674,12 +676,6 @@
void amdgpu_virt_exchange_data(struct amdgpu_device *adev)
if (adev->virt.ras_init_done)
amdgpu_virt_add_bad_page(adev,
bp_block_offset, bp_block_size);
}
- } else if (adev->bios != NULL) {
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
}
--
2.30.2
[PATCH 2/2] drm/amdgpu: apply vcn harvest quirk
This is a following patch to apply the workaround only on
those boards with a bad harvest table in ip discovery.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 32 ---
1 file changed, 27 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 2f891ae90bad..07965ac6381b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -243,6 +243,30 @@ static inline bool
amdgpu_discovery_verify_binary_signature(uint8_t *binary)
return (le32_to_cpu(bhdr->binary_signature) == BINARY_SIGNATURE);
}
+static void amdgpu_discovery_harvest_config_quirk(struct amdgpu_device *adev)
+{
+ /*
+* So far, apply this quirk only on those Navy Flounder boards which
+* have a bad harvest table of VCN config.
+*/
+ if ((adev->ip_versions[UVD_HWIP][1] == IP_VERSION(3, 0, 1)) &&
+ (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2))) {
+ switch (adev->pdev->revision) {
+ case 0xC1:
+ case 0xC2:
+ case 0xC3:
+ case 0xC5:
+ case 0xC7:
+ case 0xCF:
+ case 0xDF:
+ adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1;
+ break;
+ default:
+ break;
+ }
+ }
+}
+
static int amdgpu_discovery_init(struct amdgpu_device *adev)
{
struct table_info *info;
@@ -548,11 +572,9 @@ void amdgpu_discovery_harvest_ip(struct amdgpu_device
*adev)
break;
}
}
- /* some IP discovery tables on Navy Flounder don't have this set
correctly */
- if ((adev->ip_versions[UVD_HWIP][1] == IP_VERSION(3, 0, 1)) &&
- (adev->ip_versions[GC_HWIP][0] == IP_VERSION(10, 3, 2)) &&
- (adev->pdev->revision != 0xFF))
- adev->vcn.harvest_config |= AMDGPU_VCN_HARVEST_VCN1;
+
+ amdgpu_discovery_harvest_config_quirk(adev);
+
if (vcn_harvest_count == adev->vcn.num_vcn_inst) {
adev->harvest_ip_mask |= AMD_HARVEST_IP_VCN_MASK;
adev->harvest_ip_mask |= AMD_HARVEST_IP_JPEG_MASK;
--
2.17.1
[PATCH 1/2] drm/amdgpu: drop redundant check of ip discovery_bin
Early check in amdgpu_discovery_reg_base_init promises this.
Signed-off-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
index 57e001d73ec9..2f891ae90bad 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
@@ -1194,11 +1194,6 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device
*adev)
return -EINVAL;
amdgpu_discovery_harvest_ip(adev);
-
- if (!adev->mman.discovery_bin) {
- DRM_ERROR("ip discovery uninitialized\n");
- return -EINVAL;
- }
break;
}
--
2.17.1
[PATCH V2 5/5] drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc
drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc:
1. WARNING: missing space after struct definition.
2. WARNING: please, no space before tabs.
3. WARNING: line length of xxx exceeds 100 columns.
4. ERROR: "foo* bar" should be "foo *bar".
5. ERROR: space required before the open parenthesis '('.
6. ERROR: space prohibited after that open parenthesis '('.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/mca_v3_0.c| 7 ---
3 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index c94a4b3c8d6d..4af2c2a322e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -24,7 +24,7 @@
#define __AMDGPU_HDP_H__
#include "amdgpu_ras.h"
-struct amdgpu_hdp_ras{
+struct amdgpu_hdp_ras {
struct amdgpu_ras_block_object ras_block;
};
@@ -40,7 +40,7 @@ struct amdgpu_hdp_funcs {
struct amdgpu_hdp {
struct ras_common_if*ras_if;
const struct amdgpu_hdp_funcs *funcs;
- struct amdgpu_hdp_ras *ras;
+ struct amdgpu_hdp_ras *ras;
};
int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 478457637d29..5929d6f528c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -950,7 +950,8 @@ static void amdgpu_xgmi_query_ras_error_count(struct
amdgpu_device *adev,
static int amdgpu_ras_error_inject_xgmi(struct amdgpu_device *adev, void
*inject_if)
{
int ret = 0;
- struct ta_ras_trigger_error_input *block_info = (struct
ta_ras_trigger_error_input *)inject_if;
+ struct ta_ras_trigger_error_input *block_info =
+ (struct ta_ras_trigger_error_input *)inject_if;
if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
dev_warn(adev->dev, "Failed to disallow df cstate");
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index f51092041edc..68565262af9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -47,12 +47,13 @@ static void mca_v3_0_mp0_ras_fini(struct amdgpu_device
*adev)
amdgpu_mca_ras_fini(adev, >mca.mp0);
}
-static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object* block_obj,
enum amdgpu_ras_block block, uint32_t sub_block_index)
+static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
+ enum amdgpu_ras_block block, uint32_t
sub_block_index)
{
- if(!block_obj)
+ if (!block_obj)
return -EINVAL;
- if( (block_obj->block == block) &&
+ if ((block_obj->block == block) &&
(block_obj->sub_block_index == sub_block_index)) {
return 0;
}
--
2.25.1
[PATCH V2 4/5] drm/amdgpu: Fix the code style warnings in sdma
Fix the code style warnings in sdma:
1. WARNING: Missing a blank line after declarations.
2. ERROR: that open brace { should be on the previous line.
3. WARNING: unnecessary whitespace before a quoted newline.
4. ERROR: space required after that ',' (ctx:VxV).
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8
drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 3c1483dc113e..06a7ceda4c87 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2766,10 +2766,10 @@ static int
sdma_v4_0_query_ras_error_count_by_instance(struct amdgpu_device *ade
static void sdma_v4_0_query_ras_error_count(struct amdgpu_device *adev, void
*ras_error_status)
{
int i = 0;
+
for (i = 0; i < adev->sdma.num_instances; i++) {
- if (sdma_v4_0_query_ras_error_count_by_instance(adev, i,
ras_error_status))
- {
- dev_err(adev->dev, "Query ras error count failed in
SDMA%d \n", i);
+ if (sdma_v4_0_query_ras_error_count_by_instance(adev, i,
ras_error_status)) {
+ dev_err(adev->dev, "Query ras error count failed in
SDMA%d\n", i);
return;
}
}
@@ -2814,7 +2814,7 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device
*adev)
if (adev->sdma.ras) {
amdgpu_ras_register_ras_block(adev, >sdma.ras->ras_block);
- strcpy(adev->sdma.ras->ras_block.name,"sdma");
+ strcpy(adev->sdma.ras->ras_block.name, "sdma");
adev->sdma.ras->ras_block.block = AMDGPU_RAS_BLOCK__SDMA;
/* If don't define special ras_late_init function, use default
ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
index 5c1ba1116e5c..6f9895cdddb1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
@@ -248,10 +248,10 @@ static void sdma_v4_4_reset_ras_error_count(struct
amdgpu_device *adev)
static void sdma_v4_4_query_ras_error_count(struct amdgpu_device *adev, void
*ras_error_status)
{
int i = 0;
+
for (i = 0; i < adev->sdma.num_instances; i++) {
- if (sdma_v4_4_query_ras_error_count_by_instance(adev, i,
ras_error_status))
- {
- dev_err(adev->dev, "Query ras error count failed in
SDMA%d \n", i);
+ if (sdma_v4_4_query_ras_error_count_by_instance(adev, i,
ras_error_status)) {
+ dev_err(adev->dev, "Query ras error count failed in
SDMA%d\n", i);
return;
}
}
--
2.25.1
[PATCH V2 3/5] drm/amdgpu: Fix the code style warnings in gmc
Fix the code style warnings in gmc:
ERROR: space required after that ',' (ctx:VxV).
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 5ef4ad28ab26..4f8d356f8432 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -672,7 +672,7 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device
*adev)
if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, >umc.ras->ras_block);
- strcpy(adev->umc.ras->ras_block.name,"umc");
+ strcpy(adev->umc.ras->ras_block.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default
ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3965aae435f8..c76ffd1a70cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1231,7 +1231,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device
*adev)
if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, >umc.ras->ras_block);
- strcpy(adev->umc.ras->ras_block.name,"umc");
+ strcpy(adev->umc.ras->ras_block.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default
ras_late_init */
--
2.25.1
[PATCH V2 2/5] drm/amdgpu: Fix the code style warnings in gfx
Fix the code style warnings in gfx:
1. WARNING: suspect code indent for conditional statements.
2. ERROR: spaces required around that '=' (ctx:WxV).
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index d36a6bc62560..e12f9f5c3beb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2314,11 +2314,11 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device
*adev)
/* If not define special ras_late_init function, use gfx
default ras_late_init */
if (!adev->gfx.ras->ras_block.ras_late_init)
- adev->gfx.ras->ras_block.ras_late_init =
amdgpu_gfx_ras_late_init;
+ adev->gfx.ras->ras_block.ras_late_init =
amdgpu_gfx_ras_late_init;
/* If not define special ras_fini function, use gfx default
ras_fini */
if (!adev->gfx.ras->ras_block.ras_fini)
- adev->gfx.ras->ras_block.ras_fini =
amdgpu_gfx_ras_fini;
+ adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
}
adev->gfx.config.gb_addr_config = gb_addr_config;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
index 7ec6243e015e..7653ebd0e67b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
@@ -1930,7 +1930,7 @@ static void gfx_v9_4_2_reset_sq_timeout_status(struct
amdgpu_device *adev)
mutex_unlock(>grbm_idx_mutex);
}
-struct amdgpu_ras_block_hw_ops gfx_v9_4_2_ras_ops ={
+struct amdgpu_ras_block_hw_ops gfx_v9_4_2_ras_ops = {
.ras_error_inject = _v9_4_2_ras_error_inject,
.query_ras_error_count = _v9_4_2_query_ras_error_count,
.reset_ras_error_count = _v9_4_2_reset_ras_error_count,
--
2.25.1
[PATCH V2 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
Fix the code style warnings in amdgpu_ras:
1. ERROR: space required before the open parenthesis '('.
2. WARNING: line length of xxx exceeds 100 columns.
3. ERROR: "foo* bar" should be "foo *bar".
4. WARNING: unnecessary whitespace before a quoted newline.
5. WARNING: space prohibited before semicolon.
6. WARNING: suspect code indent for conditional statements.
7. WARNING: braces {} are not necessary for single statement blocks.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
2 files changed, 30 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 0bb6b5354802..23502b2b0770 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
amdgpu_device *adev,
static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object
*block_obj,
enum amdgpu_ras_block block)
{
- if(!block_obj)
+ if (!block_obj)
return -EINVAL;
if (block_obj->block == block)
@@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
amdgpu_ras_block_object *block_
return -EINVAL;
}
-static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
amdgpu_device *adev,
+static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
amdgpu_device *adev,
enum amdgpu_ras_block block, uint32_t
sub_block_index)
{
struct amdgpu_ras_block_object *obj, *tmp;
@@ -941,7 +941,7 @@ static void amdgpu_ras_get_ecc_info(struct amdgpu_device
*adev, struct ras_err_d
int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj = NULL;
+ struct amdgpu_ras_block_object *block_obj = NULL;
struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
struct ras_err_data err_data = {0, 0, 0, NULL};
@@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device
*adev,
} else {
block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
get_ras_block_str(>head));
return -EINVAL;
}
@@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct amdgpu_device
*adev,
int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
enum amdgpu_ras_block block)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, block, 0);
+ struct amdgpu_ras_block_object *block_obj =
amdgpu_ras_get_ras_block(adev, block, 0);
if (!amdgpu_ras_is_supported(adev, block))
return -EINVAL;
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
ras_block_str(block));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ ras_block_str(block));
return -EINVAL;
}
@@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
return -EINVAL;
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
get_ras_block_str(>head));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ get_ras_block_str(>head));
return -EINVAL;
}
@@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
amdgpu_device *adev)
static void amdgpu_ras_error_status_query(struct amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index);
+ struct amdgpu_ras_block_object *block_obj =
amdgpu_ras_get_ras_block(adev,
+
info->head.block,
+
info->head.sub_block_index);
/*
* Only two block need to query read/write
* RspStatus at current state
*/
if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
- return ;
+ return;
+
+ block_obj = amdgpu_ras_get_ras_block(adev,
+ info->head.block,
+
[PATCH v3] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc
sw_init. patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to
set the right base in the right sequence.
v2:
call amdgpu_virt_init_data_exchange after gmc sw_init to make data
exchange workqueue run
v3:
clean up the code logic
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 12
2 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index da3348fa7b0e..5610eae8ef0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2353,7 +2353,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device
*adev)
}
if (amdgpu_sriov_vf(adev))
- amdgpu_virt_exchange_data(adev);
+ amdgpu_virt_init_data_exchange(adev);
r = amdgpu_ib_pool_init(adev);
if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..d83dfdc64d49 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,14 +625,16 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
+ if (adev->mman.fw_vram_usage_va != NULL) {
adev->virt.vf2pf_update_interval_ms = 2000;
-
+ amdgpu_virt_exchange_data(adev);
+ } else if (adev->bios != NULL) {
adev->virt.fw_reserve.p_pf2vf =
(struct amd_sriov_msg_pf2vf_info_header *)
(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
amdgpu_virt_read_pf2vf_data(adev);
+ return;
}
if (adev->virt.vf2pf_update_interval_ms != 0) {
@@ -674,12 +676,6 @@ void amdgpu_virt_exchange_data(struct amdgpu_device *adev)
if (adev->virt.ras_init_done)
amdgpu_virt_add_bad_page(adev,
bp_block_offset, bp_block_size);
}
- } else if (adev->bios != NULL) {
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
}
--
2.30.2
RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
OK, I will update the patches to add the fixed warning types.
-Original Message-
From: Zhou1, Tao
Sent: Friday, January 14, 2022 11:45 AM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Clements, John
Subject: RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Friday, January 14, 2022 11:36 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in
> amdgpu_ras
>
> Fix the code style warnings in amdgpu_ras.
[Tao] Could you add more description to explain the warnings you want to fix?
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41
> +++-- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10
> +++---
> 2 files changed, 30 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 0bb6b5354802..23502b2b0770 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev, static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_obj,
> enum amdgpu_ras_block block)
> {
> - if(!block_obj)
> + if (!block_obj)
> return -EINVAL;
>
> if (block_obj->block == block)
> @@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_
> return -EINVAL;
> }
>
> -static struct amdgpu_ras_block_object*
> amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
> +static struct amdgpu_ras_block_object
> +*amdgpu_ras_get_ras_block(struct amdgpu_device *adev,
> enum amdgpu_ras_block block,
> uint32_t sub_block_index) {
> struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@
> static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct
> ras_err_d int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj = NULL;
> + struct amdgpu_ras_block_object *block_obj = NULL;
> struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
> struct ras_err_data err_data = {0, 0, 0, NULL};
>
> @@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,
> } else {
> block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> get_ras_block_str(>head));
> return -EINVAL;
> }
> @@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev, int amdgpu_ras_reset_error_status(struct
> amdgpu_device *adev,
> enum amdgpu_ras_block block)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, block, 0);
> + struct amdgpu_ras_block_object *block_obj =
> +amdgpu_ras_get_ras_block(adev, block, 0);
>
> if (!amdgpu_ras_is_supported(adev, block))
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> ras_block_str(block));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + ras_block_str(block));
> return -EINVAL;
> }
>
> @@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device
> *adev,
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(>head));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + get_ras_block_str(>head));
> return -EINVAL;
> }
>
> @@ -1702,19 +1704,25 @@ static void
> amdgpu_ras_log_on_err_counter(struct
> amdgpu_device *adev) static void amdgpu_ras_error_status_query(struct
> amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
> + struct amdgpu_ras_block_object *block_obj =
> amdgpu_ras_get_ras_block(adev,
> + info-
> >head.block,
> + info-
>
RE: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Friday, January 14, 2022 11:36 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
>
> Fix the code style warnings in amdgpu_ras.
[Tao] Could you add more description to explain the warnings you want to fix?
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++--
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
> 2 files changed, 30 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 0bb6b5354802..23502b2b0770 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev, static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_obj,
> enum amdgpu_ras_block block)
> {
> - if(!block_obj)
> + if (!block_obj)
> return -EINVAL;
>
> if (block_obj->block == block)
> @@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
> amdgpu_ras_block_object *block_
> return -EINVAL;
> }
>
> -static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
> amdgpu_device *adev,
> +static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
> +amdgpu_device *adev,
> enum amdgpu_ras_block block,
> uint32_t sub_block_index) {
> struct amdgpu_ras_block_object *obj, *tmp; @@ -941,7 +941,7 @@
> static void amdgpu_ras_get_ecc_info(struct amdgpu_device *adev, struct
> ras_err_d int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj = NULL;
> + struct amdgpu_ras_block_object *block_obj = NULL;
> struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
> struct ras_err_data err_data = {0, 0, 0, NULL};
>
> @@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev,
> } else {
> block_obj = amdgpu_ras_get_ras_block(adev, info->head.block,
> 0);
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> get_ras_block_str(>head));
> return -EINVAL;
> }
> @@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct
> amdgpu_device *adev, int amdgpu_ras_reset_error_status(struct
> amdgpu_device *adev,
> enum amdgpu_ras_block block)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, block, 0);
> + struct amdgpu_ras_block_object *block_obj =
> +amdgpu_ras_get_ras_block(adev, block, 0);
>
> if (!amdgpu_ras_is_supported(adev, block))
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> ras_block_str(block));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + ras_block_str(block));
> return -EINVAL;
> }
>
> @@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device
> *adev,
> return -EINVAL;
>
> if (!block_obj || !block_obj->hw_ops) {
> - dev_info(adev->dev, "%s doesn't config ras function \n",
> get_ras_block_str(>head));
> + dev_info(adev->dev, "%s doesn't config ras function.\n",
> + get_ras_block_str(>head));
> return -EINVAL;
> }
>
> @@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
> amdgpu_device *adev) static void amdgpu_ras_error_status_query(struct
> amdgpu_device *adev,
> struct ras_query_if *info)
> {
> - struct amdgpu_ras_block_object* block_obj =
> amdgpu_ras_get_ras_block(adev, info->head.block, info-
> >head.sub_block_index);
> + struct amdgpu_ras_block_object *block_obj =
> amdgpu_ras_get_ras_block(adev,
> + info-
> >head.block,
> + info-
> >head.sub_block_index);
> /*
>* Only two block need to query read/write
>* RspStatus at current state
>*/
> if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
> (info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
> - return ;
> + return;
> +
> + block_obj =
[PATCH] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc
sw_init. patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to
set the right base in the right sequence.
v2:
call amdgpu_virt_init_data_exchange after gmc sw_init to make data
exchange workqueue run
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 10 +++---
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index da3348fa7b0e..5610eae8ef0c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2353,7 +2353,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device
*adev)
}
if (amdgpu_sriov_vf(adev))
- amdgpu_virt_exchange_data(adev);
+ amdgpu_virt_init_data_exchange(adev);
r = amdgpu_ib_pool_init(adev);
if (r) {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..0b887a49b604 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,16 +625,12 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
+ if (adev->mman.fw_vram_usage_va != NULL) {
adev->virt.vf2pf_update_interval_ms = 2000;
-
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
+ amdgpu_virt_exchange_data(adev);
+
if (adev->virt.vf2pf_update_interval_ms != 0) {
INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
--
2.30.2
[PATCH 4/5] drm/amdgpu: Fix the code style warnings in sdma
Fix the code style warnings in sdma.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 5 ++---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c | 3 +--
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 3c1483dc113e..e3f00376a2b1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -2767,8 +2767,7 @@ static void sdma_v4_0_query_ras_error_count(struct
amdgpu_device *adev, void *r
{
int i = 0;
for (i = 0; i < adev->sdma.num_instances; i++) {
- if (sdma_v4_0_query_ras_error_count_by_instance(adev, i,
ras_error_status))
- {
+ if (sdma_v4_0_query_ras_error_count_by_instance(adev, i,
ras_error_status)) {
dev_err(adev->dev, "Query ras error count failed in
SDMA%d \n", i);
return;
}
@@ -2814,7 +2813,7 @@ static void sdma_v4_0_set_ras_funcs(struct amdgpu_device
*adev)
if (adev->sdma.ras) {
amdgpu_ras_register_ras_block(adev, >sdma.ras->ras_block);
- strcpy(adev->sdma.ras->ras_block.name,"sdma");
+ strcpy(adev->sdma.ras->ras_block.name, "sdma");
adev->sdma.ras->ras_block.block = AMDGPU_RAS_BLOCK__SDMA;
/* If don't define special ras_late_init function, use default
ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
index 5c1ba1116e5c..5c90f456ece1 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4.c
@@ -249,8 +249,7 @@ static void sdma_v4_4_query_ras_error_count(struct
amdgpu_device *adev, void *r
{
int i = 0;
for (i = 0; i < adev->sdma.num_instances; i++) {
- if (sdma_v4_4_query_ras_error_count_by_instance(adev, i,
ras_error_status))
- {
+ if (sdma_v4_4_query_ras_error_count_by_instance(adev, i,
ras_error_status)) {
dev_err(adev->dev, "Query ras error count failed in
SDMA%d \n", i);
return;
}
--
2.25.1
[PATCH 5/5] drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc
drm/amdgpu: Fix the code style warnings in hdp xgmi mca and umc.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h | 4 ++--
drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c | 3 ++-
drivers/gpu/drm/amd/amdgpu/mca_v3_0.c| 7 ---
drivers/gpu/drm/amd/amdgpu/umc_v6_1.c| 3 ++-
4 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
index c94a4b3c8d6d..8e9694a4d335 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_hdp.h
@@ -24,7 +24,7 @@
#define __AMDGPU_HDP_H__
#include "amdgpu_ras.h"
-struct amdgpu_hdp_ras{
+struct amdgpu_hdp_ras {
struct amdgpu_ras_block_object ras_block;
};
@@ -40,7 +40,7 @@ struct amdgpu_hdp_funcs {
struct amdgpu_hdp {
struct ras_common_if*ras_if;
const struct amdgpu_hdp_funcs *funcs;
- struct amdgpu_hdp_ras *ras;
+ struct amdgpu_hdp_ras *ras;
};
int amdgpu_hdp_ras_late_init(struct amdgpu_device *adev, void *ras_info);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
index 478457637d29..5929d6f528c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c
@@ -950,7 +950,8 @@ static void amdgpu_xgmi_query_ras_error_count(struct
amdgpu_device *adev,
static int amdgpu_ras_error_inject_xgmi(struct amdgpu_device *adev, void
*inject_if)
{
int ret = 0;
- struct ta_ras_trigger_error_input *block_info = (struct
ta_ras_trigger_error_input *)inject_if;
+ struct ta_ras_trigger_error_input *block_info =
+ (struct ta_ras_trigger_error_input *)inject_if;
if (amdgpu_dpm_set_df_cstate(adev, DF_CSTATE_DISALLOW))
dev_warn(adev->dev, "Failed to disallow df cstate");
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
index f51092041edc..68565262af9c 100644
--- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c
@@ -47,12 +47,13 @@ static void mca_v3_0_mp0_ras_fini(struct amdgpu_device
*adev)
amdgpu_mca_ras_fini(adev, >mca.mp0);
}
-static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object* block_obj,
enum amdgpu_ras_block block, uint32_t sub_block_index)
+static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj,
+ enum amdgpu_ras_block block, uint32_t
sub_block_index)
{
- if(!block_obj)
+ if (!block_obj)
return -EINVAL;
- if( (block_obj->block == block) &&
+ if ((block_obj->block == block) &&
(block_obj->sub_block_index == sub_block_index)) {
return 0;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
index 4776301972d4..c9891b7a05a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_1.c
@@ -475,4 +475,5 @@ struct amdgpu_umc_ras umc_v6_1_ras = {
.hw_ops = _v6_1_ras_hw_ops,
},
.err_cnt_init = umc_v6_1_err_cnt_init,
-};
\ No newline at end of file
+};
+
--
2.25.1
[PATCH 3/5] drm/amdgpu: Fix the code style warnings in gmc
Fix the code style warnings in gmc.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 5ef4ad28ab26..4f8d356f8432 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -672,7 +672,7 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device
*adev)
if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, >umc.ras->ras_block);
- strcpy(adev->umc.ras->ras_block.name,"umc");
+ strcpy(adev->umc.ras->ras_block.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default
ras_late_init */
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3965aae435f8..c76ffd1a70cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1231,7 +1231,7 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device
*adev)
if (adev->umc.ras) {
amdgpu_ras_register_ras_block(adev, >umc.ras->ras_block);
- strcpy(adev->umc.ras->ras_block.name,"umc");
+ strcpy(adev->umc.ras->ras_block.name, "umc");
adev->umc.ras->ras_block.block = AMDGPU_RAS_BLOCK__UMC;
/* If don't define special ras_late_init function, use default
ras_late_init */
--
2.25.1
[PATCH 2/5] drm/amdgpu: Fix the code style warnings in gfx
Fix the code style warnings in gfx.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index d36a6bc62560..e12f9f5c3beb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2314,11 +2314,11 @@ static int gfx_v9_0_gpu_early_init(struct amdgpu_device
*adev)
/* If not define special ras_late_init function, use gfx
default ras_late_init */
if (!adev->gfx.ras->ras_block.ras_late_init)
- adev->gfx.ras->ras_block.ras_late_init =
amdgpu_gfx_ras_late_init;
+ adev->gfx.ras->ras_block.ras_late_init =
amdgpu_gfx_ras_late_init;
/* If not define special ras_fini function, use gfx default
ras_fini */
if (!adev->gfx.ras->ras_block.ras_fini)
- adev->gfx.ras->ras_block.ras_fini =
amdgpu_gfx_ras_fini;
+ adev->gfx.ras->ras_block.ras_fini = amdgpu_gfx_ras_fini;
}
adev->gfx.config.gb_addr_config = gb_addr_config;
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
index 7ec6243e015e..7653ebd0e67b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_2.c
@@ -1930,7 +1930,7 @@ static void gfx_v9_4_2_reset_sq_timeout_status(struct
amdgpu_device *adev)
mutex_unlock(>grbm_idx_mutex);
}
-struct amdgpu_ras_block_hw_ops gfx_v9_4_2_ras_ops ={
+struct amdgpu_ras_block_hw_ops gfx_v9_4_2_ras_ops = {
.ras_error_inject = _v9_4_2_ras_error_inject,
.query_ras_error_count = _v9_4_2_query_ras_error_count,
.reset_ras_error_count = _v9_4_2_reset_ras_error_count,
--
2.25.1
[PATCH 1/5] drm/amdgpu: Fix the code style warnings in amdgpu_ras
Fix the code style warnings in amdgpu_ras.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 41 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 10 +++---
2 files changed, 30 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 0bb6b5354802..23502b2b0770 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -872,7 +872,7 @@ static int amdgpu_ras_enable_all_features(struct
amdgpu_device *adev,
static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object
*block_obj,
enum amdgpu_ras_block block)
{
- if(!block_obj)
+ if (!block_obj)
return -EINVAL;
if (block_obj->block == block)
@@ -881,7 +881,7 @@ static int amdgpu_ras_block_match_default(struct
amdgpu_ras_block_object *block_
return -EINVAL;
}
-static struct amdgpu_ras_block_object* amdgpu_ras_get_ras_block(struct
amdgpu_device *adev,
+static struct amdgpu_ras_block_object *amdgpu_ras_get_ras_block(struct
amdgpu_device *adev,
enum amdgpu_ras_block block, uint32_t
sub_block_index)
{
struct amdgpu_ras_block_object *obj, *tmp;
@@ -941,7 +941,7 @@ static void amdgpu_ras_get_ecc_info(struct amdgpu_device
*adev, struct ras_err_d
int amdgpu_ras_query_error_status(struct amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj = NULL;
+ struct amdgpu_ras_block_object *block_obj = NULL;
struct ras_manager *obj = amdgpu_ras_find_obj(adev, >head);
struct ras_err_data err_data = {0, 0, 0, NULL};
@@ -953,7 +953,7 @@ int amdgpu_ras_query_error_status(struct amdgpu_device
*adev,
} else {
block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, 0);
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
get_ras_block_str(>head));
return -EINVAL;
}
@@ -1023,13 +1023,14 @@ int amdgpu_ras_query_error_status(struct amdgpu_device
*adev,
int amdgpu_ras_reset_error_status(struct amdgpu_device *adev,
enum amdgpu_ras_block block)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, block, 0);
+ struct amdgpu_ras_block_object *block_obj =
amdgpu_ras_get_ras_block(adev, block, 0);
if (!amdgpu_ras_is_supported(adev, block))
return -EINVAL;
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
ras_block_str(block));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ ras_block_str(block));
return -EINVAL;
}
@@ -1066,7 +1067,8 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev,
return -EINVAL;
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
get_ras_block_str(>head));
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+ get_ras_block_str(>head));
return -EINVAL;
}
@@ -1702,19 +1704,25 @@ static void amdgpu_ras_log_on_err_counter(struct
amdgpu_device *adev)
static void amdgpu_ras_error_status_query(struct amdgpu_device *adev,
struct ras_query_if *info)
{
- struct amdgpu_ras_block_object* block_obj =
amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index);
+ struct amdgpu_ras_block_object *block_obj =
amdgpu_ras_get_ras_block(adev,
+
info->head.block,
+
info->head.sub_block_index);
/*
* Only two block need to query read/write
* RspStatus at current state
*/
if ((info->head.block != AMDGPU_RAS_BLOCK__GFX) &&
(info->head.block != AMDGPU_RAS_BLOCK__MMHUB))
- return ;
+ return;
+
+ block_obj = amdgpu_ras_get_ras_block(adev,
+ info->head.block,
+ info->head.sub_block_index);
- block_obj = amdgpu_ras_get_ras_block(adev, info->head.block,
info->head.sub_block_index);
if (!block_obj || !block_obj->hw_ops) {
- dev_info(adev->dev, "%s doesn't config ras function \n",
get_ras_block_str(>head));
- return ;
+ dev_info(adev->dev, "%s doesn't config ras function.\n",
+
RE: [PATCH v2] drm/amdgpu: fix null ptr access
[AMD Official Use Only]
For the patch with power code change, we usually have the patch title prefixed
with "drm/amd/pm".
With that fixed, the patch is reviewed-by: Evan Quan
> -Original Message-
> From: Cui, Flora
> Sent: Friday, January 14, 2022 10:54 AM
> To: Quan, Evan ; amd-gfx@lists.freedesktop.org
> Cc: Cui, Flora
> Subject: [PATCH v2] drm/amdgpu: fix null ptr access
>
> check null ptr first before access its element
>
> v2: check adev->pm.dpm_enabled early in amdgpu_debugfs_pm_init()
>
> Signed-off-by: Flora Cui
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 2 +-
> drivers/gpu/drm/amd/pm/amdgpu_pm.c | 3 +++
> 2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> index f0daa66f5b3d..5fc33893a68c 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> @@ -463,7 +463,7 @@ int amdgpu_pm_load_smu_firmware(struct
> amdgpu_device *adev, uint32_t *smu_versio
> const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
> int r = 0;
>
> - if (!pp_funcs->load_firmware)
> + if (!pp_funcs || !pp_funcs->load_firmware)
> return 0;
>
> mutex_lock(>pm.mutex);
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 1b03ad7a21ad..49a9c6375343 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -3583,6 +3583,9 @@ void amdgpu_debugfs_pm_init(struct
> amdgpu_device *adev)
> struct drm_minor *minor = adev_to_drm(adev)->primary;
> struct dentry *root = minor->debugfs_root;
>
> + if (!adev->pm.dpm_enabled)
> + return;
> +
> debugfs_create_file("amdgpu_pm_info", 0444, root, adev,
> _debugfs_pm_info_fops);
>
> --
> 2.25.1
[PATCH v2] drm/amdgpu: fix null ptr access
check null ptr first before access its element
v2: check adev->pm.dpm_enabled early in amdgpu_debugfs_pm_init()
Signed-off-by: Flora Cui
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 2 +-
drivers/gpu/drm/amd/pm/amdgpu_pm.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index f0daa66f5b3d..5fc33893a68c 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -463,7 +463,7 @@ int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev,
uint32_t *smu_versio
const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
int r = 0;
- if (!pp_funcs->load_firmware)
+ if (!pp_funcs || !pp_funcs->load_firmware)
return 0;
mutex_lock(>pm.mutex);
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 1b03ad7a21ad..49a9c6375343 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -3583,6 +3583,9 @@ void amdgpu_debugfs_pm_init(struct amdgpu_device *adev)
struct drm_minor *minor = adev_to_drm(adev)->primary;
struct dentry *root = minor->debugfs_root;
+ if (!adev->pm.dpm_enabled)
+ return;
+
debugfs_create_file("amdgpu_pm_info", 0444, root, adev,
_debugfs_pm_info_fops);
--
2.25.1
Re: [RFC PATCH v2 2/3] drm: set fb_modifiers_not_supported flag in legacy drivers
Hi,
Thank you for your comment.
On 2022/01/14 2:56, Bas Nieuwenhuizen wrote:
I think we'll also want to do a conditional disable for DC
(drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c) since it only
enables modifiers on newer HW. Something like "if (modifiers == NULL)
fb_modifiers_not_supported = true;" in amdgpu_dm_plane_init.
Ok, I'll add a conditional disable in amdgpu_dm_plane_init().
Thanks,
Tomohito Esaki
On Thu, Jan 13, 2022 at 10:44 AM Tomohito Esaki wrote:
Set fb_modifiers_not_supported flag in legacy drivers whose planes
support non-linear layouts but does not support modifiers, and replace
allow_fb_modifiers with fb_modifiers_not_supported.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 ++
drivers/gpu/drm/nouveau/nouveau_display.c | 6 --
drivers/gpu/drm/radeon/radeon_display.c | 2 ++
7 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index dc50c05f23fc..cbaea9c6cfda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -958,7 +958,7 @@ static int amdgpu_display_verify_sizes(struct
amdgpu_framebuffer *rfb)
int ret;
unsigned int i, block_width, block_height, block_size_log2;
- if (!rfb->base.dev->mode_config.allow_fb_modifiers)
+ if (rfb->base.dev->mode_config.fb_modifiers_not_supported)
return 0;
for (i = 0; i < format_info->num_planes; ++i) {
@@ -1145,7 +1145,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
*dev,
if (ret)
return ret;
- if (!dev->mode_config.allow_fb_modifiers) {
+ if (dev->mode_config.fb_modifiers_not_supported) {
drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,
"GFX9+ requires FB check based on format
modifier\n");
ret = check_tiling_flags_gfx6(rfb);
@@ -1153,7 +1153,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
*dev,
return ret;
}
- if (dev->mode_config.allow_fb_modifiers &&
+ if (!dev->mode_config.fb_modifiers_not_supported &&
!(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) {
ret = convert_tiling_flags_to_modifier(rfb);
if (ret) {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index d1570a462a51..fb61c0814115 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2798,6 +2798,8 @@ static int dce_v10_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 18a7b3bd633b..17942a11366d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2916,6 +2916,8 @@ static int dce_v11_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index c7803dc2b2d5..2ec99ec8e1a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2674,6 +2674,7 @@ static int dce_v6_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.max_height = 16384;
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index b200b9e722d9..8369336cec90 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2699,6 +2699,8 @@ static int dce_v8_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported =
Re: [RFC PATCH v2 0/3] Add support modifiers for drivers whose planes only support linear layout
Hi Daniel-san, Thank you for your comments. On 2022/01/13 22:44, Daniel Stone wrote: Hi Esaki-san, On Thu, 13 Jan 2022 at 09:44, Tomohito Esaki wrote: Some drivers whose planes only support linear layout fb do not support format modifiers. These drivers should support modifiers, however the DRM core should handle this rather than open-coding in every driver. In this patch series, these drivers expose format modifiers based on the following suggestion[1]. Thanks for the series, it looks like the right thing to do. Can you please change the patch ordering though? At the moment there will be a bisection break at patch #1, because the legacy drivers will suddenly start gaining modifier support, before it is removed in patch #2. I think a better order would be: 1: add fb_modifiers_not_supported flag to core and drivers 2: add default modifiers (and set allow_fb_modifiers) if fb_modifiers_not_supported flag is not set 3: remove allow_fb_modifiers flag I agree to your proposal. I will fix these patches. -- -- 株式会社イーゲル 江崎 朋人 e...@igel.co.jp
[PATCH 13/13] drm/amd/display: 3.2.169
From: Aric Cyr This version brings along following fixes: - Organize FPU associated code to DML - Modify SMU_TIMEOUT macro - Organize dcn201 code - Address DS stays disabled problem under specific scenario - Fix black screen issue - Update DML to rev.99 - Address problem of eDP hot-plug feature Acked-by: Wayne Lin Signed-off-by: Aric Cyr --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index 1c6728cf2d49..235e33f73913 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -47,7 +47,7 @@ struct aux_payload; struct set_config_cmd_payload; struct dmub_notification; -#define DC_VER "3.2.168" +#define DC_VER "3.2.169" #define MAX_SURFACES 3 #define MAX_PLANES 6 -- 2.25.1
[PATCH 12/13] drm/amd/display: [FW Promotion] Release 0.0.100.0
From: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Wayne Lin Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h index d18762e02509..eb152f5e3ec3 100644 --- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h +++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h @@ -47,10 +47,10 @@ /* Firmware versioning. */ #ifdef DMUB_EXPOSE_VERSION -#define DMUB_FW_VERSION_GIT_HASH 0xbaf06b95 +#define DMUB_FW_VERSION_GIT_HASH 0x56a29f36 #define DMUB_FW_VERSION_MAJOR 0 #define DMUB_FW_VERSION_MINOR 0 -#define DMUB_FW_VERSION_REVISION 98 +#define DMUB_FW_VERSION_REVISION 100 #define DMUB_FW_VERSION_TEST 0 #define DMUB_FW_VERSION_VBIOS 0 #define DMUB_FW_VERSION_HOTFIX 0 -- 2.25.1
[PATCH 11/13] drm/amd/display: Add signal type check when verify stream backends same
From: Dale Zhao [Why] For allow eDP hot-plug feature, the stream signal may change to VIRTUAL when plug-out and back to eDP when plug-in. OS will still setPathMode with same timing for each plugging, but eDP gets no stream update as we don't check signal type changing back as keeping it VIRTUAL. It's also unsafe for future cases that stream signal is switched with same timing. [How] Check stream signal type change include previous HDMI signal case. Reviewed-by: Aric Cyr Acked-by: Wayne Lin Signed-off-by: Dale Zhao --- drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index b3912ff9dc91..b34bf59cf54b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -1640,6 +1640,9 @@ static bool are_stream_backends_same( if (is_timing_changed(stream_a, stream_b)) return false; + if (stream_a->signal != stream_b->signal) + return false; + if (stream_a->dpms_off != stream_b->dpms_off) return false; -- 2.25.1
[PATCH 10/13] drm/amd/display: update dml to rev.99 and smu clk_table w/a
From: Charlene Liu
[why]
1. update dml to rev.99
2. add smu clk table w/a: smu gives 1 dtm level with mismatch voltage
table which causes multiple issues.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Wayne Lin
Signed-off-by: Charlene Liu
---
.../dc/dml/dcn31/display_mode_vba_31.c| 29 +--
.../drm/amd/display/dc/dml/display_mode_vba.h | 2 ++
2 files changed, 28 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
index 6feb23432f8d..e4b9fd31223c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c
@@ -64,6 +64,8 @@ typedef struct {
double DCFCLKDeepSleep;
unsigned int DPPPerPlane;
bool ScalerEnabled;
+ double VRatio;
+ double VRatioChroma;
enum scan_direction_class SourceScan;
unsigned int BlockWidth256BytesY;
unsigned int BlockHeight256BytesY;
@@ -942,6 +944,7 @@ static bool CalculatePrefetchSchedule(
double dst_y_prefetch_equ;
double Tsw_oto;
double prefetch_bw_oto;
+ double prefetch_bw_pr;
double Tvm_oto;
double Tr0_oto;
double Tvm_oto_lines;
@@ -971,6 +974,7 @@ static bool CalculatePrefetchSchedule(
double min_Lsw;
double Tsw_est1 = 0;
double Tsw_est3 = 0;
+ double max_Tsw = 0;
if (GPUVMEnable == true && HostVMEnable == true) {
HostVMDynamicLevelsTrips = HostVMMaxNonCachedPageTableLevels;
@@ -,11 +1115,14 @@ static bool CalculatePrefetchSchedule(
bytes_pp = myPipe->BytePerPixelY + myPipe->BytePerPixelC / 4;
else
bytes_pp = myPipe->BytePerPixelY + myPipe->BytePerPixelC;
-
+ /*rev 99*/
+ prefetch_bw_pr = dml_min(1, bytes_pp * myPipe->PixelClock / (double)
myPipe->DPPPerPlane);
+max_Tsw = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC) * LineTime;
prefetch_sw_bytes = PrefetchSourceLinesY * swath_width_luma_ub *
myPipe->BytePerPixelY + PrefetchSourceLinesC * swath_width_chroma_ub *
myPipe->BytePerPixelC;
prefetch_bw_oto = dml_max(bytes_pp * myPipe->PixelClock /
myPipe->DPPPerPlane, prefetch_sw_bytes / (dml_max(PrefetchSourceLinesY,
PrefetchSourceLinesC) * LineTime));
+prefetch_bw_oto = dml_max(prefetch_bw_pr, prefetch_sw_bytes / max_Tsw);
- min_Lsw = dml_max(PrefetchSourceLinesY, PrefetchSourceLinesC) /
max_vratio_pre;
+ min_Lsw = dml_max(1, dml_max(PrefetchSourceLinesY,
PrefetchSourceLinesC) / max_vratio_pre);
Lsw_oto = dml_ceil(4 * dml_max(prefetch_sw_bytes / prefetch_bw_oto /
LineTime, min_Lsw), 1) / 4;
Tsw_oto = Lsw_oto * LineTime;
@@ -1389,7 +1396,7 @@ static bool CalculatePrefetchSchedule(
dml_print("DML::%s: SwathHeightC = %d\n", __func__,
SwathHeightC);
dml_print("DML::%s: VInitPreFillC = %f\n", __func__,
VInitPreFillC);
#endif
- if ((SwathHeightC > 4)) {
+ if ((SwathHeightC > 4) || VInitPreFillC > 3) {
if (LinesToRequestPrefetchPixelData >
(VInitPreFillC - 3.0) / 2.0) {
*VRatioPrefetchC = dml_max(
*VRatioPrefetchC,
@@ -2663,6 +2670,8 @@ static void
DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerforman
myPipe.DCFCLKDeepSleep = v->DCFCLKDeepSleep;
myPipe.DPPPerPlane = v->DPPPerPlane[k];
myPipe.ScalerEnabled = v->ScalerEnabled[k];
+ myPipe.VRatio = v->VRatio[k];
+ myPipe.VRatioChroma = v->VRatioChroma[k];
myPipe.SourceScan = v->SourceScan[k];
myPipe.BlockWidth256BytesY = v->BlockWidth256BytesY[k];
myPipe.BlockHeight256BytesY =
v->BlockHeight256BytesY[k];
@@ -3911,6 +3920,9 @@ static noinline void CalculatePrefetchSchedulePerPlane(
myPipe.DCFCLKDeepSleep = v->ProjectedDCFCLKDeepSleep[i][j];
myPipe.DPPPerPlane = v->NoOfDPP[i][j][k];
myPipe.ScalerEnabled = v->ScalerEnabled[k];
+ myPipe.VRatio = mode_lib->vba.VRatio[k];
+ myPipe.VRatioChroma = mode_lib->vba.VRatioChroma[k];
+
myPipe.SourceScan = v->SourceScan[k];
myPipe.BlockWidth256BytesY = v->Read256BlockWidthY[k];
myPipe.BlockHeight256BytesY = v->Read256BlockHeightY[k];
@@ -4987,6 +4999,17 @@ void dml31_ModeSupportAndSystemConfigurationFull(struct
display_mode_lib *mode_l
>meta_row_bandwidth[i][j][k],
>dpte_row_bandwidth[i][j][k]);
}
+ /*DCCMetaBufferSizeSupport(i, j) = True
+
[PATCH 09/13] drm/amd/display: Fix black screen issue on memory clock switch en
From: Felipe Clark
[WHY]
With some monitors when multi plane overlay is enabled the memory
clock switching mechanism has to change and, due to an error in the
initialization sequence, it may cause a black screen.
[HOW]
Change the firmware assisted memory clock switch initialization and
tear-down sequence utilizing the prepare_bandwidth and
optimize_bandwidth contexts.
Reviewed-by: Aric Cyr
Acked-by: Wayne Lin
Signed-off-by: Felipe Clark
---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 5 +
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h | 3 +++
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 +-
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index ed0a0e5fd805..dec8604a0612 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -355,6 +355,11 @@ void dcn30_prepare_bandwidth(struct dc *dc,
dcn20_prepare_bandwidth(dc, context);
}
+void dcn30_optimize_bandwidth(struct dc *dc, struct dc_state *context)
+{
+ dcn20_optimize_bandwidth(dc, context);
+}
+
void dcn30_disable_writeback(
struct dc *dc,
unsigned int dwb_pipe_inst)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
index 73e7b690e82c..357ee14711ad 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.h
@@ -50,6 +50,9 @@ void dcn30_disable_writeback(
void dcn30_prepare_bandwidth(struct dc *dc,
struct dc_state *context);
+void dcn30_optimize_bandwidth(struct dc *dc,
+ struct dc_state *context);
+
bool dcn30_mmhubbub_warmup(
struct dc *dc,
unsigned int num_dwb,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
index bb347319de83..73a416cba563 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_init.c
@@ -60,7 +60,7 @@ static const struct hw_sequencer_funcs dcn30_funcs = {
.interdependent_update_lock = dcn10_lock_all_pipes,
.cursor_lock = dcn10_cursor_lock,
.prepare_bandwidth = dcn20_prepare_bandwidth,
- .optimize_bandwidth = dcn20_optimize_bandwidth,
+ .optimize_bandwidth = dcn30_optimize_bandwidth,
.update_bandwidth = dcn20_update_bandwidth,
.set_drr = dcn10_set_drr,
.get_position = dcn10_get_position,
--
2.25.1
[PATCH 08/13] drm/amd/display: DCEFCLK DS on CLK init
From: Chris Park [Why] On HG APU + dGPU scenario with no display to dGPU, DS stays disabled due to no display present. This problem can be worked around by DAL calling DCEFCLK DS message to SMU on clk init. [How] Call DCEFCLK DS message to SMU on clk init. Reviewed-by: Jun Lei Acked-by: Wayne Lin Signed-off-by: Chris Park --- drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c index f977f29907df..0602bde78e6c 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c @@ -184,6 +184,7 @@ void dcn3_init_clocks(struct clk_mgr *clk_mgr_base) dcn3_init_single_clock(clk_mgr, PPCLK_DCEFCLK, _mgr_base->bw_params->clk_table.entries[0].dcfclk_mhz, _levels); + dcn30_smu_set_min_deep_sleep_dcef_clk(clk_mgr, 0); /* DTBCLK */ dcn3_init_single_clock(clk_mgr, PPCLK_DTBCLK, -- 2.25.1
[PATCH 07/13] drm/amd/display: modify SMU_TIMEOUT macro.
From: Ian Chen [WHY] If some SMU features are not enabled, SMU will return fail to that message. [HOW] SMU_TIMEOUT macro will treat "return fail" as timeout also. Correct the macro to only report timeout case. Reviewed-by: Jun Lei Acked-by: Wayne Lin Signed-off-by: Ian Chen --- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h index 7f94e3f70d7f..a5497ba89f15 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h +++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h @@ -170,9 +170,9 @@ bool dm_helpers_dmub_outbox_interrupt_control(struct dc_context *ctx, bool enabl void dm_helpers_smu_timeout(struct dc_context *ctx, unsigned int msg_id, unsigned int param, unsigned int timeout_us); -// 0x1 = Result_OK, 0xFE = Result_UnkmownCmd +// 0x1 = Result_OK, 0xFE = Result_UnkmownCmd, 0x0 = Status_Busy #define IS_SMU_TIMEOUT(result) \ - (!(result == 0x1 || result == 0xFE)) + (result == 0x0) int dm_helper_dmub_aux_transfer_sync( struct dc_context *ctx, -- 2.25.1
[PATCH 06/13] drm/amd/display: move FPU associated DCN302 code to DML folder
From: "Dhillon, Jasdeep"
[Why & How]
As part of the FPU isolation work documented in
https://patchwork.freedesktop.org/series/93042/, isolate
code that uses FPU in DCN302 to DML, where all FPU code
should locate.
Co-authored-by: Jasdeep Dhillon
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Jasdeep Dhillon
---
.../gpu/drm/amd/display/dc/dcn302/Makefile| 12 -
.../amd/display/dc/dcn302/dcn302_resource.c | 316 +---
.../amd/display/dc/dcn302/dcn302_resource.h | 3 +
drivers/gpu/drm/amd/display/dc/dml/Makefile | 2 +
.../amd/display/dc/dml/dcn302/dcn302_fpu.c| 357 ++
.../amd/display/dc/dml/dcn302/dcn302_fpu.h| 32 ++
6 files changed, 404 insertions(+), 318 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.c
create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.h
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/Makefile
b/drivers/gpu/drm/amd/display/dc/dcn302/Makefile
index 101620a8867a..f9561d7f97a1 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/Makefile
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/Makefile
@@ -1,11 +1,6 @@
#
# (c) Copyright 2020 Advanced Micro Devices, Inc. All the rights reserved
#
-# All rights reserved. This notice is intended as a precaution against
-# inadvertent publication and does not imply publication or any waiver
-# of confidentiality. The year included in the foregoing notice is the
-# year of creation of the work.
-#
# Authors: AMD
#
# Makefile for dcn302.
@@ -20,13 +15,6 @@ ifdef CONFIG_PPC64
CFLAGS_$(AMDDALPATH)/dc/dcn302/dcn302_resource.o := -mhard-float -maltivec
endif
-ifdef CONFIG_CC_IS_GCC
-ifeq ($(call cc-ifversion, -lt, 0701, y), y)
-IS_OLD_GCC = 1
-endif
-CFLAGS_$(AMDDALPATH)/dc/dcn302/dcn302_resource.o += -mhard-float
-endif
-
ifdef CONFIG_X86
ifdef IS_OLD_GCC
# Stack alignment mismatch, proceed with caution.
diff --git a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
index 2e9cbfa7663b..e512ae6d00d4 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
@@ -61,6 +61,8 @@
#include "resource.h"
#include "vm_helper.h"
+#include "dml/dcn302/dcn302_fpu.h"
+
#include "dimgrey_cavefish_ip_offset.h"
#include "dcn/dcn_3_0_2_offset.h"
#include "dcn/dcn_3_0_2_sh_mask.h"
@@ -71,140 +73,6 @@
#define DC_LOGGER_INIT(logger)
-struct _vcs_dpi_ip_params_st dcn3_02_ip = {
- .use_min_dcfclk = 0,
- .clamp_min_dcfclk = 0,
- .odm_capable = 1,
- .gpuvm_enable = 1,
- .hostvm_enable = 0,
- .gpuvm_max_page_table_levels = 4,
- .hostvm_max_page_table_levels = 4,
- .hostvm_cached_page_table_levels = 0,
- .pte_group_size_bytes = 2048,
- .num_dsc = 5,
- .rob_buffer_size_kbytes = 184,
- .det_buffer_size_kbytes = 184,
- .dpte_buffer_size_in_pte_reqs_luma = 64,
- .dpte_buffer_size_in_pte_reqs_chroma = 34,
- .pde_proc_buffer_size_64k_reqs = 48,
- .dpp_output_buffer_pixels = 2560,
- .opp_output_buffer_lines = 1,
- .pixel_chunk_size_kbytes = 8,
- .pte_enable = 1,
- .max_page_table_levels = 2,
- .pte_chunk_size_kbytes = 2, // ?
- .meta_chunk_size_kbytes = 2,
- .writeback_chunk_size_kbytes = 8,
- .line_buffer_size_bits = 789504,
- .is_line_buffer_bpp_fixed = 0, // ?
- .line_buffer_fixed_bpp = 0, // ?
- .dcc_supported = true,
- .writeback_interface_buffer_size_kbytes = 90,
- .writeback_line_buffer_buffer_size = 0,
- .max_line_buffer_lines = 12,
- .writeback_luma_buffer_size_kbytes = 12, //
writeback_line_buffer_buffer_size = 656640
- .writeback_chroma_buffer_size_kbytes = 8,
- .writeback_chroma_line_buffer_width_pixels = 4,
- .writeback_max_hscl_ratio = 1,
- .writeback_max_vscl_ratio = 1,
- .writeback_min_hscl_ratio = 1,
- .writeback_min_vscl_ratio = 1,
- .writeback_max_hscl_taps = 1,
- .writeback_max_vscl_taps = 1,
- .writeback_line_buffer_luma_buffer_size = 0,
- .writeback_line_buffer_chroma_buffer_size = 14643,
- .cursor_buffer_size = 8,
- .cursor_chunk_size = 2,
- .max_num_otg = 5,
- .max_num_dpp = 5,
- .max_num_wb = 1,
- .max_dchub_pscl_bw_pix_per_clk = 4,
- .max_pscl_lb_bw_pix_per_clk = 2,
- .max_lb_vscl_bw_pix_per_clk = 4,
- .max_vscl_hscl_bw_pix_per_clk = 4,
- .max_hscl_ratio =
[PATCH 05/13] drm/amd/display: 3.2.168
From: Aric Cyr This version brings improvements in the following: - Fix problem observed while assigning link encoder - Constrain seamless boot on eDP only - Improve Z9 interface Acked-by: Rodrigo Siqueira Signed-off-by: Aric Cyr --- drivers/gpu/drm/amd/display/dc/dc.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dc.h b/drivers/gpu/drm/amd/display/dc/dc.h index b5e15da29017..1c6728cf2d49 100644 --- a/drivers/gpu/drm/amd/display/dc/dc.h +++ b/drivers/gpu/drm/amd/display/dc/dc.h @@ -47,7 +47,7 @@ struct aux_payload; struct set_config_cmd_payload; struct dmub_notification; -#define DC_VER "3.2.167" +#define DC_VER "3.2.168" #define MAX_SURFACES 3 #define MAX_PLANES 6 -- 2.25.1
[PATCH 04/13] drm/amd/display: support new PMFW interface to disable Z9 only
From: Eric Yang
[Why]
Need to disable Z9 on configurations that only support Z10
[How]
Support new PMFW interface to disable Z9
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Eric Yang
---
.../amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 6 +++---
.../drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 15 ++-
.../drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h | 2 +-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 8 +++-
5 files changed, 22 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
index 4162ce40089b..66bd0261ead6 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
@@ -139,9 +139,9 @@ void dcn31_update_clocks(struct clk_mgr *clk_mgr_base,
* also if safe to lower is false, we just go in the higher state
*/
if (safe_to_lower) {
- if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_ALLOW &&
+ if (new_clocks->zstate_support != DCN_ZSTATE_SUPPORT_DISALLOW &&
new_clocks->zstate_support !=
clk_mgr_base->clks.zstate_support) {
- dcn31_smu_set_Z9_support(clk_mgr, true);
+ dcn31_smu_set_zstate_support(clk_mgr,
new_clocks->zstate_support);
dm_helpers_enable_periodic_detection(clk_mgr_base->ctx,
true);
clk_mgr_base->clks.zstate_support =
new_clocks->zstate_support;
}
@@ -167,7 +167,7 @@ void dcn31_update_clocks(struct clk_mgr *clk_mgr_base,
} else {
if (new_clocks->zstate_support == DCN_ZSTATE_SUPPORT_DISALLOW &&
new_clocks->zstate_support !=
clk_mgr_base->clks.zstate_support) {
- dcn31_smu_set_Z9_support(clk_mgr, false);
+ dcn31_smu_set_zstate_support(clk_mgr,
DCN_ZSTATE_SUPPORT_DISALLOW);
dm_helpers_enable_periodic_detection(clk_mgr_base->ctx,
false);
clk_mgr_base->clks.zstate_support =
new_clocks->zstate_support;
}
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
index a1011f3273f3..1c0415366216 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c
@@ -306,23 +306,28 @@ void dcn31_smu_transfer_wm_table_dram_2_smu(struct
clk_mgr_internal *clk_mgr)
VBIOSSMC_MSG_TransferTableDram2Smu, TABLE_WATERMARKS);
}
-void dcn31_smu_set_Z9_support(struct clk_mgr_internal *clk_mgr, bool support)
+void dcn31_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum
dcn_zstate_support_state support)
{
//TODO: Work with smu team to define optimization options.
- unsigned int msg_id;
+ unsigned int msg_id, param;
if (!clk_mgr->smu_present)
return;
- if (support)
- msg_id = VBIOSSMC_MSG_AllowZstatesEntry;
+ if (support == DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY)
+ param = 1;
else
+ param = 0;
+
+ if (support == DCN_ZSTATE_SUPPORT_DISALLOW)
msg_id = VBIOSSMC_MSG_DisallowZstatesEntry;
+ else
+ msg_id = VBIOSSMC_MSG_AllowZstatesEntry;
dcn31_smu_send_msg_with_param(
clk_mgr,
msg_id,
- 0);
+ param);
}
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h
b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h
index cd0b7e1e685f..dfa25a76a6d1 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h
@@ -265,7 +265,7 @@ void dcn31_smu_set_dram_addr_low(struct clk_mgr_internal
*clk_mgr, uint32_t addr
void dcn31_smu_transfer_dpm_table_smu_2_dram(struct clk_mgr_internal *clk_mgr);
void dcn31_smu_transfer_wm_table_dram_2_smu(struct clk_mgr_internal *clk_mgr);
-void dcn31_smu_set_Z9_support(struct clk_mgr_internal *clk_mgr, bool support);
+void dcn31_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum
dcn_zstate_support_state support);
void dcn31_smu_set_dtbclk(struct clk_mgr_internal *clk_mgr, bool enable);
#endif /* DAL_DC_31_SMU_H_ */
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 263f7edd42a4..b5e15da29017 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -396,6 +396,7 @@ enum dcn_pwr_state {
enum dcn_zstate_support_state {
DCN_ZSTATE_SUPPORT_UNKNOWN,
DCN_ZSTATE_SUPPORT_ALLOW,
+ DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY,
[PATCH 03/13] drm/amd/display: adjust bit comparison to be more type safe
From: Eric Yang
Might potentially have truncation problem with the implicit casting
Reviewed-by: Nicholas Kazlauskas
Acked-by: Rodrigo Siqueira
Signed-off-by: Eric Yang
---
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
index fa0569174aec..82c651535628 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn31.c
@@ -441,7 +441,7 @@ void dmub_dcn31_get_diagnostic_data(struct dmub_srv *dmub,
struct dmub_diagnosti
bool dmub_dcn31_should_detect(struct dmub_srv *dmub)
{
uint32_t fw_boot_status = REG_READ(DMCUB_SCRATCH0);
- bool should_detect = fw_boot_status &
DMUB_FW_BOOT_STATUS_BIT_DETECTION_REQUIRED;
+ bool should_detect = (fw_boot_status &
DMUB_FW_BOOT_STATUS_BIT_DETECTION_REQUIRED) != 0;
return should_detect;
}
--
2.25.1
[PATCH 02/13] drm/amd/display: Disabled seamless boots on DP and renamed power_down_display_on_boot
From: Jarif Aftab
[WHY]
- We only ever want seamless boots on eDPs
- The naming and logic did not match the context
[HOW]
- Removed unnecessary if statements
- Renamed power_down_display_on_boot to seamless_boot_edp_requested and
swapped the logic
Reviewed-by: Martin Leung
Acked-by: Rodrigo Siqueira
Signed-off-by: Jarif Aftab
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 4 ++--
drivers/gpu/drm/amd/display/dc/core/dc_link.c| 12
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
.../drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c| 5 ++---
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 7 +++
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 5 ++---
6 files changed, 10 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 17fd37ee6251..921e5a718ecf 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1496,10 +1496,10 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
init_data.flags.allow_lttpr_non_transparent_mode.bits.DP2_0 =
true;
#endif
- init_data.flags.power_down_display_on_boot = true;
+ init_data.flags.seamless_boot_edp_requested = false;
if (check_seamless_boot_capability(adev)) {
- init_data.flags.power_down_display_on_boot = false;
+ init_data.flags.seamless_boot_edp_requested = true;
init_data.flags.allow_seamless_boot_optimization = true;
DRM_INFO("Seamless boot condition check passed\n");
}
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index b5e570d33ca9..0c64dea4fdd8 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -1019,18 +1019,6 @@ static bool dc_link_detect_helper(struct dc_link *link,
link->type != dc_connection_mst_branch)
dm_helpers_dp_mst_stop_top_mgr(link->ctx, link);
-
- // For seamless boot, to skip verify link cap, we read
UEFI settings and set them as verified.
- if (reason == DETECT_REASON_BOOT &&
-
!dc_ctx->dc->config.power_down_display_on_boot &&
- link->link_status.link_active)
- perform_dp_seamless_boot = true;
-
- if (perform_dp_seamless_boot) {
- read_current_link_settings_on_detect(link);
- link->verified_link_cap =
link->reported_link_cap;
- }
-
break;
}
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd/display/dc/dc.h
index 288e7b01f561..263f7edd42a4 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -322,7 +322,7 @@ struct dc_config {
bool fbc_support;
bool disable_fractional_pwm;
bool allow_seamless_boot_optimization;
- bool power_down_display_on_boot;
+ bool seamless_boot_edp_requested;
bool edp_not_connected;
bool edp_no_power_sequencing;
bool force_enum_edp;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 530a72e3eefe..915eecb40788 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -1505,8 +1505,7 @@ void dcn10_init_hw(struct dc *dc)
dmub_enable_outbox_notification(dc);
/* we want to turn off all dp displays before doing detection */
- if (dc->config.power_down_display_on_boot)
- dc_link_blank_all_dp_displays(dc);
+ dc_link_blank_all_dp_displays(dc);
/* If taking control over from VBIOS, we may want to optimize our first
* mode set, so we need to skip powering down pipes until we know which
@@ -1514,7 +1513,7 @@ void dcn10_init_hw(struct dc *dc)
* Otherwise, if taking control is not possible, we need to power
* everything down.
*/
- if (dcb->funcs->is_accelerated_mode(dcb) ||
dc->config.power_down_display_on_boot) {
+ if (dcb->funcs->is_accelerated_mode(dcb) ||
!dc->config.seamless_boot_edp_requested) {
if (!is_optimized_init_done) {
hws->funcs.init_pipes(dc, dc->current_state);
if
(dc->res_pool->hubbub->funcs->allow_self_refresh_control)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 1db1ca19411d..ed0a0e5fd805 100644
---
[PATCH 01/13] drm/amd/display: Reset link encoder assignments in atomic check
From: Stylon Wang
[Why]
The link encoder assignments must be "invalid" before commencing
on the reassignment operation in DC. A failing atomic check from
interruption of a signal could often leave the assignment change
in place and trigger the assertion.
[How]
As a work-around the link encoder assignments are always reset
before going into DC validation in DM atomic check.
Reviewed-by: Rodrigo Siqueira
Acked-by: Wayne Lin
Signed-off-by: Stylon Wang
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index a22c25c707b1..17fd37ee6251 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11227,6 +11227,18 @@ static int amdgpu_dm_atomic_check(struct drm_device
*dev,
DRM_DEBUG_DRIVER("drm_dp_mst_atomic_check() failed\n");
goto fail;
}
+
+ /*
+* A previously failing atomic check, for example due to a
+* interruption from signal, could have changed the
+* link encoder assignments in the DC state.
+*
+* DC expects that link encoder assignments are *not* valid
+* when committing a state, so as a workaround it needs to be
+* cleared here.
+*/
+ link_enc_cfg_init(dc, dm_state->context);
+
status = dc_validate_global_state(dc, dm_state->context, true);
if (status != DC_OK) {
DRM_DEBUG_DRIVER("DC global validation failure: %s
(%d)",
--
2.25.1
[PATCH 00/13] DC Patches January 14, 2022
This DC patchset brings improvements in multiple areas. In summary, we highlight: * Fix problem observed while assigning link encoder * Constrain seamless boot on eDP only * Improve Z9 interface * Organize FPU associated code to DML * Modify SMU_TIMEOUT macro * Organize dcn201 code * Address DS stays disabled problem under specific scenario * Fix black screen issue * Update DML to rev.99 * Address problem of eDP hot-plug feature --- Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.100.0 Aric Cyr (2): drm/amd/display: 3.2.168 drm/amd/display: 3.2.169 Charlene Liu (1): drm/amd/display: update dml to rev.99 and smu clk_table w/a Chris Park (1): drm/amd/display: DCEFCLK DS on CLK init Dale Zhao (1): drm/amd/display: Add signal type check when verify stream backends same Dhillon, Jasdeep (1): drm/amd/display: move FPU associated DCN302 code to DML folder Eric Yang (2): drm/amd/display: adjust bit comparison to be more type safe drm/amd/display: support new PMFW interface to disable Z9 only Felipe Clark (1): drm/amd/display: Fix black screen issue on memory clock switch en Ian Chen (1): drm/amd/display: modify SMU_TIMEOUT macro. Jarif Aftab (1): drm/amd/display: Disabled seamless boots on DP and renamed power_down_display_on_boot Stylon Wang (1): drm/amd/display: Reset link encoder assignments in atomic check .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 16 +- .../display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c | 1 + .../display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c | 6 +- .../amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 15 +- .../amd/display/dc/clk_mgr/dcn31/dcn31_smu.h | 2 +- drivers/gpu/drm/amd/display/dc/core/dc_link.c | 12 - .../gpu/drm/amd/display/dc/core/dc_resource.c | 3 + drivers/gpu/drm/amd/display/dc/dc.h | 5 +- .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5 +- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 8 +- .../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 12 +- .../drm/amd/display/dc/dcn30/dcn30_hwseq.h| 3 + .../gpu/drm/amd/display/dc/dcn30/dcn30_init.c | 2 +- .../gpu/drm/amd/display/dc/dcn302/Makefile| 12 - .../amd/display/dc/dcn302/dcn302_resource.c | 316 +--- .../amd/display/dc/dcn302/dcn302_resource.h | 3 + .../drm/amd/display/dc/dcn31/dcn31_hwseq.c| 5 +- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 4 +- drivers/gpu/drm/amd/display/dc/dml/Makefile | 2 + .../amd/display/dc/dml/dcn302/dcn302_fpu.c| 357 ++ .../amd/display/dc/dml/dcn302/dcn302_fpu.h| 32 ++ .../dc/dml/dcn31/display_mode_vba_31.c| 29 +- .../drm/amd/display/dc/dml/display_mode_vba.h | 2 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +- .../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 2 +- 25 files changed, 495 insertions(+), 363 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.c create mode 100644 drivers/gpu/drm/amd/display/dc/dml/dcn302/dcn302_fpu.h -- 2.25.1
RE: [PATCH] drm/amdgpu: fix null ptr access
[AMD Official Use Only]
> -Original Message-
> From: Cui, Flora
> Sent: Thursday, January 13, 2022 2:58 PM
> To: amd-gfx@lists.freedesktop.org; Quan, Evan
> Cc: Cui, Flora
> Subject: [PATCH] drm/amdgpu: fix null ptr access
>
> check null ptr first before access its element
>
> Signed-off-by: Flora Cui
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 2 +-
> drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> index f0daa66f5b3d..5fc33893a68c 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
> @@ -463,7 +463,7 @@ int amdgpu_pm_load_smu_firmware(struct
> amdgpu_device *adev, uint32_t *smu_versio
> const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
> int r = 0;
>
> - if (!pp_funcs->load_firmware)
> + if (!pp_funcs || !pp_funcs->load_firmware)
> return 0;
[Quan, Evan] This seems fine to me.
>
> mutex_lock(>pm.mutex);
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> index 828cb932f6a9..aa640a9c6137 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
> @@ -3281,7 +3281,7 @@ void amdgpu_smu_stb_debug_fs_init(struct
> amdgpu_device *adev)
>
> struct smu_context *smu = adev->powerplay.pp_handle;
>
> - if (!smu->stb_context.stb_buf_size)
> + if (!smu || !smu->stb_context.stb_buf_size)
> return;
[Quan, Evan] For this one, maybe as Lijo suggested, a check for
"!adev->pm.dpm_enabled" in amdgpu_debugfs_pm_init() is better.
BR
Evan
>
> debugfs_create_file_size("amdgpu_smu_stb_dump",
> --
> 2.25.1
Re: [PATCH -next 1/2 v2] drm/amdgpu: remove unneeded semicolon
Applied. Thanks!
Alex
On Thu, Jan 13, 2022 at 8:38 AM Chen, Guchun wrote:
>
> Series is:
> Reviewed-by: Guchun Chen
>
> Regards,
> Guchun
>
> -Original Message-
> From: Yang Li
> Sent: Thursday, January 13, 2022 3:12 PM
> To: airl...@linux.ie; Chen, Guchun
> Cc: dan...@ffwll.ch; Deucher, Alexander ; Koenig,
> Christian ; Pan, Xinhui ;
> amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
> linux-ker...@vger.kernel.org; Yang Li ; Abaci
> Robot
> Subject: [PATCH -next 1/2 v2] drm/amdgpu: remove unneeded semicolon
>
> Eliminate the following coccicheck warning:
> ./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index d4d9b9ea8bbd..ff9bd5a844fe 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -2722,7 +2722,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct
> amdgpu_device *adev) int amdgpu_ras_set_context(struct amdgpu_device *adev,
> struct amdgpu_ras* ras_con) {
> if (!adev)
> - return -EINVAL;;
> + return -EINVAL;
>
> adev->psp.ras_context.ras = ras_con;
> return 0;
> --
> 2.20.1.7.g153144c
>
Re: [PATCH V2 2/2] drm/amdgpu: No longer insert ras blocks into ras_list if it already exists in ras_list
NAK.
This patch should be reverted.
We need to figure out why the block is being added and fix this there.
Regards,
Luben
On 2022-01-12 05:38, yipechai wrote:
> No longer insert ras blocks into ras_list if it already exists in ras_list.
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 614ae8455c9f..d208fde509de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -2754,12 +2754,20 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device *adev)
> int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> struct amdgpu_ras_block_object* ras_block_obj)
> {
> + struct amdgpu_ras_block_object *obj, *tmp;
> if (!adev || !ras_block_obj)
> return -EINVAL;
>
> if (!amdgpu_ras_asic_supported(adev))
> return 0;
>
> + /* If the ras object is in ras_list, don't add it again */
> + list_for_each_entry_safe(obj, tmp, >ras_list, node) {
> + if (obj == ras_block_obj) {
> + return 0;
> + }
> + }
> +
> INIT_LIST_HEAD(_block_obj->node);
> list_add_tail(_block_obj->node, >ras_list);
>
Re: [RFC PATCH v2 2/3] drm: set fb_modifiers_not_supported flag in legacy drivers
I think we'll also want to do a conditional disable for DC
(drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c) since it only
enables modifiers on newer HW. Something like "if (modifiers == NULL)
fb_modifiers_not_supported = true;" in amdgpu_dm_plane_init.
On Thu, Jan 13, 2022 at 10:44 AM Tomohito Esaki wrote:
>
> Set fb_modifiers_not_supported flag in legacy drivers whose planes
> support non-linear layouts but does not support modifiers, and replace
> allow_fb_modifiers with fb_modifiers_not_supported.
>
> Signed-off-by: Tomohito Esaki
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 ++
> drivers/gpu/drm/nouveau/nouveau_display.c | 6 --
> drivers/gpu/drm/radeon/radeon_display.c | 2 ++
> 7 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index dc50c05f23fc..cbaea9c6cfda 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -958,7 +958,7 @@ static int amdgpu_display_verify_sizes(struct
> amdgpu_framebuffer *rfb)
> int ret;
> unsigned int i, block_width, block_height, block_size_log2;
>
> - if (!rfb->base.dev->mode_config.allow_fb_modifiers)
> + if (rfb->base.dev->mode_config.fb_modifiers_not_supported)
> return 0;
>
> for (i = 0; i < format_info->num_planes; ++i) {
> @@ -1145,7 +1145,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
> *dev,
> if (ret)
> return ret;
>
> - if (!dev->mode_config.allow_fb_modifiers) {
> + if (dev->mode_config.fb_modifiers_not_supported) {
> drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,
> "GFX9+ requires FB check based on format
> modifier\n");
> ret = check_tiling_flags_gfx6(rfb);
> @@ -1153,7 +1153,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
> *dev,
> return ret;
> }
>
> - if (dev->mode_config.allow_fb_modifiers &&
> + if (!dev->mode_config.fb_modifiers_not_supported &&
> !(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) {
> ret = convert_tiling_flags_to_modifier(rfb);
> if (ret) {
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> index d1570a462a51..fb61c0814115 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
> @@ -2798,6 +2798,8 @@ static int dce_v10_0_sw_init(void *handle)
> adev_to_drm(adev)->mode_config.preferred_depth = 24;
> adev_to_drm(adev)->mode_config.prefer_shadow = 1;
>
> + adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
> +
> adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
>
> r = amdgpu_display_modeset_create_props(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> index 18a7b3bd633b..17942a11366d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
> @@ -2916,6 +2916,8 @@ static int dce_v11_0_sw_init(void *handle)
> adev_to_drm(adev)->mode_config.preferred_depth = 24;
> adev_to_drm(adev)->mode_config.prefer_shadow = 1;
>
> + adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
> +
> adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
>
> r = amdgpu_display_modeset_create_props(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> index c7803dc2b2d5..2ec99ec8e1a3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
> @@ -2674,6 +2674,7 @@ static int dce_v6_0_sw_init(void *handle)
> adev_to_drm(adev)->mode_config.max_height = 16384;
> adev_to_drm(adev)->mode_config.preferred_depth = 24;
> adev_to_drm(adev)->mode_config.prefer_shadow = 1;
> + adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
> adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
>
> r = amdgpu_display_modeset_create_props(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> index b200b9e722d9..8369336cec90 100644
> --- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
> @@ -2699,6 +2699,8 @@ static int dce_v8_0_sw_init(void *handle)
> adev_to_drm(adev)->mode_config.preferred_depth = 24;
> adev_to_drm(adev)->mode_config.prefer_shadow = 1;
>
> + adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
> +
>
Re: [PATCH 2/2] drm/amdgpu: No longer insert ras blocks into ras_list if it already exists in ras_list
On Wed, Jan 12, 2022 at 3:36 AM Zhou1, Tao wrote:
>
> [AMD Official Use Only]
>
>
>
> > -Original Message-
> > From: Chai, Thomas
> > Sent: Wednesday, January 12, 2022 3:48 PM
> > To: amd-gfx@lists.freedesktop.org
> > Cc: Chai, Thomas ; Zhang, Hawking
> > ; Zhou1, Tao ; Clements,
> > John ; Chai, Thomas
> > Subject: [PATCH 2/2] drm/amdgpu: No longer insert ras blocks into ras_list
> > if it
> > already exists in ras_list
> >
> > No longer insert ras blocks into ras_list if it already exists in ras_list.
> >
> > Signed-off-by: yipechai
> > ---
> > drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > index 62be0b4909b3..e6d3bb4b56e4 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> > @@ -2754,9 +2754,17 @@ int amdgpu_ras_reset_gpu(struct amdgpu_device
> > *adev) int amdgpu_ras_register_ras_block(struct amdgpu_device *adev,
> > struct amdgpu_ras_block_object* ras_block_obj) {
> > + struct amdgpu_ras_block_object *obj, *tmp;
> > if (!adev || !amdgpu_ras_asic_supported(adev) || !ras_block_obj)
> > return -EINVAL;
> >
> > + /* If the ras object had been in ras_list, doesn't add it to ras_list
> > again */
> [Tao] How about "If the ras object is in ras_list, don't add it again"
>
> > + list_for_each_entry_safe(obj, tmp, >ras_list, node) {
> > + if (obj == ras_block_obj) {
> > + return 0;
> > + }
> > + }
>
> [Tao] The patch is OK for me currently, but I think the root cause is we
> initialize adev->gmc.xgmi.ras in gmc_ras_late_init, the initialization should
> be called only in modprobe stage and we can create a general gmc_early_init
> for it.
Yes, please fix the root cause. We should only be adding the blocks
once. This is just papering over the actual problem.
Alex
>
> > +
> > INIT_LIST_HEAD(_block_obj->node);
> > list_add_tail(_block_obj->node, >ras_list);
> >
> > --
> > 2.25.1
Re: [PATCH 2/2] drm/amdgpu: add vram check function for GMC
Am 2022-01-13 um 2:45 a.m. schrieb Xiaojian Du:
> This will add vram check function for GMC, it will cover gmc v8/9/10
>
> Signed-off-by: Xiaojian Du
> Reviewed-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 42 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 +++-
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 -
> 5 files changed, 59 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 83f26bca7dac..dbc0de89d7e4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -833,3 +833,45 @@ void amdgpu_gmc_get_reserved_allocation(struct
> amdgpu_device *adev)
> break;
> }
> }
> +
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
> +{
> + int ret, size = 0x10;
> + uint8_t cptr[10];
> +
> + ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + >vram_bo,
> + >vram_gpu,
> + >vram_ptr);
> + if (ret)
> + return ret;
> +
> + memset(adev->vram_ptr, 0x86, size);
> + memset(cptr, 0x86, 10);
> +
> + /**
> + * Check the start, the mid, and the end of the memory if the content of
> + * each byte is the pattern "0x86". If yes, we suppose the vram bo is
> + * workable.
> + *
> + * Note: If check the each byte of whole 1M bo, it will cost too many
> + * seconds, so here, we just pick up three parts for emulation.
> + */
> + ret = memcmp(adev->vram_ptr, cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(adev->vram_ptr + (size / 2), cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(adev->vram_ptr + size - 10, cptr, 10);
> + if (ret)
> + return ret;
> +
> + amdgpu_bo_free_kernel(>vram_bo, >vram_gpu,
> + >vram_ptr);
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 82ec665b366c..f06af61378ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -343,4 +343,5 @@ void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev);
> uint64_t amdgpu_gmc_vram_mc2pa(struct amdgpu_device *adev, uint64_t mc_addr);
> uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev);
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 3915ba837596..5e407c88c8d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -1048,6 +1048,10 @@ static int gmc_v10_0_hw_init(void *handle)
> if (r)
> return r;
>
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> if (adev->umc.funcs && adev->umc.funcs->init_registers)
> adev->umc.funcs->init_registers(adev);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 9a3fc0926903..6c94a9712a3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -1241,7 +1241,11 @@ static int gmc_v8_0_hw_init(void *handle)
> if (r)
> return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
This could simply be
return amdgpu_gmc_vram_checking(adev);
> }
>
> static int gmc_v8_0_hw_fini(void *handle)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index ce7d438eeabe..1ea18b4ff63f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1771,8 +1771,14 @@ static int gmc_v9_0_hw_init(void *handle)
> adev->umc.funcs->init_registers(adev);
>
> r = gmc_v9_0_gart_enable(adev);
> + if (r)
> + return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
Same as above.
Regards,
Felix
> }
>
> /**
[PATCH] drm/amdkfd: use proper interrupt handling for gfx10
GFX has the following changes when handling interrupts in the KFD:
- no pasid workaround required
- SQ interrupt auto has different events
- SQ interrupt word is continguous and only has 23-bit data.
Also SH is labelled as SA and workgroup id replaces CU id.
- SQ interrupt word is continguos and only has 23 bits for err type and
err details.
- Sienna Cichlid uses a different client ID for SDMA3
(see soc15_ih_clients).
v2: forgot to add Sienna Chichlid SDMA3 client as permissible
Signed-off-by: Jonathan Kim
---
drivers/gpu/drm/amd/amdkfd/Makefile | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 4 +-
.../gpu/drm/amd/amdkfd/kfd_int_process_v10.c | 315 ++
drivers/gpu/drm/amd/amdkfd/kfd_priv.h | 1 +
4 files changed, 320 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
diff --git a/drivers/gpu/drm/amd/amdkfd/Makefile
b/drivers/gpu/drm/amd/amdkfd/Makefile
index c4f3aff11072..87851840e9bd 100644
--- a/drivers/gpu/drm/amd/amdkfd/Makefile
+++ b/drivers/gpu/drm/amd/amdkfd/Makefile
@@ -51,6 +51,7 @@ AMDKFD_FILES := $(AMDKFD_PATH)/kfd_module.o \
$(AMDKFD_PATH)/kfd_events.o \
$(AMDKFD_PATH)/cik_event_interrupt.o \
$(AMDKFD_PATH)/kfd_int_process_v9.o \
+ $(AMDKFD_PATH)/kfd_int_process_v10.o \
$(AMDKFD_PATH)/kfd_dbgdev.o \
$(AMDKFD_PATH)/kfd_dbgmgr.o \
$(AMDKFD_PATH)/kfd_smi_events.o \
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 5a47f437b455..7926e3b5a3e1 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
@@ -107,6 +107,8 @@ static void
kfd_device_info_set_event_interrupt_class(struct kfd_dev *kfd)
case IP_VERSION(9, 4, 0): /* VEGA20 */
case IP_VERSION(9, 4, 1): /* ARCTURUS */
case IP_VERSION(9, 4, 2): /* ALDEBARAN */
+ kfd->device_info.event_interrupt_class =
_interrupt_class_v9;
+ break;
case IP_VERSION(10, 3, 1): /* VANGOGH */
case IP_VERSION(10, 3, 3): /* YELLOW_CARP */
case IP_VERSION(10, 1, 3): /* CYAN_SKILLFISH */
@@ -117,7 +119,7 @@ static void
kfd_device_info_set_event_interrupt_class(struct kfd_dev *kfd)
case IP_VERSION(10, 3, 2): /* NAVY_FLOUNDER */
case IP_VERSION(10, 3, 4): /* DIMGREY_CAVEFISH */
case IP_VERSION(10, 3, 5): /* BEIGE_GOBY */
- kfd->device_info.event_interrupt_class =
_interrupt_class_v9;
+ kfd->device_info.event_interrupt_class =
_interrupt_class_v10;
break;
default:
dev_warn(kfd_device, "v9 event interrupt handler is set due to "
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
new file mode 100644
index ..b54719b9a808
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_int_process_v10.c
@@ -0,0 +1,315 @@
+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "kfd_priv.h"
+#include "kfd_events.h"
+#include "soc15_int.h"
+#include "kfd_device_queue_manager.h"
+#include "kfd_smi_events.h"
+
+enum SQ_INTERRUPT_WORD_ENCODING {
+ SQ_INTERRUPT_WORD_ENCODING_AUTO = 0x0,
+ SQ_INTERRUPT_WORD_ENCODING_INST,
+ SQ_INTERRUPT_WORD_ENCODING_ERROR,
+};
+
+enum SQ_INTERRUPT_ERROR_TYPE {
+ SQ_INTERRUPT_ERROR_TYPE_EDC_FUE = 0x0,
+ SQ_INTERRUPT_ERROR_TYPE_ILLEGAL_INST,
+ SQ_INTERRUPT_ERROR_TYPE_MEMVIOL,
+ SQ_INTERRUPT_ERROR_TYPE_EDC_FED,
+};
+
+/* SQ_INTERRUPT_WORD_AUTO_CTXID */
+#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE__SHIFT 0
+#define SQ_INTERRUPT_WORD_AUTO_CTXID__WLT__SHIFT 1
+#define SQ_INTERRUPT_WORD_AUTO_CTXID__THREAD_TRACE_BUF0_FULL__SHIFT 2
+#define
Re: [Patch v2] drm/amdgpu: add vram check function for GMC
On Thu, Jan 13, 2022 at 5:00 AM Xiaojian Du wrote:
>
> This will add vram check function for GMC, it will cover gmc v6/7/8/9/10
>
Please provide a better description.
Also, we should either protect the calls to this function with:
if (amdgpu_emu_mode == 1)
or return early in the function if amdgpu_emu_mode != 1.
Alex
> Signed-off-by: Xiaojian Du
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 46 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++
> drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 6 +++-
> drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 6 +++-
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 +++-
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 -
> 7 files changed, 73 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 83f26bca7dac..96cabf3ed29e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -833,3 +833,49 @@ void amdgpu_gmc_get_reserved_allocation(struct
> amdgpu_device *adev)
> break;
> }
> }
> +
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
> +{
> + struct amdgpu_bo*vram_bo;
> + uint64_tvram_gpu;
> + void*vram_ptr;
> +
> + int ret, size = 0x10;
> + uint8_t cptr[10];
> +
> + ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + _bo,
> + _gpu,
> + _ptr);
> + if (ret)
> + return ret;
> +
> + memset(vram_ptr, 0x86, size);
> + memset(cptr, 0x86, 10);
> +
> + /**
> + * Check the start, the mid, and the end of the memory if the content
> of
> + * each byte is the pattern "0x86". If yes, we suppose the vram bo is
> + * workable.
> + *
> + * Note: If check the each byte of whole 1M bo, it will cost too many
> + * seconds, so here, we just pick up three parts for emulation.
> + */
> + ret = memcmp(vram_ptr, cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(vram_ptr + (size / 2), cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(vram_ptr + size - 10, cptr, 10);
> + if (ret)
> + return ret;
> +
> + amdgpu_bo_free_kernel(_bo, _gpu,
> + _ptr);
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 82ec665b366c..f06af61378ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -343,4 +343,5 @@ void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev);
> uint64_t amdgpu_gmc_vram_mc2pa(struct amdgpu_device *adev, uint64_t mc_addr);
> uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev);
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 3915ba837596..5e407c88c8d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -1048,6 +1048,10 @@ static int gmc_v10_0_hw_init(void *handle)
> if (r)
> return r;
>
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> if (adev->umc.funcs && adev->umc.funcs->init_registers)
> adev->umc.funcs->init_registers(adev);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> index 0fe714f54cca..17770c1017ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
> @@ -923,7 +923,11 @@ static int gmc_v6_0_hw_init(void *handle)
> if (r)
> return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
> }
>
> static int gmc_v6_0_hw_fini(void *handle)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> index 0a50fdaced7e..fa43905ae61f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
> @@ -1112,7 +1112,11 @@ static int gmc_v7_0_hw_init(void *handle)
> if (r)
> return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
> }
>
> static int gmc_v7_0_hw_fini(void *handle)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 9a3fc0926903..6c94a9712a3a
Re: [PATCH] drm/amdgpu: don't do resets on APUs which don't support it
On Thu, Jan 13, 2022 at 1:56 AM Lazar, Lijo wrote:
>
> Hi Alex,
>
> What about something like this?
>
> bool amdgpu_device_reset_on_suspend(struct amdgpu_device *adev)
> {
> if (adev->in_s0ix || adev->gmc.xgmi.num_physical_nodes > 1)
> return false;
>
> switch (amdgpu_asic_reset_method(adev)) {
> case AMD_RESET_METHOD_BACO:
> case AMD_RESET_METHOD_MODE1:
> case AMD_RESET_METHOD_MODE2:
This should also work on AMD_RESET_METHOD_LEGACY, at least for dGPUs.
I think the current approach is probably better since I don't think
GPU resets work reliably on these chips anyway (it's not enabled by
default on them gor hangs), so better to just not do it as it may make
the problem worse.
Alex
> return true;
> }
>
> return false;
> }
>
> Thanks,
> Lijo
>
> On 1/13/2022 9:31 AM, Alex Deucher wrote:
> > It can cause a hang. This is normally not enabled for GPU
> > hangs on these asics, but was recently enabled for handling
> > aborted suspends. This causes hangs on some platforms
> > on suspend.
> >
> > Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend (v2)")
> > Cc: sta...@vger.kernel.org
> > Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1858
> > Signed-off-by: Alex Deucher
> > ---
> > drivers/gpu/drm/amd/amdgpu/cik.c | 4
> > drivers/gpu/drm/amd/amdgpu/vi.c | 4
> > 2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c
> > b/drivers/gpu/drm/amd/amdgpu/cik.c
> > index 54f28c075f21..f10ce740a29c 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/cik.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
> > @@ -1428,6 +1428,10 @@ static int cik_asic_reset(struct amdgpu_device *adev)
> > {
> > int r;
> >
> > + /* APUs don't have full asic reset */
> > + if (adev->flags & AMD_IS_APU)
> > + return 0;
> > +
> > if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
> > dev_info(adev->dev, "BACO reset\n");
> > r = amdgpu_dpm_baco_reset(adev);
> > diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c
> > b/drivers/gpu/drm/amd/amdgpu/vi.c
> > index fe9a7cc8d9eb..6645ebbd2696 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/vi.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/vi.c
> > @@ -956,6 +956,10 @@ static int vi_asic_reset(struct amdgpu_device *adev)
> > {
> > int r;
> >
> > + /* APUs don't have full asic reset */
> > + if (adev->flags & AMD_IS_APU)
> > + return 0;
> > +
> > if (vi_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
> > dev_info(adev->dev, "BACO reset\n");
> > r = amdgpu_dpm_baco_reset(adev);
> >
Re: [PATCH v5] drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21
On 1/13/2022 03:16, Bert Karwatzki wrote: Am Mittwoch, dem 12.01.2022 um 02:08 + schrieb Limonciello, Mario: [AMD Official Use Only] -Original Message- From: Bert Karwatzki Sent: Tuesday, January 11, 2022 19:12 To: amd-gfx@lists.freedesktop.org Cc: Limonciello, Mario ; Kazlauskas, Nicholas ; Zhuo, Qingqing (Lillian) ; Scott Bruce ; Chris Hixon Subject: [PATCH v5] drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21 I just tested patch v5 applied to amd-staging-drm-next (with HEAD 26c981e27e698c251ef3241f73ac846e66ad7fc3) and suspend and resume work fine. But as amd-staging-drm-next is still based on linux-5.13 I had to replace the mediatek wlan driver by the version from linux-5.16. FYI it should likely cherry pick to 5.16 too if it's easier to test there. I was able to cherry-pick to rc8 no problem. If you can please try any display hotplugging to make sure hotplugs don’t cause problems for you as well feel comfortable to add a Tested-by tag. Thanks, Unfortunately the external HDMI port on my Notebook (Alpha 15 B5EEK/MS- 158L) does not seem to work out-of-the-box. This is a two GPU machine 03:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Navi 23 [Radeon RX 6600/6600 XT/6600M] (rev c3) 08:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Cezanne (rev c5) The Desktop Environment (gnome with Xorg) is running on the integrated Cezanne, but when I connect the external HDMI cable I get a dmesg resume message from the Navi GPU. So this either requires some additional configuration effort on my part or this is a story for another bug report. Unless this changes without this revert patch in place then I would say a story for another bug report.
RE: [PATCH Review 1/1] drm/amdgpu: handle denied inject error into critical regions v2
[Public]
I guess you still need to add a commit description in v2.
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Stanley.Yang
Sent: Thursday, January 13, 2022 9:28 AM
To: amd-gfx@lists.freedesktop.org
Cc: Yang, Stanley ; Zhou1, Tao ;
Clements, John ; Zhang, Hawking
Subject: [PATCH Review 1/1] drm/amdgpu: handle denied inject error into
critical regions v2
Changed from v1:
remove unused brace
Signed-off-by: Stanley.Yang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
drivers/gpu/drm/amd/amdgpu/ta_ras_if.h | 3 ++-
3 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index c742d1aacf5a..144176779f9e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1309,6 +1309,11 @@ static void psp_ras_ta_check_status(struct psp_context
*psp)
break;
case TA_RAS_STATUS__SUCCESS:
break;
+ case TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED:
+ if (ras_cmd->cmd_id == TA_RAS_COMMAND__TRIGGER_ERROR)
+ dev_warn(psp->adev->dev,
+ "RAS INFO: Inject error to critical
region is not allowed\n");
+ break;
default:
dev_warn(psp->adev->dev,
"RAS WARNING: ras status = 0x%X\n",
ras_cmd->ras_status); @@ -1521,7 +1526,9 @@ int psp_ras_trigger_error(struct
psp_context *psp,
if (amdgpu_ras_intr_triggered())
return 0;
- if (ras_cmd->ras_status)
+ if (ras_cmd->ras_status == TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED)
+ return -EACCES;
+ else if (ras_cmd->ras_status)
return -EINVAL;
return 0;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index e674dbed3615..8bdc2e85cb20 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -449,7 +449,7 @@ static ssize_t amdgpu_ras_debugfs_ctrl_write(struct file *f,
}
if (ret)
- return -EINVAL;
+ return ret;
return size;
}
diff --git a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
index 5093826a43d1..509d8a1945eb 100644
--- a/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
+++ b/drivers/gpu/drm/amd/amdgpu/ta_ras_if.h
@@ -64,7 +64,8 @@ enum ta_ras_status {
TA_RAS_STATUS__ERROR_PCS_STATE_ERROR= 0xA016,
TA_RAS_STATUS__ERROR_PCS_STATE_HANG = 0xA017,
TA_RAS_STATUS__ERROR_PCS_STATE_UNKNOWN = 0xA018,
- TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ = 0xA019
+ TA_RAS_STATUS__ERROR_UNSUPPORTED_ERROR_INJ = 0xA019,
+ TA_RAS_STATUS__TEE_ERROR_ACCESS_DENIED = 0xA01A
};
enum ta_ras_block {
--
2.17.1
Re: [PATCH] drm/amdgpu: don't do resets on APUs which don't support it
On 1/13/2022 00:56, Lazar, Lijo wrote:
Hi Alex,
What about something like this?
bool amdgpu_device_reset_on_suspend(struct amdgpu_device *adev)
{
if (adev->in_s0ix || adev->gmc.xgmi.num_physical_nodes > 1)
return false;
switch (amdgpu_asic_reset_method(adev)) {
case AMD_RESET_METHOD_BACO:
case AMD_RESET_METHOD_MODE1:
case AMD_RESET_METHOD_MODE2:
return true;
}
return false;
}
I think the approach that Alex shared *might* be more flexible to also
be used in the aborted suspend case too on s0ix. There is some
discussions going on for that right now.
Thanks,
Lijo
On 1/13/2022 9:31 AM, Alex Deucher wrote:
It can cause a hang. This is normally not enabled for GPU
hangs on these asics, but was recently enabled for handling
aborted suspends. This causes hangs on some platforms
on suspend.
Fixes: daf8de0874ab5b ("drm/amdgpu: always reset the asic in suspend
(v2)")
Cc: sta...@vger.kernel.org
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1858
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/cik.c | 4
drivers/gpu/drm/amd/amdgpu/vi.c | 4
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c
b/drivers/gpu/drm/amd/amdgpu/cik.c
index 54f28c075f21..f10ce740a29c 100644
--- a/drivers/gpu/drm/amd/amdgpu/cik.c
+++ b/drivers/gpu/drm/amd/amdgpu/cik.c
@@ -1428,6 +1428,10 @@ static int cik_asic_reset(struct amdgpu_device
*adev)
{
int r;
+ /* APUs don't have full asic reset */
+ if (adev->flags & AMD_IS_APU)
+ return 0;
+
if (cik_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
dev_info(adev->dev, "BACO reset\n");
r = amdgpu_dpm_baco_reset(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c
b/drivers/gpu/drm/amd/amdgpu/vi.c
index fe9a7cc8d9eb..6645ebbd2696 100644
--- a/drivers/gpu/drm/amd/amdgpu/vi.c
+++ b/drivers/gpu/drm/amd/amdgpu/vi.c
@@ -956,6 +956,10 @@ static int vi_asic_reset(struct amdgpu_device *adev)
{
int r;
+ /* APUs don't have full asic reset */
+ if (adev->flags & AMD_IS_APU)
+ return 0;
+
if (vi_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {
dev_info(adev->dev, "BACO reset\n");
r = amdgpu_dpm_baco_reset(adev);
RE: [PATCH] tests/amdgpu: Add VCN test support for Biege Goby
[AMD Official Use Only]
Reviewed-By: Veerabadhran Gopalakrishnan
-Original Message-
From: Alex Deucher
Sent: Thursday, January 13, 2022 7:47 PM
To: Chen, Guchun
Cc: amd-gfx list ; Deucher, Alexander
; Gopalakrishnan, Veerabadhran (Veera)
; Liu, Leo
Subject: Re: [PATCH] tests/amdgpu: Add VCN test support for Biege Goby
Acked-by: Alex Deucher
On Thu, Jan 13, 2022 at 8:55 AM Guchun Chen wrote:
>
> Added Beige Goby chip id in vcn test, will open a MR to merge this on
> gitlab after review.
>
> Signed-off-by: Guchun Chen
> ---
> tests/amdgpu/vcn_tests.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c index
> 628b4910..15d573d3 100644
> --- a/tests/amdgpu/vcn_tests.c
> +++ b/tests/amdgpu/vcn_tests.c
> @@ -142,7 +142,8 @@ CU_BOOL suite_vcn_tests_enable(void)
> } else if (family_id == AMDGPU_FAMILY_NV) {
> if (chip_id == (chip_rev + 0x28) ||
> chip_id == (chip_rev + 0x32) ||
> - chip_id == (chip_rev + 0x3c)) {
> + chip_id == (chip_rev + 0x3c) ||
> + chip_id == (chip_rev + 0x46)) {
> reg.data0 = 0x10;
> reg.data1 = 0x11;
> reg.cmd = 0xf;
> --
> 2.17.1
>
Re: [PATCH] tests/amdgpu: Add VCN test support for Biege Goby
Acked-by: Alex Deucher
On Thu, Jan 13, 2022 at 8:55 AM Guchun Chen wrote:
>
> Added Beige Goby chip id in vcn test, will open a MR to
> merge this on gitlab after review.
>
> Signed-off-by: Guchun Chen
> ---
> tests/amdgpu/vcn_tests.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
> index 628b4910..15d573d3 100644
> --- a/tests/amdgpu/vcn_tests.c
> +++ b/tests/amdgpu/vcn_tests.c
> @@ -142,7 +142,8 @@ CU_BOOL suite_vcn_tests_enable(void)
> } else if (family_id == AMDGPU_FAMILY_NV) {
> if (chip_id == (chip_rev + 0x28) ||
> chip_id == (chip_rev + 0x32) ||
> - chip_id == (chip_rev + 0x3c)) {
> + chip_id == (chip_rev + 0x3c) ||
> + chip_id == (chip_rev + 0x46)) {
> reg.data0 = 0x10;
> reg.data1 = 0x11;
> reg.cmd = 0xf;
> --
> 2.17.1
>
[PATCH] tests/amdgpu: Add VCN test support for Biege Goby
Added Beige Goby chip id in vcn test, will open a MR to
merge this on gitlab after review.
Signed-off-by: Guchun Chen
---
tests/amdgpu/vcn_tests.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tests/amdgpu/vcn_tests.c b/tests/amdgpu/vcn_tests.c
index 628b4910..15d573d3 100644
--- a/tests/amdgpu/vcn_tests.c
+++ b/tests/amdgpu/vcn_tests.c
@@ -142,7 +142,8 @@ CU_BOOL suite_vcn_tests_enable(void)
} else if (family_id == AMDGPU_FAMILY_NV) {
if (chip_id == (chip_rev + 0x28) ||
chip_id == (chip_rev + 0x32) ||
- chip_id == (chip_rev + 0x3c)) {
+ chip_id == (chip_rev + 0x3c) ||
+ chip_id == (chip_rev + 0x46)) {
reg.data0 = 0x10;
reg.data1 = 0x11;
reg.cmd = 0xf;
--
2.17.1
Re: [RFC PATCH v2 0/3] Add support modifiers for drivers whose planes only support linear layout
Hi Esaki-san, On Thu, 13 Jan 2022 at 09:44, Tomohito Esaki wrote: > Some drivers whose planes only support linear layout fb do not support format > modifiers. > These drivers should support modifiers, however the DRM core should handle > this > rather than open-coding in every driver. > > In this patch series, these drivers expose format modifiers based on the > following suggestion[1]. Thanks for the series, it looks like the right thing to do. Can you please change the patch ordering though? At the moment there will be a bisection break at patch #1, because the legacy drivers will suddenly start gaining modifier support, before it is removed in patch #2. I think a better order would be: 1: add fb_modifiers_not_supported flag to core and drivers 2: add default modifiers (and set allow_fb_modifiers) if fb_modifiers_not_supported flag is not set 3: remove allow_fb_modifiers flag Cheers, Daniel
RE: [PATCH -next 1/2 v2] drm/amdgpu: remove unneeded semicolon
Series is:
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Yang Li
Sent: Thursday, January 13, 2022 3:12 PM
To: airl...@linux.ie; Chen, Guchun
Cc: dan...@ffwll.ch; Deucher, Alexander ; Koenig,
Christian ; Pan, Xinhui ;
amd-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org;
linux-ker...@vger.kernel.org; Yang Li ; Abaci Robot
Subject: [PATCH -next 1/2 v2] drm/amdgpu: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d4d9b9ea8bbd..ff9bd5a844fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2722,7 +2722,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct
amdgpu_device *adev) int amdgpu_ras_set_context(struct amdgpu_device *adev,
struct amdgpu_ras* ras_con) {
if (!adev)
- return -EINVAL;;
+ return -EINVAL;
adev->psp.ras_context.ras = ras_con;
return 0;
--
2.20.1.7.g153144c
Re: [PATCH v5] drm/amd/display: Revert W/A for hard hangs on DCN20/DCN21
Am Mittwoch, dem 12.01.2022 um 02:08 + schrieb Limonciello, Mario: > [AMD Official Use Only] > > > -Original Message- > > From: Bert Karwatzki > > Sent: Tuesday, January 11, 2022 19:12 > > To: amd-gfx@lists.freedesktop.org > > Cc: Limonciello, Mario ; Kazlauskas, > > Nicholas > > ; Zhuo, Qingqing (Lillian) > > ; Scott Bruce ; Chris > > Hixon > > > > Subject: [PATCH v5] drm/amd/display: Revert W/A for hard hangs on > > DCN20/DCN21 > > > > I just tested patch v5 applied to amd-staging-drm-next (with HEAD > > 26c981e27e698c251ef3241f73ac846e66ad7fc3) and suspend and resume > > work > > fine. But as amd-staging-drm-next is still based on linux-5.13 I > > had to > > replace the mediatek wlan driver by the version from linux-5.16. > > FYI it should likely cherry pick to 5.16 too if it's easier to test > there. > I was able to cherry-pick to rc8 no problem. > > If you can please try any display hotplugging to make sure hotplugs > don’t > cause problems for you as well feel comfortable to add a Tested-by > tag. > > Thanks, Unfortunately the external HDMI port on my Notebook (Alpha 15 B5EEK/MS- 158L) does not seem to work out-of-the-box. This is a two GPU machine 03:00.0 Display controller: Advanced Micro Devices, Inc. [AMD/ATI] Navi 23 [Radeon RX 6600/6600 XT/6600M] (rev c3) 08:00.0 VGA compatible controller: Advanced Micro Devices, Inc. [AMD/ATI] Cezanne (rev c5) The Desktop Environment (gnome with Xorg) is running on the integrated Cezanne, but when I connect the external HDMI cable I get a dmesg resume message from the Navi GPU. So this either requires some additional configuration effort on my part or this is a story for another bug report.
Re: [PATCH] drm/amdgpu: Indent some if statements
Reviewed-by: Nirmoy Das
On 1/13/2022 7:17 AM, Dan Carpenter wrote:
These if statements need to be indented.
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d4d9b9ea8bbd..777def770dc8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -1714,8 +1714,7 @@ static void amdgpu_ras_error_status_query(struct
amdgpu_device *adev,
}
if (block_obj->hw_ops->query_ras_error_status)
- block_obj->hw_ops->query_ras_error_status(adev);
-
+ block_obj->hw_ops->query_ras_error_status(adev);
}
static void amdgpu_ras_query_err_status(struct amdgpu_device *adev)
@@ -2722,7 +2721,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct
amdgpu_device *adev)
int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras*
ras_con)
{
if (!adev)
- return -EINVAL;;
+ return -EINVAL;
adev->psp.ras_context.ras = ras_con;
return 0;
Re: [PATCH 1/1] drm/amdgpu: move bo_va ref counting to internal funcs
On 1/13/2022 1:12 PM, Christian König wrote:
Am 13.01.22 um 13:06 schrieb Nirmoy Das:
GEM code should not deal with struct amdgpu_bo_va's ref_count.
Move ref counting to amdgpu_vm.c.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 38 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
3 files changed, 42 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 4a11a2f4fa73..691f0a879c90 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -176,12 +176,9 @@ static int amdgpu_gem_object_open(struct
drm_gem_object *obj,
if (r)
return r;
- bo_va = amdgpu_vm_bo_find(vm, abo);
- if (!bo_va) {
- bo_va = amdgpu_vm_bo_add(adev, vm, abo);
- } else {
- ++bo_va->ref_count;
- }
+ if (!amdgpu_vm_bo_get(vm, abo))
+ amdgpu_vm_bo_add(adev, vm, abo);
+
amdgpu_bo_unreserve(abo);
return 0;
}
@@ -218,7 +215,7 @@ static void amdgpu_gem_object_close(struct
drm_gem_object *obj,
return;
}
bo_va = amdgpu_vm_bo_find(vm, bo);
- if (!bo_va || --bo_va->ref_count)
+ if (!bo_va)
goto out_unlock;
amdgpu_vm_bo_rmv(adev, bo_va);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b23cb463b106..9d60de6a6697 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1290,16 +1290,49 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct
amdgpu_vm *vm,
struct amdgpu_bo *bo)
{
struct amdgpu_vm_bo_base *base;
+ struct amdgpu_bo_va *bo_va = NULL;
for (base = bo->vm_bo; base; base = base->next) {
if (base->vm != vm)
continue;
- return container_of(base, struct amdgpu_bo_va, base);
+ bo_va = container_of(base, struct amdgpu_bo_va, base);
}
- return NULL;
+
+ if (bo_va && bo_va->ref_count <= 0)
+ return NULL;
+
+ return bo_va;
}
+/**
+ * amdgpu_vm_bo_get - find the bo_va for a specific vm & bo and
increase
+ * the ref_count
+ *
+ * @vm: requested vm
+ * @bo: requested buffer object
+ *
+ * Find @bo inside the requested vm.
+ * Search inside the @bos vm list for the requested vm
+ * Returns the found bo_va with +1 ref_count or NULL if none is found
+ *
+ * Object has to be reserved!
+ *
+ * Returns:
+ * Found bo_va or NULL.
+ */
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo)
+{
+ struct amdgpu_bo_va *bo_va = amdgpu_vm_bo_find(vm, bo);
+
+ if (bo_va)
+ ++bo_va->ref_count;
+
+ return bo_va;
+}
+
+
/**
* amdgpu_vm_map_gart - Resolve gart mapping of addr
*
@@ -2704,6 +2737,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
if (bo && bo_va->is_xgmi)
amdgpu_xgmi_set_pstate(adev, AMDGPU_XGMI_PSTATE_MIN);
+ --bo_va->ref_count;
kfree(bo_va);
That here won't work, you are removing and freeing the bo_va even if
the refcount is not zero yet.
I suggest to have a matching amdgpu_vm_bo_put() function instead.
Right, let me resend v2.
Thanks,
Nirmoy
Regards,
Christian.
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 85fcfb8c5efd..6d936fb1b934 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -415,6 +415,8 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device
*adev,
uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t
addr);
struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo);
struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
Re: [PATCH 1/1] drm/amdgpu: move bo_va ref counting to internal funcs
Am 13.01.22 um 13:06 schrieb Nirmoy Das:
GEM code should not deal with struct amdgpu_bo_va's ref_count.
Move ref counting to amdgpu_vm.c.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 38 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
3 files changed, 42 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 4a11a2f4fa73..691f0a879c90 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -176,12 +176,9 @@ static int amdgpu_gem_object_open(struct drm_gem_object
*obj,
if (r)
return r;
- bo_va = amdgpu_vm_bo_find(vm, abo);
- if (!bo_va) {
- bo_va = amdgpu_vm_bo_add(adev, vm, abo);
- } else {
- ++bo_va->ref_count;
- }
+ if (!amdgpu_vm_bo_get(vm, abo))
+ amdgpu_vm_bo_add(adev, vm, abo);
+
amdgpu_bo_unreserve(abo);
return 0;
}
@@ -218,7 +215,7 @@ static void amdgpu_gem_object_close(struct drm_gem_object
*obj,
return;
}
bo_va = amdgpu_vm_bo_find(vm, bo);
- if (!bo_va || --bo_va->ref_count)
+ if (!bo_va)
goto out_unlock;
amdgpu_vm_bo_rmv(adev, bo_va);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b23cb463b106..9d60de6a6697 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1290,16 +1290,49 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm
*vm,
struct amdgpu_bo *bo)
{
struct amdgpu_vm_bo_base *base;
+ struct amdgpu_bo_va *bo_va = NULL;
for (base = bo->vm_bo; base; base = base->next) {
if (base->vm != vm)
continue;
- return container_of(base, struct amdgpu_bo_va, base);
+ bo_va = container_of(base, struct amdgpu_bo_va, base);
}
- return NULL;
+
+ if (bo_va && bo_va->ref_count <= 0)
+ return NULL;
+
+ return bo_va;
}
+/**
+ * amdgpu_vm_bo_get - find the bo_va for a specific vm & bo and increase
+ * the ref_count
+ *
+ * @vm: requested vm
+ * @bo: requested buffer object
+ *
+ * Find @bo inside the requested vm.
+ * Search inside the @bos vm list for the requested vm
+ * Returns the found bo_va with +1 ref_count or NULL if none is found
+ *
+ * Object has to be reserved!
+ *
+ * Returns:
+ * Found bo_va or NULL.
+ */
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo)
+{
+ struct amdgpu_bo_va *bo_va = amdgpu_vm_bo_find(vm, bo);
+
+ if (bo_va)
+ ++bo_va->ref_count;
+
+ return bo_va;
+}
+
+
/**
* amdgpu_vm_map_gart - Resolve gart mapping of addr
*
@@ -2704,6 +2737,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
if (bo && bo_va->is_xgmi)
amdgpu_xgmi_set_pstate(adev, AMDGPU_XGMI_PSTATE_MIN);
+ --bo_va->ref_count;
kfree(bo_va);
That here won't work, you are removing and freeing the bo_va even if the
refcount is not zero yet.
I suggest to have a matching amdgpu_vm_bo_put() function instead.
Regards,
Christian.
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 85fcfb8c5efd..6d936fb1b934 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -415,6 +415,8 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr);
struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo);
struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
[PATCH 1/1] drm/amdgpu: move bo_va ref counting to internal funcs
GEM code should not deal with struct amdgpu_bo_va's ref_count.
Move ref counting to amdgpu_vm.c.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 38 +++--
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
3 files changed, 42 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 4a11a2f4fa73..691f0a879c90 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -176,12 +176,9 @@ static int amdgpu_gem_object_open(struct drm_gem_object
*obj,
if (r)
return r;
- bo_va = amdgpu_vm_bo_find(vm, abo);
- if (!bo_va) {
- bo_va = amdgpu_vm_bo_add(adev, vm, abo);
- } else {
- ++bo_va->ref_count;
- }
+ if (!amdgpu_vm_bo_get(vm, abo))
+ amdgpu_vm_bo_add(adev, vm, abo);
+
amdgpu_bo_unreserve(abo);
return 0;
}
@@ -218,7 +215,7 @@ static void amdgpu_gem_object_close(struct drm_gem_object
*obj,
return;
}
bo_va = amdgpu_vm_bo_find(vm, bo);
- if (!bo_va || --bo_va->ref_count)
+ if (!bo_va)
goto out_unlock;
amdgpu_vm_bo_rmv(adev, bo_va);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b23cb463b106..9d60de6a6697 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1290,16 +1290,49 @@ struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm
*vm,
struct amdgpu_bo *bo)
{
struct amdgpu_vm_bo_base *base;
+ struct amdgpu_bo_va *bo_va = NULL;
for (base = bo->vm_bo; base; base = base->next) {
if (base->vm != vm)
continue;
- return container_of(base, struct amdgpu_bo_va, base);
+ bo_va = container_of(base, struct amdgpu_bo_va, base);
}
- return NULL;
+
+ if (bo_va && bo_va->ref_count <= 0)
+ return NULL;
+
+ return bo_va;
}
+/**
+ * amdgpu_vm_bo_get - find the bo_va for a specific vm & bo and increase
+ * the ref_count
+ *
+ * @vm: requested vm
+ * @bo: requested buffer object
+ *
+ * Find @bo inside the requested vm.
+ * Search inside the @bos vm list for the requested vm
+ * Returns the found bo_va with +1 ref_count or NULL if none is found
+ *
+ * Object has to be reserved!
+ *
+ * Returns:
+ * Found bo_va or NULL.
+ */
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo)
+{
+ struct amdgpu_bo_va *bo_va = amdgpu_vm_bo_find(vm, bo);
+
+ if (bo_va)
+ ++bo_va->ref_count;
+
+ return bo_va;
+}
+
+
/**
* amdgpu_vm_map_gart - Resolve gart mapping of addr
*
@@ -2704,6 +2737,7 @@ void amdgpu_vm_bo_rmv(struct amdgpu_device *adev,
if (bo && bo_va->is_xgmi)
amdgpu_xgmi_set_pstate(adev, AMDGPU_XGMI_PSTATE_MIN);
+ --bo_va->ref_count;
kfree(bo_va);
}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index 85fcfb8c5efd..6d936fb1b934 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -415,6 +415,8 @@ void amdgpu_vm_bo_invalidate(struct amdgpu_device *adev,
uint64_t amdgpu_vm_map_gart(const dma_addr_t *pages_addr, uint64_t addr);
struct amdgpu_bo_va *amdgpu_vm_bo_find(struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
+struct amdgpu_bo_va *amdgpu_vm_bo_get(struct amdgpu_vm *vm,
+ struct amdgpu_bo *bo);
struct amdgpu_bo_va *amdgpu_vm_bo_add(struct amdgpu_device *adev,
struct amdgpu_vm *vm,
struct amdgpu_bo *bo);
--
2.33.1
[PATCH] drm/amd/amdgpu: fixing read wrong pf2vf data in SRIOV
[Why]
This fixes 35709bd76d229a51b0c571a768b741650ec47828.
we should read pf2vf data based at mman.fw_vram_usage_va after gmc
sw_init. patch 35709bd76 breaks this logic.
[How]
calling amdgpu_virt_exchange_data in amdgpu_virt_init_data_exchange to
set the right base in the right sequence.
Signed-off-by: Jingwen Chen
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index 89ab0032..0b887a49b604 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
@@ -625,16 +625,12 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device
*adev)
adev->virt.fw_reserve.p_vf2pf = NULL;
adev->virt.vf2pf_update_interval_ms = 0;
- if (adev->bios != NULL) {
+ if (adev->mman.fw_vram_usage_va != NULL) {
adev->virt.vf2pf_update_interval_ms = 2000;
-
- adev->virt.fw_reserve.p_pf2vf =
- (struct amd_sriov_msg_pf2vf_info_header *)
- (adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
-
- amdgpu_virt_read_pf2vf_data(adev);
}
+ amdgpu_virt_exchange_data(adev);
+
if (adev->virt.vf2pf_update_interval_ms != 0) {
INIT_DELAYED_WORK(>virt.vf2pf_work,
amdgpu_virt_update_vf2pf_work_item);
schedule_delayed_work(&(adev->virt.vf2pf_work),
msecs_to_jiffies(adev->virt.vf2pf_update_interval_ms));
--
2.30.2
RE: [PATCH V2 2/2] drm/amdgpu: To eliminate the warning of no previous prototype for 'amdgpu_ras_block_match_default'
[AMD Official Use Only]
The subject can be simplified as "fix compile warning for
ras_block_match_default", with that fixed the series is:
Reviewed-by: Tao Zhou
> -Original Message-
> From: Chai, Thomas
> Sent: Thursday, January 13, 2022 6:32 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH V2 2/2] drm/amdgpu: To eliminate the warning of no previous
> prototype for 'amdgpu_ras_block_match_default'
>
> To eliminate the warning of no previous prototype for
> 'amdgpu_ras_block_match_default'.
>
> Fix compile warnings.
>
> Signed-off-by: yipechai
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> index 394a18e3c6af..7afeec4255bd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
> @@ -869,7 +869,8 @@ static int amdgpu_ras_enable_all_features(struct
> amdgpu_device *adev, }
> /* feature ctl end */
>
> -int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object*
> block_obj, enum amdgpu_ras_block block)
> +static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object
> *block_obj,
> + enum amdgpu_ras_block block)
> {
> if(!block_obj)
> return -EINVAL;
> --
> 2.25.1
[PATCH V2 2/2] drm/amdgpu: To eliminate the warning of no previous prototype for 'amdgpu_ras_block_match_default'
To eliminate the warning of no previous prototype
for 'amdgpu_ras_block_match_default'.
Fix compile warnings.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 394a18e3c6af..7afeec4255bd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -869,7 +869,8 @@ static int amdgpu_ras_enable_all_features(struct
amdgpu_device *adev,
}
/* feature ctl end */
-int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object* block_obj,
enum amdgpu_ras_block block)
+static int amdgpu_ras_block_match_default(struct amdgpu_ras_block_object
*block_obj,
+ enum amdgpu_ras_block block)
{
if(!block_obj)
return -EINVAL;
--
2.25.1
[PATCH V2 1/2] drm/amdgpu: Use ARRAY_SIZE to get array length
Use ARRAY_SIZE to get array length. Signed-off-by: yipechai --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 23f4290b2fde..394a18e3c6af 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -89,7 +89,8 @@ const char *get_ras_block_str(struct ras_common_if *ras_block) return ras_block_string[ras_block->block]; } -#define ras_block_str(_BLOCK_) (((_BLOCK_) < (sizeof(*ras_block_string)/sizeof(const char*))) ? ras_block_string[_BLOCK_] : "Out Of Range") +#define ras_block_str(_BLOCK_) \ + (((_BLOCK_) < ARRAY_SIZE(ras_block_string)) ? ras_block_string[_BLOCK_] : "Out Of Range") #define ras_err_str(i) (ras_error_string[ffs(i)]) -- 2.25.1
[Patch v2] drm/amdgpu: add vram check function for GMC
This will add vram check function for GMC, it will cover gmc v6/7/8/9/10
Signed-off-by: Xiaojian Du
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 46 +
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 6 +++-
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c | 6 +++-
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 +++-
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 -
7 files changed, 73 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 83f26bca7dac..96cabf3ed29e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -833,3 +833,49 @@ void amdgpu_gmc_get_reserved_allocation(struct
amdgpu_device *adev)
break;
}
}
+
+int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
+{
+ struct amdgpu_bo*vram_bo;
+ uint64_tvram_gpu;
+ void*vram_ptr;
+
+ int ret, size = 0x10;
+ uint8_t cptr[10];
+
+ ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ _bo,
+ _gpu,
+ _ptr);
+ if (ret)
+ return ret;
+
+ memset(vram_ptr, 0x86, size);
+ memset(cptr, 0x86, 10);
+
+ /**
+ * Check the start, the mid, and the end of the memory if the content of
+ * each byte is the pattern "0x86". If yes, we suppose the vram bo is
+ * workable.
+ *
+ * Note: If check the each byte of whole 1M bo, it will cost too many
+ * seconds, so here, we just pick up three parts for emulation.
+ */
+ ret = memcmp(vram_ptr, cptr, 10);
+ if (ret)
+ return ret;
+
+ ret = memcmp(vram_ptr + (size / 2), cptr, 10);
+ if (ret)
+ return ret;
+
+ ret = memcmp(vram_ptr + size - 10, cptr, 10);
+ if (ret)
+ return ret;
+
+ amdgpu_bo_free_kernel(_bo, _gpu,
+ _ptr);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 82ec665b366c..f06af61378ef 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -343,4 +343,5 @@ void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev);
uint64_t amdgpu_gmc_vram_mc2pa(struct amdgpu_device *adev, uint64_t mc_addr);
uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo);
uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo
*bo);
+int amdgpu_gmc_vram_checking(struct amdgpu_device *adev);
#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 3915ba837596..5e407c88c8d0 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -1048,6 +1048,10 @@ static int gmc_v10_0_hw_init(void *handle)
if (r)
return r;
+ r = amdgpu_gmc_vram_checking(adev);
+ if (r)
+ return r;
+
if (adev->umc.funcs && adev->umc.funcs->init_registers)
adev->umc.funcs->init_registers(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 0fe714f54cca..17770c1017ba 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -923,7 +923,11 @@ static int gmc_v6_0_hw_init(void *handle)
if (r)
return r;
- return r;
+ r = amdgpu_gmc_vram_checking(adev);
+ if (r)
+ return r;
+
+ return 0;
}
static int gmc_v6_0_hw_fini(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 0a50fdaced7e..fa43905ae61f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -1112,7 +1112,11 @@ static int gmc_v7_0_hw_init(void *handle)
if (r)
return r;
- return r;
+ r = amdgpu_gmc_vram_checking(adev);
+ if (r)
+ return r;
+
+ return 0;
}
static int gmc_v7_0_hw_fini(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 9a3fc0926903..6c94a9712a3a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -1241,7 +1241,11 @@ static int gmc_v8_0_hw_init(void *handle)
if (r)
return r;
- return r;
+ r = amdgpu_gmc_vram_checking(adev);
+ if (r)
+ return r;
+
+ return 0;
}
static int gmc_v8_0_hw_fini(void *handle)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index ce7d438eeabe..1ea18b4ff63f 100644
---
[RFC PATCH v2 3/3] drm: replace allow_fb_modifiers with fb_modifiers_not_supported
Since almost drivers support fb modifiers, allow_fb_modifiers is
replaced with fb_modifiers_not_supported and removed.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/drm_framebuffer.c| 6 +++---
drivers/gpu/drm/drm_ioctl.c | 2 +-
drivers/gpu/drm/drm_plane.c | 9 -
drivers/gpu/drm/selftests/test-drm_framebuffer.c | 1 -
include/drm/drm_mode_config.h| 16
5 files changed, 4 insertions(+), 30 deletions(-)
diff --git a/drivers/gpu/drm/drm_framebuffer.c
b/drivers/gpu/drm/drm_framebuffer.c
index 07f5abc875e9..4562a8b86579 100644
--- a/drivers/gpu/drm/drm_framebuffer.c
+++ b/drivers/gpu/drm/drm_framebuffer.c
@@ -309,7 +309,7 @@ drm_internal_framebuffer_create(struct drm_device *dev,
}
if (r->flags & DRM_MODE_FB_MODIFIERS &&
- !dev->mode_config.allow_fb_modifiers) {
+ dev->mode_config.fb_modifiers_not_supported) {
DRM_DEBUG_KMS("driver does not support fb modifiers\n");
return ERR_PTR(-EINVAL);
}
@@ -594,7 +594,7 @@ int drm_mode_getfb2_ioctl(struct drm_device *dev,
r->pixel_format = fb->format->format;
r->flags = 0;
- if (dev->mode_config.allow_fb_modifiers)
+ if (!dev->mode_config.fb_modifiers_not_supported)
r->flags |= DRM_MODE_FB_MODIFIERS;
for (i = 0; i < ARRAY_SIZE(r->handles); i++) {
@@ -607,7 +607,7 @@ int drm_mode_getfb2_ioctl(struct drm_device *dev,
for (i = 0; i < fb->format->num_planes; i++) {
r->pitches[i] = fb->pitches[i];
r->offsets[i] = fb->offsets[i];
- if (dev->mode_config.allow_fb_modifiers)
+ if (!dev->mode_config.fb_modifiers_not_supported)
r->modifier[i] = fb->modifier;
}
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 8b8744dcf691..51fcf1298023 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -297,7 +297,7 @@ static int drm_getcap(struct drm_device *dev, void *data,
struct drm_file *file_
req->value = 64;
break;
case DRM_CAP_ADDFB2_MODIFIERS:
- req->value = dev->mode_config.allow_fb_modifiers;
+ req->value = !dev->mode_config.fb_modifiers_not_supported;
break;
case DRM_CAP_CRTC_IN_VBLANK_EVENT:
req->value = 1;
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index 5aa7e241971e..89a3d044ab59 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -288,15 +288,6 @@ static int __drm_universal_plane_init(struct drm_device
*dev,
}
}
- /* autoset the cap and check for consistency across all planes */
- if (format_modifier_count) {
- drm_WARN_ON(dev, !config->allow_fb_modifiers &&
- !list_empty(>plane_list));
- config->allow_fb_modifiers = true;
- } else {
- drm_WARN_ON(dev, config->allow_fb_modifiers);
- }
-
plane->modifier_count = format_modifier_count;
plane->modifiers = kmalloc_array(format_modifier_count,
sizeof(format_modifiers[0]),
diff --git a/drivers/gpu/drm/selftests/test-drm_framebuffer.c
b/drivers/gpu/drm/selftests/test-drm_framebuffer.c
index 61b44d3a6a61..f6d66285c5fc 100644
--- a/drivers/gpu/drm/selftests/test-drm_framebuffer.c
+++ b/drivers/gpu/drm/selftests/test-drm_framebuffer.c
@@ -323,7 +323,6 @@ static struct drm_device mock_drm_device = {
.max_width = MAX_WIDTH,
.min_height = MIN_HEIGHT,
.max_height = MAX_HEIGHT,
- .allow_fb_modifiers = true,
.funcs = _config_funcs,
},
};
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index c56f298c55bd..6fd13d6510f1 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -904,22 +904,6 @@ struct drm_mode_config {
*/
bool async_page_flip;
- /**
-* @allow_fb_modifiers:
-*
-* Whether the driver supports fb modifiers in the ADDFB2.1 ioctl call.
-* Note that drivers should not set this directly, it is automatically
-* set in drm_universal_plane_init().
-*
-* IMPORTANT:
-*
-* If this is set the driver must fill out the full implicit modifier
-* information in their _mode_config_funcs.fb_create hook for legacy
-* userspace which does not set modifiers. Otherwise the GETFB2 ioctl is
-* broken for modifier aware userspace.
-*/
- bool allow_fb_modifiers;
-
/**
* @fb_modifiers_not_supported:
*
--
2.25.1
[RFC PATCH v2 2/3] drm: set fb_modifiers_not_supported flag in legacy drivers
Set fb_modifiers_not_supported flag in legacy drivers whose planes
support non-linear layouts but does not support modifiers, and replace
allow_fb_modifiers with fb_modifiers_not_supported.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 +++---
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c | 2 ++
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 ++
drivers/gpu/drm/nouveau/nouveau_display.c | 6 --
drivers/gpu/drm/radeon/radeon_display.c | 2 ++
7 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index dc50c05f23fc..cbaea9c6cfda 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -958,7 +958,7 @@ static int amdgpu_display_verify_sizes(struct
amdgpu_framebuffer *rfb)
int ret;
unsigned int i, block_width, block_height, block_size_log2;
- if (!rfb->base.dev->mode_config.allow_fb_modifiers)
+ if (rfb->base.dev->mode_config.fb_modifiers_not_supported)
return 0;
for (i = 0; i < format_info->num_planes; ++i) {
@@ -1145,7 +1145,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
*dev,
if (ret)
return ret;
- if (!dev->mode_config.allow_fb_modifiers) {
+ if (dev->mode_config.fb_modifiers_not_supported) {
drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,
"GFX9+ requires FB check based on format
modifier\n");
ret = check_tiling_flags_gfx6(rfb);
@@ -1153,7 +1153,7 @@ int amdgpu_display_framebuffer_init(struct drm_device
*dev,
return ret;
}
- if (dev->mode_config.allow_fb_modifiers &&
+ if (!dev->mode_config.fb_modifiers_not_supported &&
!(rfb->base.flags & DRM_MODE_FB_MODIFIERS)) {
ret = convert_tiling_flags_to_modifier(rfb);
if (ret) {
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index d1570a462a51..fb61c0814115 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2798,6 +2798,8 @@ static int dce_v10_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 18a7b3bd633b..17942a11366d 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2916,6 +2916,8 @@ static int dce_v11_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
index c7803dc2b2d5..2ec99ec8e1a3 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
@@ -2674,6 +2674,7 @@ static int dce_v6_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.max_height = 16384;
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index b200b9e722d9..8369336cec90 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -2699,6 +2699,8 @@ static int dce_v8_0_sw_init(void *handle)
adev_to_drm(adev)->mode_config.preferred_depth = 24;
adev_to_drm(adev)->mode_config.prefer_shadow = 1;
+ adev_to_drm(adev)->mode_config.fb_modifiers_not_supported = true;
+
adev_to_drm(adev)->mode_config.fb_base = adev->gmc.aper_base;
r = amdgpu_display_modeset_create_props(adev);
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c
b/drivers/gpu/drm/nouveau/nouveau_display.c
index 929de41c281f..1ecad7fa3e8a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -711,10 +711,12 @@ nouveau_display_create(struct drm_device *dev)
>disp);
if (ret == 0) {
[RFC PATCH v2 1/3] drm: add support modifiers for drivers whose planes only support linear layout
The LINEAR modifier is advertised as default if a driver doesn't specify
modifiers. However, there are legacy drivers such as radeon that do not
support modifiers but infer the actual layout of the underlying buffer.
Therefore, a new flag not_support_fb_modifires is introduced for these
legacy drivers. Allow_fb_modifiers will be replaced with this new flag.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/drm_plane.c | 15 ---
include/drm/drm_mode_config.h | 10 ++
include/drm/drm_plane.h | 3 +++
3 files changed, 25 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index deeec60a3315..5aa7e241971e 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -237,6 +237,10 @@ static int __drm_universal_plane_init(struct drm_device
*dev,
const char *name, va_list ap)
{
struct drm_mode_config *config = >mode_config;
+ const uint64_t default_modifiers[] = {
+ DRM_FORMAT_MOD_LINEAR,
+ DRM_FORMAT_MOD_INVALID
+ };
unsigned int format_modifier_count = 0;
int ret;
@@ -277,6 +281,11 @@ static int __drm_universal_plane_init(struct drm_device
*dev,
while (*temp_modifiers++ != DRM_FORMAT_MOD_INVALID)
format_modifier_count++;
+ } else {
+ if (!dev->mode_config.fb_modifiers_not_supported) {
+ format_modifiers = default_modifiers;
+ format_modifier_count = 1;
+ }
}
/* autoset the cap and check for consistency across all planes */
@@ -341,7 +350,7 @@ static int __drm_universal_plane_init(struct drm_device
*dev,
drm_object_attach_property(>base, config->prop_src_h, 0);
}
- if (config->allow_fb_modifiers)
+ if (format_modifier_count)
create_in_format_blob(dev, plane);
return 0;
@@ -368,8 +377,8 @@ static int __drm_universal_plane_init(struct drm_device
*dev,
* drm_universal_plane_init() to let the DRM managed resource infrastructure
* take care of cleanup and deallocation.
*
- * Drivers supporting modifiers must set @format_modifiers on all their planes,
- * even those that only support DRM_FORMAT_MOD_LINEAR.
+ * For drivers supporting modifiers, all planes will advertise
+ * DRM_FORMAT_MOD_LINEAR support, if @format_modifiers is not set.
*
* Returns:
* Zero on success, error code on failure.
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 48b7de80daf5..c56f298c55bd 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -920,6 +920,16 @@ struct drm_mode_config {
*/
bool allow_fb_modifiers;
+ /**
+* @fb_modifiers_not_supported:
+*
+* This flag is for legacy drivers such as radeon that do not support
+* modifiers but infer the actual layout of the underlying buffer.
+* Generally, each drivers must support modifiers, this flag should not
+* be set.
+*/
+ bool fb_modifiers_not_supported;
+
/**
* @normalize_zpos:
*
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index 0c1102dc4d88..cad641b1f797 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -803,6 +803,9 @@ void *__drmm_universal_plane_alloc(struct drm_device *dev,
*
* The @drm_plane_funcs.destroy hook must be NULL.
*
+ * For drivers supporting modifiers, all planes will advertise
+ * DRM_FORMAT_MOD_LINEAR support, if @format_modifiers is not set.
+ *
* Returns:
* Pointer to new plane, or ERR_PTR on failure.
*/
--
2.25.1
[RFC PATCH v2 0/3] Add support modifiers for drivers whose planes only support linear layout
Some drivers whose planes only support linear layout fb do not support format modifiers. These drivers should support modifiers, however the DRM core should handle this rather than open-coding in every driver. In this patch series, these drivers expose format modifiers based on the following suggestion[1]. On Thu, Nov 18, 2021 at 01:02:11PM +, Daniel Stone wrote: > I think the best way forward here is: > - add a new mode_config.cannot_support_modifiers flag, and enable > this in radeon (plus any other drivers in the same boat) > - change drm_universal_plane_init() to advertise the LINEAR modifier > when NULL is passed as the modifier list (including installing a > default .format_mod_supported hook) > - remove the mode_config.allow_fb_modifiers hook and always > advertise modifier support, unless > mode_config.cannot_support_modifiers is set [1] https://patchwork.kernel.org/project/linux-renesas-soc/patch/20190509054518.10781-1-e...@igel.co.jp/#24602575 v2: * rebase to the latest master branch (5.16.0+) + "drm/plane: Make format_mod_supported truly optional" patch [2] [2] https://patchwork.freedesktop.org/patch/467940/?series=98255=3 v1: https://www.spinics.net/lists/dri-devel/msg327352.html * The initial patch set Tomohito Esaki (3): drm: add support modifiers for drivers whose planes only support linear layout drm: set fb_modifiers_not_supported flag in legacy drivers drm: replace allow_fb_modifiers with fb_modifiers_not_supported drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 6 ++--- drivers/gpu/drm/amd/amdgpu/dce_v10_0.c| 2 ++ drivers/gpu/drm/amd/amdgpu/dce_v11_0.c| 2 ++ drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 1 + drivers/gpu/drm/amd/amdgpu/dce_v8_0.c | 2 ++ drivers/gpu/drm/drm_framebuffer.c | 6 ++--- drivers/gpu/drm/drm_ioctl.c | 2 +- drivers/gpu/drm/drm_plane.c | 22 +-- drivers/gpu/drm/nouveau/nouveau_display.c | 6 +++-- drivers/gpu/drm/radeon/radeon_display.c | 2 ++ .../gpu/drm/selftests/test-drm_framebuffer.c | 1 - include/drm/drm_mode_config.h | 18 +-- include/drm/drm_plane.h | 3 +++ 13 files changed, 40 insertions(+), 33 deletions(-) -- 2.25.1
[PATCH -next 2/2 v2] drm/amdgpu: clean up some inconsistent indenting
Eliminate the follow smatch warnings: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:3504 amdgpu_device_init() warn: inconsistent indenting drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1716 amdgpu_ras_error_status_query() warn: if statement not indented drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:1058 amdgpu_ras_error_inject() warn: inconsistent indenting Reported-by: Abaci Robot Signed-off-by: Yang Li --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c| 8 +--- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index 33388041c354..64d6c0af4c76 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -3499,7 +3499,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, mutex_init(>notifier_lock); mutex_init(>pm.stable_pstate_ctx_lock); -amdgpu_device_init_apu_flags(adev); + amdgpu_device_init_apu_flags(adev); r = amdgpu_device_check_arguments(adev); if (r) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index ff9bd5a844fe..6d84749698c8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -1055,8 +1055,10 @@ int amdgpu_ras_error_inject(struct amdgpu_device *adev, .address = info->address, .value = info->value, }; -int ret = -EINVAL; -struct amdgpu_ras_block_object* block_obj = amdgpu_ras_get_ras_block(adev, info->head.block, info->head.sub_block_index); + int ret = -EINVAL; + struct amdgpu_ras_block_object *block_obj = amdgpu_ras_get_ras_block(adev, + info->head.block, + info->head.sub_block_index); if (!obj) return -EINVAL; @@ -1714,7 +1716,7 @@ static void amdgpu_ras_error_status_query(struct amdgpu_device *adev, } if (block_obj->hw_ops->query_ras_error_status) - block_obj->hw_ops->query_ras_error_status(adev); + block_obj->hw_ops->query_ras_error_status(adev); } -- 2.20.1.7.g153144c
[PATCH -next 1/2 v2] drm/amdgpu: remove unneeded semicolon
Eliminate the following coccicheck warning:
./drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2725:16-17: Unneeded semicolon
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index d4d9b9ea8bbd..ff9bd5a844fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2722,7 +2722,7 @@ struct amdgpu_ras* amdgpu_ras_get_context(struct
amdgpu_device *adev)
int amdgpu_ras_set_context(struct amdgpu_device *adev, struct amdgpu_ras*
ras_con)
{
if (!adev)
- return -EINVAL;;
+ return -EINVAL;
adev->psp.ras_context.ras = ras_con;
return 0;
--
2.20.1.7.g153144c
Re: [PATCH 2/2] drm/amdgpu: add vram check function for GMC
On Thu, Jan 13, 2022 at 03:45:26PM +0800, Du, Xiaojian wrote:
> This will add vram check function for GMC, it will cover gmc v8/9/10
>
> Signed-off-by: Xiaojian Du
> Reviewed-by: Huang Rui
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 42 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 1 +
> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 4 +++
> drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 6 +++-
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 8 -
> 5 files changed, 59 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 83f26bca7dac..dbc0de89d7e4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -833,3 +833,45 @@ void amdgpu_gmc_get_reserved_allocation(struct
> amdgpu_device *adev)
> break;
> }
> }
> +
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev)
> +{
> + int ret, size = 0x10;
> + uint8_t cptr[10];
> +
> + ret = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
> + AMDGPU_GEM_DOMAIN_VRAM,
> + >vram_bo,
> + >vram_gpu,
> + >vram_ptr);
Since we only use vram_bo/vram_gpu/vram_ptr only one time in this function,
we won't need add them into global adev structure.
We can define them as local variables in this function, after finish the
vram verification, the buffer and local variables will be freed as well.
Thanks,
Ray
> + if (ret)
> + return ret;
> +
> + memset(adev->vram_ptr, 0x86, size);
> + memset(cptr, 0x86, 10);
> +
> + /**
> + * Check the start, the mid, and the end of the memory if the content of
> + * each byte is the pattern "0x86". If yes, we suppose the vram bo is
> + * workable.
> + *
> + * Note: If check the each byte of whole 1M bo, it will cost too many
> + * seconds, so here, we just pick up three parts for emulation.
> + */
> + ret = memcmp(adev->vram_ptr, cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(adev->vram_ptr + (size / 2), cptr, 10);
> + if (ret)
> + return ret;
> +
> + ret = memcmp(adev->vram_ptr + size - 10, cptr, 10);
> + if (ret)
> + return ret;
> +
> + amdgpu_bo_free_kernel(>vram_bo, >vram_gpu,
> + >vram_ptr);
> +
> + return 0;
> +}
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> index 82ec665b366c..f06af61378ef 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
> @@ -343,4 +343,5 @@ void amdgpu_gmc_init_pdb0(struct amdgpu_device *adev);
> uint64_t amdgpu_gmc_vram_mc2pa(struct amdgpu_device *adev, uint64_t mc_addr);
> uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo
> *bo);
> +int amdgpu_gmc_vram_checking(struct amdgpu_device *adev);
> #endif
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index 3915ba837596..5e407c88c8d0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -1048,6 +1048,10 @@ static int gmc_v10_0_hw_init(void *handle)
> if (r)
> return r;
>
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> if (adev->umc.funcs && adev->umc.funcs->init_registers)
> adev->umc.funcs->init_registers(adev);
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> index 9a3fc0926903..6c94a9712a3a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
> @@ -1241,7 +1241,11 @@ static int gmc_v8_0_hw_init(void *handle)
> if (r)
> return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
> }
>
> static int gmc_v8_0_hw_fini(void *handle)
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index ce7d438eeabe..1ea18b4ff63f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -1771,8 +1771,14 @@ static int gmc_v9_0_hw_init(void *handle)
> adev->umc.funcs->init_registers(adev);
>
> r = gmc_v9_0_gart_enable(adev);
> + if (r)
> + return r;
>
> - return r;
> + r = amdgpu_gmc_vram_checking(adev);
> + if (r)
> + return r;
> +
> + return 0;
> }
>
> /**
> --
> 2.25.1
>
