[PATCH] drm/amd/pm: reverse mclk and fclk clocks levels for renoir

2023-05-22 Thread Tim Huang
This patch reverses the DPM clocks levels output of pp_dpm_mclk
and pp_dpm_fclk for renoir.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels are
given the reversed orders by PMFW. Like the memory DPM clocks
that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
index 5cdc07165480..8a8ba25c9ad7 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
@@ -494,7 +494,7 @@ static int renoir_set_fine_grain_gfx_freq_parameters(struct 
smu_context *smu)
 static int renoir_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf)
 {
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;
SmuMetrics_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
@@ -594,7 +594,8 @@ static int renoir_print_clk_levels(struct smu_context *smu,
case SMU_VCLK:
case SMU_DCLK:
for (i = 0; i < count; i++) {
-   ret = renoir_get_dpm_clk_limited(smu, clk_type, i, 
);
+   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? 
(count - i - 1) : i;
+   ret = renoir_get_dpm_clk_limited(smu, clk_type, idx, 
);
if (ret)
return ret;
if (!value)
-- 
2.34.1



RE: [PATCH] drm/amdgpu: add the accelerator pcie class

2023-05-22 Thread Zhang, Morris
[AMD Official Use Only - General]

Hi Bjorn,

Can we merge the below change through amdgpu tree ?  Thanks!

--Brs,
Morris Zhang
MLSE Linux  ML SRDC
Ext. 25147

> -Original Message-
> From: amd-gfx  On Behalf Of Shiwu
> Zhang
> Sent: Tuesday, May 23, 2023 12:03 PM
> To: amd-gfx@lists.freedesktop.org; linux-...@vger.kernel.org;
> bhelg...@google.com
> Subject: [PATCH] drm/amdgpu: add the accelerator pcie class
>
> v2: add the base class id for accelerator (lijo)
>
> Signed-off-by: Shiwu Zhang 
> Acked-by: Lijo Lazar 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +
>  include/linux/pci_ids.h | 3 +++
>  2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 3d91e123f9bd..5d652e6f0b1e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -2042,6 +2042,11 @@ static const struct pci_device_id pciidlist[] = {
> .class_mask = 0xff,
> .driver_data = CHIP_IP_DISCOVERY },
>
> + { PCI_DEVICE(0x1002, PCI_ANY_ID),
> +   .class = PCI_CLASS_ACCELERATOR_PROCESSING << 8,
> +   .class_mask = 0xff,
> +   .driver_data = CHIP_IP_DISCOVERY },
> +
>   {0, 0, 0}
>  };
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index
> b362d90eb9b0..4918ff26a987 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -151,6 +151,9 @@
>  #define PCI_CLASS_SP_DPIO0x1100
>  #define PCI_CLASS_SP_OTHER   0x1180
>
> +#define PCI_BASE_CLASS_ACCELERATOR   0x12
> +#define PCI_CLASS_ACCELERATOR_PROCESSING 0x1200
> +
>  #define PCI_CLASS_OTHERS 0xff
>
>  /* Vendors and devices.  Sort key: vendor first, device next. */
> --
> 2.17.1



[PATCH] drm/amdgpu: add the accelerator pcie class

2023-05-22 Thread Shiwu Zhang
v2: add the base class id for accelerator (lijo)

Signed-off-by: Shiwu Zhang 
Acked-by: Lijo Lazar 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 5 +
 include/linux/pci_ids.h | 3 +++
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 3d91e123f9bd..5d652e6f0b1e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -2042,6 +2042,11 @@ static const struct pci_device_id pciidlist[] = {
  .class_mask = 0xff,
  .driver_data = CHIP_IP_DISCOVERY },
 
+   { PCI_DEVICE(0x1002, PCI_ANY_ID),
+ .class = PCI_CLASS_ACCELERATOR_PROCESSING << 8,
+ .class_mask = 0xff,
+ .driver_data = CHIP_IP_DISCOVERY },
+
{0, 0, 0}
 };
 
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index b362d90eb9b0..4918ff26a987 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -151,6 +151,9 @@
 #define PCI_CLASS_SP_DPIO  0x1100
 #define PCI_CLASS_SP_OTHER 0x1180
 
+#define PCI_BASE_CLASS_ACCELERATOR 0x12
+#define PCI_CLASS_ACCELERATOR_PROCESSING   0x1200
+
 #define PCI_CLASS_OTHERS   0xff
 
 /* Vendors and devices.  Sort key: vendor first, device next. */
-- 
2.17.1



Re: [PATCH v4 0/9] drm: fdinfo memory stats

2023-05-22 Thread Dave Airlie
On Sun, 21 May 2023 at 10:03, Dmitry Baryshkov
 wrote:
>
> On 15/05/2023 17:30, Rob Clark wrote:
> > From: Rob Clark 
> >
> > Similar motivation to other similar recent attempt[1].  But with an
> > attempt to have some shared code for this.  As well as documentation.
> >
> > It is probably a bit UMA-centric, I guess devices with VRAM might want
> > some placement stats as well.  But this seems like a reasonable start.
> >
> > Basic gputop support: https://patchwork.freedesktop.org/series/116236/
> > And already nvtop support: https://github.com/Syllo/nvtop/pull/204
> >
> > I've combined the separate series to add comm/cmdline override onto
> > the end of this, simply out of convenience (they would otherwise
> > conflict in a bunch of places).
> >
> > v2: Extend things to allow for multiple regions other than just system
> >  "memory", make drm_show_memory_stats() a helper so that, drivers
> >  can use it or not based on their needs (but in either case, re-
> >  use drm_print_memory_stats()
> > v3: Docs fixes
> > v4: use u64 for drm_memory_stats, small docs update and collected
> >  Tvrtko's a-b
> >
> > [1] https://patchwork.freedesktop.org/series/112397/
> >
> > Rob Clark (9):
> >drm/docs: Fix usage stats typos
> >drm: Add common fdinfo helper
> >drm/msm: Switch to fdinfo helper
> >drm/amdgpu: Switch to fdinfo helper
> >drm: Add fdinfo memory stats
> >drm/msm: Add memory stats to fdinfo
> >drm/doc: Relax fdinfo string constraints
> >drm/fdinfo: Add comm/cmdline override fields
> >drm/msm: Wire up comm/cmdline override for fdinfo
> >
> >   Documentation/gpu/drm-usage-stats.rst  | 101 ++
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|   3 +-
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c |  16 +--
> >   drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h |   2 +-
> >   drivers/gpu/drm/drm_file.c | 147 +
> >   drivers/gpu/drm/msm/adreno/adreno_gpu.c|  24 +++-
> >   drivers/gpu/drm/msm/msm_drv.c  |  15 ++-
> >   drivers/gpu/drm/msm/msm_gem.c  |  15 +++
> >   drivers/gpu/drm/msm/msm_gpu.c  |   2 -
> >   drivers/gpu/drm/msm/msm_gpu.h  |  10 ++
> >   include/drm/drm_drv.h  |   7 +
> >   include/drm/drm_file.h |  51 +++
> >   include/drm/drm_gem.h  |  32 +
> >   13 files changed, 378 insertions(+), 47 deletions(-)
>
> What is the expected merge plan for this series? msm-next? drm-misc?

I'm fine with this going via drm-misc,

Acked-by: Dave Airlie  if that is the plan.

Dave.


Re: [PATCH] drm/radeon: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Kees Cook
On Mon, 22 May 2023 15:50:32 +, Azeem Shaikh wrote:
> strlcpy() reads the entire source buffer first.
> This read may exceed the destination size limit.
> This is both inefficient and can lead to linear read
> overflows if a source string is not NUL-terminated [1].
> In an effort to remove strlcpy() completely [2], replace
> strlcpy() here with strscpy().
> No return values were used, so direct replacement is safe.
> 
> [...]

Applied to for-next/hardening, thanks!

[1/1] drm/radeon: Replace all non-returning strlcpy with strscpy
  https://git.kernel.org/kees/c/76ea3f6ef93f

-- 
Kees Cook



Re: [PATCH] drm/amd/pm: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Kees Cook
On Mon, 22 May 2023 15:52:45 +, Azeem Shaikh wrote:
> strlcpy() reads the entire source buffer first.
> This read may exceed the destination size limit.
> This is both inefficient and can lead to linear read
> overflows if a source string is not NUL-terminated [1].
> In an effort to remove strlcpy() completely [2], replace
> strlcpy() here with strscpy().
> No return values were used, so direct replacement is safe.
> 
> [...]

Applied to for-next/hardening, thanks!

[1/1] drm/amd/pm: Replace all non-returning strlcpy with strscpy
  https://git.kernel.org/kees/c/0f53b61b1ca0

-- 
Kees Cook



RE: [PATCH] drm/amd/pm: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Deucher, Alexander
[Public]

> -Original Message-
> From: Kees Cook 
> Sent: Monday, May 22, 2023 4:16 PM
> To: Azeem Shaikh 
> Cc: Quan, Evan ; linux-harden...@vger.kernel.org;
> amd-gfx@lists.freedesktop.org; linux-ker...@vger.kernel.org; Deucher,
> Alexander ; Koenig, Christian
> ; Pan, Xinhui ; David
> Airlie ; Daniel Vetter ; dri-
> de...@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amd/pm: Replace all non-returning strlcpy with
> strscpy
> 
> On Mon, May 22, 2023 at 03:52:45PM +, Azeem Shaikh wrote:
> > strlcpy() reads the entire source buffer first.
> > This read may exceed the destination size limit.
> > This is both inefficient and can lead to linear read overflows if a
> > source string is not NUL-terminated [1].
> > In an effort to remove strlcpy() completely [2], replace
> > strlcpy() here with strscpy().
> > No return values were used, so direct replacement is safe.
> >
> > [1]
> >
> https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
> > [2] https://github.com/KSPP/linux/issues/89
> >
> > Signed-off-by: Azeem Shaikh 
> 
> Reviewed-by: Kees Cook 
> 

Acked-by: Alex Deucher 

Ack to take this through whatever tree makes sense if you are trying to batch 
all of these up.  Otherwise, I can pick them up.

Alex


RE: [PATCH] drm/radeon: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Deucher, Alexander
[Public]

> -Original Message-
> From: Kees Cook 
> Sent: Monday, May 22, 2023 4:15 PM
> To: Azeem Shaikh 
> Cc: Deucher, Alexander ; Koenig, Christian
> ; Pan, Xinhui ; linux-
> harden...@vger.kernel.org; amd-gfx@lists.freedesktop.org; linux-
> ker...@vger.kernel.org; David Airlie ; Daniel Vetter
> ; dri-de...@lists.freedesktop.org
> Subject: Re: [PATCH] drm/radeon: Replace all non-returning strlcpy with
> strscpy
> 
> On Mon, May 22, 2023 at 03:50:32PM +, Azeem Shaikh wrote:
> > strlcpy() reads the entire source buffer first.
> > This read may exceed the destination size limit.
> > This is both inefficient and can lead to linear read overflows if a
> > source string is not NUL-terminated [1].
> > In an effort to remove strlcpy() completely [2], replace
> > strlcpy() here with strscpy().
> > No return values were used, so direct replacement is safe.
> >
> > [1]
> >
> https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
> > [2] https://github.com/KSPP/linux/issues/89
> >
> > Signed-off-by: Azeem Shaikh 
> 
> Reviewed-by: Kees Cook 
> 

Acked-by: Alex Deucher 

Ack to take this through whatever tree makes sense if you are trying to batch 
all of these up.  Otherwise, I can pick them up.

Alex


Re: [PATCH] drm/radeon: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Kees Cook
On Mon, May 22, 2023 at 03:50:32PM +, Azeem Shaikh wrote:
> strlcpy() reads the entire source buffer first.
> This read may exceed the destination size limit.
> This is both inefficient and can lead to linear read
> overflows if a source string is not NUL-terminated [1].
> In an effort to remove strlcpy() completely [2], replace
> strlcpy() here with strscpy().
> No return values were used, so direct replacement is safe.
> 
> [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
> [2] https://github.com/KSPP/linux/issues/89
> 
> Signed-off-by: Azeem Shaikh 

Reviewed-by: Kees Cook 

-- 
Kees Cook


Re: [PATCH] drm/amd/pm: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Kees Cook
On Mon, May 22, 2023 at 03:52:45PM +, Azeem Shaikh wrote:
> strlcpy() reads the entire source buffer first.
> This read may exceed the destination size limit.
> This is both inefficient and can lead to linear read
> overflows if a source string is not NUL-terminated [1].
> In an effort to remove strlcpy() completely [2], replace
> strlcpy() here with strscpy().
> No return values were used, so direct replacement is safe.
> 
> [1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
> [2] https://github.com/KSPP/linux/issues/89
> 
> Signed-off-by: Azeem Shaikh 

Reviewed-by: Kees Cook 

-- 
Kees Cook


Re: [PATCH 1/2] amdgpu: validate drm_amdgpu_gem_va addrs for all ops

2023-05-22 Thread Christian König

Am 21.05.23 um 20:49 schrieb Chia-I Wu:

On Thu, May 18, 2023 at 1:12 PM Alex Deucher  wrote:

On Wed, May 17, 2023 at 5:27 PM Chia-I Wu  wrote:

On Tue, May 9, 2023 at 11:33 AM Chia-I Wu  wrote:

Extend the address and size validations to AMDGPU_VA_OP_UNMAP and
AMDGPU_VA_OP_CLEAR by moving the validations to amdgpu_gem_va_ioctl.

Internal users of amdgpu_vm_bo_map are no longer validated but they
should be fine.

Userspace (radeonsi and radv) seems fine as well.

Does this series make sense?

I think so, I haven't had a chance to go through this too closely yet,
but amdgpu_vm_bo_map() is used by ROCm as well so we'd need to make
sure that removing the checks in patch 1 wouldn't affect that path as
well.  The changes in patch 2 look good.  Also, these patches are
missing your SOB.

Indeed.  kfd_ioctl_alloc_memory_of_gpu, for example, does not validate
va.  I need to keep the validation in amdgpu_vm_bo_map for it at
least.  I guess it is more ideal for kfd_ioctl_alloc_memory_of_gpu to
validate, but I am not familiar with amdkfd..

I can keep the existing validations, and duplicate them in
amdgpu_gem_va_ioctl to cover AMDGPU_VA_OP_UNMAP/AMDGPU_VA_OP_CLEAR.


The key point is that unmap and clear don't need those validations.

It's perfectly valid to request unmap of an unaligned mapping, it will 
just fail because we can't find that mapping.


Regards,
Christian.




Thanks,

Alex


Alex




Re: [Freedreno] [PATCH v3 11/12] drm/fbdev-generic: Implement dedicated fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann

Hi

Am 22.05.23 um 15:20 schrieb Dmitry Baryshkov:

On Mon, 22 May 2023 at 15:22, Thomas Zimmermann  wrote:


Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. Fbdev-generic was the only caller of the
DRM helpers, so remove them from the helper module.

v2:
 * use FB_SYS_HELPERS_DEFERRED option

Signed-off-by: Thomas Zimmermann 
---
  drivers/gpu/drm/Kconfig |   6 +-
  drivers/gpu/drm/drm_fb_helper.c | 107 
  drivers/gpu/drm/drm_fbdev_generic.c |  47 ++--
  include/drm/drm_fb_helper.h |  41 ---
  4 files changed, 43 insertions(+), 158 deletions(-)


Looking at this patch makes me wonder if we should have implemented
fb_dirty for the MSM driver. We have drm_framebuffer_funcs::dirty()
implemented (by wrapping the drm_atomic_helper_dirtyfb()).


I think so. You'd need something similar to the generic fbdev emulation. 
But it's for a separate patchset. Apparently no one has complained so far.


Best regards
Thomas





diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 77fb10ddd8a2..92a782827b7b 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -95,6 +95,7 @@ config DRM_KUNIT_TEST
  config DRM_KMS_HELPER
 tristate
 depends on DRM
+   select FB_SYS_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
 help
   CRTC helpers for KMS drivers.

@@ -135,11 +136,6 @@ config DRM_FBDEV_EMULATION
 select FB_CFB_FILLRECT
 select FB_CFB_COPYAREA
 select FB_CFB_IMAGEBLIT
-   select FB_DEFERRED_IO
-   select FB_SYS_FOPS
-   select FB_SYS_FILLRECT
-   select FB_SYS_COPYAREA
-   select FB_SYS_IMAGEBLIT
 select FRAMEBUFFER_CONSOLE if !EXPERT
 select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
 default y
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 8724e08c518b..ba0a808f14ee 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -729,113 +729,6 @@ void drm_fb_helper_deferred_io(struct fb_info *info, 
struct list_head *pagerefli
  }
  EXPORT_SYMBOL(drm_fb_helper_deferred_io);

-/**
- * drm_fb_helper_sys_read - Implements struct _ops.fb_read for system memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to read from framebuffer memory
- * @count: number of bytes to read from framebuffer memory
- * @ppos: read offset within framebuffer memory
- *
- * Returns:
- * The number of bytes read on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_sys_read(struct fb_info *info, char __user *buf,
-  size_t count, loff_t *ppos)
-{
-   return fb_sys_read(info, buf, count, ppos);
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_read);
-
-/**
- * drm_fb_helper_sys_write - Implements struct _ops.fb_write for system 
memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to write to framebuffer memory
- * @count: number of bytes to write to framebuffer memory
- * @ppos: write offset within framebuffer memory
- *
- * Returns:
- * The number of bytes written on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_sys_write(struct fb_info *info, const char __user *buf,
-   size_t count, loff_t *ppos)
-{
-   struct drm_fb_helper *helper = info->par;
-   loff_t pos = *ppos;
-   ssize_t ret;
-   struct drm_rect damage_area;
-
-   ret = fb_sys_write(info, buf, count, ppos);
-   if (ret <= 0)
-   return ret;
-
-   if (helper->funcs->fb_dirty) {
-   drm_fb_helper_memory_range_to_clip(info, pos, ret, 
_area);
-   drm_fb_helper_damage(helper, damage_area.x1, damage_area.y1,
-drm_rect_width(_area),
-drm_rect_height(_area));
-   }
-
-   return ret;
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_write);
-
-/**
- * drm_fb_helper_sys_fillrect - wrapper around sys_fillrect
- * @info: fbdev registered by the helper
- * @rect: info about rectangle to fill
- *
- * A wrapper around sys_fillrect implemented by fbdev core
- */
-void drm_fb_helper_sys_fillrect(struct fb_info *info,
-   const struct fb_fillrect *rect)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   sys_fillrect(info, rect);
-
-   if (helper->funcs->fb_dirty)
-   drm_fb_helper_damage(helper, rect->dx, rect->dy, rect->width, 
rect->height);
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_fillrect);
-
-/**
- * drm_fb_helper_sys_copyarea - wrapper around sys_copyarea
- * @info: fbdev registered by the helper
- * @area: info about area to copy
- *
- * A wrapper around sys_copyarea implemented by fbdev core
- */
-void drm_fb_helper_sys_copyarea(struct fb_info *info,
-   const struct fb_copyarea *area)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   sys_copyarea(info, 

[linux-next:master] BUILD SUCCESS WITH WARNING 9f258af06b6268be8e960f63c3f66e88bdbbbdb0

2023-05-22 Thread kernel test robot
tree/branch: INFO setup_repo_specs: 
/db/releases/20230522162832/lkp-src/repo/*/linux-next
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 9f258af06b6268be8e960f63c3f66e88bdbbbdb0  Add linux-next specific 
files for 20230522

Warning reports:

https://lore.kernel.org/oe-kbuild-all/202305132244.dwzbucud-...@intel.com

Warning: (recently discovered and may have been fixed)

drivers/base/regmap/regcache-maple.c:113:23: warning: 'lower_index' is used 
uninitialized [-Wuninitialized]
drivers/base/regmap/regcache-maple.c:113:36: warning: 'lower_last' is used 
uninitialized [-Wuninitialized]
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6396:21: warning: 
variable 'count' set but not used [-Wunused-but-set-variable]

Unverified Warning (likely false positive, please contact us if interested):

arch/arm64/kvm/mmu.c:147:3-9: preceding lock on line 140
fs/xfs/scrub/fscounters.c:459 xchk_fscounters() warn: ignoring unreachable code.
kernel/events/uprobes.c:478 uprobe_write_opcode() warn: passing zero to 
'PTR_ERR'
kernel/watchdog.c:40:19: sparse: sparse: symbol 
'watchdog_hardlockup_user_enabled' was not declared. Should it be static?
kernel/watchdog.c:41:19: sparse: sparse: symbol 
'watchdog_softlockup_user_enabled' was not declared. Should it be static?

Warning ids grouped by kconfigs:

gcc_recent_errors
|-- alpha-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arc-allyesconfig
|   |-- 
drivers-base-regmap-regcache-maple.c:warning:lower_index-is-used-uninitialized
|   |-- 
drivers-base-regmap-regcache-maple.c:warning:lower_last-is-used-uninitialized
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arc-buildonly-randconfig-r001-20230522
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arm-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arm-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arm-randconfig-r036-20230521
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arm64-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- arm64-randconfig-c041-20230521
|   `-- arch-arm64-kvm-mmu.c:preceding-lock-on-line
|-- arm64-randconfig-s053-20230521
|   `-- mm-kfence-core.c:sparse:sparse:cast-to-restricted-__le64
|-- i386-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- i386-randconfig-m021
|   `-- 
kernel-events-uprobes.c-uprobe_write_opcode()-warn:passing-zero-to-PTR_ERR
|-- ia64-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- ia64-randconfig-m041-20230521
|   `-- 
fs-xfs-scrub-fscounters.c-xchk_fscounters()-warn:ignoring-unreachable-code.
|-- loongarch-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- loongarch-defconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- loongarch-randconfig-r033-20230522
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- mips-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- mips-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- powerpc-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- riscv-allmodconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- riscv-randconfig-r042-20230521
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- s390-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- s390-randconfig-s042-20230521
|   `-- mm-kfence-core.c:sparse:sparse:cast-to-restricted-__le64
|-- sparc-allyesconfig
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm-amdgpu_dm.c:warning:variable-count-set-but-not-used
|-- sparc-randconfig-s052-20230521
|   |-- 
kernel-watchdog.c:sparse:sparse:symbol-watchdog_hardlockup_user_enabled-was-not-declared.-Should-it-be-static
|   `-- 
kernel-watchdog.c:sparse:sparse:symbol-watchdog_softlockup_user_enabled-was-not-declared.-Should-it-be-static
|-- sparc64-randconfig-r016-20230521
|   `-- 
drivers-gpu-drm-amd-amdgpu-..-display-amdgpu_dm

[PATCH] drm/amd/pm: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Azeem Shaikh
strlcpy() reads the entire source buffer first.
This read may exceed the destination size limit.
This is both inefficient and can lead to linear read
overflows if a source string is not NUL-terminated [1].
In an effort to remove strlcpy() completely [2], replace
strlcpy() here with strscpy().
No return values were used, so direct replacement is safe.

[1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
[2] https://github.com/KSPP/linux/issues/89

Signed-off-by: Azeem Shaikh 
---
 drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c 
b/drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c
index d3fe149d8476..81fb4e5dd804 100644
--- a/drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c
+++ b/drivers/gpu/drm/amd/pm/legacy-dpm/legacy_dpm.c
@@ -794,7 +794,7 @@ void amdgpu_add_thermal_controller(struct amdgpu_device 
*adev)
struct i2c_board_info info = { };
const char *name = 
pp_lib_thermal_controller_names[controller->ucType];
info.addr = controller->ucI2cAddress >> 1;
-   strlcpy(info.type, name, sizeof(info.type));
+   strscpy(info.type, name, sizeof(info.type));

i2c_new_client_device(>pm.i2c_bus->adapter, );
}
} else {



[PATCH] drm/radeon: Replace all non-returning strlcpy with strscpy

2023-05-22 Thread Azeem Shaikh
strlcpy() reads the entire source buffer first.
This read may exceed the destination size limit.
This is both inefficient and can lead to linear read
overflows if a source string is not NUL-terminated [1].
In an effort to remove strlcpy() completely [2], replace
strlcpy() here with strscpy().
No return values were used, so direct replacement is safe.

[1] https://www.kernel.org/doc/html/latest/process/deprecated.html#strlcpy
[2] https://github.com/KSPP/linux/issues/89

Signed-off-by: Azeem Shaikh 
---
 drivers/gpu/drm/amd/amdgpu/atom.c|2 +-
 drivers/gpu/drm/radeon/radeon_atombios.c |4 ++--
 drivers/gpu/drm/radeon/radeon_combios.c  |4 ++--
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atom.c 
b/drivers/gpu/drm/amd/amdgpu/atom.c
index 1c5d9388ad0b..5f610e9a5f0f 100644
--- a/drivers/gpu/drm/amd/amdgpu/atom.c
+++ b/drivers/gpu/drm/amd/amdgpu/atom.c
@@ -1509,7 +1509,7 @@ struct atom_context *amdgpu_atom_parse(struct card_info 
*card, void *bios)
str = CSTR(idx);
if (*str != '\0') {
pr_info("ATOM BIOS: %s\n", str);
-   strlcpy(ctx->vbios_version, str, sizeof(ctx->vbios_version));
+   strscpy(ctx->vbios_version, str, sizeof(ctx->vbios_version));
}
 
atom_rom_header = (struct _ATOM_ROM_HEADER *)CSTR(base);
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c 
b/drivers/gpu/drm/radeon/radeon_atombios.c
index 4ad5a328d920..bf3c411a55c5 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -2105,7 +2105,7 @@ static int radeon_atombios_parse_power_table_1_3(struct 
radeon_device *rdev)
const char *name = 
thermal_controller_names[power_info->info.

ucOverdriveThermalController];
info.addr = 
power_info->info.ucOverdriveControllerAddress >> 1;
-   strlcpy(info.type, name, sizeof(info.type));
+   strscpy(info.type, name, sizeof(info.type));
i2c_new_client_device(>pm.i2c_bus->adapter, 
);
}
}
@@ -2355,7 +2355,7 @@ static void 
radeon_atombios_add_pplib_thermal_controller(struct radeon_device *r
struct i2c_board_info info = { };
const char *name = 
pp_lib_thermal_controller_names[controller->ucType];
info.addr = controller->ucI2cAddress >> 1;
-   strlcpy(info.type, name, sizeof(info.type));
+   strscpy(info.type, name, sizeof(info.type));

i2c_new_client_device(>pm.i2c_bus->adapter, );
}
} else {
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c 
b/drivers/gpu/drm/radeon/radeon_combios.c
index 783a6b8802d5..795c3667f6d6 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -2702,7 +2702,7 @@ void radeon_combios_get_power_modes(struct radeon_device 
*rdev)
struct i2c_board_info info = { };
const char *name = 
thermal_controller_names[thermal_controller];
info.addr = i2c_addr >> 1;
-   strlcpy(info.type, name, sizeof(info.type));
+   strscpy(info.type, name, sizeof(info.type));

i2c_new_client_device(>pm.i2c_bus->adapter, );
}
}
@@ -2719,7 +2719,7 @@ void radeon_combios_get_power_modes(struct radeon_device 
*rdev)
struct i2c_board_info info = { };
const char *name = "f75375";
info.addr = 0x28;
-   strlcpy(info.type, name, sizeof(info.type));
+   strscpy(info.type, name, sizeof(info.type));

i2c_new_client_device(>pm.i2c_bus->adapter, );
DRM_INFO("Possible %s thermal controller at 
0x%02x\n",
 name, info.addr);



Re: [PATCH v2] drm/amd/amdgpu: Fix assingment in if condition in amdgpu_irq.c

2023-05-22 Thread Alex Deucher
On Mon, May 22, 2023 at 11:19 AM Alex Deucher  wrote:
>
> On Mon, May 8, 2023 at 6:48 AM Srinivasan Shanmugam
>  wrote:
> >
> > Assignments in if condition are less readable and error-prone.
> >
> > Fixes below error & warnings reported by checkpatch"
> >
> > ERROR: do not use assignment in if condition
> > +   } else if ((src = adev->irq.client[client_id].sources[src_id])) {
> >
> > WARNING: braces {} are not necessary for any arm of this statement
> > WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
> >
> > Cc: Christian König 
> > Cc: Alex Deucher 
> > Signed-off-by: Srinivasan Shanmugam 
>

Actually, typo in the patch title:
assingment -> assignment
With that fixed, you can add my Ack.



> Acked-by: Alex Deucher 
>
> > ---
> >
> > v2:
> >
> > - Validate the client_id and src_id values or otherwise
> >   this can crash (Christian)
> >
> >  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 29 +
> >  1 file changed, 15 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > index c8413470e057..dfaedb0243ba 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> > @@ -110,7 +110,7 @@ const char *soc15_ih_clientid_name[] = {
> >  void amdgpu_irq_disable_all(struct amdgpu_device *adev)
> >  {
> > unsigned long irqflags;
> > -   unsigned i, j, k;
> > +   unsigned int i, j, k;
> > int r;
> >
> > spin_lock_irqsave(>irq.lock, irqflags);
> > @@ -269,11 +269,11 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
> > int nvec = pci_msix_vec_count(adev->pdev);
> > unsigned int flags;
> >
> > -   if (nvec <= 0) {
> > +   if (nvec <= 0)
> > flags = PCI_IRQ_MSI;
> > -   } else {
> > +   else
> > flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
> > -   }
> > +
> > /* we only need one vector */
> > nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags);
> > if (nvec > 0) {
> > @@ -332,7 +332,7 @@ void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
> >   */
> >  void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
> >  {
> > -   unsigned i, j;
> > +   unsigned int i, j;
> >
> > for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
> > if (!adev->irq.client[i].sources)
> > @@ -366,7 +366,7 @@ void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
> >   * 0 on success or error code otherwise
> >   */
> >  int amdgpu_irq_add_id(struct amdgpu_device *adev,
> > - unsigned client_id, unsigned src_id,
> > + unsigned int client_id, unsigned int src_id,
> >   struct amdgpu_irq_src *source)
> >  {
> > if (client_id >= AMDGPU_IRQ_CLIENTID_MAX)
> > @@ -418,8 +418,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
> >  {
> > u32 ring_index = ih->rptr >> 2;
> > struct amdgpu_iv_entry entry;
> > -   unsigned client_id, src_id;
> > -   struct amdgpu_irq_src *src;
> > +   unsigned int client_id, src_id;
> > +   struct amdgpu_irq_src *src = NULL;
> > bool handled = false;
> > int r;
> >
> > @@ -446,7 +446,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
> > DRM_DEBUG("Unregistered interrupt client_id: %d src_id: 
> > %d\n",
> >   client_id, src_id);
> >
> > -   } else if ((src = adev->irq.client[client_id].sources[src_id])) {
> > +   } else if (client_id < AMDGPU_IRQ_CLIENTID_MAX && src_id < 
> > AMDGPU_MAX_IRQ_SRC_ID) {
> > +   src = adev->irq.client[client_id].sources[src_id];
> > r = src->funcs->process(adev, src, );
> > if (r < 0)
> > DRM_ERROR("error processing interrupt (%d)\n", r);
> > @@ -493,7 +494,7 @@ void amdgpu_irq_delegate(struct amdgpu_device *adev,
> >   * Updates interrupt state for the specific source (all ASICs).
> >   */
> >  int amdgpu_irq_update(struct amdgpu_device *adev,
> > -struct amdgpu_irq_src *src, unsigned type)
> > +struct amdgpu_irq_src *src, unsigned int type)
> >  {
> > unsigned long irqflags;
> > enum amdgpu_interrupt_state state;
> > @@ -556,7 +557,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct 
> > amdgpu_device *adev)
> >   * 0 on success or error code otherwise
> >   */
> >  int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
> > -  unsigned type)
> > +  unsigned int type)
> >  {
> > if (!adev->irq.installed)
> > return -ENOENT;
> > @@ -586,7 +587,7 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct 
> > amdgpu_irq_src *src,
> >   * 0 on success or error code otherwise
> >   */
> >  int amdgpu_irq_put(struct 

Re: [PATCH v2] drm/amd/amdgpu: Fix assingment in if condition in amdgpu_irq.c

2023-05-22 Thread Alex Deucher
On Mon, May 8, 2023 at 6:48 AM Srinivasan Shanmugam
 wrote:
>
> Assignments in if condition are less readable and error-prone.
>
> Fixes below error & warnings reported by checkpatch"
>
> ERROR: do not use assignment in if condition
> +   } else if ((src = adev->irq.client[client_id].sources[src_id])) {
>
> WARNING: braces {} are not necessary for any arm of this statement
> WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
>
> Cc: Christian König 
> Cc: Alex Deucher 
> Signed-off-by: Srinivasan Shanmugam 

Acked-by: Alex Deucher 

> ---
>
> v2:
>
> - Validate the client_id and src_id values or otherwise
>   this can crash (Christian)
>
>  drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 29 +
>  1 file changed, 15 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> index c8413470e057..dfaedb0243ba 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
> @@ -110,7 +110,7 @@ const char *soc15_ih_clientid_name[] = {
>  void amdgpu_irq_disable_all(struct amdgpu_device *adev)
>  {
> unsigned long irqflags;
> -   unsigned i, j, k;
> +   unsigned int i, j, k;
> int r;
>
> spin_lock_irqsave(>irq.lock, irqflags);
> @@ -269,11 +269,11 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
> int nvec = pci_msix_vec_count(adev->pdev);
> unsigned int flags;
>
> -   if (nvec <= 0) {
> +   if (nvec <= 0)
> flags = PCI_IRQ_MSI;
> -   } else {
> +   else
> flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
> -   }
> +
> /* we only need one vector */
> nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags);
> if (nvec > 0) {
> @@ -332,7 +332,7 @@ void amdgpu_irq_fini_hw(struct amdgpu_device *adev)
>   */
>  void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
>  {
> -   unsigned i, j;
> +   unsigned int i, j;
>
> for (i = 0; i < AMDGPU_IRQ_CLIENTID_MAX; ++i) {
> if (!adev->irq.client[i].sources)
> @@ -366,7 +366,7 @@ void amdgpu_irq_fini_sw(struct amdgpu_device *adev)
>   * 0 on success or error code otherwise
>   */
>  int amdgpu_irq_add_id(struct amdgpu_device *adev,
> - unsigned client_id, unsigned src_id,
> + unsigned int client_id, unsigned int src_id,
>   struct amdgpu_irq_src *source)
>  {
> if (client_id >= AMDGPU_IRQ_CLIENTID_MAX)
> @@ -418,8 +418,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
>  {
> u32 ring_index = ih->rptr >> 2;
> struct amdgpu_iv_entry entry;
> -   unsigned client_id, src_id;
> -   struct amdgpu_irq_src *src;
> +   unsigned int client_id, src_id;
> +   struct amdgpu_irq_src *src = NULL;
> bool handled = false;
> int r;
>
> @@ -446,7 +446,8 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
> DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
>   client_id, src_id);
>
> -   } else if ((src = adev->irq.client[client_id].sources[src_id])) {
> +   } else if (client_id < AMDGPU_IRQ_CLIENTID_MAX && src_id < 
> AMDGPU_MAX_IRQ_SRC_ID) {
> +   src = adev->irq.client[client_id].sources[src_id];
> r = src->funcs->process(adev, src, );
> if (r < 0)
> DRM_ERROR("error processing interrupt (%d)\n", r);
> @@ -493,7 +494,7 @@ void amdgpu_irq_delegate(struct amdgpu_device *adev,
>   * Updates interrupt state for the specific source (all ASICs).
>   */
>  int amdgpu_irq_update(struct amdgpu_device *adev,
> -struct amdgpu_irq_src *src, unsigned type)
> +struct amdgpu_irq_src *src, unsigned int type)
>  {
> unsigned long irqflags;
> enum amdgpu_interrupt_state state;
> @@ -556,7 +557,7 @@ void amdgpu_irq_gpu_reset_resume_helper(struct 
> amdgpu_device *adev)
>   * 0 on success or error code otherwise
>   */
>  int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
> -  unsigned type)
> +  unsigned int type)
>  {
> if (!adev->irq.installed)
> return -ENOENT;
> @@ -586,7 +587,7 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct 
> amdgpu_irq_src *src,
>   * 0 on success or error code otherwise
>   */
>  int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
> -  unsigned type)
> +  unsigned int type)
>  {
> if (!adev->irq.installed)
> return -ENOENT;
> @@ -620,7 +621,7 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct 
> amdgpu_irq_src *src,
>   * invalid parameters
>   */
>  bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct 

Re: [PATCH] drm/amdgpu: remove unused variable num_xcc

2023-05-22 Thread Alex Deucher
Applied.  Thanks!

Alex

On Mon, May 22, 2023 at 8:30 AM Tom Rix  wrote:
>
> gcc with W=1 reports
> drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:2138:13: error: variable
>   ‘num_xcc’ set but not used [-Werror=unused-but-set-variable]
>  2138 | int num_xcc;
>   | ^~~
>
> This variable is not used so remove it.
>
> Signed-off-by: Tom Rix 
> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 3 ---
>  1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c 
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> index e5cfb3adb3b3..63718cf02aa1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
> @@ -2135,9 +2135,6 @@ static void gfx_v9_4_3_ring_emit_gds_switch(struct 
> amdgpu_ring *ring,
>  static int gfx_v9_4_3_early_init(void *handle)
>  {
> struct amdgpu_device *adev = (struct amdgpu_device *)handle;
> -   int num_xcc;
> -
> -   num_xcc = NUM_XCC(adev->gfx.xcc_mask);
>
> adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
>   AMDGPU_MAX_COMPUTE_RINGS);
> --
> 2.27.0
>


Re: [PATCH 5/5] drm/amdgpu: fix acpi build warnings

2023-05-22 Thread Alex Deucher
Applied the series.  Thanks!

Alex

On Mon, May 22, 2023 at 7:51 AM Arnd Bergmann  wrote:
>
> From: Arnd Bergmann 
>
> Two newly introduced functions are in the global namespace but have no 
> prototypes
> or callers outside of amdgpu_acpi.c, another function is static but only has
> a caller inside of an #ifdef:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:902:13: error: no previous prototype 
> for 'amdgpu_acpi_get_node_id' [-Werror=missing-prototypes]
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:928:30: error: no previous prototype 
> for 'amdgpu_acpi_get_dev' [-Werror=missing-prototypes]
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:860:33: error: 
> 'amdgpu_acpi_get_numa_info' defined but not used [-Werror=unused-function]
>
> Avoid the warnings by marking all of them static and ensuring that the 
> compiler is
> able to see the callsites.
>
> Fixes: c34db97b8217 ("drm/amdgpu: Add API to get numa information of XCC")
> Fixes: 1f6f659d06e1 ("drm/amdgpu: Store additional numa node information")
> Signed-off-by: Arnd Bergmann 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 11 +--
>  1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> index 873532c4adbe..1dbcd0e62478 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
> @@ -899,13 +899,15 @@ static struct amdgpu_numa_info 
> *amdgpu_acpi_get_numa_info(uint32_t pxm)
>   *
>   * Returns ACPI STATUS OK with Node ID on success or the corresponding 
> failure reason
>   */
> -acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
> +static acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
> struct amdgpu_numa_info **numa_info)
>  {
> -#ifdef CONFIG_ACPI_NUMA
> u64 pxm;
> acpi_status status;
>
> +   if (!IS_ENABLED(CONFIG_ACPI_NUMA))
> +   return_ACPI_STATUS(AE_NOT_EXIST);
> +
> if (!numa_info)
> return_ACPI_STATUS(AE_ERROR);
>
> @@ -920,12 +922,9 @@ acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
> return_ACPI_STATUS(AE_ERROR);
>
> return_ACPI_STATUS(AE_OK);
> -#else
> -   return_ACPI_STATUS(AE_NOT_EXIST);
> -#endif
>  }
>
> -struct amdgpu_acpi_dev_info *amdgpu_acpi_get_dev(u16 bdf)
> +static struct amdgpu_acpi_dev_info *amdgpu_acpi_get_dev(u16 bdf)
>  {
> struct amdgpu_acpi_dev_info *acpi_dev;
>
> --
> 2.39.2
>


Re: [PATCH next] drm/amdgpu: Fix unsigned comparison with zero in gmc_v9_0_process_interrupt()

2023-05-22 Thread Alex Deucher
Applied.  Thanks!

On Mon, May 22, 2023 at 3:30 AM Harshit Mogalapalli
 wrote:
>
> Smatch warns:
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c:579:
> unsigned 'xcc_id' is never less than zero.
>
> gfx_v9_4_3_ih_to_xcc_inst() returns negative numbers as well.
> Fix this by changing type of xcc_id to int.
>
> Fixes: faf96b9b602d ("drm/amdgpu: correct the vmhub index when page fault 
> occurs")
> Signed-off-by: Harshit Mogalapalli 
> ---
> This is from static analysis, only compile tested.
> ---
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index f70e666cecf2..1e8b2aaa48c1 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -557,8 +557,8 @@ static int gmc_v9_0_process_interrupt(struct 
> amdgpu_device *adev,
> const char *hub_name;
> u64 addr;
> uint32_t cam_index = 0;
> -   int ret;
> -   uint32_t node_id, xcc_id = 0;
> +   int ret, xcc_id = 0;
> +   uint32_t node_id;
>
> node_id = entry->node_id;
>
> --
> 2.38.1
>


Re: [PATCH][next] drm/amdgpu: Fix a couple of spelling mistakes in info and debug messages

2023-05-22 Thread Alex Deucher
Applied.  Thanks!

On Mon, May 22, 2023 at 5:02 AM Colin Ian King  wrote:
>
> There are a couple of spelling mistakes, one in a dev_info message
> and the other in a dev_debug message. Fix them.
>
> Signed-off-by: Colin Ian King 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 59b8b26e2caf..789cc16e1be7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -1007,7 +1007,7 @@ int psp_spatial_partition(struct psp_context *psp, int 
> mode)
> cmd->cmd_id = GFX_CMD_ID_SRIOV_SPATIAL_PART;
> cmd->cmd.cmd_spatial_part.mode = mode;
>
> -   dev_info(psp->adev->dev, "Requesting %d paritions through PSP", mode);
> +   dev_info(psp->adev->dev, "Requesting %d partitions through PSP", 
> mode);
> ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
>
> release_psp_cmd_buf(psp);
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
> index daeb6bcc9245..e9586a0dc335 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
> @@ -359,7 +359,7 @@ int amdgpu_xcp_open_device(struct amdgpu_device *adev,
> file_priv->minor->index, i);
> return -ENOENT;
> }
> -   dev_dbg(adev->dev, "renderD%d partition %d openned!",
> +   dev_dbg(adev->dev, "renderD%d partition %d opened!",
> file_priv->minor->index, i);
> fpriv->xcp_id = i;
> break;
> --
> 2.30.2
>


Re: [PATCH] drm/amd/pm: Fix output of pp_od_clk_voltage

2023-05-22 Thread Alex Deucher
Applied.  Thanks!

On Mon, May 22, 2023 at 3:20 AM Jonatas Esteves  wrote:
>
> Printing the other clock types should not be conditioned on being able
> to print OD_SCLK. Some GPUs currently have limited capability of only
> printing a subset of these.
>
> Since this condition was introduced in v5.18-rc1, reading from
> `pp_od_clk_voltage` has been returning empty on the Asus ROG Strix G15
> (2021).
>
> Fixes: 79c65f3fcbb1 ("drm/amd/pm: do not expose power implementation details 
> to amdgpu_pm.c")
> Signed-off-by: Jonatas Esteves 
> ---
>  drivers/gpu/drm/amd/pm/amdgpu_pm.c | 12 +---
>  1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
> b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> index 58c2246918fd..f4f40459f22b 100644
> --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
> @@ -871,13 +871,11 @@ static ssize_t amdgpu_get_pp_od_clk_voltage(struct 
> device *dev,
> }
> if (ret == -ENOENT) {
> size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
> -   if (size > 0) {
> -   size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, 
> buf + size);
> -   size += amdgpu_dpm_print_clock_levels(adev, 
> OD_VDDC_CURVE, buf + size);
> -   size += amdgpu_dpm_print_clock_levels(adev, 
> OD_VDDGFX_OFFSET, buf + size);
> -   size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, 
> buf + size);
> -   size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK, 
> buf + size);
> -   }
> +   size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, buf + 
> size);
> +   size += amdgpu_dpm_print_clock_levels(adev, OD_VDDC_CURVE, 
> buf + size);
> +   size += amdgpu_dpm_print_clock_levels(adev, OD_VDDGFX_OFFSET, 
> buf + size);
> +   size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, buf + 
> size);
> +   size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK, buf + 
> size);
> }
>
> if (size == 0)
> --
> 2.40.1
>


Re: [PATCH 1/3] drm/amdgpu/sdma: set sched.ready status after ring/IB test in sdma

2023-05-22 Thread Alex Deucher
Series is:
Acked-by: Alex Deucher 

On Thu, May 18, 2023 at 3:04 AM Guchun Chen  wrote:
>
> sched.ready is nothing with ring initialization, it needs to set
> to be true after ring/IB test in amdgpu_ring_test_helper to tell
> the ring is ready for submission.
>
> Signed-off-by: Guchun Chen 
> ---
>  drivers/gpu/drm/amd/amdgpu/cik_sdma.c| 2 --
>  drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c   | 2 --
>  drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c   | 2 --
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 4 
>  drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 
>  drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c   | 2 --
>  drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c   | 4 ++--
>  drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c   | 6 +-
>  drivers/gpu/drm/amd/amdgpu/si_dma.c  | 2 --
>  9 files changed, 3 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c 
> b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> index 67d16236b216..52598fbc9b39 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> @@ -489,8 +489,6 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
>  #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> -   ring->sched.ready = true;
> }
>
> cik_sdma_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> index fd2a7b66ac56..51afc92994a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> @@ -466,8 +466,6 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device 
> *adev)
>  #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> -   ring->sched.ready = true;
> }
>
> sdma_v2_4_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index e572389089d2..344202870aeb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -734,8 +734,6 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device 
> *adev)
>  #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> -   ring->sched.ready = true;
> }
>
> /* unhalt the MEs */
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 9295ac7edd56..e3581852ed9c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1114,8 +1114,6 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device 
> *adev, unsigned int i)
>  #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);
> -
> -   ring->sched.ready = true;
>  }
>
>  /**
> @@ -1202,8 +1200,6 @@ static void sdma_v4_0_page_resume(struct amdgpu_device 
> *adev, unsigned int i)
>  #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);
> -
> -   ring->sched.ready = true;
>  }
>
>  static void
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> index 64dcaa2670dd..c3517d9fc38c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> @@ -659,8 +659,6 @@ static void sdma_v4_4_2_gfx_resume(struct amdgpu_device 
> *adev, unsigned int i)
>  #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl);
> -
> -   ring->sched.ready = true;
>  }
>
>  /**
> @@ -750,8 +748,6 @@ static void sdma_v4_4_2_page_resume(struct amdgpu_device 
> *adev, unsigned int i)
>  #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, regSDMA_PAGE_IB_CNTL, ib_cntl);
> -
> -   ring->sched.ready = true;
>  }
>
>  static void sdma_v4_4_2_init_pg(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> index 92e1299be021..e2fe539ff3ed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> @@ -819,8 +819,6 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device 
> *adev)
> /* enable DMA IBs */
> WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, 
> mmSDMA0_GFX_IB_CNTL), ib_cntl);
>
> -   ring->sched.ready = true;
> -
> if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't 
> need below to lines */
> sdma_v5_0_ctx_switch_enable(adev, true);
> sdma_v5_0_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c 
> b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> index ca7e8757d78e..23667605c372 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> @@ -617,8 +617,6 @@ 

Re: [PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for vangogh

2023-05-22 Thread Huang, Tim
[AMD Official Use Only - General]

Thanks Alex.

Renoir didn't use the DFPstateTable but it needs to reverse the clocks levels 
as well.
Will send out a new patch for Renoir.

Best Regards,
Tim


From: Alex Deucher 
Sent: Monday, May 22, 2023 9:19 PM
To: Huang, Tim 
Cc: amd-gfx@lists.freedesktop.org ; Deucher, 
Alexander ; Zhang, Yifan 
Subject: Re: [PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for 
vangogh

Reviewed-by: Alex Deucher 

Does Renoir need a similar fix?

Alex

On Mon, May 22, 2023 at 6:10 AM Tim Huang  wrote:
>
> This patch reverses the DPM clocks levels output of pp_dpm_mclk
> and pp_dpm_fclk.
>
> On dGPUs and older APUs we expose the levels from lowest clocks
> to highest clocks. But for some APUs, the clocks levels that from
> the DFPstateTable are given the reversed orders by PMFW. Like the
> memory DPM clocks that are exposed by pp_dpm_mclk.
>
> It's not intuitive that they are reversed on these APUs. All tools
> and software that talks to the driver then has to know different ways
> to interpret the data depending on the asic.
>
> So we need to reverse them to expose the clocks levels from the
> driver consistently.
>
> Signed-off-by: Tim Huang 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 7433dcaa16e0..067b4e0b026c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -582,7 +582,7 @@ static int vangogh_print_legacy_clk_levels(struct 
> smu_context *smu,
> DpmClocks_t *clk_table = smu->smu_table.clocks_table;
> SmuMetrics_legacy_t metrics;
> struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -   int i, size = 0, ret = 0;
> +   int i, idx, size = 0, ret = 0;
> uint32_t cur_value = 0, value = 0, count = 0;
> bool cur_value_match_level = false;
>
> @@ -656,7 +656,8 @@ static int vangogh_print_legacy_clk_levels(struct 
> smu_context *smu,
> case SMU_MCLK:
> case SMU_FCLK:
> for (i = 0; i < count; i++) {
> -   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
> );
> +   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) 
> ? (count - i - 1) : i;
> +   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
> );
> if (ret)
> return ret;
> if (!value)
> @@ -683,7 +684,7 @@ static int vangogh_print_clk_levels(struct smu_context 
> *smu,
> DpmClocks_t *clk_table = smu->smu_table.clocks_table;
> SmuMetrics_t metrics;
> struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -   int i, size = 0, ret = 0;
> +   int i, idx, size = 0, ret = 0;
> uint32_t cur_value = 0, value = 0, count = 0;
> bool cur_value_match_level = false;
> uint32_t min, max;
> @@ -765,7 +766,8 @@ static int vangogh_print_clk_levels(struct smu_context 
> *smu,
> case SMU_MCLK:
> case SMU_FCLK:
> for (i = 0; i < count; i++) {
> -   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
> );
> +   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) 
> ? (count - i - 1) : i;
> +   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
> );
> if (ret)
> return ret;
> if (!value)
> --
> 2.34.1
>


Re: [QUESTION] gfvhub_v2_1 updates CNTL regs before initialize related page table address

2023-05-22 Thread Alex Deucher
On Sat, May 20, 2023 at 1:34 AM Zibin Liu  wrote:
>
> Hi,
>
> I'm looking at the initialization sequences in gfxhub_v2_1.c. I'm confused on 
> whether the GCVM_CONTEXT1_CNTL CNTL reg can be written before the 
> corresponding GCVM_CONTEXT1_PAGE_TABLE_START_ADDR and 
> GCVM_CONTEXT1_PAGE_TABLE_END_ADDR reg is written.
>
> Here is the background:
>  * gfxhub_v2_1_setup_vmid_config() enables GPU clients to use GPUVM VMIDs to 
> access memory.
>
> The code related to this questions is below:
>
>  324   WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL,
>  325   i * hub->ctx_distance, tmp);
>
>  326   WREG32_SOC15_OFFSET(GC, 0, 
> mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32,
>  327   i * hub->ctx_addr_distance, 0);
>  328   WREG32_SOC15_OFFSET(GC, 0, 
> mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32,
>  329   i * hub->ctx_addr_distance, 0);
>  330   WREG32_SOC15_OFFSET(GC, 0, 
> mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32,
>  331   i * hub->ctx_addr_distance,
>  332   lower_32_bits(adev->vm_manager.max_pfn 
> - 1));
>  333   WREG32_SOC15_OFFSET(GC, 0, 
> mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32,
>  334   i * hub->ctx_addr_distance,
>  335   upper_32_bits(adev->vm_manager.max_pfn 
> - 1));
>
> Just wondering, is the behavior expected or is it a bug?

As long as the memory hub is idle, I don't think there are any
ordering requirements for programming it.  I suppose if you wanted to
be really safe, you could set VM_CONTEXT1_CNTL.ENABLE_CONTEXT=0 before
programming everything and then set it to 1 at the end.

Alex

>
> Thanks,
> Zibin Liu
>
>


Re: [Freedreno] [PATCH v3 11/12] drm/fbdev-generic: Implement dedicated fbdev I/O helpers

2023-05-22 Thread Dmitry Baryshkov
On Mon, 22 May 2023 at 15:22, Thomas Zimmermann  wrote:
>
> Implement dedicated fbdev helpers for framebuffer I/O instead
> of using DRM's helpers. Fbdev-generic was the only caller of the
> DRM helpers, so remove them from the helper module.
>
> v2:
> * use FB_SYS_HELPERS_DEFERRED option
>
> Signed-off-by: Thomas Zimmermann 
> ---
>  drivers/gpu/drm/Kconfig |   6 +-
>  drivers/gpu/drm/drm_fb_helper.c | 107 
>  drivers/gpu/drm/drm_fbdev_generic.c |  47 ++--
>  include/drm/drm_fb_helper.h |  41 ---
>  4 files changed, 43 insertions(+), 158 deletions(-)

Looking at this patch makes me wonder if we should have implemented
fb_dirty for the MSM driver. We have drm_framebuffer_funcs::dirty()
implemented (by wrapping the drm_atomic_helper_dirtyfb()).

>
> diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
> index 77fb10ddd8a2..92a782827b7b 100644
> --- a/drivers/gpu/drm/Kconfig
> +++ b/drivers/gpu/drm/Kconfig
> @@ -95,6 +95,7 @@ config DRM_KUNIT_TEST
>  config DRM_KMS_HELPER
> tristate
> depends on DRM
> +   select FB_SYS_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
> help
>   CRTC helpers for KMS drivers.
>
> @@ -135,11 +136,6 @@ config DRM_FBDEV_EMULATION
> select FB_CFB_FILLRECT
> select FB_CFB_COPYAREA
> select FB_CFB_IMAGEBLIT
> -   select FB_DEFERRED_IO
> -   select FB_SYS_FOPS
> -   select FB_SYS_FILLRECT
> -   select FB_SYS_COPYAREA
> -   select FB_SYS_IMAGEBLIT
> select FRAMEBUFFER_CONSOLE if !EXPERT
> select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
> default y
> diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
> index 8724e08c518b..ba0a808f14ee 100644
> --- a/drivers/gpu/drm/drm_fb_helper.c
> +++ b/drivers/gpu/drm/drm_fb_helper.c
> @@ -729,113 +729,6 @@ void drm_fb_helper_deferred_io(struct fb_info *info, 
> struct list_head *pagerefli
>  }
>  EXPORT_SYMBOL(drm_fb_helper_deferred_io);
>
> -/**
> - * drm_fb_helper_sys_read - Implements struct _ops.fb_read for system 
> memory
> - * @info: fb_info struct pointer
> - * @buf: userspace buffer to read from framebuffer memory
> - * @count: number of bytes to read from framebuffer memory
> - * @ppos: read offset within framebuffer memory
> - *
> - * Returns:
> - * The number of bytes read on success, or an error code otherwise.
> - */
> -ssize_t drm_fb_helper_sys_read(struct fb_info *info, char __user *buf,
> -  size_t count, loff_t *ppos)
> -{
> -   return fb_sys_read(info, buf, count, ppos);
> -}
> -EXPORT_SYMBOL(drm_fb_helper_sys_read);
> -
> -/**
> - * drm_fb_helper_sys_write - Implements struct _ops.fb_write for system 
> memory
> - * @info: fb_info struct pointer
> - * @buf: userspace buffer to write to framebuffer memory
> - * @count: number of bytes to write to framebuffer memory
> - * @ppos: write offset within framebuffer memory
> - *
> - * Returns:
> - * The number of bytes written on success, or an error code otherwise.
> - */
> -ssize_t drm_fb_helper_sys_write(struct fb_info *info, const char __user *buf,
> -   size_t count, loff_t *ppos)
> -{
> -   struct drm_fb_helper *helper = info->par;
> -   loff_t pos = *ppos;
> -   ssize_t ret;
> -   struct drm_rect damage_area;
> -
> -   ret = fb_sys_write(info, buf, count, ppos);
> -   if (ret <= 0)
> -   return ret;
> -
> -   if (helper->funcs->fb_dirty) {
> -   drm_fb_helper_memory_range_to_clip(info, pos, ret, 
> _area);
> -   drm_fb_helper_damage(helper, damage_area.x1, damage_area.y1,
> -drm_rect_width(_area),
> -drm_rect_height(_area));
> -   }
> -
> -   return ret;
> -}
> -EXPORT_SYMBOL(drm_fb_helper_sys_write);
> -
> -/**
> - * drm_fb_helper_sys_fillrect - wrapper around sys_fillrect
> - * @info: fbdev registered by the helper
> - * @rect: info about rectangle to fill
> - *
> - * A wrapper around sys_fillrect implemented by fbdev core
> - */
> -void drm_fb_helper_sys_fillrect(struct fb_info *info,
> -   const struct fb_fillrect *rect)
> -{
> -   struct drm_fb_helper *helper = info->par;
> -
> -   sys_fillrect(info, rect);
> -
> -   if (helper->funcs->fb_dirty)
> -   drm_fb_helper_damage(helper, rect->dx, rect->dy, rect->width, 
> rect->height);
> -}
> -EXPORT_SYMBOL(drm_fb_helper_sys_fillrect);
> -
> -/**
> - * drm_fb_helper_sys_copyarea - wrapper around sys_copyarea
> - * @info: fbdev registered by the helper
> - * @area: info about area to copy
> - *
> - * A wrapper around sys_copyarea implemented by fbdev core
> - */
> -void drm_fb_helper_sys_copyarea(struct fb_info *info,
> -   const struct fb_copyarea *area)
> -{
> -   struct drm_fb_helper *helper = info->par;
> -
> -   

Re: [PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for vangogh

2023-05-22 Thread Alex Deucher
Reviewed-by: Alex Deucher 

Does Renoir need a similar fix?

Alex

On Mon, May 22, 2023 at 6:10 AM Tim Huang  wrote:
>
> This patch reverses the DPM clocks levels output of pp_dpm_mclk
> and pp_dpm_fclk.
>
> On dGPUs and older APUs we expose the levels from lowest clocks
> to highest clocks. But for some APUs, the clocks levels that from
> the DFPstateTable are given the reversed orders by PMFW. Like the
> memory DPM clocks that are exposed by pp_dpm_mclk.
>
> It's not intuitive that they are reversed on these APUs. All tools
> and software that talks to the driver then has to know different ways
> to interpret the data depending on the asic.
>
> So we need to reverse them to expose the clocks levels from the
> driver consistently.
>
> Signed-off-by: Tim Huang 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 10 ++
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index 7433dcaa16e0..067b4e0b026c 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -582,7 +582,7 @@ static int vangogh_print_legacy_clk_levels(struct 
> smu_context *smu,
> DpmClocks_t *clk_table = smu->smu_table.clocks_table;
> SmuMetrics_legacy_t metrics;
> struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -   int i, size = 0, ret = 0;
> +   int i, idx, size = 0, ret = 0;
> uint32_t cur_value = 0, value = 0, count = 0;
> bool cur_value_match_level = false;
>
> @@ -656,7 +656,8 @@ static int vangogh_print_legacy_clk_levels(struct 
> smu_context *smu,
> case SMU_MCLK:
> case SMU_FCLK:
> for (i = 0; i < count; i++) {
> -   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
> );
> +   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) 
> ? (count - i - 1) : i;
> +   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
> );
> if (ret)
> return ret;
> if (!value)
> @@ -683,7 +684,7 @@ static int vangogh_print_clk_levels(struct smu_context 
> *smu,
> DpmClocks_t *clk_table = smu->smu_table.clocks_table;
> SmuMetrics_t metrics;
> struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
> -   int i, size = 0, ret = 0;
> +   int i, idx, size = 0, ret = 0;
> uint32_t cur_value = 0, value = 0, count = 0;
> bool cur_value_match_level = false;
> uint32_t min, max;
> @@ -765,7 +766,8 @@ static int vangogh_print_clk_levels(struct smu_context 
> *smu,
> case SMU_MCLK:
> case SMU_FCLK:
> for (i = 0; i < count; i++) {
> -   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
> );
> +   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) 
> ? (count - i - 1) : i;
> +   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
> );
> if (ret)
> return ret;
> if (!value)
> --
> 2.34.1
>


[PATCH 1/2] Revert "drm/amd/display: Block optimize on consecutive FAMS enables"

2023-05-22 Thread Michel Dänzer
From: Michel Dänzer 

This reverts commit ce560ac40272a5c8b5b68a9d63a75edd9e66aed2.

It depends on its parent commit, which we want to revert.

Signed-off-by: Michel Dänzer 
---
 .../drm/amd/display/dc/dcn20/dcn20_hwseq.c|  3 ---
 .../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 22 +++
 2 files changed, 3 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 422fbf79da64..6ce10fd4bb1a 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2117,9 +2117,6 @@ void dcn20_optimize_bandwidth(
dc_dmub_srv_p_state_delegate(dc,
true, context);
context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
-   dc->clk_mgr->clks.fw_based_mclk_switching = true;
-   } else {
-   dc->clk_mgr->clks.fw_based_mclk_switching = false;
}
 
dc->clk_mgr->funcs->update_clocks(
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 8263a07f265f..0411867654dd 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -983,13 +983,9 @@ void dcn30_set_disp_pattern_generator(const struct dc *dc,
 }
 
 void dcn30_prepare_bandwidth(struct dc *dc,
-   struct dc_state *context)
+   struct dc_state *context)
 {
-   bool p_state_change_support = 
context->bw_ctx.bw.dcn.clk.p_state_change_support;
-   /* Any transition into an FPO config should disable MCLK switching 
first to avoid
-* driver and FW P-State synchronization issues.
-*/
-   if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || 
dc->clk_mgr->clks.fw_based_mclk_switching) {
+   if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {
dc->optimized_required = true;
context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
}
@@ -1000,19 +996,7 @@ void dcn30_prepare_bandwidth(struct dc *dc,
dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, 
dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries
 - 1].memclk_mhz);
 
dcn20_prepare_bandwidth(dc, context);
-   /*
-* enabled -> enabled: do not disable
-* enabled -> disabled: disable
-* disabled -> enabled: don't care
-* disabled -> disabled: don't care
-*/
-   if (!context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching)
-   dc_dmub_srv_p_state_delegate(dc, false, context);
 
-   if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching || 
dc->clk_mgr->clks.fw_based_mclk_switching) {
-   /* After disabling P-State, restore the original value to 
ensure we get the correct P-State
-* on the next optimize. */
-   context->bw_ctx.bw.dcn.clk.p_state_change_support = 
p_state_change_support;
-   }
+   dc_dmub_srv_p_state_delegate(dc, false, context);
 }
 
-- 
2.40.1



[PATCH 2/2] Revert "drm/amd/display: Do not set drr on pipe commit"

2023-05-22 Thread Michel Dänzer
From: Michel Dänzer 

This reverts commit 474f01015ffdb74e01c2eb3584a2822c64e7b2be.

Caused a regression:

Samsung Odyssey Neo G9, running at 5120x1440@240/VRR, connected to Navi
21 via DisplayPort, blanks and the GPU hangs while starting the Steam
game Assetto Corsa Competizione (via Proton 7.0).

Example dmesg excerpt:

 amdgpu :0c:00.0: [drm] ERROR [CRTC:82:crtc-0] flip_done timed out
 NMI watchdog: Watchdog detected hard LOCKUP on cpu 6
 [...]
 RIP: 0010:amdgpu_device_rreg.part.0+0x2f/0xf0 [amdgpu]
 Code: 41 54 44 8d 24 b5 00 00 00 00 55 89 f5 53 48 89 fb 4c 3b a7 60 0b 00 00 
73 6a 83 e2 02 74 29 4c 03 a3 68 0b 00 00 45 8b 24 24 <48> 8b 43 08 0f b7 70 3e 
66 90 44 89 e0 5b 5d 41 5c 31 d2 31 c9 31
 RSP: :b39a119dfb88 EFLAGS: 0086
 RAX: c0eb96a0 RBX: 9e7963dc RCX: 7fff
 RDX:  RSI: 4ff6 RDI: 9e7963dc
 RBP: 4ff6 R08: b39a119dfc40 R09: 0010
 R10: b39a119dfc40 R11: b39a119dfc44 R12: 000e05ae
 R13:  R14: 9e7963dc0010 R15: 
 FS:  1012f6c0() GS:9e805eb8() knlGS:7fd4
 CS:  0010 DS:  ES:  CR0: 80050033
 CR2: 461ca000 CR3: 0002a8a2 CR4: 00350ee0
 Call Trace:
  
  dm_read_reg_func+0x37/0xc0 [amdgpu]
  generic_reg_get2+0x22/0x60 [amdgpu]
  optc1_get_crtc_scanoutpos+0x6a/0xc0 [amdgpu]
  dc_stream_get_scanoutpos+0x74/0x90 [amdgpu]
  dm_crtc_get_scanoutpos+0x82/0xf0 [amdgpu]
  amdgpu_display_get_crtc_scanoutpos+0x91/0x190 [amdgpu]
  ? dm_read_reg_func+0x37/0xc0 [amdgpu]
  amdgpu_get_vblank_counter_kms+0xb4/0x1a0 [amdgpu]
  dm_pflip_high_irq+0x213/0x2f0 [amdgpu]
  amdgpu_dm_irq_handler+0x8a/0x200 [amdgpu]
  amdgpu_irq_dispatch+0xd4/0x220 [amdgpu]
  amdgpu_ih_process+0x7f/0x110 [amdgpu]
  amdgpu_irq_handler+0x1f/0x70 [amdgpu]
  __handle_irq_event_percpu+0x46/0x1b0
  handle_irq_event+0x34/0x80
  handle_edge_irq+0x9f/0x240
  __common_interrupt+0x66/0x110
  common_interrupt+0x5c/0xd0
  asm_common_interrupt+0x22/0x40

Signed-off-by: Michel Dänzer 
---
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 6 --
 drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c | 7 ---
 2 files changed, 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 6ce10fd4bb1a..5403e9399a46 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -2113,12 +2113,6 @@ void dcn20_optimize_bandwidth(
if (hubbub->funcs->program_compbuf_size)
hubbub->funcs->program_compbuf_size(hubbub, 
context->bw_ctx.bw.dcn.compbuf_size_kb, true);
 
-   if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {
-   dc_dmub_srv_p_state_delegate(dc,
-   true, context);
-   context->bw_ctx.bw.dcn.clk.p_state_change_support = true;
-   }
-
dc->clk_mgr->funcs->update_clocks(
dc->clk_mgr,
context,
diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c 
b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
index 0411867654dd..0e071fbc9154 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_hwseq.c
@@ -985,18 +985,11 @@ void dcn30_set_disp_pattern_generator(const struct dc *dc,
 void dcn30_prepare_bandwidth(struct dc *dc,
struct dc_state *context)
 {
-   if (context->bw_ctx.bw.dcn.clk.fw_based_mclk_switching) {
-   dc->optimized_required = true;
-   context->bw_ctx.bw.dcn.clk.p_state_change_support = false;
-   }
-
if (dc->clk_mgr->dc_mode_softmax_enabled)
if (dc->clk_mgr->clks.dramclk_khz <= 
dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000 &&
context->bw_ctx.bw.dcn.clk.dramclk_khz > 
dc->clk_mgr->bw_params->dc_mode_softmax_memclk * 1000)
dc->clk_mgr->funcs->set_max_memclk(dc->clk_mgr, 
dc->clk_mgr->bw_params->clk_table.entries[dc->clk_mgr->bw_params->clk_table.num_entries
 - 1].memclk_mhz);
 
dcn20_prepare_bandwidth(dc, context);
-
-   dc_dmub_srv_p_state_delegate(dc, false, context);
 }
 
-- 
2.40.1



[PATCH next] drm/amdgpu: Fix unsigned comparison with zero in gmc_v9_0_process_interrupt()

2023-05-22 Thread Harshit Mogalapalli
Smatch warns:
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c:579:
unsigned 'xcc_id' is never less than zero.

gfx_v9_4_3_ih_to_xcc_inst() returns negative numbers as well.
Fix this by changing type of xcc_id to int.

Fixes: faf96b9b602d ("drm/amdgpu: correct the vmhub index when page fault 
occurs")
Signed-off-by: Harshit Mogalapalli 
---
This is from static analysis, only compile tested.
---
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index f70e666cecf2..1e8b2aaa48c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -557,8 +557,8 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device 
*adev,
const char *hub_name;
u64 addr;
uint32_t cam_index = 0;
-   int ret;
-   uint32_t node_id, xcc_id = 0;
+   int ret, xcc_id = 0;
+   uint32_t node_id;
 
node_id = entry->node_id;
 
-- 
2.38.1



[PATCH] drm/amdgpu: remove unused variable num_xcc

2023-05-22 Thread Tom Rix
gcc with W=1 reports
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c:2138:13: error: variable
  ‘num_xcc’ set but not used [-Werror=unused-but-set-variable]
 2138 | int num_xcc;
  | ^~~

This variable is not used so remove it.

Signed-off-by: Tom Rix 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index e5cfb3adb3b3..63718cf02aa1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -2135,9 +2135,6 @@ static void gfx_v9_4_3_ring_emit_gds_switch(struct 
amdgpu_ring *ring,
 static int gfx_v9_4_3_early_init(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-   int num_xcc;
-
-   num_xcc = NUM_XCC(adev->gfx.xcc_mask);
 
adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
  AMDGPU_MAX_COMPUTE_RINGS);
-- 
2.27.0



[PATCH] drm/amdgpu: remove unused variable mmhub_v1_8_mmea_cgtt_clk_cntl_reg

2023-05-22 Thread Tom Rix
gcc with W=1 reports
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c:760:23: error:
  ‘mmhub_v1_8_mmea_cgtt_clk_cntl_reg’ defined but not used 
[-Werror=unused-const-variable=]
  760 | static const uint32_t mmhub_v1_8_mmea_cgtt_clk_cntl_reg[] = {
  |   ^

This variable is not used so remove it.

Signed-off-by: Tom Rix 
---
 drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c | 8 
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c 
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
index 3648994724c2..00e7e5db7c28 100644
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c
@@ -757,14 +757,6 @@ static void mmhub_v1_8_query_ras_error_status(struct 
amdgpu_device *adev)
mmhub_v1_8_inst_query_ras_err_status(adev, i);
 }
 
-static const uint32_t mmhub_v1_8_mmea_cgtt_clk_cntl_reg[] = {
-   regMMEA0_CGTT_CLK_CTRL,
-   regMMEA1_CGTT_CLK_CTRL,
-   regMMEA2_CGTT_CLK_CTRL,
-   regMMEA3_CGTT_CLK_CTRL,
-   regMMEA4_CGTT_CLK_CTRL,
-};
-
 static void mmhub_v1_8_inst_reset_ras_err_status(struct amdgpu_device *adev,
 uint32_t mmhub_inst)
 {
-- 
2.27.0



[PATCH][next] drm/amdgpu: Fix a couple of spelling mistakes in info and debug messages

2023-05-22 Thread Colin Ian King
There are a couple of spelling mistakes, one in a dev_info message
and the other in a dev_debug message. Fix them.

Signed-off-by: Colin Ian King 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
index 59b8b26e2caf..789cc16e1be7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
@@ -1007,7 +1007,7 @@ int psp_spatial_partition(struct psp_context *psp, int 
mode)
cmd->cmd_id = GFX_CMD_ID_SRIOV_SPATIAL_PART;
cmd->cmd.cmd_spatial_part.mode = mode;
 
-   dev_info(psp->adev->dev, "Requesting %d paritions through PSP", mode);
+   dev_info(psp->adev->dev, "Requesting %d partitions through PSP", mode);
ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
 
release_psp_cmd_buf(psp);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
index daeb6bcc9245..e9586a0dc335 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_xcp.c
@@ -359,7 +359,7 @@ int amdgpu_xcp_open_device(struct amdgpu_device *adev,
file_priv->minor->index, i);
return -ENOENT;
}
-   dev_dbg(adev->dev, "renderD%d partition %d openned!",
+   dev_dbg(adev->dev, "renderD%d partition %d opened!",
file_priv->minor->index, i);
fpriv->xcp_id = i;
break;
-- 
2.30.2



[PATCH v3 11/12] drm/fbdev-generic: Implement dedicated fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. Fbdev-generic was the only caller of the
DRM helpers, so remove them from the helper module.

v2:
* use FB_SYS_HELPERS_DEFERRED option

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/Kconfig |   6 +-
 drivers/gpu/drm/drm_fb_helper.c | 107 
 drivers/gpu/drm/drm_fbdev_generic.c |  47 ++--
 include/drm/drm_fb_helper.h |  41 ---
 4 files changed, 43 insertions(+), 158 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 77fb10ddd8a2..92a782827b7b 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -95,6 +95,7 @@ config DRM_KUNIT_TEST
 config DRM_KMS_HELPER
tristate
depends on DRM
+   select FB_SYS_HELPERS_DEFERRED if DRM_FBDEV_EMULATION
help
  CRTC helpers for KMS drivers.
 
@@ -135,11 +136,6 @@ config DRM_FBDEV_EMULATION
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
-   select FB_DEFERRED_IO
-   select FB_SYS_FOPS
-   select FB_SYS_FILLRECT
-   select FB_SYS_COPYAREA
-   select FB_SYS_IMAGEBLIT
select FRAMEBUFFER_CONSOLE if !EXPERT
select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
default y
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 8724e08c518b..ba0a808f14ee 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -729,113 +729,6 @@ void drm_fb_helper_deferred_io(struct fb_info *info, 
struct list_head *pagerefli
 }
 EXPORT_SYMBOL(drm_fb_helper_deferred_io);
 
-/**
- * drm_fb_helper_sys_read - Implements struct _ops.fb_read for system memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to read from framebuffer memory
- * @count: number of bytes to read from framebuffer memory
- * @ppos: read offset within framebuffer memory
- *
- * Returns:
- * The number of bytes read on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_sys_read(struct fb_info *info, char __user *buf,
-  size_t count, loff_t *ppos)
-{
-   return fb_sys_read(info, buf, count, ppos);
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_read);
-
-/**
- * drm_fb_helper_sys_write - Implements struct _ops.fb_write for system 
memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to write to framebuffer memory
- * @count: number of bytes to write to framebuffer memory
- * @ppos: write offset within framebuffer memory
- *
- * Returns:
- * The number of bytes written on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_sys_write(struct fb_info *info, const char __user *buf,
-   size_t count, loff_t *ppos)
-{
-   struct drm_fb_helper *helper = info->par;
-   loff_t pos = *ppos;
-   ssize_t ret;
-   struct drm_rect damage_area;
-
-   ret = fb_sys_write(info, buf, count, ppos);
-   if (ret <= 0)
-   return ret;
-
-   if (helper->funcs->fb_dirty) {
-   drm_fb_helper_memory_range_to_clip(info, pos, ret, 
_area);
-   drm_fb_helper_damage(helper, damage_area.x1, damage_area.y1,
-drm_rect_width(_area),
-drm_rect_height(_area));
-   }
-
-   return ret;
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_write);
-
-/**
- * drm_fb_helper_sys_fillrect - wrapper around sys_fillrect
- * @info: fbdev registered by the helper
- * @rect: info about rectangle to fill
- *
- * A wrapper around sys_fillrect implemented by fbdev core
- */
-void drm_fb_helper_sys_fillrect(struct fb_info *info,
-   const struct fb_fillrect *rect)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   sys_fillrect(info, rect);
-
-   if (helper->funcs->fb_dirty)
-   drm_fb_helper_damage(helper, rect->dx, rect->dy, rect->width, 
rect->height);
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_fillrect);
-
-/**
- * drm_fb_helper_sys_copyarea - wrapper around sys_copyarea
- * @info: fbdev registered by the helper
- * @area: info about area to copy
- *
- * A wrapper around sys_copyarea implemented by fbdev core
- */
-void drm_fb_helper_sys_copyarea(struct fb_info *info,
-   const struct fb_copyarea *area)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   sys_copyarea(info, area);
-
-   if (helper->funcs->fb_dirty)
-   drm_fb_helper_damage(helper, area->dx, area->dy, area->width, 
area->height);
-}
-EXPORT_SYMBOL(drm_fb_helper_sys_copyarea);
-
-/**
- * drm_fb_helper_sys_imageblit - wrapper around sys_imageblit
- * @info: fbdev registered by the helper
- * @image: info about image to blit
- *
- * A wrapper around sys_imageblit implemented by fbdev core
- */
-void drm_fb_helper_sys_imageblit(struct fb_info *info,
-const 

[PATCH v3 12/12] drm/i915: Implement dedicated fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Implement dedicated fbdev helpers for framebuffer I/O instead
of using DRM's helpers. i915 was the only caller of the DRM
helpers, so remove them from the helper module.

v2:
* use FB_IO_HELPERS options

Signed-off-by: Thomas Zimmermann 
Cc: Jani Nikula 
Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 
Cc: "Ville Syrjälä" 
---
 drivers/gpu/drm/Kconfig|   3 -
 drivers/gpu/drm/drm_fb_helper.c| 107 -
 drivers/gpu/drm/i915/Kconfig   |   1 +
 drivers/gpu/drm/i915/display/intel_fbdev.c |  51 --
 include/drm/drm_fb_helper.h|  39 
 5 files changed, 46 insertions(+), 155 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 92a782827b7b..bb2e48cc6cd6 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -133,9 +133,6 @@ config DRM_FBDEV_EMULATION
bool "Enable legacy fbdev support for your modesetting driver"
depends on DRM_KMS_HELPER
depends on FB=y || FB=DRM_KMS_HELPER
-   select FB_CFB_FILLRECT
-   select FB_CFB_COPYAREA
-   select FB_CFB_IMAGEBLIT
select FRAMEBUFFER_CONSOLE if !EXPERT
select FRAMEBUFFER_CONSOLE_DETECT_PRIMARY if FRAMEBUFFER_CONSOLE
default y
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index ba0a808f14ee..5927896ad8f6 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -729,113 +729,6 @@ void drm_fb_helper_deferred_io(struct fb_info *info, 
struct list_head *pagerefli
 }
 EXPORT_SYMBOL(drm_fb_helper_deferred_io);
 
-/**
- * drm_fb_helper_cfb_read - Implements struct _ops.fb_read for I/O memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to read from framebuffer memory
- * @count: number of bytes to read from framebuffer memory
- * @ppos: read offset within framebuffer memory
- *
- * Returns:
- * The number of bytes read on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_cfb_read(struct fb_info *info, char __user *buf,
-  size_t count, loff_t *ppos)
-{
-   return fb_io_read(info, buf, count, ppos);
-}
-EXPORT_SYMBOL(drm_fb_helper_cfb_read);
-
-/**
- * drm_fb_helper_cfb_write - Implements struct _ops.fb_write for I/O memory
- * @info: fb_info struct pointer
- * @buf: userspace buffer to write to framebuffer memory
- * @count: number of bytes to write to framebuffer memory
- * @ppos: write offset within framebuffer memory
- *
- * Returns:
- * The number of bytes written on success, or an error code otherwise.
- */
-ssize_t drm_fb_helper_cfb_write(struct fb_info *info, const char __user *buf,
-   size_t count, loff_t *ppos)
-{
-   struct drm_fb_helper *helper = info->par;
-   loff_t pos = *ppos;
-   ssize_t ret;
-   struct drm_rect damage_area;
-
-   ret = fb_io_write(info, buf, count, ppos);
-   if (ret <= 0)
-   return ret;
-
-   if (helper->funcs->fb_dirty) {
-   drm_fb_helper_memory_range_to_clip(info, pos, ret, 
_area);
-   drm_fb_helper_damage(helper, damage_area.x1, damage_area.y1,
-drm_rect_width(_area),
-drm_rect_height(_area));
-   }
-
-   return ret;
-}
-EXPORT_SYMBOL(drm_fb_helper_cfb_write);
-
-/**
- * drm_fb_helper_cfb_fillrect - wrapper around cfb_fillrect
- * @info: fbdev registered by the helper
- * @rect: info about rectangle to fill
- *
- * A wrapper around cfb_fillrect implemented by fbdev core
- */
-void drm_fb_helper_cfb_fillrect(struct fb_info *info,
-   const struct fb_fillrect *rect)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   cfb_fillrect(info, rect);
-
-   if (helper->funcs->fb_dirty)
-   drm_fb_helper_damage(helper, rect->dx, rect->dy, rect->width, 
rect->height);
-}
-EXPORT_SYMBOL(drm_fb_helper_cfb_fillrect);
-
-/**
- * drm_fb_helper_cfb_copyarea - wrapper around cfb_copyarea
- * @info: fbdev registered by the helper
- * @area: info about area to copy
- *
- * A wrapper around cfb_copyarea implemented by fbdev core
- */
-void drm_fb_helper_cfb_copyarea(struct fb_info *info,
-   const struct fb_copyarea *area)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   cfb_copyarea(info, area);
-
-   if (helper->funcs->fb_dirty)
-   drm_fb_helper_damage(helper, area->dx, area->dy, area->width, 
area->height);
-}
-EXPORT_SYMBOL(drm_fb_helper_cfb_copyarea);
-
-/**
- * drm_fb_helper_cfb_imageblit - wrapper around cfb_imageblit
- * @info: fbdev registered by the helper
- * @image: info about image to blit
- *
- * A wrapper around cfb_imageblit implemented by fbdev core
- */
-void drm_fb_helper_cfb_imageblit(struct fb_info *info,
-const struct fb_image *image)
-{
-   struct drm_fb_helper *helper = info->par;
-
-   

[PATCH v3 08/12] drm/omapdrm: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Omapdrm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_SYS_HELPERS option

Signed-off-by: Thomas Zimmermann 
Cc: Tomi Valkeinen 
---
 drivers/gpu/drm/omapdrm/Kconfig  |  1 +
 drivers/gpu/drm/omapdrm/omap_fbdev.c | 12 +++-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/Kconfig b/drivers/gpu/drm/omapdrm/Kconfig
index 76ded1568bd0..b4ac76c9f31b 100644
--- a/drivers/gpu/drm/omapdrm/Kconfig
+++ b/drivers/gpu/drm/omapdrm/Kconfig
@@ -4,6 +4,7 @@ config DRM_OMAP
depends on DRM && OF
depends on ARCH_OMAP2PLUS
select DRM_KMS_HELPER
+   select FB_SYS_HELPERS if DRM_FBDEV_EMULATION
select VIDEOMODE_HELPERS
select HDMI
default n
diff --git a/drivers/gpu/drm/omapdrm/omap_fbdev.c 
b/drivers/gpu/drm/omapdrm/omap_fbdev.c
index b950e93b3846..55a65b81ccdc 100644
--- a/drivers/gpu/drm/omapdrm/omap_fbdev.c
+++ b/drivers/gpu/drm/omapdrm/omap_fbdev.c
@@ -4,6 +4,8 @@
  * Author: Rob Clark 
  */
 
+#include 
+
 #include 
 #include 
 #include 
@@ -103,11 +105,11 @@ static const struct fb_ops omap_fb_ops = {
.fb_pan_display = omap_fbdev_pan_display,
.fb_ioctl   = drm_fb_helper_ioctl,
 
-   .fb_read = drm_fb_helper_sys_read,
-   .fb_write = drm_fb_helper_sys_write,
-   .fb_fillrect = drm_fb_helper_sys_fillrect,
-   .fb_copyarea = drm_fb_helper_sys_copyarea,
-   .fb_imageblit = drm_fb_helper_sys_imageblit,
+   .fb_read = fb_sys_read,
+   .fb_write = fb_sys_write,
+   .fb_fillrect = sys_fillrect,
+   .fb_copyarea = sys_copyarea,
+   .fb_imageblit = sys_imageblit,
 
.fb_destroy = omap_fbdev_fb_destroy,
 };
-- 
2.40.1



[PATCH v3 10/12] drm/fb-helper: Export helpers for marking damage areas

2023-05-22 Thread Thomas Zimmermann
Export drm_fb_helper_damage() and drm_fb_helper_damage_range(), which
handle damage areas for fbdev emulation. This is a temporary export
that allows to move the DRM I/O helpers for fbdev into drivers. Only
fbdev-generic and i915 need them. Both will be updated to implement
damage handling by themselves and the exported functions will be removed.

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/drm_fb_helper.c | 19 +--
 include/drm/drm_fb_helper.h |  4 
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index f0e9549b6bd7..8724e08c518b 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -625,13 +625,15 @@ static void drm_fb_helper_add_damage_clip(struct 
drm_fb_helper *helper, u32 x, u
spin_unlock_irqrestore(>damage_lock, flags);
 }
 
-static void drm_fb_helper_damage(struct drm_fb_helper *helper, u32 x, u32 y,
-u32 width, u32 height)
+/* Don't use in new code. */
+void drm_fb_helper_damage(struct drm_fb_helper *helper, u32 x, u32 y,
+ u32 width, u32 height)
 {
drm_fb_helper_add_damage_clip(helper, x, y, width, height);
 
schedule_work(>damage_work);
 }
+EXPORT_SYMBOL(drm_fb_helper_damage);
 
 /*
  * Convert memory region into area of scanlines and pixels per
@@ -670,6 +672,19 @@ static void drm_fb_helper_memory_range_to_clip(struct 
fb_info *info, off_t off,
drm_rect_init(clip, x1, y1, x2 - x1, y2 - y1);
 }
 
+/* Don't use in new code. */
+void drm_fb_helper_damage_range(struct drm_fb_helper *fb_helper, off_t off, 
size_t len)
+{
+   struct fb_info *info = fb_helper->info;
+   struct drm_rect damage_area;
+
+   drm_fb_helper_memory_range_to_clip(info, off, len, _area);
+   drm_fb_helper_damage(fb_helper, damage_area.x1, damage_area.y1,
+drm_rect_width(_area),
+drm_rect_height(_area));
+}
+EXPORT_SYMBOL(drm_fb_helper_damage_range);
+
 /**
  * drm_fb_helper_deferred_io() - fbdev deferred_io callback function
  * @info: fb_info struct pointer
diff --git a/include/drm/drm_fb_helper.h b/include/drm/drm_fb_helper.h
index 72032c354a30..80c402f4e379 100644
--- a/include/drm/drm_fb_helper.h
+++ b/include/drm/drm_fb_helper.h
@@ -253,6 +253,10 @@ void drm_fb_helper_fill_info(struct fb_info *info,
 struct drm_fb_helper *fb_helper,
 struct drm_fb_helper_surface_size *sizes);
 
+void drm_fb_helper_damage(struct drm_fb_helper *helper, u32 x, u32 y,
+ u32 width, u32 height);
+void drm_fb_helper_damage_range(struct drm_fb_helper *helper, off_t off, 
size_t len);
+
 void drm_fb_helper_deferred_io(struct fb_info *info, struct list_head 
*pagereflist);
 
 ssize_t drm_fb_helper_sys_read(struct fb_info *info, char __user *buf,
-- 
2.40.1



[PATCH v3 07/12] drm/msm: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Msm does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_SYS_HELPERS option

Signed-off-by: Thomas Zimmermann 
Reviewed-by: Dmitry Baryshkov 
Cc: Rob Clark 
Cc: Abhinav Kumar 
Cc: Dmitry Baryshkov 
Cc: Sean Paul 
---
 drivers/gpu/drm/msm/Kconfig |  1 +
 drivers/gpu/drm/msm/msm_fbdev.c | 12 +++-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
index 85f5ab1d552c..a78662bd6273 100644
--- a/drivers/gpu/drm/msm/Kconfig
+++ b/drivers/gpu/drm/msm/Kconfig
@@ -21,6 +21,7 @@ config DRM_MSM
select DRM_BRIDGE
select DRM_PANEL_BRIDGE
select DRM_SCHED
+   select FB_SYS_HELPERS if DRM_FBDEV_EMULATION
select SHMEM
select TMPFS
select QCOM_SCM
diff --git a/drivers/gpu/drm/msm/msm_fbdev.c b/drivers/gpu/drm/msm/msm_fbdev.c
index 2ebc86381e1c..fc0353a4160e 100644
--- a/drivers/gpu/drm/msm/msm_fbdev.c
+++ b/drivers/gpu/drm/msm/msm_fbdev.c
@@ -4,6 +4,8 @@
  * Author: Rob Clark 
  */
 
+#include 
+
 #include 
 #include 
 #include 
@@ -57,11 +59,11 @@ static const struct fb_ops msm_fb_ops = {
/* Note: to properly handle manual update displays, we wrap the
 * basic fbdev ops which write to the framebuffer
 */
-   .fb_read = drm_fb_helper_sys_read,
-   .fb_write = drm_fb_helper_sys_write,
-   .fb_fillrect = drm_fb_helper_sys_fillrect,
-   .fb_copyarea = drm_fb_helper_sys_copyarea,
-   .fb_imageblit = drm_fb_helper_sys_imageblit,
+   .fb_read = fb_sys_read,
+   .fb_write = fb_sys_write,
+   .fb_fillrect = sys_fillrect,
+   .fb_copyarea = sys_copyarea,
+   .fb_imageblit = sys_imageblit,
.fb_mmap = msm_fbdev_mmap,
.fb_destroy = msm_fbdev_fb_destroy,
 };
-- 
2.40.1



[PATCH v3 00/12] drm/fbdev: Remove DRM's helpers for fbdev I/O

2023-05-22 Thread Thomas Zimmermann
DRM provides a number of wrappers around fbdev cfb_() sys_(), fb_io_()
and fb_sys_() helpers. The DRM functions don't provide any additional
functionality for most DRM drivers. So remove them and call the fbdev
I/O helpers directly.

The DRM fbdev I/O wrappers were originally added because 
does not protect its content with CONFIG_FB. DRM fbdev emulation did
not build if the config option had been disabled. This has been
fixed. For fbdev-generic and i915, the wrappers added support for damage
handling. But this is better handled within the two callers, as each
is special in its damage handling.

Patch 1 adds several internal Kconfig otpions that DRM drivers (and
possibly other fbdev code) will use to select the correct set of I/O
helpers.

Patches 2 to 9 replace the DRM wrappers in a number of fbdev emulations.
Patch 10 exports two helpers for damage handling. Patches 11 and 12
update fbdev-generic and i915 with the help of the exported functions.
The patches also remove DRM's fbdev I/O helpers, which are now unused.

DRM's fbdev helpers had to select fbdev I/O helpers for I/O and for
system memory. Each fbdev emulation now selects the correct helpers
for itself. Depending on the selected DRM drivers, kernel builds will
now only contain the necessary fbdev I/O helpers and might be slightly
smaller in size.

v3:
* fix Kconfig options (Jingfeng)
* minimize changes to exynos (Sam)
v2:
* simplify Kconfig handling (Sam)

Thomas Zimmermann (12):
  fbdev: Add Kconfig options to select different fb_ops helpers
  drm/armada: Use regular fbdev I/O helpers
  drm/exynos: Use regular fbdev I/O helpers
  drm/gma500: Use regular fbdev I/O helpers
  drm/radeon: Use regular fbdev I/O helpers
  drm/fbdev-dma: Use regular fbdev I/O helpers
  drm/msm: Use regular fbdev I/O helpers
  drm/omapdrm: Use regular fbdev I/O helpers
  drm/tegra: Use regular fbdev I/O helpers
  drm/fb-helper: Export helpers for marking damage areas
  drm/fbdev-generic: Implement dedicated fbdev I/O helpers
  drm/i915: Implement dedicated fbdev I/O helpers

 drivers/gpu/drm/Kconfig|  10 +-
 drivers/gpu/drm/armada/Kconfig |   1 +
 drivers/gpu/drm/armada/armada_fbdev.c  |   9 +-
 drivers/gpu/drm/drm_fb_helper.c| 233 ++---
 drivers/gpu/drm/drm_fbdev_dma.c|  12 +-
 drivers/gpu/drm/drm_fbdev_generic.c|  47 -
 drivers/gpu/drm/exynos/Kconfig |   1 +
 drivers/gpu/drm/exynos/exynos_drm_fbdev.c  |  10 +-
 drivers/gpu/drm/gma500/Kconfig |   1 +
 drivers/gpu/drm/gma500/fbdev.c |   9 +-
 drivers/gpu/drm/i915/Kconfig   |   1 +
 drivers/gpu/drm/i915/display/intel_fbdev.c |  51 -
 drivers/gpu/drm/msm/Kconfig|   1 +
 drivers/gpu/drm/msm/msm_fbdev.c|  12 +-
 drivers/gpu/drm/omapdrm/Kconfig|   1 +
 drivers/gpu/drm/omapdrm/omap_fbdev.c   |  12 +-
 drivers/gpu/drm/radeon/Kconfig |   1 +
 drivers/gpu/drm/radeon/radeon_fbdev.c  |   9 +-
 drivers/gpu/drm/tegra/Kconfig  |   1 +
 drivers/gpu/drm/tegra/fbdev.c  |  11 +-
 drivers/video/fbdev/Kconfig|  21 ++
 include/drm/drm_fb_helper.h|  84 +---
 22 files changed, 183 insertions(+), 355 deletions(-)


base-commit: f533234d40e8f5b8599bd5bc97fa8e30384aec03
prerequisite-patch-id: 0aa359f6144c4015c140c8a6750be19099c676fb
prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24
prerequisite-patch-id: cbc453ee02fae02af22fbfdce56ab732c7a88c36
-- 
2.40.1



[PATCH v3 06/12] drm/fbdev-dma: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Fbdev-dma does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_SYS_HELPERS option

Signed-off-by: Thomas Zimmermann 
---
 drivers/gpu/drm/Kconfig |  1 +
 drivers/gpu/drm/drm_fbdev_dma.c | 12 +++-
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index ba3fb04bb691..77fb10ddd8a2 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -223,6 +223,7 @@ config DRM_TTM_HELPER
 config DRM_GEM_DMA_HELPER
tristate
depends on DRM
+   select FB_SYS_HELPERS if DRM_FBDEV_EMULATION
help
  Choose this if you need the GEM DMA helper functions
 
diff --git a/drivers/gpu/drm/drm_fbdev_dma.c b/drivers/gpu/drm/drm_fbdev_dma.c
index 728deffcc0d9..09a36dc38c43 100644
--- a/drivers/gpu/drm/drm_fbdev_dma.c
+++ b/drivers/gpu/drm/drm_fbdev_dma.c
@@ -1,5 +1,7 @@
 // SPDX-License-Identifier: MIT
 
+#include 
+
 #include 
 #include 
 #include 
@@ -64,12 +66,12 @@ static const struct fb_ops drm_fbdev_dma_fb_ops = {
.owner = THIS_MODULE,
.fb_open = drm_fbdev_dma_fb_open,
.fb_release = drm_fbdev_dma_fb_release,
-   .fb_read = drm_fb_helper_sys_read,
-   .fb_write = drm_fb_helper_sys_write,
+   .fb_read = fb_sys_read,
+   .fb_write = fb_sys_write,
DRM_FB_HELPER_DEFAULT_OPS,
-   .fb_fillrect = drm_fb_helper_sys_fillrect,
-   .fb_copyarea = drm_fb_helper_sys_copyarea,
-   .fb_imageblit = drm_fb_helper_sys_imageblit,
+   .fb_fillrect = sys_fillrect,
+   .fb_copyarea = sys_copyarea,
+   .fb_imageblit = sys_imageblit,
.fb_destroy = drm_fbdev_dma_fb_destroy,
.fb_mmap = drm_fbdev_dma_fb_mmap,
 };
-- 
2.40.1



[PATCH v3 09/12] drm/tegra: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Tegra does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_SYS_HELPERS option

Signed-off-by: Thomas Zimmermann 
Cc: Thierry Reding 
Cc: Mikko Perttunen 
Cc: Jonathan Hunter 
---
 drivers/gpu/drm/tegra/Kconfig |  1 +
 drivers/gpu/drm/tegra/fbdev.c | 11 ++-
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/tegra/Kconfig b/drivers/gpu/drm/tegra/Kconfig
index 56453ca277c2..498313778175 100644
--- a/drivers/gpu/drm/tegra/Kconfig
+++ b/drivers/gpu/drm/tegra/Kconfig
@@ -12,6 +12,7 @@ config DRM_TEGRA
select DRM_KMS_HELPER
select DRM_MIPI_DSI
select DRM_PANEL
+   select FB_SYS_HELPERS if DRM_FBDEV_EMULATION
select TEGRA_HOST1X
select INTERCONNECT
select IOMMU_IOVA
diff --git a/drivers/gpu/drm/tegra/fbdev.c b/drivers/gpu/drm/tegra/fbdev.c
index dca9eccae466..144d851e566f 100644
--- a/drivers/gpu/drm/tegra/fbdev.c
+++ b/drivers/gpu/drm/tegra/fbdev.c
@@ -8,6 +8,7 @@
  */
 
 #include 
+#include 
 #include 
 
 #include 
@@ -59,11 +60,11 @@ static void tegra_fbdev_fb_destroy(struct fb_info *info)
 static const struct fb_ops tegra_fb_ops = {
.owner = THIS_MODULE,
DRM_FB_HELPER_DEFAULT_OPS,
-   .fb_read = drm_fb_helper_sys_read,
-   .fb_write = drm_fb_helper_sys_write,
-   .fb_fillrect = drm_fb_helper_sys_fillrect,
-   .fb_copyarea = drm_fb_helper_sys_copyarea,
-   .fb_imageblit = drm_fb_helper_sys_imageblit,
+   .fb_read = fb_sys_read,
+   .fb_write = fb_sys_write,
+   .fb_fillrect = sys_fillrect,
+   .fb_copyarea = sys_copyarea,
+   .fb_imageblit = sys_imageblit,
.fb_mmap = tegra_fb_mmap,
.fb_destroy = tegra_fbdev_fb_destroy,
 };
-- 
2.40.1



[PATCH v3 05/12] drm/radeon: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Radeon does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_IO_HELPERS option

Signed-off-by: Thomas Zimmermann 
Acked-by: Alex Deucher 
Cc: Alex Deucher 
Cc: "Christian König" 
Cc: "Pan, Xinhui" 
---
 drivers/gpu/drm/radeon/Kconfig| 1 +
 drivers/gpu/drm/radeon/radeon_fbdev.c | 9 -
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig
index e19d77d58810..fe498c8af1bb 100644
--- a/drivers/gpu/drm/radeon/Kconfig
+++ b/drivers/gpu/drm/radeon/Kconfig
@@ -11,6 +11,7 @@ config DRM_RADEON
select DRM_SUBALLOC_HELPER
 select DRM_TTM
select DRM_TTM_HELPER
+   select FB_IO_HELPERS if DRM_FBDEV_EMULATION
select SND_HDA_COMPONENT if SND_HDA_CORE
select POWER_SUPPLY
select HWMON
diff --git a/drivers/gpu/drm/radeon/radeon_fbdev.c 
b/drivers/gpu/drm/radeon/radeon_fbdev.c
index fe76e29910ef..dcabe527f9c0 100644
--- a/drivers/gpu/drm/radeon/radeon_fbdev.c
+++ b/drivers/gpu/drm/radeon/radeon_fbdev.c
@@ -24,6 +24,7 @@
  * David Airlie
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -193,11 +194,9 @@ static const struct fb_ops radeon_fbdev_fb_ops = {
DRM_FB_HELPER_DEFAULT_OPS,
.fb_open = radeon_fbdev_fb_open,
.fb_release = radeon_fbdev_fb_release,
-   .fb_read = drm_fb_helper_cfb_read,
-   .fb_write = drm_fb_helper_cfb_write,
-   .fb_fillrect = drm_fb_helper_cfb_fillrect,
-   .fb_copyarea = drm_fb_helper_cfb_copyarea,
-   .fb_imageblit = drm_fb_helper_cfb_imageblit,
+   .fb_fillrect = cfb_fillrect,
+   .fb_copyarea = cfb_copyarea,
+   .fb_imageblit = cfb_imageblit,
.fb_destroy = radeon_fbdev_fb_destroy,
 };
 
-- 
2.40.1



[PATCH v3 04/12] drm/gma500: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Gma500 does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_IO_HELPERS option

Signed-off-by: Thomas Zimmermann 
Cc: Patrik Jakobsson 
---
 drivers/gpu/drm/gma500/Kconfig | 1 +
 drivers/gpu/drm/gma500/fbdev.c | 9 -
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/gma500/Kconfig b/drivers/gpu/drm/gma500/Kconfig
index 2efc0eb41c64..cd3d92725ed4 100644
--- a/drivers/gpu/drm/gma500/Kconfig
+++ b/drivers/gpu/drm/gma500/Kconfig
@@ -3,6 +3,7 @@ config DRM_GMA500
tristate "Intel GMA500/600/3600/3650 KMS Framebuffer"
depends on DRM && PCI && X86 && MMU
select DRM_KMS_HELPER
+   select FB_IO_HELPERS if DRM_FBDEV_EMULATION
select I2C
select I2C_ALGOBIT
# GMA500 depends on ACPI_VIDEO when ACPI is enabled, just like i915
diff --git a/drivers/gpu/drm/gma500/fbdev.c b/drivers/gpu/drm/gma500/fbdev.c
index 62287407e717..60005c3d01d0 100644
--- a/drivers/gpu/drm/gma500/fbdev.c
+++ b/drivers/gpu/drm/gma500/fbdev.c
@@ -5,6 +5,7 @@
  *
  **/
 
+#include 
 #include 
 
 #include 
@@ -136,11 +137,9 @@ static const struct fb_ops psb_fbdev_fb_ops = {
.owner = THIS_MODULE,
DRM_FB_HELPER_DEFAULT_OPS,
.fb_setcolreg = psb_fbdev_fb_setcolreg,
-   .fb_read = drm_fb_helper_cfb_read,
-   .fb_write = drm_fb_helper_cfb_write,
-   .fb_fillrect = drm_fb_helper_cfb_fillrect,
-   .fb_copyarea = drm_fb_helper_cfb_copyarea,
-   .fb_imageblit = drm_fb_helper_cfb_imageblit,
+   .fb_fillrect = cfb_fillrect,
+   .fb_copyarea = cfb_copyarea,
+   .fb_imageblit = cfb_imageblit,
.fb_mmap = psb_fbdev_fb_mmap,
.fb_destroy = psb_fbdev_fb_destroy,
 };
-- 
2.40.1



[PATCH v3 01/12] fbdev: Add Kconfig options to select different fb_ops helpers

2023-05-22 Thread Thomas Zimmermann
Many fbdev drivers use the same set of fb_ops helpers. Add Kconfig
options to select them at once. This will help with making DRM's
fbdev emulation code more modular, but can also be used to simplify
fbdev's driver configs.

v3:
* fix select statement (Jingfeng)

Signed-off-by: Thomas Zimmermann 
---
 drivers/video/fbdev/Kconfig | 21 +
 1 file changed, 21 insertions(+)

diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
index 485e8c35d5c6..6e4b6ad9d8e6 100644
--- a/drivers/video/fbdev/Kconfig
+++ b/drivers/video/fbdev/Kconfig
@@ -158,6 +158,27 @@ config FB_DEFERRED_IO
bool
depends on FB
 
+config FB_IO_HELPERS
+   bool
+   depends on FB
+   select FB_CFB_COPYAREA
+   select FB_CFB_FILLRECT
+   select FB_CFB_IMAGEBLIT
+
+config FB_SYS_HELPERS
+   bool
+   depends on FB
+   select FB_SYS_COPYAREA
+   select FB_SYS_FILLRECT
+   select FB_SYS_FOPS
+   select FB_SYS_IMAGEBLIT
+
+config FB_SYS_HELPERS_DEFERRED
+   bool
+   depends on FB
+   select FB_DEFERRED_IO
+   select FB_SYS_HELPERS
+
 config FB_HECUBA
tristate
depends on FB
-- 
2.40.1



[PATCH v3 03/12] drm/exynos: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Exynos does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v3:
* don't reorder Makefile rules (Sam)
v2:
* use FB_IO_HELPERS option

Signed-off-by: Thomas Zimmermann 
Cc: Inki Dae 
Cc: Seung-Woo Kim 
Cc: Kyungmin Park 
Cc: Krzysztof Kozlowski 
Cc: Alim Akhtar 
---
 drivers/gpu/drm/exynos/Kconfig|  1 +
 drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 10 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index 0cb92d651ff1..7ca7e1dab52c 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -7,6 +7,7 @@ config DRM_EXYNOS
select DRM_DISPLAY_HELPER if DRM_EXYNOS_DP
select DRM_KMS_HELPER
select VIDEOMODE_HELPERS
+   select FB_IO_HELPERS if DRM_FBDEV_EMULATION
select SND_SOC_HDMI_CODEC if SND_SOC
help
  Choose this option if you have a Samsung SoC Exynos chipset.
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c 
b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index ea4b3d248aac..bdd1d087 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -8,6 +8,8 @@
  * Seung-Woo Kim 
  */
 
+#include 
+
 #include 
 #include 
 #include 
@@ -49,11 +51,9 @@ static const struct fb_ops exynos_drm_fb_ops = {
.owner  = THIS_MODULE,
DRM_FB_HELPER_DEFAULT_OPS,
.fb_mmap= exynos_drm_fb_mmap,
-   .fb_read= drm_fb_helper_cfb_read,
-   .fb_write   = drm_fb_helper_cfb_write,
-   .fb_fillrect= drm_fb_helper_cfb_fillrect,
-   .fb_copyarea= drm_fb_helper_cfb_copyarea,
-   .fb_imageblit   = drm_fb_helper_cfb_imageblit,
+   .fb_fillrect= cfb_fillrect,
+   .fb_copyarea= cfb_copyarea,
+   .fb_imageblit   = cfb_imageblit,
.fb_destroy = exynos_drm_fb_destroy,
 };
 
-- 
2.40.1



[PATCH v3 02/12] drm/armada: Use regular fbdev I/O helpers

2023-05-22 Thread Thomas Zimmermann
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Armada does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev code.

By using fbdev helpers directly within each DRM fbdev emulation,
we can eventually remove DRM's wrapper functions entirely.

v2:
* use FB_IO_HELPERS option

Signed-off-by: Thomas Zimmermann 
Cc: Russell King 
---
 drivers/gpu/drm/armada/Kconfig| 1 +
 drivers/gpu/drm/armada/armada_fbdev.c | 9 -
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/armada/Kconfig b/drivers/gpu/drm/armada/Kconfig
index f5c66d89ba99..5afade25e217 100644
--- a/drivers/gpu/drm/armada/Kconfig
+++ b/drivers/gpu/drm/armada/Kconfig
@@ -3,6 +3,7 @@ config DRM_ARMADA
tristate "DRM support for Marvell Armada SoCs"
depends on DRM && HAVE_CLK && ARM && MMU
select DRM_KMS_HELPER
+   select FB_IO_HELPERS if DRM_FBDEV_EMULATION
help
  Support the "LCD" controllers found on the Marvell Armada 510
  devices.  There are two controllers on the device, each controller
diff --git a/drivers/gpu/drm/armada/armada_fbdev.c 
b/drivers/gpu/drm/armada/armada_fbdev.c
index 0a5fd1aa86eb..6c3bbaf53569 100644
--- a/drivers/gpu/drm/armada/armada_fbdev.c
+++ b/drivers/gpu/drm/armada/armada_fbdev.c
@@ -5,6 +5,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 
@@ -34,11 +35,9 @@ static void armada_fbdev_fb_destroy(struct fb_info *info)
 static const struct fb_ops armada_fb_ops = {
.owner  = THIS_MODULE,
DRM_FB_HELPER_DEFAULT_OPS,
-   .fb_read= drm_fb_helper_cfb_read,
-   .fb_write   = drm_fb_helper_cfb_write,
-   .fb_fillrect= drm_fb_helper_cfb_fillrect,
-   .fb_copyarea= drm_fb_helper_cfb_copyarea,
-   .fb_imageblit   = drm_fb_helper_cfb_imageblit,
+   .fb_fillrect= cfb_fillrect,
+   .fb_copyarea= cfb_copyarea,
+   .fb_imageblit   = cfb_imageblit,
.fb_destroy = armada_fbdev_fb_destroy,
 };
 
-- 
2.40.1



[PATCH 5/5] drm/amdgpu: fix acpi build warnings

2023-05-22 Thread Arnd Bergmann
From: Arnd Bergmann 

Two newly introduced functions are in the global namespace but have no 
prototypes
or callers outside of amdgpu_acpi.c, another function is static but only has
a caller inside of an #ifdef:

drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:902:13: error: no previous prototype 
for 'amdgpu_acpi_get_node_id' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:928:30: error: no previous prototype 
for 'amdgpu_acpi_get_dev' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:860:33: error: 
'amdgpu_acpi_get_numa_info' defined but not used [-Werror=unused-function]

Avoid the warnings by marking all of them static and ensuring that the compiler 
is
able to see the callsites.

Fixes: c34db97b8217 ("drm/amdgpu: Add API to get numa information of XCC")
Fixes: 1f6f659d06e1 ("drm/amdgpu: Store additional numa node information")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
index 873532c4adbe..1dbcd0e62478 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c
@@ -899,13 +899,15 @@ static struct amdgpu_numa_info 
*amdgpu_acpi_get_numa_info(uint32_t pxm)
  *
  * Returns ACPI STATUS OK with Node ID on success or the corresponding failure 
reason
  */
-acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
+static acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
struct amdgpu_numa_info **numa_info)
 {
-#ifdef CONFIG_ACPI_NUMA
u64 pxm;
acpi_status status;
 
+   if (!IS_ENABLED(CONFIG_ACPI_NUMA))
+   return_ACPI_STATUS(AE_NOT_EXIST);
+
if (!numa_info)
return_ACPI_STATUS(AE_ERROR);
 
@@ -920,12 +922,9 @@ acpi_status amdgpu_acpi_get_node_id(acpi_handle handle,
return_ACPI_STATUS(AE_ERROR);
 
return_ACPI_STATUS(AE_OK);
-#else
-   return_ACPI_STATUS(AE_NOT_EXIST);
-#endif
 }
 
-struct amdgpu_acpi_dev_info *amdgpu_acpi_get_dev(u16 bdf)
+static struct amdgpu_acpi_dev_info *amdgpu_acpi_get_dev(u16 bdf)
 {
struct amdgpu_acpi_dev_info *acpi_dev;
 
-- 
2.39.2



[PATCH 4/5] drm/amdgpu: use %pad format string for dma_addr_t

2023-05-22 Thread Arnd Bergmann
From: Arnd Bergmann 

DMA addresses can be shorter than u64, which results in a broken debug output:

drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c: In function 
'amdgpu_gart_table_ram_alloc':
drivers/gpu/drm/amd/amdgpu/amdgpu.h:41:22: error: format '%llx' expects 
argument of type 'long long unsigned int', but argument 4 has type 'dma_addr_t' 
{aka 'unsigned int'} [-Werror=format=]
drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c:146:9: note: in expansion of macro 
'dev_info'
  146 | dev_info(adev->dev, "%s dma_addr:%llx\n", __func__, dma_addr);

Use the special %pad format string and pass the DMA address by reference.

Fixes: d020a29b6b58 ("drm/amdgpu: Allocate GART table in RAM for AMD APU")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
index a070adf30c88..73b8cca35bab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c
@@ -143,7 +143,7 @@ int amdgpu_gart_table_ram_alloc(struct amdgpu_device *adev)
return -EFAULT;
}
 
-   dev_info(adev->dev, "%s dma_addr:%llx\n", __func__, dma_addr);
+   dev_info(adev->dev, "%s dma_addr:%pad\n", __func__, _addr);
/* Create SG table */
sg = kmalloc(sizeof(*sg), GFP_KERNEL);
if (!sg) {
-- 
2.39.2



[PATCH 3/5] drm/amdgpu:mark aqua_vanjaram_reg_init.c function as static

2023-05-22 Thread Arnd Bergmann
From: Arnd Bergmann 

A few newly added global functions have no prototype, which causes warnings:

drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c:169:5: error: no previous 
prototype for 'aqua_vanjaram_select_scheds' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c:310:5: error: no previous 
prototype for '__aqua_vanjaram_get_xcc_per_xcp' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c:337:5: error: no previous 
prototype for '__aqua_vanjaram_get_xcp_ip_info' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c:593:5: error: no previous 
prototype for 'aqua_vanjaram_get_xcp_ip_details' [-Werror=missing-prototypes]

There are no callers from other files, so just mark them as 'static'.

Fixes: 5f9f80485953 ("drm/amdgpu: add partition schedule for GC(9, 4, 3)")
Fixes: 27614f589fc0 ("drm/amdgpu: Add SOC partition funcs for GC v9.4.3")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c 
b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c
index 68d1a0fc5f5d..a595bb958215 100644
--- a/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c
+++ b/drivers/gpu/drm/amd/amdgpu/aqua_vanjaram_reg_init.c
@@ -166,7 +166,7 @@ static int aqua_vanjaram_update_partition_sched_list(struct 
amdgpu_device *adev)
return aqua_vanjaram_xcp_sched_list_update(adev);
 }
 
-int aqua_vanjaram_select_scheds(
+static int aqua_vanjaram_select_scheds(
struct amdgpu_device *adev,
u32 hw_ip,
u32 hw_prio,
@@ -307,7 +307,7 @@ static int aqua_vanjaram_query_partition_mode(struct 
amdgpu_xcp_mgr *xcp_mgr)
return mode;
 }
 
-int __aqua_vanjaram_get_xcc_per_xcp(struct amdgpu_xcp_mgr *xcp_mgr, int mode)
+static int __aqua_vanjaram_get_xcc_per_xcp(struct amdgpu_xcp_mgr *xcp_mgr, int 
mode)
 {
int num_xcc, num_xcc_per_xcp = 0;
 
@@ -334,7 +334,7 @@ int __aqua_vanjaram_get_xcc_per_xcp(struct amdgpu_xcp_mgr 
*xcp_mgr, int mode)
return num_xcc_per_xcp;
 }
 
-int __aqua_vanjaram_get_xcp_ip_info(struct amdgpu_xcp_mgr *xcp_mgr, int xcp_id,
+static int __aqua_vanjaram_get_xcp_ip_info(struct amdgpu_xcp_mgr *xcp_mgr, int 
xcp_id,
enum AMDGPU_XCP_IP_BLOCK ip_id,
struct amdgpu_xcp_ip *ip)
 {
@@ -590,7 +590,7 @@ static int aqua_vanjaram_get_xcp_mem_id(struct 
amdgpu_xcp_mgr *xcp_mgr,
return r;
 }
 
-int aqua_vanjaram_get_xcp_ip_details(struct amdgpu_xcp_mgr *xcp_mgr, int 
xcp_id,
+static int aqua_vanjaram_get_xcp_ip_details(struct amdgpu_xcp_mgr *xcp_mgr, 
int xcp_id,
 enum AMDGPU_XCP_IP_BLOCK ip_id,
 struct amdgpu_xcp_ip *ip)
 {
-- 
2.39.2



[PATCH 2/5] drm/amdkfd: mark local functions as static

2023-05-22 Thread Arnd Bergmann
From: Arnd Bergmann 

The file was newly added and causes some -Wmissing-prototype warnings:

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c:57:5: error: no previous 
prototype for 'kgd_gfx_v9_4_3_hqd_sdma_load' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c:126:5: error: no previous 
prototype for 'kgd_gfx_v9_4_3_hqd_sdma_dump' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c:163:6: error: no previous 
prototype for 'kgd_gfx_v9_4_3_hqd_sdma_is_occupied' [-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c:181:5: error: no previous 
prototype for 'kgd_gfx_v9_4_3_hqd_sdma_destroy' [-Werror=missing-prototypes]

Mark these all as 'static' since there are no outside callers.

Fixes: 09a95a85cf3e ("drm/amdkfd: Update SDMA queue management for GFX9.4.3")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
index 81dfbe39fd8e..5b4b7f8b92a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
@@ -54,7 +54,7 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device 
*adev,
return retval;
 }
 
-int kgd_gfx_v9_4_3_hqd_sdma_load(struct amdgpu_device *adev, void *mqd,
+static int kgd_gfx_v9_4_3_hqd_sdma_load(struct amdgpu_device *adev, void *mqd,
 uint32_t __user *wptr, struct mm_struct *mm)
 {
struct v9_sdma_mqd *m;
@@ -123,7 +123,7 @@ int kgd_gfx_v9_4_3_hqd_sdma_load(struct amdgpu_device 
*adev, void *mqd,
return 0;
 }
 
-int kgd_gfx_v9_4_3_hqd_sdma_dump(struct amdgpu_device *adev,
+static int kgd_gfx_v9_4_3_hqd_sdma_dump(struct amdgpu_device *adev,
 uint32_t engine_id, uint32_t queue_id,
 uint32_t (**dump)[2], uint32_t *n_regs)
 {
@@ -160,7 +160,7 @@ int kgd_gfx_v9_4_3_hqd_sdma_dump(struct amdgpu_device *adev,
return 0;
 }
 
-bool kgd_gfx_v9_4_3_hqd_sdma_is_occupied(struct amdgpu_device *adev, void *mqd)
+static bool kgd_gfx_v9_4_3_hqd_sdma_is_occupied(struct amdgpu_device *adev, 
void *mqd)
 {
struct v9_sdma_mqd *m;
uint32_t sdma_rlc_reg_offset;
@@ -178,7 +178,7 @@ bool kgd_gfx_v9_4_3_hqd_sdma_is_occupied(struct 
amdgpu_device *adev, void *mqd)
return false;
 }
 
-int kgd_gfx_v9_4_3_hqd_sdma_destroy(struct amdgpu_device *adev, void *mqd,
+static int kgd_gfx_v9_4_3_hqd_sdma_destroy(struct amdgpu_device *adev, void 
*mqd,
unsigned int utimeout)
 {
struct v9_sdma_mqd *m;
-- 
2.39.2



[PATCH 1/5] drm/amd/pm: mark irq functions as 'static'

2023-05-22 Thread Arnd Bergmann
From: Arnd Bergmann 

Two newly added functions cause a warning because they lack a prototype:

drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.c:1328:5: error: 
no previous prototype for 'smu_v13_0_6_set_irq_state' 
[-Werror=missing-prototypes]
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu13/smu_v13_0_6_ppt.c:1368:5: error: 
no previous prototype for 'smu_v13_0_6_register_irq_handler' 
[-Werror=missing-prototypes]

They are only used locally, so just mark them static.

Fixes: 48b5659cf086 ("drm/amd/pm: Add ih for SMU v13.0.6 thermal throttling")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index a712b2bf2d25..41b49cc827cd 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1325,7 +1325,7 @@ static int smu_v13_0_6_irq_process(struct amdgpu_device 
*adev,
return 0;
 }
 
-int smu_v13_0_6_set_irq_state(struct amdgpu_device *adev,
+static int smu_v13_0_6_set_irq_state(struct amdgpu_device *adev,
  struct amdgpu_irq_src *source,
  unsigned tyep,
  enum amdgpu_interrupt_state state)
@@ -1365,7 +1365,7 @@ static const struct amdgpu_irq_src_funcs 
smu_v13_0_6_irq_funcs =
.process = smu_v13_0_6_irq_process,
 };
 
-int smu_v13_0_6_register_irq_handler(struct smu_context *smu)
+static int smu_v13_0_6_register_irq_handler(struct smu_context *smu)
 {
struct amdgpu_device *adev = smu->adev;
struct amdgpu_irq_src *irq_src = >irq_source;
-- 
2.39.2



[PATCH 3/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for yellow carp

2023-05-22 Thread Tim Huang
This patch reverses the DPM clocks levels output of pp_dpm_mclk
and pp_dpm_fclk.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels that from
the DFPstateTable are given the reversed orders by PMFW. Like the
memory DPM clocks that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
index ac5fcca0e47f..a92da336ecec 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
@@ -1000,7 +1000,7 @@ static int yellow_carp_set_soft_freq_limited_range(struct 
smu_context *smu,
 static int yellow_carp_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf)
 {
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min, max;
 
@@ -1033,7 +1033,8 @@ static int yellow_carp_print_clk_levels(struct 
smu_context *smu,
goto print_clk_out;
 
for (i = 0; i < count; i++) {
-   ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, 
i, );
+   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? 
(count - i - 1) : i;
+   ret = yellow_carp_get_dpm_freq_by_index(smu, clk_type, 
idx, );
if (ret)
goto print_clk_out;
 
-- 
2.34.1



[PATCH 1/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for SMU v13.0.4

2023-05-22 Thread Tim Huang
This patch reverses the DPM clocks levels output of pp_dpm_mclk
and pp_dpm_fclk.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels that from
the DFPstateTable are given the reversed orders by PMFW. Like the
memory DPM clocks that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
index 0a0a7debb3ae..46a8a366f287 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c
@@ -478,7 +478,7 @@ static int smu_v13_0_4_get_dpm_level_count(struct 
smu_context *smu,
 static int smu_v13_0_4_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf)
 {
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min, max;
 
@@ -512,7 +512,8 @@ static int smu_v13_0_4_print_clk_levels(struct smu_context 
*smu,
break;
 
for (i = 0; i < count; i++) {
-   ret = smu_v13_0_4_get_dpm_freq_by_index(smu, clk_type, 
i, );
+   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? 
(count - i - 1) : i;
+   ret = smu_v13_0_4_get_dpm_freq_by_index(smu, clk_type, 
idx, );
if (ret)
break;
 
-- 
2.34.1



[PATCH 4/4] amd/pm/swsmu: reverse mclk and fclk clocks levels for vangogh

2023-05-22 Thread Tim Huang
This patch reverses the DPM clocks levels output of pp_dpm_mclk
and pp_dpm_fclk.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels that from
the DFPstateTable are given the reversed orders by PMFW. Like the
memory DPM clocks that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
index 7433dcaa16e0..067b4e0b026c 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
@@ -582,7 +582,7 @@ static int vangogh_print_legacy_clk_levels(struct 
smu_context *smu,
DpmClocks_t *clk_table = smu->smu_table.clocks_table;
SmuMetrics_legacy_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0;
bool cur_value_match_level = false;
 
@@ -656,7 +656,8 @@ static int vangogh_print_legacy_clk_levels(struct 
smu_context *smu,
case SMU_MCLK:
case SMU_FCLK:
for (i = 0; i < count; i++) {
-   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
);
+   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? 
(count - i - 1) : i;
+   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
);
if (ret)
return ret;
if (!value)
@@ -683,7 +684,7 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
DpmClocks_t *clk_table = smu->smu_table.clocks_table;
SmuMetrics_t metrics;
struct smu_dpm_context *smu_dpm_ctx = &(smu->smu_dpm);
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0;
bool cur_value_match_level = false;
uint32_t min, max;
@@ -765,7 +766,8 @@ static int vangogh_print_clk_levels(struct smu_context *smu,
case SMU_MCLK:
case SMU_FCLK:
for (i = 0; i < count; i++) {
-   ret = vangogh_get_dpm_clk_limited(smu, clk_type, i, 
);
+   idx = (clk_type == SMU_FCLK || clk_type == SMU_MCLK) ? 
(count - i - 1) : i;
+   ret = vangogh_get_dpm_clk_limited(smu, clk_type, idx, 
);
if (ret)
return ret;
if (!value)
-- 
2.34.1



[PATCH 2/4] amd/pm/swsmu: reverse mclk clocks levels for SMU v13.0.5

2023-05-22 Thread Tim Huang
This patch reverses the DPM clocks levels output of pp_dpm_mclk.

On dGPUs and older APUs we expose the levels from lowest clocks
to highest clocks. But for some APUs, the clocks levels that from
the DFPstateTable are given the reversed orders by PMFW. Like the
memory DPM clocks that are exposed by pp_dpm_mclk.

It's not intuitive that they are reversed on these APUs. All tools
and software that talks to the driver then has to know different ways
to interpret the data depending on the asic.

So we need to reverse them to expose the clocks levels from the
driver consistently.

Signed-off-by: Tim Huang 
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
index 165b2470b017..7c3ac535f68a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_5_ppt.c
@@ -866,7 +866,7 @@ static int smu_v13_0_5_set_soft_freq_limited_range(struct 
smu_context *smu,
 static int smu_v13_0_5_print_clk_levels(struct smu_context *smu,
enum smu_clk_type clk_type, char *buf)
 {
-   int i, size = 0, ret = 0;
+   int i, idx, size = 0, ret = 0;
uint32_t cur_value = 0, value = 0, count = 0;
uint32_t min = 0, max = 0;
 
@@ -898,7 +898,8 @@ static int smu_v13_0_5_print_clk_levels(struct smu_context 
*smu,
goto print_clk_out;
 
for (i = 0; i < count; i++) {
-   ret = smu_v13_0_5_get_dpm_freq_by_index(smu, clk_type, 
i, );
+   idx = (clk_type == SMU_MCLK) ? (count - i - 1) : i;
+   ret = smu_v13_0_5_get_dpm_freq_by_index(smu, clk_type, 
idx, );
if (ret)
goto print_clk_out;
 
-- 
2.34.1



Re: [PATCH v4 07/10] drm/amdgpu: map usermode queue into MES

2023-05-22 Thread Shashank Sharma



On 19/05/2023 23:22, Alex Deucher wrote:

On Mon, Apr 24, 2023 at 1:39 PM Shashank Sharma  wrote:

This patch adds new functions to map/unmap a usermode queue into
the FW, using the MES ring. As soon as this mapping is done, the
queue would  be considered ready to accept the workload.

V1: Addressed review comments from Alex on the RFC patch series
 - Map/Unmap should be IP specific.
V2:
 Addressed review comments from Christian:
 - Fix the wptr_mc_addr calculation (moved into another patch)
 Addressed review comments from Alex:
 - Do not add fptrs for map/unmap

V3: Integration with doorbell manager
V4: Rebase

Cc: Alex Deucher 
Cc: Christian Koenig 
Signed-off-by: Shashank Sharma 
---
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 67 ++
  1 file changed, 67 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 86de35292f69..7a45d68091ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -31,6 +31,7 @@
  #include "amdgpu_smu.h"
  #include "amdgpu_atomfirmware.h"
  #include "amdgpu_userqueue.h"
+#include "amdgpu_mes.h"
  #include "imu_v11_0.h"
  #include "soc21.h"
  #include "nvd.h"
@@ -6411,6 +6412,64 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
 .funcs = _v11_0_ip_funcs,
  };

+static int gfx_v11_userq_map(struct amdgpu_userq_mgr *uq_mgr,
+struct amdgpu_usermode_queue *queue)
+{
+   struct amdgpu_device *adev = uq_mgr->adev;
+   struct mes_add_queue_input queue_input;
+   int r;
+
+   memset(_input, 0x0, sizeof(struct mes_add_queue_input));
+
+   queue_input.process_va_start = 0;
+   queue_input.process_va_end = (adev->vm_manager.max_pfn - 1) << 
AMDGPU_GPU_PAGE_SHIFT;
+   queue_input.process_quantum = 10; /* 10ms */
+   queue_input.gang_quantum = 1; /* 1ms */
+   queue_input.paging = false;
+
+   queue_input.gang_context_addr = queue->gang_ctx_gpu_addr;
+   queue_input.process_context_addr = queue->proc_ctx_gpu_addr;
+   queue_input.inprocess_gang_priority = AMDGPU_MES_PRIORITY_LEVEL_NORMAL;
+   queue_input.gang_global_priority_level = 
AMDGPU_MES_PRIORITY_LEVEL_NORMAL;
+
+   queue_input.process_id = queue->vm->pasid;
+   queue_input.queue_type = queue->queue_type;
+   queue_input.mqd_addr = queue->mqd.gpu_addr;
+   queue_input.wptr_addr = queue->userq_prop.wptr_gpu_addr;
+   queue_input.queue_size = queue->userq_prop.queue_size >> 2;
+   queue_input.doorbell_offset = queue->userq_prop.doorbell_index;
+   queue_input.page_table_base_addr = 
amdgpu_gmc_pd_addr(queue->vm->root.bo);
+
+   amdgpu_mes_lock(>mes);
+   r = adev->mes.funcs->add_hw_queue(>mes, _input);
+   amdgpu_mes_unlock(>mes);
+   if (r) {
+   DRM_ERROR("Failed to map queue in HW, err (%d)\n", r);
+   return r;
+   }
+
+   DRM_DEBUG_DRIVER("Queue %d mapped successfully\n", queue->queue_id);
+   return 0;
+}
+
+static void gfx_v11_userq_unmap(struct amdgpu_userq_mgr *uq_mgr,
+   struct amdgpu_usermode_queue *queue)
+{
+   struct amdgpu_device *adev = uq_mgr->adev;
+   struct mes_remove_queue_input queue_input;
+   int r;
+
+   memset(_input, 0x0, sizeof(struct mes_remove_queue_input));
+   queue_input.doorbell_offset = queue->userq_prop.doorbell_index;
+   queue_input.gang_context_addr = queue->gang_ctx_gpu_addr;
+
+   amdgpu_mes_lock(>mes);
+   r = adev->mes.funcs->remove_hw_queue(>mes, _input);
+   amdgpu_mes_unlock(>mes);
+   if (r)
+   DRM_ERROR("Failed to unmap queue in HW, err (%d)\n", r);
+}

gfx_v11_0_ for consistency.

Alex


Noted,

Shashank


+
  static void gfx_v11_userq_set_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
 struct amdgpu_usermode_queue *queue)
  {
@@ -6507,6 +6566,13 @@ gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermode

 gfx_v11_userq_set_ctx_space(uq_mgr, queue);
 amdgpu_bo_unreserve(mqd->obj);
+
+   /* Map the queue in HW using MES ring */
+   r = gfx_v11_userq_map(uq_mgr, queue);
+   if (r) {
+   DRM_ERROR("Failed to map userqueue (%d)\n", r);
+   goto free_ctx;
+   }
 DRM_DEBUG_DRIVER("MQD for queue %d created\n", queue->queue_id);
 return 0;

@@ -6523,6 +6589,7 @@ gfx_v11_userq_mqd_destroy(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermod
  {
 struct amdgpu_userq_ctx_space *mqd = >mqd;

+   gfx_v11_userq_unmap(uq_mgr, queue);
 gfx_v11_userq_destroy_ctx_space(uq_mgr, queue);
 amdgpu_bo_free_kernel(>obj, >gpu_addr, >cpu_ptr);
  }
--
2.40.0



Re: [PATCH v4 06/10] drm/amdgpu: set FW parameters in v11_struct

2023-05-22 Thread Shashank Sharma



On 19/05/2023 23:22, Alex Deucher wrote:

On Mon, Apr 24, 2023 at 1:39 PM Shashank Sharma  wrote:

From: Arvind Yadav 

This patch sets new parameters defined in v11_struct for
usermode queue with the respective allocated gpu context
space addresses.

V4: Split the patch into two parts, keep only the set parameter
 part in this series (Alex).

Cc: Alex Deucher 
Cc: Christian Koenig 
Cc: Shashank Sharma 
Signed-off-by: Arvind Yadav 
---
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 19 ++-
  1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index f6b33faea86f..86de35292f69 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -6411,6 +6411,21 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
 .funcs = _v11_0_ip_funcs,
  };

+static void gfx_v11_userq_set_ctx_space(struct amdgpu_userq_mgr *uq_mgr,


gfx_v11_0_ for consistency.

Alex


Noted,

Shashank


+   struct amdgpu_usermode_queue *queue)
+{
+   struct v11_gfx_mqd *mqd = queue->mqd.cpu_ptr;
+
+   mqd->shadow_base_lo = queue->shadow_ctx_gpu_addr & 0xfffc;
+   mqd->shadow_base_hi = upper_32_bits(queue->shadow_ctx_gpu_addr);
+
+   mqd->gds_bkup_base_lo = queue->gds_ctx_gpu_addr & 0xfffc;
+   mqd->gds_bkup_base_hi = upper_32_bits(queue->gds_ctx_gpu_addr);
+
+   mqd->fw_work_area_base_lo = queue->fw_ctx_gpu_addr & 0xfffc;
+   mqd->fw_work_area_base_lo = upper_32_bits(queue->fw_ctx_gpu_addr);
+}
+
  static int gfx_v11_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
   struct amdgpu_usermode_queue *queue)
  {
@@ -6484,12 +6499,14 @@ gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermode
 queue->userq_prop.use_doorbell = true;
 queue->userq_prop.mqd_gpu_addr = mqd->gpu_addr;
 r = gfx_v11_mqd->init_mqd(adev, (void *)mqd->cpu_ptr, 
>userq_prop);
-   amdgpu_bo_unreserve(mqd->obj);
 if (r) {
+   amdgpu_bo_unreserve(mqd->obj);
 DRM_ERROR("Failed to init MQD for queue\n");
 goto free_ctx;
 }

+   gfx_v11_userq_set_ctx_space(uq_mgr, queue);
+   amdgpu_bo_unreserve(mqd->obj);
 DRM_DEBUG_DRIVER("MQD for queue %d created\n", queue->queue_id);
 return 0;

--
2.40.0



Re: [PATCH v4 05/10] drm/amdgpu: create context space for usermode queue

2023-05-22 Thread Shashank Sharma



On 19/05/2023 23:21, Alex Deucher wrote:

On Mon, Apr 24, 2023 at 1:39 PM Shashank Sharma  wrote:

The FW expects us to allocate at least one page as context
space to process gang, process, GDS and FW  related work.
This patch creates a joint object for the same, and calculates
GPU space offsets for each of these spaces.

V1: Addressed review comments on RFC patch:
 Alex: Make this function IP specific

V2: Addressed review comments from Christian
 - Allocate only one object for total FW space, and calculate
   offsets for each of these objects.

V3: Integration with doorbell manager
V4: Review comments:
 - Remove shadow from FW space list from cover letter (Alex)
 - Alignment of macro (Luben)

Cc: Alex Deucher 
Cc: Christian Koenig 
Signed-off-by: Shashank Sharma 
---
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 57 ++-
  .../gpu/drm/amd/include/amdgpu_userqueue.h|  6 ++
  2 files changed, 61 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 9f7b14966ac8..f6b33faea86f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -53,6 +53,11 @@
  #define GFX11_NUM_GFX_RINGS1
  #define GFX11_MEC_HPD_SIZE 2048

+#define AMDGPU_USERQ_PROC_CTX_SZ   PAGE_SIZE
+#define AMDGPU_USERQ_GANG_CTX_SZ   PAGE_SIZE
+#define AMDGPU_USERQ_FW_CTX_SZ PAGE_SIZE
+#define AMDGPU_USERQ_GDS_CTX_SZPAGE_SIZE
+
  #define RLCG_UCODE_LOADING_START_ADDRESS   0x2000L
  #define RLC_PG_DELAY_3_DEFAULT_GC_11_0_1   0x1388

@@ -6406,6 +6411,44 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
 .funcs = _v11_0_ip_funcs,
  };

+static int gfx_v11_userq_create_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
+ struct amdgpu_usermode_queue *queue)
+{
+   struct amdgpu_device *adev = uq_mgr->adev;
+   struct amdgpu_userq_ctx_space *ctx = >fw_space;
+   int r, size;
+
+   /*
+* The FW expects at least one page space allocated for
+* process ctx, gang ctx, gds ctx, fw ctx each.
+*/
+   size = AMDGPU_USERQ_PROC_CTX_SZ + AMDGPU_USERQ_FW_CTX_SZ +
+  AMDGPU_USERQ_GANG_CTX_SZ + AMDGPU_USERQ_GDS_CTX_SZ;
+   r = amdgpu_bo_create_kernel(adev, size, PAGE_SIZE,
+   AMDGPU_GEM_DOMAIN_GTT,
+   >obj,
+   >gpu_addr,
+   >cpu_ptr);
+   if (r) {
+   DRM_ERROR("Failed to allocate ctx space bo for userqueue, 
err:%d\n", r);
+   return r;
+   }
+
+   queue->proc_ctx_gpu_addr = ctx->gpu_addr;
+   queue->gang_ctx_gpu_addr = queue->proc_ctx_gpu_addr + 
AMDGPU_USERQ_PROC_CTX_SZ;
+   queue->fw_ctx_gpu_addr = queue->gang_ctx_gpu_addr + 
AMDGPU_USERQ_GANG_CTX_SZ;
+   queue->gds_ctx_gpu_addr = queue->fw_ctx_gpu_addr + 
AMDGPU_USERQ_FW_CTX_SZ;
+   return 0;
+}

Please use gfx_v11_0_ naming for consistency.


Noted,

- Shashank



Alex


+
+static void gfx_v11_userq_destroy_ctx_space(struct amdgpu_userq_mgr *uq_mgr,
+   struct amdgpu_usermode_queue *queue)
+{
+   struct amdgpu_userq_ctx_space *ctx = >fw_space;
+
+   amdgpu_bo_free_kernel(>obj, >gpu_addr, >cpu_ptr);
+}
+
  static int
  gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr, struct 
amdgpu_usermode_queue *queue)
  {
@@ -6426,10 +6469,16 @@ gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermode
 }

 memset(mqd->cpu_ptr, 0, size);
+   r = gfx_v11_userq_create_ctx_space(uq_mgr, queue);
+   if (r) {
+   DRM_ERROR("Failed to create CTX space for userqueue (%d)\n", r);
+   goto free_mqd;
+   }
+
 r = amdgpu_bo_reserve(mqd->obj, false);
 if (unlikely(r != 0)) {
 DRM_ERROR("Failed to reserve mqd for userqueue (%d)", r);
-   goto free_mqd;
+   goto free_ctx;
 }

 queue->userq_prop.use_doorbell = true;
@@ -6438,12 +6487,15 @@ gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermode
 amdgpu_bo_unreserve(mqd->obj);
 if (r) {
 DRM_ERROR("Failed to init MQD for queue\n");
-   goto free_mqd;
+   goto free_ctx;
 }

 DRM_DEBUG_DRIVER("MQD for queue %d created\n", queue->queue_id);
 return 0;

+free_ctx:
+   gfx_v11_userq_destroy_ctx_space(uq_mgr, queue);
+
  free_mqd:
 amdgpu_bo_free_kernel(>obj, >gpu_addr, >cpu_ptr);
 return r;
@@ -6454,6 +6506,7 @@ gfx_v11_userq_mqd_destroy(struct amdgpu_userq_mgr 
*uq_mgr, struct amdgpu_usermod
  {
 struct amdgpu_userq_ctx_space *mqd = >mqd;

+   gfx_v11_userq_destroy_ctx_space(uq_mgr, queue);
 amdgpu_bo_free_kernel(>obj, >gpu_addr, >cpu_ptr);
  }

diff --git 

Re: [PATCH v4 04/10] drm/amdgpu: create GFX-gen11 MQD for userqueue

2023-05-22 Thread Shashank Sharma



On 19/05/2023 23:19, Alex Deucher wrote:

On Mon, Apr 24, 2023 at 1:39 PM Shashank Sharma  wrote:

A Memory queue descriptor (MQD) of a userqueue defines it in
the hw's context. As MQD format can vary between different
graphics IPs, we need gfx GEN specific handlers to create MQDs.

This patch:
- Introduces MQD handler functions for the usermode queues.
- Adds new functions to create and destroy userqueue MQD for
   GFX-GEN-11 IP

V1: Worked on review comments from Alex:
 - Make MQD functions GEN and IP specific

V2: Worked on review comments from Alex:
 - Reuse the existing adev->mqd[ip] for MQD creation
 - Formatting and arrangement of code

V3:
 - Integration with doorbell manager

V4: Review comments addressed:
 - Do not create a new file for userq, reuse gfx_v11_0.c (Alex)
 - Align name of structure members (Luben)
 - Don't break up the Cc tag list and the Sob tag list in commit
   message (Luben)

Cc: Alex Deucher 
Cc: Christian Koenig 
Signed-off-by: Shashank Sharma 
Signed-off-by: Arvind Yadav 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c | 25 
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 57 +++
  .../gpu/drm/amd/include/amdgpu_userqueue.h|  7 +++
  3 files changed, 89 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
index 333f31efbe7b..e95fb35b0cb5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userqueue.c
@@ -81,6 +81,14 @@ static int amdgpu_userqueue_create_gfx(struct drm_file 
*filp, union drm_amdgpu_u
 goto free_queue;
 }

+   if (uq_mgr->userq_funcs[queue->queue_type]->mqd_create) {
+   r = uq_mgr->userq_funcs[queue->queue_type]->mqd_create(uq_mgr, 
queue);
+   if (r) {
+   DRM_ERROR("Failed to create/map userqueue MQD\n");
+   goto free_queue;
+   }
+   }
+
 args->out.queue_id = queue->queue_id;
 args->out.flags = 0;
 mutex_unlock(_mgr->userq_mutex);
@@ -119,6 +127,8 @@ static void amdgpu_userqueue_destroy(struct drm_file *filp, 
int queue_id)
 }

 mutex_lock(_mgr->userq_mutex);
+   if (uq_mgr->userq_funcs[queue->queue_type]->mqd_destroy)
+   uq_mgr->userq_funcs[queue->queue_type]->mqd_destroy(uq_mgr, 
queue);
 amdgpu_userqueue_free_index(uq_mgr, queue->queue_id);
 mutex_unlock(_mgr->userq_mutex);
 kfree(queue);
@@ -149,6 +159,20 @@ int amdgpu_userq_ioctl(struct drm_device *dev, void *data,
 return r;
  }

+extern const struct amdgpu_userq_funcs userq_gfx_v11_funcs;
+
+static void
+amdgpu_userqueue_setup_ip_funcs(struct amdgpu_userq_mgr *uq_mgr)
+{
+   int maj;
+   struct amdgpu_device *adev = uq_mgr->adev;
+   uint32_t version = adev->ip_versions[GC_HWIP][0];
+
+   /* We support usermode queue only for GFX IP as of now */
+   maj = IP_VERSION_MAJ(version);
+   if (maj == 11)
+   uq_mgr->userq_funcs[AMDGPU_HW_IP_GFX] = _gfx_v11_funcs;

Do we need to keep function pointers in uq_mgr?  It would be nice to
keep the logic in the IPs directly.  E.g, in gfx_v11_0.c, we could set
adev->userq_funcs[AMDGPU_HW_IP_GFX] = _gfx_v11_funcs;
then the userq code can just check

if (adev->userq_funcs[queue->queue_type]->mqd_destroy)
adev->userq_funcs[queue->queue_type]->mqd_destroy(adev, queue);

etc.


We have discussed about this here as well: 
https://patchwork.freedesktop.org/patch/529513/?series=113675=2 
(which we probably could not follow up)


The problem is, in the discussion from first patch set we decided not to 
use adev for this, instead moved this in driver private from fptr.



+}

  int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr *userq_mgr, struct 
amdgpu_device *adev)
  {
@@ -156,6 +180,7 @@ int amdgpu_userq_mgr_init(struct amdgpu_userq_mgr 
*userq_mgr, struct amdgpu_devi
 idr_init_base(_mgr->userq_idr, 1);
 userq_mgr->adev = adev;

+   amdgpu_userqueue_setup_ip_funcs(userq_mgr);
 return 0;
  }

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index a56c6e106d00..9f7b14966ac8 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -30,6 +30,7 @@
  #include "amdgpu_psp.h"
  #include "amdgpu_smu.h"
  #include "amdgpu_atomfirmware.h"
+#include "amdgpu_userqueue.h"
  #include "imu_v11_0.h"
  #include "soc21.h"
  #include "nvd.h"
@@ -6404,3 +6405,59 @@ const struct amdgpu_ip_block_version gfx_v11_0_ip_block =
 .rev = 0,
 .funcs = _v11_0_ip_funcs,
  };
+
+static int
+gfx_v11_userq_mqd_create(struct amdgpu_userq_mgr *uq_mgr, struct 
amdgpu_usermode_queue *queue)
+{
+   struct amdgpu_device *adev = uq_mgr->adev;
+   struct amdgpu_userq_ctx_space *mqd = >mqd;
+   struct amdgpu_mqd *gfx_v11_mqd = 

Re: [PATCH v4 01/10] drm/amdgpu: UAPI for user queue management

2023-05-22 Thread Shashank Sharma

Hey Alex,

Thanks for the review comments, please find mine inline.

- Shashank

On 19/05/2023 23:03, Alex Deucher wrote:

On Mon, Apr 24, 2023 at 1:39 PM Shashank Sharma  wrote:

From: Alex Deucher 

This patch intorduces new UAPI/IOCTL for usermode graphics
queue. The userspace app will fill this structure and request
the graphics driver to add a graphics work queue for it. The
output of this UAPI is a queue id.

This UAPI maps the queue into GPU, so the graphics app can start
submitting work to the queue as soon as the call returns.

V2: Addressed review comments from Alex and Christian
 - Make the doorbell offset's comment clearer
 - Change the output parameter name to queue_id

V3: Integration with doorbell manager

V4:
 - Updated the UAPI doc (Pierre-Eric)
 - Created a Union for engine specific MQDs (Alex)
 - Added Christian's R-B

Cc: Alex Deucher 
Cc: Christian Koenig 
Reviewed-by: Christian König 
Signed-off-by: Alex Deucher 
Signed-off-by: Shashank Sharma 
---
  include/uapi/drm/amdgpu_drm.h | 95 +++
  1 file changed, 95 insertions(+)

diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index 4038abe8505a..083a1df8e8ef 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -54,6 +54,7 @@ extern "C" {
  #define DRM_AMDGPU_VM  0x13
  #define DRM_AMDGPU_FENCE_TO_HANDLE 0x14
  #define DRM_AMDGPU_SCHED   0x15
+#define DRM_AMDGPU_USERQ   0x16

  #define DRM_IOCTL_AMDGPU_GEM_CREATEDRM_IOWR(DRM_COMMAND_BASE + 
DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
  #define DRM_IOCTL_AMDGPU_GEM_MMAP  DRM_IOWR(DRM_COMMAND_BASE + 
DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@@ -71,6 +72,7 @@ extern "C" {
  #define DRM_IOCTL_AMDGPU_VMDRM_IOWR(DRM_COMMAND_BASE + 
DRM_AMDGPU_VM, union drm_amdgpu_vm)
  #define DRM_IOCTL_AMDGPU_FENCE_TO_HANDLE DRM_IOWR(DRM_COMMAND_BASE + 
DRM_AMDGPU_FENCE_TO_HANDLE, union drm_amdgpu_fence_to_handle)
  #define DRM_IOCTL_AMDGPU_SCHED DRM_IOW(DRM_COMMAND_BASE + 
DRM_AMDGPU_SCHED, union drm_amdgpu_sched)
+#define DRM_IOCTL_AMDGPU_USERQ DRM_IOW(DRM_COMMAND_BASE + 
DRM_AMDGPU_USERQ, union drm_amdgpu_userq)

  /**
   * DOC: memory domains
@@ -302,6 +304,99 @@ union drm_amdgpu_ctx {
 union drm_amdgpu_ctx_out out;
  };

+/* user queue IOCTL */
+#define AMDGPU_USERQ_OP_CREATE 1
+#define AMDGPU_USERQ_OP_FREE   2
+
+#define AMDGPU_USERQ_MQD_FLAGS_SECURE  (1 << 0)
+#define AMDGPU_USERQ_MQD_FLAGS_AQL (1 << 1)
+
+/*
+ * MQD (memory queue descriptor) is a set of parameters which allow
+ * the GPU to uniquely define and identify a usermode queue.
+ */
+struct drm_amdgpu_userq_mqd_gfx {
+   /**
+* @flags: flags to indicate special function for queue like secure
+* buffer (TMZ). Unused for now.
+*/
+   __u32   flags;
+   /**
+* @doorbell_handle: the handle of doorbell GEM object
+* associated to this client.
+*/
+   __u32   doorbell_handle;
+   /**
+* @doorbell_offset: 32-bit offset of the doorbell in the doorbell bo.
+* Kernel will generate absolute doorbell offset using doorbell_handle
+* and doorbell_offset in the doorbell bo.
+*/
+   __u32   doorbell_offset;
+   /**
+* @queue_va: Virtual address of the GPU memory which holds the queue
+* object. The queue holds the workload packets.
+*/
+   __u64   queue_va;
+   /**
+* @queue_size: Size of the queue in bytes, this needs to be 256-byte
+* aligned.
+*/
+   __u64   queue_size;
+   /**
+* @rptr_va : Virtual address of the GPU memory which holds the ring 
RPTR.
+* This object must be at least 8 byte in size and aligned to 8-byte 
offset.
+*/
+   __u64   rptr_va;
+   /**
+* @wptr_va : Virtual address of the GPU memory which holds the ring 
WPTR.
+* This object must be at least 8 byte in size and aligned to 8-byte 
offset.
+*
+* Queue, RPTR and WPTR can come from the same object, as long as the 
size
+* and alignment related requirements are met.
+*/
+   __u64   wptr_va;
+   /**
+* @shadow_va: Virtual address of the GPU memory to hold the shadow 
buffer.
+* This must be a from a separate GPU object, and must be at least 
4-page
+* sized.
+*/
+   __u64   shadow_va;

You were planning to add the other pointers here as well for gds and csa right?
That was decided in this patch set only, from a different review 
comment, so we are yet to work on it :)



+};
+
+ /*
+  * MQD can be different for different GPU IP/engine. This union will
+  * contain structures of MQDs corresponding to different engines.
+  */
+union drm_amdgpu_userq_mqd {
+   struct drm_amdgpu_userq_mqd_gfx gfx;
+};
+
+struct drm_amdgpu_userq_in {
+   /** AMDGPU_USERQ_OP_* */
+   __u32   op;
+ 

Re: Fwd: Kernel 5.11 crashes when it boots, it produces black screen.

2023-05-22 Thread Bagas Sanjaya
On Wed, May 10, 2023 at 03:26:56PM +0700, Bagas Sanjaya wrote:
> Anyway, let me add this regression to regzbot:
> 
> #regzbot introduced: v5.10..v5.11 
> https://bugzilla.kernel.org/show_bug.cgi?id=212579
> #regzbot title: Booting kernel on AMD Ryzen 5 PRO stucks in loading initrd

Resolving...

#regzbot resolve: reporter found a workaround to the presumably firmware bug

See [1] for the precise workaround.

[1]: https://bugzilla.kernel.org/show_bug.cgi?id=216340#c53

-- 
An old man doll... just what I always wanted! - Clara


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Re: Fwd: Linux 6.3.1 + AMD RX 570 on ppc64le 4K: Kernel attempted to read user page (1128) - exploit attempt? (uid: 0)

2023-05-22 Thread Linux regression tracking #update (Thorsten Leemhuis)
/me removes a few people from CC, as this thread already annoyed a few
people

On 11.05.23 10:06, Bagas Sanjaya wrote:
> 
> I notice a regression report on bugzilla ([1]). As many developers
> don't keep an eye on it, I decide to forward it by email.
> [...] 
> #regzbot introduced: v6.2..v6.3 
> https://bugzilla.kernel.org/show_bug.cgi?id=217427
> #regzbot title: No video output from AMD RX 570 and kernel exploit attempt on 
> ppc64le

per https://gitlab.freedesktop.org/drm/amd/-/issues/2553#note_1911308

#regzbot fix: 3cf7cd3f770a0b89dc
#regzbot ignore-activity

Ciao, Thorsten (wearing his 'the Linux kernel's regression tracker' hat)
--
Everything you wanna know about Linux kernel regression tracking:
https://linux-regtracking.leemhuis.info/about/#tldr
That page also explains what to do if mails like this annoy you.



[PATCH] drm/amd/pm: Fix output of pp_od_clk_voltage

2023-05-22 Thread Jonatas Esteves
Printing the other clock types should not be conditioned on being able
to print OD_SCLK. Some GPUs currently have limited capability of only
printing a subset of these.

Since this condition was introduced in v5.18-rc1, reading from
`pp_od_clk_voltage` has been returning empty on the Asus ROG Strix G15
(2021).

Fixes: 79c65f3fcbb1 ("drm/amd/pm: do not expose power implementation details to 
amdgpu_pm.c")
Signed-off-by: Jonatas Esteves 
---
 drivers/gpu/drm/amd/pm/amdgpu_pm.c | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 58c2246918fd..f4f40459f22b 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -871,13 +871,11 @@ static ssize_t amdgpu_get_pp_od_clk_voltage(struct device 
*dev,
}
if (ret == -ENOENT) {
size = amdgpu_dpm_print_clock_levels(adev, OD_SCLK, buf);
-   if (size > 0) {
-   size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, 
buf + size);
-   size += amdgpu_dpm_print_clock_levels(adev, 
OD_VDDC_CURVE, buf + size);
-   size += amdgpu_dpm_print_clock_levels(adev, 
OD_VDDGFX_OFFSET, buf + size);
-   size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, 
buf + size);
-   size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK, 
buf + size);
-   }
+   size += amdgpu_dpm_print_clock_levels(adev, OD_MCLK, buf + 
size);
+   size += amdgpu_dpm_print_clock_levels(adev, OD_VDDC_CURVE, buf 
+ size);
+   size += amdgpu_dpm_print_clock_levels(adev, OD_VDDGFX_OFFSET, 
buf + size);
+   size += amdgpu_dpm_print_clock_levels(adev, OD_RANGE, buf + 
size);
+   size += amdgpu_dpm_print_clock_levels(adev, OD_CCLK, buf + 
size);
}
 
if (size == 0)
-- 
2.40.1



Re: Radeon Driver Crash

2023-05-22 Thread Neil Sikka
I also crossposted here upon request:
https://gitlab.freedesktop.org/drm/amd/-/issues/2571

On Fri, May 19, 2023 at 6:36 PM Neil Sikka  wrote:
>
> Hello, I just filed a bug for the Radeon driver crashing:
> https://bugzilla.kernel.org/show_bug.cgi?id=217464
>
> It looks similar to this bug
> (https://bugzilla.kernel.org/show_bug.cgi?id=198669) because they are
> both locking up the GPU and the page fault address is at the same page
> offset of 0xffc, which might mean its the same structure member that
> is being dereferenced (or an underflow), and the call stack is
> similar.
>
> Please let me know if you need any more information.
>
> Thanks!
>
> --
> My Blog: http://www.neilscomputerblog.blogspot.com/
> Twitter: @neilsikka



-- 
My Blog: http://www.neilscomputerblog.blogspot.com/
Twitter: @neilsikka


Re: [PATCH v4 0/9] drm: fdinfo memory stats

2023-05-22 Thread Dmitry Baryshkov

On 15/05/2023 17:30, Rob Clark wrote:

From: Rob Clark 

Similar motivation to other similar recent attempt[1].  But with an
attempt to have some shared code for this.  As well as documentation.

It is probably a bit UMA-centric, I guess devices with VRAM might want
some placement stats as well.  But this seems like a reasonable start.

Basic gputop support: https://patchwork.freedesktop.org/series/116236/
And already nvtop support: https://github.com/Syllo/nvtop/pull/204

I've combined the separate series to add comm/cmdline override onto
the end of this, simply out of convenience (they would otherwise
conflict in a bunch of places).

v2: Extend things to allow for multiple regions other than just system
 "memory", make drm_show_memory_stats() a helper so that, drivers
 can use it or not based on their needs (but in either case, re-
 use drm_print_memory_stats()
v3: Docs fixes
v4: use u64 for drm_memory_stats, small docs update and collected
 Tvrtko's a-b

[1] https://patchwork.freedesktop.org/series/112397/

Rob Clark (9):
   drm/docs: Fix usage stats typos
   drm: Add common fdinfo helper
   drm/msm: Switch to fdinfo helper
   drm/amdgpu: Switch to fdinfo helper
   drm: Add fdinfo memory stats
   drm/msm: Add memory stats to fdinfo
   drm/doc: Relax fdinfo string constraints
   drm/fdinfo: Add comm/cmdline override fields
   drm/msm: Wire up comm/cmdline override for fdinfo

  Documentation/gpu/drm-usage-stats.rst  | 101 ++
  drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c|   3 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.c |  16 +--
  drivers/gpu/drm/amd/amdgpu/amdgpu_fdinfo.h |   2 +-
  drivers/gpu/drm/drm_file.c | 147 +
  drivers/gpu/drm/msm/adreno/adreno_gpu.c|  24 +++-
  drivers/gpu/drm/msm/msm_drv.c  |  15 ++-
  drivers/gpu/drm/msm/msm_gem.c  |  15 +++
  drivers/gpu/drm/msm/msm_gpu.c  |   2 -
  drivers/gpu/drm/msm/msm_gpu.h  |  10 ++
  include/drm/drm_drv.h  |   7 +
  include/drm/drm_file.h |  51 +++
  include/drm/drm_gem.h  |  32 +
  13 files changed, 378 insertions(+), 47 deletions(-)


What is the expected merge plan for this series? msm-next? drm-misc?



--
With best wishes
Dmitry



RE: [PATCH v2] drm/dp_mst: Clear MSG_RDY flag before sending new message

2023-05-22 Thread Lin, Wayne
[Public]

Hi Jani,
Thanks for your time!
Comments inline.

> -Original Message-
> From: Jani Nikula 
> Sent: Tuesday, May 16, 2023 6:34 PM
> To: Lin, Wayne ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org
> Cc: ly...@redhat.com; ville.syrj...@linux.intel.com; imre.d...@intel.com;
> Wentland, Harry ; Zuo, Jerry
> ; Lin, Wayne ;
> sta...@vger.kernel.org
> Subject: Re: [PATCH v2] drm/dp_mst: Clear MSG_RDY flag before sending new
> message
>
> On Thu, 27 Apr 2023, Wayne Lin  wrote:
> > [Why]
> > The sequence for collecting down_reply from source perspective should
> > be:
> >
> > Request_n->repeat (get partial reply of Request_n->clear message ready
> > flag to ack DPRX that the message is received) till all partial
> > replies for Request_n are received->new Request_n+1.
> >
> > Now there is chance that drm_dp_mst_hpd_irq() will fire new down
> > request in the tx queue when the down reply is incomplete. Source is
> > restricted to generate interveleaved message transactions so we should
> > avoid it.
> >
> > Also, while assembling partial reply packets, reading out DPCD
> > DOWN_REP Sideband MSG buffer + clearing DOWN_REP_MSG_RDY flag
> should
> > be wrapped up as a complete operation for reading out a reply packet.
> > Kicking off a new request before clearing DOWN_REP_MSG_RDY flag might
> > be risky. e.g. If the reply of the new request has overwritten the
> > DPRX DOWN_REP Sideband MSG buffer before source writing one to clear
> > DOWN_REP_MSG_RDY flag, source then unintentionally flushes the reply
> > for the new request. Should handle the up request in the same way.
> >
> > [How]
> > Separete drm_dp_mst_hpd_irq() into 2 steps. After acking the MST IRQ
> > event, driver calls drm_dp_mst_hpd_irq_step2() and might trigger
> > drm_dp_mst_kick_tx() only when there is no on going message transaction.
> >
> > Changes since v1:
> > * Reworked on review comments received
> > -> Adjust the fix to let driver explicitly kick off new down request
> > when mst irq event is handled and acked
> > -> Adjust the commit message
> >
> > Signed-off-by: Wayne Lin 
> > Cc: sta...@vger.kernel.org
> > ---
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  8 ++---
> > drivers/gpu/drm/display/drm_dp_mst_topology.c | 35
> ---
> >  drivers/gpu/drm/i915/display/intel_dp.c   |  5 ++-
> >  drivers/gpu/drm/nouveau/dispnv50/disp.c   |  5 ++-
> >  include/drm/display/drm_dp_mst_helper.h   |  4 +--
> >  5 files changed, 45 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 1ad67c2a697e..48bdcb2ee9b1 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -3259,10 +3259,9 @@ static void
> dm_handle_mst_sideband_msg(struct amdgpu_dm_connector *aconnector)
> > DRM_DEBUG_DRIVER("ESI %02x %02x %02x\n", esi[0],
> esi[1], esi[2]);
> > /* handle HPD short pulse irq */
> > if (aconnector->mst_mgr.mst_state)
> > -   drm_dp_mst_hpd_irq(
> > -   >mst_mgr,
> > -   esi,
> > -   _irq_handled);
> > +   drm_dp_mst_hpd_irq_step1(>mst_mgr,
> > +esi,
> > +_irq_handled);
> >
> > if (new_irq_handled) {
> > /* ACK at DPCD to notify down stream */ @@ -
> 3281,6 +3280,7 @@
> > static void dm_handle_mst_sideband_msg(struct amdgpu_dm_connector
> *aconnector)
> > break;
> > }
> >
> > +   drm_dp_mst_hpd_irq_step2(
> >mst_mgr);
> > /* check if there is new irq to be handled */
> > dret = drm_dp_dpcd_read(
> > >dm_dp_aux.aux,
> > diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > index 70df29fe92db..2e0a38a6509c 100644
> > --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> > @@ -4045,7 +4045,7 @@ static int drm_dp_mst_handle_up_req(struct
> > drm_dp_mst_topology_mgr *mgr)  }
> >
> >  /**
> > - * drm_dp_mst_hpd_irq() - MST hotplug IRQ notify
> > + * drm_dp_mst_hpd_irq_step1() - MST hotplug IRQ notify
> >   * @mgr: manager to notify irq for.
> >   * @esi: 4 bytes from SINK_COUNT_ESI
> >   * @handled: whether the hpd interrupt was consumed or not @@ -4055,7
> > +4055,7 @@ static int drm_dp_mst_handle_up_req(struct
> drm_dp_mst_topology_mgr *mgr)
> >   * topology manager will process the sideband messages received as a result
> >   * of this.
> >   */
> > -int drm_dp_mst_hpd_irq(struct drm_dp_mst_topology_mgr *mgr, u8 *esi,
> > bool *handled)
> > +int drm_dp_mst_hpd_irq_step1(struct drm_dp_mst_topology_mgr *mgr,