[PATCH 6/6] drm/amd/display: Eliminate warnings in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fix the following warnings reported by checkpatch:

WARNING: Block comments use a trailing */ on a separate line
WARNING: Prefer using '"%s...", __func__' to using 
'execute_synaptics_rc_command', this function's name, in a string
WARNING: Prefer using '"%s...", __func__' to using 
'apply_synaptics_fifo_reset_wa', this function's name, in a string
WARNING: braces {} are not necessary for single statement blocks

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 29 +--
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index a6be04ad387f..66909bb5e5b0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -68,15 +68,13 @@ static void apply_edid_quirks(struct edid *edid, struct 
dc_edid_caps *edid_caps)
}
 }
 
-/* dm_helpers_parse_edid_caps
+/**
+ * dm_helpers_parse_edid_caps() - Parse edid caps
  *
- * Parse edid caps
+ * @edid_caps: [in] pointer to edid caps
  *
- * @edid:  [in] pointer to edid
- *  edid_caps: [in] pointer to edid caps
- * @return
- * void
- * */
+ * Return: void
+ */
 enum dc_edid_status dm_helpers_parse_edid_caps(
struct dc_link *link,
const struct dc_edid *edid,
@@ -255,7 +253,8 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
/* Accessing the connector state is required for vcpi_slots allocation
 * and directly relies on behaviour in commit check
 * that blocks before commit guaranteeing that the state
-* is not gonna be swapped while still in use in commit tail */
+* is not gonna be swapped while still in use in commit tail
+*/
 
if (!aconnector || !aconnector->mst_root)
return false;
@@ -282,7 +281,8 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
/* mst_mgr->->payloads are VC payload notify MST branch using DPCD or
 * AUX message. The sequence is slot 1-63 allocated sequence for each
 * stream. AMD ASIC stream slot allocation should follow the same
-* sequence. copy DRM MST allocation to dc */
+* sequence. copy DRM MST allocation to dc
+*/
fill_dc_mst_payload_table_from_drm(stream->link, enable, 
target_payload, proposed_table);
 
return true;
@@ -633,7 +633,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_COMMAND, &rc_cmd, 
sizeof(rc_cmd));
 
if (ret < 0) {
-   DRM_ERROR(" execute_synaptics_rc_command - write cmd ..., 
err = %d\n", ret);
+   DRM_ERROR("%s: write cmd ..., err = %d\n",  __func__, ret);
return false;
}
 
@@ -655,7 +655,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
drm_dp_dpcd_read(aux, SYNAPTICS_RC_DATA, data, length);
}
 
-   DC_LOG_DC(" execute_synaptics_rc_command - success = %d\n", 
success);
+   DC_LOG_DC("%s: success = %d\n", __func__, success);
 
return success;
 }
@@ -664,7 +664,7 @@ static void apply_synaptics_fifo_reset_wa(struct drm_dp_aux 
*aux)
 {
unsigned char data[16] = {0};
 
-   DC_LOG_DC("Start apply_synaptics_fifo_reset_wa\n");
+   DC_LOG_DC("Start %s\n", __func__);
 
// Step 2
data[0] = 'P';
@@ -722,7 +722,7 @@ static void apply_synaptics_fifo_reset_wa(struct drm_dp_aux 
*aux)
if (!execute_synaptics_rc_command(aux, true, 0x02, 0, 0, NULL))
return;
 
-   DC_LOG_DC("Done apply_synaptics_fifo_reset_wa\n");
+   DC_LOG_DC("Done %s\n", __func__);
 }
 
 /* MST Dock */
@@ -995,9 +995,8 @@ void dm_helpers_override_panel_settings(
struct dc_panel_config *panel_config)
 {
// Feature DSC
-   if (amdgpu_dc_debug_mask & DC_DISABLE_DSC) {
+   if (amdgpu_dc_debug_mask & DC_DISABLE_DSC)
panel_config->dsc.disable_dsc_edp = true;
-   }
 }
 
 void *dm_helpers_allocate_gpu_mem(
-- 
2.25.1



[PATCH 5/6] drm/amd/display: Clean up warnings in amdgpu_dm _mst_types, _plane, _psr.c

2023-06-28 Thread Srinivasan Shanmugam
Fix the following warnings reported by checkpatch:

WARNING: Missing a blank line after declarations
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 +
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 4 ++--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c   | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 46d0a8f57e55..95eefa6b4f2f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -296,6 +296,7 @@ static int dm_dp_mst_get_modes(struct drm_connector 
*connector)
 
if (!aconnector->edid) {
struct edid *edid;
+
edid = drm_dp_mst_get_edid(connector, 
&aconnector->mst_root->mst_mgr, aconnector->mst_output_port);
 
if (!edid) {
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 322668973747..de1c7026ffcd 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -164,7 +164,7 @@ static bool modifier_has_dcc(uint64_t modifier)
return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier);
 }
 
-static unsigned modifier_gfx9_swizzle_mode(uint64_t modifier)
+static unsigned int modifier_gfx9_swizzle_mode(uint64_t modifier)
 {
if (modifier == DRM_FORMAT_MOD_LINEAR)
return 0;
@@ -581,7 +581,7 @@ static void add_gfx11_modifiers(struct amdgpu_device *adev,
int pkrs = 0;
u32 gb_addr_config;
u8 i = 0;
-   unsigned swizzle_r_x;
+   unsigned int swizzle_r_x;
uint64_t modifier_r_x;
uint64_t modifier_dcc_best;
uint64_t modifier_dcc_4k;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index 4f61d4f257cd..08ce3bb8f640 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
@@ -166,6 +166,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *stream)
 */
if (vsync_rate_hz != 0) {
unsigned int frame_time_microsec = 100 / vsync_rate_hz;
+
num_frames_static = (3 / frame_time_microsec) + 1;
}
 
-- 
2.25.1



[PATCH 2/6] drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c

2023-06-28 Thread Srinivasan Shanmugam
Conform to Linux kernel coding style.

Reported by checkpatch:

WARNING: please, no space before tabs

And promote sysfs entry for set/get srm to kdoc

Suggested-by: Rodrigo Siqueira 
Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 50 +++
 1 file changed, 28 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
index 5536d17306d0..308f2b0687b5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
@@ -576,7 +576,10 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
 }
 
 
-/* NOTE: From the usermodes prospective you only need to call write *ONCE*, 
the kernel
+/**
+ * DOC: Add sysfs interface for set/get srm
+ *
+ * NOTE: From the usermodes prospective you only need to call write *ONCE*, 
the kernel
  *  will automatically call once or twice depending on the size
  *
  * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no 
matter what the size is
@@ -591,19 +594,19 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
  * cannot throw errors early as it will stop the kernel from writing to sysfs
  *
  * Example 1:
- * Good SRM size = 5096
- * first call to write 4096 -> PSP fails
- * Second call to write 1000 -> PSP Pass -> SRM is set
+ * Good SRM size = 5096
+ * first call to write 4096 -> PSP fails
+ * Second call to write 1000 -> PSP Pass -> SRM is set
  *
  * Example 2:
- * Bad SRM size = 4096
- * first call to write 4096 -> PSP fails (This is the same as above, but 
we don't know if this
- * is the last call)
+ * Bad SRM size = 4096
+ * first call to write 4096 -> PSP fails (This is the same as above, but 
we don't know if this
+ * is the last call)
  *
  * Solution?:
- * 1: Parse the SRM? -> It is signed so we don't know the EOF
- * 2: We can have another sysfs that passes the size before calling set. 
-> simpler solution
- * below
+ * 1: Parse the SRM? -> It is signed so we don't know the EOF
+ * 2: We can have another sysfs that passes the size before calling set. 
-> simpler solution
+ * below
  *
  * Easy Solution:
  * Always call get after Set to verify if set was successful.
@@ -612,14 +615,14 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
  * +--+
  * PSP will only update its srm if its older than the one we are trying to 
load.
  * Always do set first than get.
- * -if we try to "1. SET" a older version PSP will reject it and we can 
"2. GET" the newer
- * version and save it
+ * -if we try to "1. SET" a older version PSP will reject it and we can 
"2. GET" the newer
+ * version and save it
  *
- * -if we try to "1. SET" a newer version PSP will accept it and we can 
"2. GET" the
- * same(newer) version back and save it
+ * -if we try to "1. SET" a newer version PSP will accept it and we can 
"2. GET" the
+ * same(newer) version back and save it
  *
- * -if we try to "1. SET" a newer version and PSP rejects it. That means 
the format is
- * incorrect/corrupted and we should correct our SRM by getting it from PSP
+ * -if we try to "1. SET" a newer version and PSP rejects it. That means 
the format is
+ * incorrect/corrupted and we should correct our SRM by getting it from PSP
  */
 static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct 
bin_attribute *bin_attr, char *buffer,
  loff_t pos, size_t count)
@@ -681,12 +684,15 @@ static ssize_t srm_data_read(struct file *filp, struct 
kobject *kobj, struct bin
return ret;
 }
 
-/* From the hdcp spec (5.Renewability) SRM needs to be stored in a 
non-volatile memory.
+/**
+ * DOC: SRM should be persistent across boot/reboots/suspend/resume/shutdown
+ *
+ * From the hdcp spec (5.Renewability) SRM needs to be stored in a 
non-volatile memory.
  *
  * For example,
- * if Application "A" sets the SRM (ver 2) and we reboot/suspend and later 
when Application "B"
- * needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM 
should be persistent
- * across boot/reboots/suspend/resume/shutdown
+ * if Application "A" sets the SRM (ver 2) and we reboot/suspend and later 
when Application "B"
+ * needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM 
should be persistent
+ * across boot/reboots/suspend/resume/shutdown
  *
  * Currently when the system goes down (suspend/shutdown) the SRM is cleared 
from PSP. For HDCP we need
  * to make the SRM persistent.
@@ -699,8 +705,8 @@ static ssize_t srm_data_read(struct file *filp, struct 
kobject *kobj, struct bin
  *
  * Usermode can read/write to/from PSP using the sysfs interface
  * Fo

[PATCH 1/6] drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch complaints:

WARNING: unnecessary cast may hide bugs, see 
http://c-faq.com/malloc/mallocnocast.html
+   char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Christian König 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index d9a482908380..c13b70629be6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -426,7 +426,7 @@ void dm_dtn_log_append_v(struct dc_context *ctx,
total = log_ctx->pos + n + 1;
 
if (total > log_ctx->size) {
-   char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);
+   char *buf = kvcalloc(total, sizeof(char), GFP_KERNEL);
 
if (buf) {
memcpy(buf, log_ctx->buf, log_ctx->pos);
-- 
2.25.1



[PATCH 4/6] drm/amd/display: Fix warning about msleep in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch warning:

WARNING: msleep < 20ms can sleep for up to 20ms; see 
Documentation/timers/timers-howto.rst
+   msleep(10);

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index c13b70629be6..a6be04ad387f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -643,7 +643,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
if (rc_cmd == cmd)
// active is 0
break;
-   msleep(10);
+   msleep(20);
}
 
// read rc result
-- 
2.25.1



[PATCH 3/6] drm/amd/display: Clean up warnings in amdgpu_dm_pp_smu.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch warning:

WARNING: Block comments use a trailing */ on a separate line
+* non-boosted one. */

WARNING: suspect code indent for conditional statements (8, 24)
+   if ((adev->asic_type >= CHIP_POLARIS10) &&
[...]
+   return true;

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 75284e2cec74..848c5b4bb301 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -334,7 +334,8 @@ bool dm_pp_get_clock_levels_by_type(
if (dc_clks->clocks_in_khz[i] > 
validation_clks.engine_max_clock) {
/* This clock is higher the validation clock.
 * Than means the previous one is the highest
-* non-boosted one. */
+* non-boosted one.
+*/
DRM_INFO("DM_PPLIB: reducing engine clock level 
from %d to %d\n",
dc_clks->num_levels, i);
dc_clks->num_levels = i > 0 ? i : 1;
@@ -406,10 +407,10 @@ bool dm_pp_notify_wm_clock_changes(
 * TODO: expand this to other ASICs
 */
if ((adev->asic_type >= CHIP_POLARIS10) &&
-(adev->asic_type <= CHIP_VEGAM) &&
-!amdgpu_dpm_set_watermarks_for_clocks_ranges(adev,
-   (void *)wm_with_clock_ranges))
-   return true;
+   (adev->asic_type <= CHIP_VEGAM) &&
+   !amdgpu_dpm_set_watermarks_for_clocks_ranges(adev,
+(void 
*)wm_with_clock_ranges))
+   return true;
 
return false;
 }
-- 
2.25.1



Clean up patches in display/amdgpu_dm code

2023-06-28 Thread Srinivasan Shanmugam
This patchset does code clean up in respective
display/amdgpu_dm code.

This Cover letter is enclosed with the below patches:
 
https://patchwork.freedesktop.org/patch/544079/ | drm/amd/display: Clean
up warnings in amdgpu_dm _mst_types, _plane, _psr.c -> Addressed coding
style patches to be put into single cover letter (Harry)
https://patchwork.freedesktop.org/patch/544078/?series=119746&rev=2 |
[v2] drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c ->
Promoted to kdoc (Rodrigo)
https://patchwork.freedesktop.org/patch/544238/?series=119821&rev=3 |
[v3] drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c ->
Kept same as v1 - so that variable "buf" remains to local to the block,
whereever it is declared, by having just removed the casting.
https://patchwork.freedesktop.org/patch/544080/ | drm/amd/display:
Eliminate warnings in amdgpu_dm_helpers.c
https://patchwork.freedesktop.org/patch/544082/ | drm/amd/display: Fix
warning about msleep in amdgpu_dm_helpers.c -> this is a functional
change - Requested Jerry to take a look at it.
https://patchwork.freedesktop.org/patch/544106/ | [v2] drm/amd/display:
Clean up warnings in amdgpu_dm_pp_smu.c -> fixed code indentation in v2.


Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Cc: Harry Wentland 
Cc: Fangzhi Zuo 

Srinivasan Shanmugam (6):
  drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c
  drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c
  drm/amd/display: Clean up warnings in amdgpu_dm_pp_smu.c
  drm/amd/display: Fix warning about msleep in amdgpu_dm_helpers.c
  drm/amd/display: Clean up warnings in amdgpu_dm _mst_types, _plane,
_psr.c
  drm/amd/display: Eliminate warnings in amdgpu_dm_helpers.c

 .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 50 +++
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 33 ++--
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  1 +
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   |  4 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  | 11 ++--
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c |  1 +
 6 files changed, 54 insertions(+), 46 deletions(-)

-- 
2.25.1



[PATCH 6/6] drm/amd/display: Eliminate warnings in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fix the following warnings reported by checkpatch:

WARNING: Block comments use a trailing */ on a separate line
WARNING: Prefer using '"%s...", __func__' to using 
'execute_synaptics_rc_command', this function's name, in a string
WARNING: Prefer using '"%s...", __func__' to using 
'apply_synaptics_fifo_reset_wa', this function's name, in a string
WARNING: braces {} are not necessary for single statement blocks

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 29 +--
 1 file changed, 14 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index a6be04ad387f..66909bb5e5b0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -68,15 +68,13 @@ static void apply_edid_quirks(struct edid *edid, struct 
dc_edid_caps *edid_caps)
}
 }
 
-/* dm_helpers_parse_edid_caps
+/**
+ * dm_helpers_parse_edid_caps() - Parse edid caps
  *
- * Parse edid caps
+ * @edid_caps: [in] pointer to edid caps
  *
- * @edid:  [in] pointer to edid
- *  edid_caps: [in] pointer to edid caps
- * @return
- * void
- * */
+ * Return: void
+ */
 enum dc_edid_status dm_helpers_parse_edid_caps(
struct dc_link *link,
const struct dc_edid *edid,
@@ -255,7 +253,8 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
/* Accessing the connector state is required for vcpi_slots allocation
 * and directly relies on behaviour in commit check
 * that blocks before commit guaranteeing that the state
-* is not gonna be swapped while still in use in commit tail */
+* is not gonna be swapped while still in use in commit tail
+*/
 
if (!aconnector || !aconnector->mst_root)
return false;
@@ -282,7 +281,8 @@ bool dm_helpers_dp_mst_write_payload_allocation_table(
/* mst_mgr->->payloads are VC payload notify MST branch using DPCD or
 * AUX message. The sequence is slot 1-63 allocated sequence for each
 * stream. AMD ASIC stream slot allocation should follow the same
-* sequence. copy DRM MST allocation to dc */
+* sequence. copy DRM MST allocation to dc
+*/
fill_dc_mst_payload_table_from_drm(stream->link, enable, 
target_payload, proposed_table);
 
return true;
@@ -633,7 +633,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_COMMAND, &rc_cmd, 
sizeof(rc_cmd));
 
if (ret < 0) {
-   DRM_ERROR(" execute_synaptics_rc_command - write cmd ..., 
err = %d\n", ret);
+   DRM_ERROR("%s: write cmd ..., err = %d\n",  __func__, ret);
return false;
}
 
@@ -655,7 +655,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
drm_dp_dpcd_read(aux, SYNAPTICS_RC_DATA, data, length);
}
 
-   DC_LOG_DC(" execute_synaptics_rc_command - success = %d\n", 
success);
+   DC_LOG_DC("%s: success = %d\n", __func__, success);
 
return success;
 }
@@ -664,7 +664,7 @@ static void apply_synaptics_fifo_reset_wa(struct drm_dp_aux 
*aux)
 {
unsigned char data[16] = {0};
 
-   DC_LOG_DC("Start apply_synaptics_fifo_reset_wa\n");
+   DC_LOG_DC("Start %s\n", __func__);
 
// Step 2
data[0] = 'P';
@@ -722,7 +722,7 @@ static void apply_synaptics_fifo_reset_wa(struct drm_dp_aux 
*aux)
if (!execute_synaptics_rc_command(aux, true, 0x02, 0, 0, NULL))
return;
 
-   DC_LOG_DC("Done apply_synaptics_fifo_reset_wa\n");
+   DC_LOG_DC("Done %s\n", __func__);
 }
 
 /* MST Dock */
@@ -995,9 +995,8 @@ void dm_helpers_override_panel_settings(
struct dc_panel_config *panel_config)
 {
// Feature DSC
-   if (amdgpu_dc_debug_mask & DC_DISABLE_DSC) {
+   if (amdgpu_dc_debug_mask & DC_DISABLE_DSC)
panel_config->dsc.disable_dsc_edp = true;
-   }
 }
 
 void *dm_helpers_allocate_gpu_mem(
-- 
2.25.1



[PATCH 5/6] drm/amd/display: Clean up warnings in amdgpu_dm _mst_types, _plane, _psr.c

2023-06-28 Thread Srinivasan Shanmugam
Fix the following warnings reported by checkpatch:

WARNING: Missing a blank line after declarations
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 +
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 4 ++--
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c   | 1 +
 3 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 46d0a8f57e55..95eefa6b4f2f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -296,6 +296,7 @@ static int dm_dp_mst_get_modes(struct drm_connector 
*connector)
 
if (!aconnector->edid) {
struct edid *edid;
+
edid = drm_dp_mst_get_edid(connector, 
&aconnector->mst_root->mst_mgr, aconnector->mst_output_port);
 
if (!edid) {
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 322668973747..de1c7026ffcd 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -164,7 +164,7 @@ static bool modifier_has_dcc(uint64_t modifier)
return IS_AMD_FMT_MOD(modifier) && AMD_FMT_MOD_GET(DCC, modifier);
 }
 
-static unsigned modifier_gfx9_swizzle_mode(uint64_t modifier)
+static unsigned int modifier_gfx9_swizzle_mode(uint64_t modifier)
 {
if (modifier == DRM_FORMAT_MOD_LINEAR)
return 0;
@@ -581,7 +581,7 @@ static void add_gfx11_modifiers(struct amdgpu_device *adev,
int pkrs = 0;
u32 gb_addr_config;
u8 i = 0;
-   unsigned swizzle_r_x;
+   unsigned int swizzle_r_x;
uint64_t modifier_r_x;
uint64_t modifier_dcc_best;
uint64_t modifier_dcc_4k;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index 4f61d4f257cd..08ce3bb8f640 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
@@ -166,6 +166,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *stream)
 */
if (vsync_rate_hz != 0) {
unsigned int frame_time_microsec = 100 / vsync_rate_hz;
+
num_frames_static = (3 / frame_time_microsec) + 1;
}
 
-- 
2.25.1



[PATCH 4/6] drm/amd/display: Fix warning about msleep in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch warning:

WARNING: msleep < 20ms can sleep for up to 20ms; see 
Documentation/timers/timers-howto.rst
+   msleep(10);

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index c13b70629be6..a6be04ad387f 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -643,7 +643,7 @@ static bool execute_synaptics_rc_command(struct drm_dp_aux 
*aux,
if (rc_cmd == cmd)
// active is 0
break;
-   msleep(10);
+   msleep(20);
}
 
// read rc result
-- 
2.25.1



[PATCH 1/6] drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch complaints:

WARNING: unnecessary cast may hide bugs, see 
http://c-faq.com/malloc/mallocnocast.html
+   char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
Reviewed-by: Christian König 
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
index d9a482908380..c13b70629be6 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c
@@ -426,7 +426,7 @@ void dm_dtn_log_append_v(struct dc_context *ctx,
total = log_ctx->pos + n + 1;
 
if (total > log_ctx->size) {
-   char *buf = (char *)kvcalloc(total, sizeof(char), GFP_KERNEL);
+   char *buf = kvcalloc(total, sizeof(char), GFP_KERNEL);
 
if (buf) {
memcpy(buf, log_ctx->buf, log_ctx->pos);
-- 
2.25.1



[PATCH 3/6] drm/amd/display: Clean up warnings in amdgpu_dm_pp_smu.c

2023-06-28 Thread Srinivasan Shanmugam
Fixes the following category of checkpatch warning:

WARNING: Block comments use a trailing */ on a separate line
+* non-boosted one. */

WARNING: suspect code indent for conditional statements (8, 24)
+   if ((adev->asic_type >= CHIP_POLARIS10) &&
[...]
+   return true;

Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
index 75284e2cec74..848c5b4bb301 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c
@@ -334,7 +334,8 @@ bool dm_pp_get_clock_levels_by_type(
if (dc_clks->clocks_in_khz[i] > 
validation_clks.engine_max_clock) {
/* This clock is higher the validation clock.
 * Than means the previous one is the highest
-* non-boosted one. */
+* non-boosted one.
+*/
DRM_INFO("DM_PPLIB: reducing engine clock level 
from %d to %d\n",
dc_clks->num_levels, i);
dc_clks->num_levels = i > 0 ? i : 1;
@@ -406,10 +407,10 @@ bool dm_pp_notify_wm_clock_changes(
 * TODO: expand this to other ASICs
 */
if ((adev->asic_type >= CHIP_POLARIS10) &&
-(adev->asic_type <= CHIP_VEGAM) &&
-!amdgpu_dpm_set_watermarks_for_clocks_ranges(adev,
-   (void *)wm_with_clock_ranges))
-   return true;
+   (adev->asic_type <= CHIP_VEGAM) &&
+   !amdgpu_dpm_set_watermarks_for_clocks_ranges(adev,
+(void 
*)wm_with_clock_ranges))
+   return true;
 
return false;
 }
-- 
2.25.1



Clean up patches in display/amdgpu_dm code

2023-06-28 Thread Srinivasan Shanmugam
This patchset does code clean up in respective
display/amdgpu_dm code.

This Cover letter is enclosed with the below patches:
 
https://patchwork.freedesktop.org/patch/544079/ | drm/amd/display: Clean
up warnings in amdgpu_dm _mst_types, _plane, _psr.c -> Addressed coding
style patches to be put into single cover letter (Harry)
https://patchwork.freedesktop.org/patch/544078/?series=119746&rev=2 |
[v2] drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c ->
Promoted to kdoc (Rodrigo)
https://patchwork.freedesktop.org/patch/544238/?series=119821&rev=3 |
[v3] drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c ->
Kept same as v1 - so that variable "buf" remains to local to the block,
whereever it is declared, by having just removed the casting.
https://patchwork.freedesktop.org/patch/544080/ | drm/amd/display:
Eliminate warnings in amdgpu_dm_helpers.c
https://patchwork.freedesktop.org/patch/544082/ | drm/amd/display: Fix
warning about msleep in amdgpu_dm_helpers.c -> this is a functional
change - Requested Jerry to take a look at it.
https://patchwork.freedesktop.org/patch/544106/ | [v2] drm/amd/display:
Clean up warnings in amdgpu_dm_pp_smu.c -> fixed code indentation in v2.


Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Cc: Harry Wentland 
Cc: Fangzhi Zuo 

Srinivasan Shanmugam (6):
  drm/amd/display: Remove unnecessary casts in amdgpu_dm_helpers.c
  drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c
  drm/amd/display: Clean up warnings in amdgpu_dm_pp_smu.c
  drm/amd/display: Fix warning about msleep in amdgpu_dm_helpers.c
  drm/amd/display: Clean up warnings in amdgpu_dm _mst_types, _plane,
_psr.c
  drm/amd/display: Eliminate warnings in amdgpu_dm_helpers.c

 .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 50 +++
 .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 33 ++--
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |  1 +
 .../amd/display/amdgpu_dm/amdgpu_dm_plane.c   |  4 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c  | 11 ++--
 .../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c |  1 +
 6 files changed, 54 insertions(+), 46 deletions(-)

-- 
2.25.1



[PATCH 2/6] drm/amd/display: Remove spaces before tabs in amdgpu_dm_hdcp.c

2023-06-28 Thread Srinivasan Shanmugam
Conform to Linux kernel coding style.

Reported by checkpatch:

WARNING: please, no space before tabs

And promote sysfs entry for set/get srm to kdoc

Suggested-by: Rodrigo Siqueira 
Cc: Rodrigo Siqueira 
Cc: Aurabindo Pillai 
Signed-off-by: Srinivasan Shanmugam 
---
 .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c| 50 +++
 1 file changed, 28 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
index 5536d17306d0..308f2b0687b5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
@@ -576,7 +576,10 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
 }
 
 
-/* NOTE: From the usermodes prospective you only need to call write *ONCE*, 
the kernel
+/**
+ * DOC: Add sysfs interface for set/get srm
+ *
+ * NOTE: From the usermodes prospective you only need to call write *ONCE*, 
the kernel
  *  will automatically call once or twice depending on the size
  *
  * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no 
matter what the size is
@@ -591,19 +594,19 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
  * cannot throw errors early as it will stop the kernel from writing to sysfs
  *
  * Example 1:
- * Good SRM size = 5096
- * first call to write 4096 -> PSP fails
- * Second call to write 1000 -> PSP Pass -> SRM is set
+ * Good SRM size = 5096
+ * first call to write 4096 -> PSP fails
+ * Second call to write 1000 -> PSP Pass -> SRM is set
  *
  * Example 2:
- * Bad SRM size = 4096
- * first call to write 4096 -> PSP fails (This is the same as above, but 
we don't know if this
- * is the last call)
+ * Bad SRM size = 4096
+ * first call to write 4096 -> PSP fails (This is the same as above, but 
we don't know if this
+ * is the last call)
  *
  * Solution?:
- * 1: Parse the SRM? -> It is signed so we don't know the EOF
- * 2: We can have another sysfs that passes the size before calling set. 
-> simpler solution
- * below
+ * 1: Parse the SRM? -> It is signed so we don't know the EOF
+ * 2: We can have another sysfs that passes the size before calling set. 
-> simpler solution
+ * below
  *
  * Easy Solution:
  * Always call get after Set to verify if set was successful.
@@ -612,14 +615,14 @@ static void update_config(void *handle, struct 
cp_psp_stream_config *config)
  * +--+
  * PSP will only update its srm if its older than the one we are trying to 
load.
  * Always do set first than get.
- * -if we try to "1. SET" a older version PSP will reject it and we can 
"2. GET" the newer
- * version and save it
+ * -if we try to "1. SET" a older version PSP will reject it and we can 
"2. GET" the newer
+ * version and save it
  *
- * -if we try to "1. SET" a newer version PSP will accept it and we can 
"2. GET" the
- * same(newer) version back and save it
+ * -if we try to "1. SET" a newer version PSP will accept it and we can 
"2. GET" the
+ * same(newer) version back and save it
  *
- * -if we try to "1. SET" a newer version and PSP rejects it. That means 
the format is
- * incorrect/corrupted and we should correct our SRM by getting it from PSP
+ * -if we try to "1. SET" a newer version and PSP rejects it. That means 
the format is
+ * incorrect/corrupted and we should correct our SRM by getting it from PSP
  */
 static ssize_t srm_data_write(struct file *filp, struct kobject *kobj, struct 
bin_attribute *bin_attr, char *buffer,
  loff_t pos, size_t count)
@@ -681,12 +684,15 @@ static ssize_t srm_data_read(struct file *filp, struct 
kobject *kobj, struct bin
return ret;
 }
 
-/* From the hdcp spec (5.Renewability) SRM needs to be stored in a 
non-volatile memory.
+/**
+ * DOC: SRM should be persistent across boot/reboots/suspend/resume/shutdown
+ *
+ * From the hdcp spec (5.Renewability) SRM needs to be stored in a 
non-volatile memory.
  *
  * For example,
- * if Application "A" sets the SRM (ver 2) and we reboot/suspend and later 
when Application "B"
- * needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM 
should be persistent
- * across boot/reboots/suspend/resume/shutdown
+ * if Application "A" sets the SRM (ver 2) and we reboot/suspend and later 
when Application "B"
+ * needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM 
should be persistent
+ * across boot/reboots/suspend/resume/shutdown
  *
  * Currently when the system goes down (suspend/shutdown) the SRM is cleared 
from PSP. For HDCP we need
  * to make the SRM persistent.
@@ -699,8 +705,8 @@ static ssize_t srm_data_read(struct file *filp, struct 
kobject *kobj, struct bin
  *
  * Usermode can read/write to/from PSP using the sysfs interface
  * Fo

RE: [patch V2] drm/amdkfd: Access gpuvm_export_dmabuf() api

2023-06-28 Thread Errabolu, Ramesh
[AMD Official Use Only - General]

Does this read well.

drm/amdkfd: Access gpuvm_export_dmabuf() API to get Dmabuf

Directly invoking the function amdgpu_gem_prime_export() from within
KFD is not correct. By utilizing the KFD API to obtain Dmabuf, the
implementation can prevent the creation of multiple instances of
struct dma_buf.

Regards,
Ramesh

From: Francis, David 
Sent: Wednesday, June 28, 2023 2:50 PM
To: Errabolu, Ramesh ; amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Bhardwaj, Rajneesh 

Subject: Re: [patch V2] drm/amdkfd: Access gpuvm_export_dmabuf() api


On 2023-06-22 17:10, Ramesh Errabolu wrote:



Call KFD api to get Dmabuf instead of calling GEM Prime API

Would appreciate a more detailed commit message to explain why the

KFD API is preferred over the GEM API.



With or without that change, this is



Reviewed-by: David Francis 





Signed-off-by: Ramesh Errabolu 


---

 drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 11 +--

 1 file changed, 5 insertions(+), 6 deletions(-)



diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

index cf1db0ab3471..40ac093b5035 100644

--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

@@ -1852,15 +1852,14 @@ static uint32_t get_process_num_bos(struct kfd_process 
*p)

return num_of_bos;

 }



-static int criu_get_prime_handle(struct drm_gem_object *gobj, int flags,

+static int criu_get_prime_handle(struct kgd_mem *mem, int flags,

  u32 *shared_fd)

 {

struct dma_buf *dmabuf;

int ret;



-   dmabuf = amdgpu_gem_prime_export(gobj, flags);

-   if (IS_ERR(dmabuf)) {

-   ret = PTR_ERR(dmabuf);

+   ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);

+   if (ret) {

pr_err("dmabuf export failed for the BO\n");

return ret;

}

@@ -1940,7 +1939,7 @@ static int criu_checkpoint_bos(struct kfd_process *p,

}

if (bo_bucket->alloc_flags

& (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | 
KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {

-   ret = 
criu_get_prime_handle(&dumper_bo->tbo.base,

+   ret = criu_get_prime_handle(kgd_mem,

bo_bucket->alloc_flags &


KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0,

&bo_bucket->dmabuf_fd);

@@ -2402,7 +2401,7 @@ static int criu_restore_bo(struct kfd_process *p,

/* create the dmabuf object and export the bo */

if (bo_bucket->alloc_flags

& (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {

-   ret = criu_get_prime_handle(&kgd_mem->bo->tbo.base, DRM_RDWR,

+   ret = criu_get_prime_handle(kgd_mem, DRM_RDWR,

&bo_bucket->dmabuf_fd);

if (ret)

return ret;

--

2.25.1




[PATCH 5/5] drm/amdkfd: enable watch points globally for gfx943

2023-06-28 Thread Eric Huang
From: Jonathan Kim 

Set watch points for all xcc instances on GFX943.

Signed-off-by: Jonathan Kim 
Reviewed-by: Felix Kuehling 
Signed-off-by: Eric Huang 
---
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c  |  6 --
 drivers/gpu/drm/amd/amdkfd/kfd_debug.c   | 16 ++--
 2 files changed, 14 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
index 17fe4e90f203..9c32b9fbd866 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
@@ -480,11 +480,13 @@ static uint32_t kgd_gfx_v9_4_3_set_address_watch(
VALID,
1);
 
-   WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_H) +
+   WREG32_RLC((SOC15_REG_OFFSET(GC, GET_INST(GC, inst),
+   regTCP_WATCH0_ADDR_H) +
(watch_id * TCP_WATCH_STRIDE)),
watch_address_high);
 
-   WREG32_RLC((SOC15_REG_OFFSET(GC, 0, regTCP_WATCH0_ADDR_L) +
+   WREG32_RLC((SOC15_REG_OFFSET(GC, GET_INST(GC, inst),
+   regTCP_WATCH0_ADDR_L) +
(watch_id * TCP_WATCH_STRIDE)),
watch_address_low);
 
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
index dcc49183364b..b4ec809c8892 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.c
@@ -413,7 +413,8 @@ static bool kfd_dbg_owns_dev_watch_id(struct 
kfd_process_device *pdd, int watch_
 int kfd_dbg_trap_clear_dev_address_watch(struct kfd_process_device *pdd,
uint32_t watch_id)
 {
-   int r;
+   int xcc_id, r;
+   uint32_t xcc_mask = pdd->dev->xcc_mask;
 
if (!kfd_dbg_owns_dev_watch_id(pdd, watch_id))
return -EINVAL;
@@ -425,10 +426,11 @@ int kfd_dbg_trap_clear_dev_address_watch(struct 
kfd_process_device *pdd,
}
 
amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
-   pdd->watch_points[watch_id] = pdd->dev->kfd2kgd->clear_address_watch(
+   for_each_inst(xcc_id, xcc_mask)
+   pdd->watch_points[watch_id] = 
pdd->dev->kfd2kgd->clear_address_watch(
pdd->dev->adev,
watch_id,
-   0);
+   xcc_id);
amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
 
if (!pdd->dev->kfd->shared_resources.enable_mes)
@@ -447,7 +449,8 @@ int kfd_dbg_trap_set_dev_address_watch(struct 
kfd_process_device *pdd,
uint32_t *watch_id,
uint32_t watch_mode)
 {
-   int r = kfd_dbg_get_dev_watch_id(pdd, watch_id);
+   int xcc_id, r = kfd_dbg_get_dev_watch_id(pdd, watch_id);
+   uint32_t xcc_mask = pdd->dev->xcc_mask;
 
if (r)
return r;
@@ -461,14 +464,15 @@ int kfd_dbg_trap_set_dev_address_watch(struct 
kfd_process_device *pdd,
}
 
amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
-   pdd->watch_points[*watch_id] = pdd->dev->kfd2kgd->set_address_watch(
+   for_each_inst(xcc_id, xcc_mask)
+   pdd->watch_points[*watch_id] = 
pdd->dev->kfd2kgd->set_address_watch(
pdd->dev->adev,
watch_address,
watch_address_mask,
*watch_id,
watch_mode,
pdd->dev->vm_info.last_vmid_kfd,
-   0);
+   xcc_id);
amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
 
if (!pdd->dev->kfd->shared_resources.enable_mes)
-- 
2.34.1



[PATCH 1/5] drm/amdgpu: add debugger support for GC v9.4.3

2023-06-28 Thread Eric Huang
From: Jonathan Kim 

Implement the similarities as GC v9.4.2, and the difference
for GC v9.4.3 HW spec.

Signed-off-by: Jonathan Kim 
Signed-off-by: Eric Huang 
---
 .../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c  |   7 +-
 .../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h  |  30 
 .../drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c   | 146 +-
 3 files changed, 179 insertions(+), 4 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
index 60f9e027fb66..f3f7e0437447 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
@@ -23,6 +23,7 @@
 #include "amdgpu_amdkfd.h"
 #include "amdgpu_amdkfd_arcturus.h"
 #include "amdgpu_amdkfd_gfx_v9.h"
+#include "amdgpu_amdkfd_aldebaran.h"
 #include "gc/gc_9_4_2_offset.h"
 #include "gc/gc_9_4_2_sh_mask.h"
 #include 
@@ -36,7 +37,7 @@
  * initialize the debug mode registers after it has disabled GFX off during the
  * debug session.
  */
-static uint32_t kgd_aldebaran_enable_debug_trap(struct amdgpu_device *adev,
+uint32_t kgd_aldebaran_enable_debug_trap(struct amdgpu_device *adev,
bool restore_dbg_registers,
uint32_t vmid)
 {
@@ -50,7 +51,7 @@ static uint32_t kgd_aldebaran_enable_debug_trap(struct 
amdgpu_device *adev,
 }
 
 /* returns TRAP_EN, EXCP_EN and EXCP_REPLACE. */
-static uint32_t kgd_aldebaran_disable_debug_trap(struct amdgpu_device *adev,
+uint32_t kgd_aldebaran_disable_debug_trap(struct amdgpu_device *adev,
bool keep_trap_enabled,
uint32_t vmid)
 {
@@ -107,7 +108,7 @@ static uint32_t 
kgd_aldebaran_set_wave_launch_trap_override(struct amdgpu_device
return data;
 }
 
-static uint32_t kgd_aldebaran_set_wave_launch_mode(struct amdgpu_device *adev,
+uint32_t kgd_aldebaran_set_wave_launch_mode(struct amdgpu_device *adev,
uint8_t wave_launch_mode,
uint32_t vmid)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h
new file mode 100644
index ..5f776ede295e
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright 2021 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+uint32_t kgd_aldebaran_enable_debug_trap(struct amdgpu_device *adev,
+   bool restore_dbg_registers,
+   uint32_t vmid);
+uint32_t kgd_aldebaran_disable_debug_trap(struct amdgpu_device *adev,
+   bool keep_trap_enabled,
+   uint32_t vmid);
+uint32_t kgd_aldebaran_set_wave_launch_mode(struct amdgpu_device *adev,
+   uint8_t wave_launch_mode,
+   uint32_t vmid);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
index 5b4b7f8b92a5..7aab8dcf46e1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
@@ -22,6 +22,7 @@
 #include "amdgpu.h"
 #include "amdgpu_amdkfd.h"
 #include "amdgpu_amdkfd_gfx_v9.h"
+#include "amdgpu_amdkfd_aldebaran.h"
 #include "gc/gc_9_4_3_offset.h"
 #include "gc/gc_9_4_3_sh_mask.h"
 #include "athub/athub_1_8_0_offset.h"
@@ -32,6 +33,7 @@
 #include "soc15.h"
 #include "sdma/sdma_4_4_2_offset.h"
 #include "sdma/sdma_4_4_2_sh_mask.h"
+#include 
 
 static inline struct v9_sdma_mqd *get_sdma_mqd(void *mqd)
 {
@@ -361,6 +363,139 @@ static int kgd_gfx_v9_4_3_hqd

[PATCH 3/5] drm/amdkfd: restore debugger additional info for gfx v9_4_3

2023-06-28 Thread Eric Huang
From: Jonathan Kim 

The additional information that the KFD reports to the debugger was
destroyed when the following commit was merged:
"drm/amdkfd: convert switches to IP version checking"

Signed-off-by: Jonathan Kim 
Reviewed-by: Harish Kasiviswanathan 
Signed-off-by: Jonathan Kim 
Acked-by: Amber Lin 
Signed-off-by: Eric Huang 
---
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c | 10 --
 drivers/gpu/drm/amd/amdkfd/kfd_topology.h |  3 +++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
index 61fc62f3e003..1a4cdee86759 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.c
@@ -1932,8 +1932,14 @@ static void kfd_topology_set_capabilities(struct 
kfd_topology_device *dev)
HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED;
 
if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {
-   dev->node_props.debug_prop |= 
HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 |
-   HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
+   if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3))
+   dev->node_props.debug_prop |=
+   HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 |
+   HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3;
+   else
+   dev->node_props.debug_prop |=
+   HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 |
+   HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
 
if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 4, 2))
dev->node_props.debug_prop |=
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h 
b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h
index cba2cd5ed9d1..dea32a9e5506 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_topology.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_topology.h
@@ -32,9 +32,12 @@
 #define KFD_TOPOLOGY_PUBLIC_NAME_SIZE 32
 
 #define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX96
+#define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 7
 #define HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10   7
 #define HSA_DBG_WATCH_ADDR_MASK_HI_BIT  \
(29 << HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT)
+#define HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3 \
+   (30 << HSA_DBG_WATCH_ADDR_MASK_HI_BIT_SHIFT)
 
 struct kfd_node_properties {
uint64_t hive_id;
-- 
2.34.1



[PATCH 2/5] drm/amdkfd: add multi-process debugging support for GC v9.4.3

2023-06-28 Thread Eric Huang
From: Jonathan Kim 

Similar to GC v9.4.2, GC v9.4.3 should use the 5-Dword extended
MAP_PROCESS packet to support multi-process debugging.  Update the
mutli-process debug support list so that the KFD updates the runlist
on debug mode setting and that it allocates enough GTT memory during
KFD device initialization.

Signed-off-by: Jonathan Kim 
Reviewed-by: Felix Kuehling 
Signed-off-by: Eric Huang 
---
 drivers/gpu/drm/amd/amdkfd/kfd_debug.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h 
b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
index a289e59ceb79..a0afc6a7b6c4 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_debug.h
@@ -76,8 +76,9 @@ int kfd_dbg_send_exception_to_runtime(struct kfd_process *p,
 
 static inline bool kfd_dbg_is_per_vmid_supported(struct kfd_node *dev)
 {
-   return KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
-  KFD_GC_VERSION(dev) >= IP_VERSION(11, 0, 0);
+   return (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2) ||
+   KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3) ||
+   KFD_GC_VERSION(dev) >= IP_VERSION(11, 0, 0));
 }
 
 void debug_event_write_work_handler(struct work_struct *work);
-- 
2.34.1



[PATCH 4/5] drm/amdkfd: add xcc instance for debugger APIs

2023-06-28 Thread Eric Huang
Since GFX9 GPU has multiple xcc instances, this is to
implement this change in KFD for debugger APIs.

Signed-off-by: Eric Huang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c | 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c  | 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c   | 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h   | 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c   | 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c| 6 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h| 6 --
 drivers/gpu/drm/amd/amdkfd/kfd_debug.c   | 6 --
 drivers/gpu/drm/amd/include/kgd_kfd_interface.h  | 6 --
 9 files changed, 36 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
index f3f7e0437447..c7f88bfa1976 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c
@@ -126,7 +126,8 @@ static uint32_t kgd_gfx_aldebaran_set_address_watch(
uint32_t watch_address_mask,
uint32_t watch_id,
uint32_t watch_mode,
-   uint32_t debug_vmid)
+   uint32_t debug_vmid,
+   uint32_t inst )
 {
uint32_t watch_address_high;
uint32_t watch_address_low;
@@ -163,7 +164,8 @@ static uint32_t kgd_gfx_aldebaran_set_address_watch(
 }
 
 static uint32_t kgd_gfx_aldebaran_clear_address_watch(struct amdgpu_device 
*adev,
- uint32_t watch_id)
+ uint32_t watch_id,
+ uint32_t inst)
 {
return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
index 7aab8dcf46e1..17fe4e90f203 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c
@@ -454,7 +454,8 @@ static uint32_t kgd_gfx_v9_4_3_set_address_watch(
uint32_t watch_address_mask,
uint32_t watch_id,
uint32_t watch_mode,
-   uint32_t debug_vmid)
+   uint32_t debug_vmid,
+   uint32_t inst)
 {
uint32_t watch_address_high;
uint32_t watch_address_low;
@@ -491,7 +492,8 @@ static uint32_t kgd_gfx_v9_4_3_set_address_watch(
 }
 
 static uint32_t kgd_gfx_v9_4_3_clear_address_watch(struct amdgpu_device *adev,
-   uint32_t watch_id)
+   uint32_t watch_id,
+   uint32_t inst)
 {
return 0;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
index 8ad7a7779e14..225b8929a878 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
@@ -886,7 +886,8 @@ uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device 
*adev,
uint32_t watch_address_mask,
uint32_t watch_id,
uint32_t watch_mode,
-   uint32_t debug_vmid)
+   uint32_t debug_vmid,
+   uint32_t inst)
 {
uint32_t watch_address_high;
uint32_t watch_address_low;
@@ -942,7 +943,8 @@ uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device 
*adev,
 }
 
 uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu_device *adev,
-   uint32_t watch_id)
+   uint32_t watch_id,
+   uint32_t inst)
 {
uint32_t watch_address_cntl;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
index e6b70196071a..c904a08b022b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h
@@ -44,9 +44,11 @@ uint32_t kgd_gfx_v10_set_address_watch(struct amdgpu_device 
*adev,
uint32_t watch_address_mask,
uint32_t watch_id,
uint32_t watch_mode,
-   uint32_t debug_vmid);
+   uint32_t debug_vmid,
+   uint32_t inst);
 uint32_t kgd_gfx_v10_clear_address_watch(struct amdgpu

[PATCH 0/5] Upstream debugger feature for GFX v9.4.3

2023-06-28 Thread Eric Huang
Eric Huang (1):
  drm/amdkfd: add xcc instance for debugger APIs

Jonathan Kim (4):
  drm/amdgpu: add debugger support for GC v9.4.3
  drm/amdkfd: add multi-process debugging support for GC v9.4.3
  drm/amdkfd: restore debugger additional info for gfx v9_4_3
  drm/amdkfd: enable watch points globally for gfx943

 .../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.c  |  13 +-
 .../drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h  |  30 
 .../drm/amd/amdgpu/amdgpu_amdkfd_gc_9_4_3.c   | 150 +-
 .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c|   6 +-
 .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.h|   6 +-
 .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v11.c|   6 +-
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c |   6 +-
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h |   6 +-
 drivers/gpu/drm/amd/amdkfd/kfd_debug.c|  18 ++-
 drivers/gpu/drm/amd/amdkfd/kfd_debug.h|   5 +-
 drivers/gpu/drm/amd/amdkfd/kfd_topology.c |  10 +-
 drivers/gpu/drm/amd/amdkfd/kfd_topology.h |   3 +
 .../gpu/drm/amd/include/kgd_kfd_interface.h   |   6 +-
 13 files changed, 237 insertions(+), 28 deletions(-)
 create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_aldebaran.h

-- 
2.34.1



Re: [patch V2] drm/amdkfd: Access gpuvm_export_dmabuf() api

2023-06-28 Thread David Francis

On 2023-06-22 17:10, Ramesh Errabolu wrote:


Call KFD api to get Dmabuf instead of calling GEM Prime API


Would appreciate a more detailed commit message to explain why the
KFD API is preferred over the GEM API.

With or without that change, this is

Reviewed-by: David Francis



Signed-off-by: Ramesh Errabolu
---
  drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 11 +--
  1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c 
b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
index cf1db0ab3471..40ac093b5035 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
@@ -1852,15 +1852,14 @@ static uint32_t get_process_num_bos(struct kfd_process 
*p)
 return num_of_bos;
  }

-static int criu_get_prime_handle(struct drm_gem_object *gobj, int flags,
+static int criu_get_prime_handle(struct kgd_mem *mem, int flags,
   u32 *shared_fd)
  {
 struct dma_buf *dmabuf;
 int ret;

-   dmabuf = amdgpu_gem_prime_export(gobj, flags);
-   if (IS_ERR(dmabuf)) {
-   ret = PTR_ERR(dmabuf);
+   ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);
+   if (ret) {
 pr_err("dmabuf export failed for the BO\n");
 return ret;
 }
@@ -1940,7 +1939,7 @@ static int criu_checkpoint_bos(struct kfd_process *p,
 }
 if (bo_bucket->alloc_flags
 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | 
KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
-   ret = 
criu_get_prime_handle(&dumper_bo->tbo.base,
+   ret = criu_get_prime_handle(kgd_mem,
 bo_bucket->alloc_flags &
 
KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0,
 &bo_bucket->dmabuf_fd);
@@ -2402,7 +2401,7 @@ static int criu_restore_bo(struct kfd_process *p,
 /* create the dmabuf object and export the bo */
 if (bo_bucket->alloc_flags
 & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
-   ret = criu_get_prime_handle(&kgd_mem->bo->tbo.base, DRM_RDWR,
+   ret = criu_get_prime_handle(kgd_mem, DRM_RDWR,
 &bo_bucket->dmabuf_fd);
 if (ret)
 return ret;
--
2.25.1


Re: [PATCH] drm/amdgpu: Fix potential fence use-after-free v2

2023-06-28 Thread Alex Deucher
On Wed, Jun 28, 2023 at 9:45 AM Christian König
 wrote:
>
> From: shanzhulig 
>
> fence Decrements the reference count before exiting.
> Avoid Race Vulnerabilities for fence use-after-free.
>
> v2 (chk): actually fix the use after free and not just move it.
>
> Signed-off-by: shanzhulig 
> Signed-off-by: Christian König 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> index 2eb2c66843a8..71a9c4ab905f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
> @@ -1624,15 +1624,15 @@ static int amdgpu_cs_wait_all_fences(struct 
> amdgpu_device *adev,
> continue;
>
> r = dma_fence_wait_timeout(fence, true, timeout);
> +   if (r > 0 && fence->error)
> +   r = fence->error;
> +
> dma_fence_put(fence);
> if (r < 0)
> return r;
>
> if (r == 0)
> break;
> -
> -   if (fence->error)
> -   return fence->error;
> }
>
> memset(wait, 0, sizeof(*wait));
> --
> 2.34.1
>


[PATCH] drm/amdgpu: Fix potential fence use-after-free v2

2023-06-28 Thread Christian König
From: shanzhulig 

fence Decrements the reference count before exiting.
Avoid Race Vulnerabilities for fence use-after-free.

v2 (chk): actually fix the use after free and not just move it.

Signed-off-by: shanzhulig 
Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 2eb2c66843a8..71a9c4ab905f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -1624,15 +1624,15 @@ static int amdgpu_cs_wait_all_fences(struct 
amdgpu_device *adev,
continue;
 
r = dma_fence_wait_timeout(fence, true, timeout);
+   if (r > 0 && fence->error)
+   r = fence->error;
+
dma_fence_put(fence);
if (r < 0)
return r;
 
if (r == 0)
break;
-
-   if (fence->error)
-   return fence->error;
}
 
memset(wait, 0, sizeof(*wait));
-- 
2.34.1



Re: [PATCH] drm/amd/pm: fix smu i2c data read risk

2023-06-28 Thread Alex Deucher
Reviewed-by: Alex Deucher 

On Wed, Jun 28, 2023 at 8:30 AM Yang Wang  wrote:
>
> the smu driver_table is used for all types of smu
> tables data transcation (e.g: PPtable, Metrics, i2c, Ecc..).
>
> it is necessary to hold this lock to avoiding data tampering
> during the i2c read operation.
>
> Signed-off-by: Yang Wang 
> Reviewed-by: Lijo Lazar 
> ---
>  drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c   | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c  | 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c| 2 +-
>  drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c| 2 +-
>  6 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> index 9cd005131f56..3bb18396d2f9 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
> @@ -2113,7 +2113,6 @@ static int arcturus_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> mutex_lock(&adev->pm.mutex);
> r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
> -   mutex_unlock(&adev->pm.mutex);
> if (r)
> goto fail;
>
> @@ -2130,6 +2129,7 @@ static int arcturus_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> r = num_msgs;
>  fail:
> +   mutex_unlock(&adev->pm.mutex);
> kfree(req);
> return r;
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index c94d825a871b..95f6d821bacb 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -3021,7 +3021,6 @@ static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
> }
> mutex_lock(&adev->pm.mutex);
> r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
> -   mutex_unlock(&adev->pm.mutex);
> if (r)
> goto fail;
>
> @@ -3038,6 +3037,7 @@ static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
> }
> r = num_msgs;
>  fail:
> +   mutex_unlock(&adev->pm.mutex);
> kfree(req);
> return r;
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index f7ed3e655e39..8fe2e1716da4 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -3842,7 +3842,6 @@ static int sienna_cichlid_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> mutex_lock(&adev->pm.mutex);
> r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
> -   mutex_unlock(&adev->pm.mutex);
> if (r)
> goto fail;
>
> @@ -3859,6 +3858,7 @@ static int sienna_cichlid_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> r = num_msgs;
>  fail:
> +   mutex_unlock(&adev->pm.mutex);
> kfree(req);
> return r;
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> index e80f122d8aec..ce50ef46e73f 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
> @@ -1525,7 +1525,6 @@ static int aldebaran_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> mutex_lock(&adev->pm.mutex);
> r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
> -   mutex_unlock(&adev->pm.mutex);
> if (r)
> goto fail;
>
> @@ -1542,6 +1541,7 @@ static int aldebaran_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> r = num_msgs;
>  fail:
> +   mutex_unlock(&adev->pm.mutex);
> kfree(req);
> return r;
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index 124287cbbff8..1d995f53aaab 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -2320,7 +2320,6 @@ static int smu_v13_0_0_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> mutex_lock(&adev->pm.mutex);
> r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
> -   mutex_unlock(&adev->pm.mutex);
> if (r)
> goto fail;
>
> @@ -2337,6 +2336,7 @@ static int smu_v13_0_0_i2c_xfer(struct i2c_adapter 
> *i2c_adap,
> }
> r = num_msgs;
>  fail:
> +   mutex_unlock(&adev->pm.mutex);
> kfree(req);
> return r;
>  }
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c 
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
> index 6ef1225

[PATCH] drm/amd/pm: fix smu i2c data read risk

2023-06-28 Thread Yang Wang
the smu driver_table is used for all types of smu
tables data transcation (e.g: PPtable, Metrics, i2c, Ecc..).

it is necessary to hold this lock to avoiding data tampering
during the i2c read operation.

Signed-off-by: Yang Wang 
Reviewed-by: Lijo Lazar 
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c   | 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c | 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c  | 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c| 2 +-
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c| 2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
index 9cd005131f56..3bb18396d2f9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c
@@ -2113,7 +2113,6 @@ static int arcturus_i2c_xfer(struct i2c_adapter *i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
-   mutex_unlock(&adev->pm.mutex);
if (r)
goto fail;
 
@@ -2130,6 +2129,7 @@ static int arcturus_i2c_xfer(struct i2c_adapter *i2c_adap,
}
r = num_msgs;
 fail:
+   mutex_unlock(&adev->pm.mutex);
kfree(req);
return r;
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
index c94d825a871b..95f6d821bacb 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
@@ -3021,7 +3021,6 @@ static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
-   mutex_unlock(&adev->pm.mutex);
if (r)
goto fail;
 
@@ -3038,6 +3037,7 @@ static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
}
r = num_msgs;
 fail:
+   mutex_unlock(&adev->pm.mutex);
kfree(req);
return r;
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index f7ed3e655e39..8fe2e1716da4 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -3842,7 +3842,6 @@ static int sienna_cichlid_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
-   mutex_unlock(&adev->pm.mutex);
if (r)
goto fail;
 
@@ -3859,6 +3858,7 @@ static int sienna_cichlid_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
r = num_msgs;
 fail:
+   mutex_unlock(&adev->pm.mutex);
kfree(req);
return r;
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
index e80f122d8aec..ce50ef46e73f 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c
@@ -1525,7 +1525,6 @@ static int aldebaran_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
-   mutex_unlock(&adev->pm.mutex);
if (r)
goto fail;
 
@@ -1542,6 +1541,7 @@ static int aldebaran_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
r = num_msgs;
 fail:
+   mutex_unlock(&adev->pm.mutex);
kfree(req);
return r;
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 124287cbbff8..1d995f53aaab 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -2320,7 +2320,6 @@ static int smu_v13_0_0_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_cmn_update_table(smu, SMU_TABLE_I2C_COMMANDS, 0, req, true);
-   mutex_unlock(&adev->pm.mutex);
if (r)
goto fail;
 
@@ -2337,6 +2336,7 @@ static int smu_v13_0_0_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
r = num_msgs;
 fail:
+   mutex_unlock(&adev->pm.mutex);
kfree(req);
return r;
 }
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c 
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
index 6ef12252beb5..1ac552142763 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c
@@ -1763,7 +1763,6 @@ static int smu_v13_0_6_i2c_xfer(struct i2c_adapter 
*i2c_adap,
}
mutex_lock(&adev->pm.mutex);
r = smu_v13_0_6_request_i2c_xfer(smu, req);
- 

Re: [PATCH 1/2] drm/amdgpu: make mcbp a per device setting

2023-06-28 Thread Christian König

Am 16.06.23 um 23:10 schrieb Alex Deucher:

So we can selectively enable it on certain devices.  No
intended functional change.

Signed-off-by: Alex Deucher 


Acked-by: Christian König  for the series.


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 19 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h|  1 +
  drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c|  4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c   |  2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c   |  3 ---
  drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c |  4 ++--
  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c |  2 +-
  7 files changed, 22 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f39db4a2c2cf..78c6265fe79b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2551,7 +2551,7 @@ static int amdgpu_device_ip_init(struct amdgpu_device 
*adev)
adev->ip_blocks[i].status.hw = true;
  
  			/* right after GMC hw init, we create CSA */

-   if (amdgpu_mcbp) {
+   if (adev->gfx.mcbp) {
r = amdgpu_allocate_static_csa(adev, 
&adev->virt.csa_obj,
   
AMDGPU_GEM_DOMAIN_VRAM |
   
AMDGPU_GEM_DOMAIN_GTT,
@@ -3672,6 +3672,18 @@ static const struct attribute *amdgpu_dev_attributes[] = 
{
NULL
  };
  
+static void amdgpu_device_set_mcbp(struct amdgpu_device *adev)

+{
+   if (amdgpu_mcbp == 1)
+   adev->gfx.mcbp = true;
+
+   if (amdgpu_sriov_vf(adev))
+   adev->gfx.mcbp = true;
+
+   if (adev->gfx.mcbp)
+   DRM_INFO("MCBP is enabled\n");
+}
+
  /**
   * amdgpu_device_init - initialize the driver
   *
@@ -3823,9 +3835,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base);
DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size);
  
-	if (amdgpu_mcbp)

-   DRM_INFO("MCBP is enabled\n");
-
/*
 * Reset domain needs to be present early, before XGMI hive discovered
 * (if any) and intitialized to use reset sem and in_gpu reset flag
@@ -3851,6 +3860,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
if (r)
return r;
  
+	amdgpu_device_set_mcbp(adev);

+
/* Get rid of things like offb */
r = drm_aperture_remove_conflicting_pci_framebuffers(adev->pdev, 
&amdgpu_kms_driver);
if (r)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index ce0f7a8ad4b8..a4ff515ce896 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -434,6 +434,7 @@ struct amdgpu_gfx {
uint16_txcc_mask;
uint32_tnum_xcc_per_xcp;
struct mutexpartition_mutex;
+   boolmcbp; /* mid command buffer preemption 
*/
  };
  
  struct amdgpu_gfx_ras_reg_entry {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index e3531aa3c8bd..cca5a495611f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -805,7 +805,7 @@ int amdgpu_info_ioctl(struct drm_device *dev, void *data, 
struct drm_file *filp)
dev_info->ids_flags = 0;
if (adev->flags & AMD_IS_APU)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_FUSION;
-   if (amdgpu_mcbp)
+   if (adev->gfx.mcbp)
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
if (amdgpu_is_tmz(adev))
dev_info->ids_flags |= AMDGPU_IDS_FLAGS_TMZ;
@@ -1247,7 +1247,7 @@ int amdgpu_driver_open_kms(struct drm_device *dev, struct 
drm_file *file_priv)
goto error_vm;
}
  
-	if (amdgpu_mcbp) {

+   if (adev->gfx.mcbp) {
uint64_t csa_addr = amdgpu_csa_vaddr(adev) & 
AMDGPU_GMC_HOLE_MASK;
  
  		r = amdgpu_map_static_csa(adev, &fpriv->vm, adev->virt.csa_obj,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index 78ec3420ef85..dacf281d2b21 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -72,7 +72,7 @@ uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
int r;
  
  	/* don't enable OS preemption on SDMA under SRIOV */

-   if (amdgpu_sriov_vf(adev) || vmid == 0 || !amdgpu_mcbp)
+   if (amdgpu_sriov_vf(adev) || vmid == 0 || !adev->gfx.mcbp)
return 0;
  
  	if (ring->is_mes_queue) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c 
b/drivers/gpu/drm/amd/amdgpu/amd

[PATCH 5/6] drm/amdgpu: use drm_exec for MES testing

2023-06-28 Thread Christian König
Start using the new component here as well.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 90 -
 1 file changed, 43 insertions(+), 47 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index e9091ebfe230..bc28ce15b70d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -22,6 +22,7 @@
  */
 
 #include 
+#include 
 
 #include "amdgpu_mes.h"
 #include "amdgpu.h"
@@ -1168,34 +1169,31 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device 
*adev,
 struct amdgpu_mes_ctx_data *ctx_data)
 {
struct amdgpu_bo_va *bo_va;
-   struct ww_acquire_ctx ticket;
-   struct list_head list;
-   struct amdgpu_bo_list_entry pd;
-   struct ttm_validate_buffer csa_tv;
struct amdgpu_sync sync;
+   struct drm_exec exec;
int r;
 
amdgpu_sync_create(&sync);
-   INIT_LIST_HEAD(&list);
-   INIT_LIST_HEAD(&csa_tv.head);
 
-   csa_tv.bo = &ctx_data->meta_data_obj->tbo;
-   csa_tv.num_shared = 1;
-
-   list_add(&csa_tv.head, &list);
-   amdgpu_vm_get_pd_bo(vm, &list, &pd);
-
-   r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
-   if (r) {
-   DRM_ERROR("failed to reserve meta data BO: err=%d\n", r);
-   return r;
+   drm_exec_init(&exec, 0);
+   drm_exec_until_all_locked(&exec) {
+   r = drm_exec_lock_obj(&exec,
+ &ctx_data->meta_data_obj->tbo.base);
+   drm_exec_retry_on_contention(&exec);
+if (unlikely(r))
+   goto error_fini_exec;
+
+   r = amdgpu_vm_lock_pd(vm, &exec, 0);
+   drm_exec_retry_on_contention(&exec);
+if (unlikely(r))
+   goto error_fini_exec;
}
 
bo_va = amdgpu_vm_bo_add(adev, vm, ctx_data->meta_data_obj);
if (!bo_va) {
-   ttm_eu_backoff_reservation(&ticket, &list);
DRM_ERROR("failed to create bo_va for meta data BO\n");
-   return -ENOMEM;
+   r = -ENOMEM;
+   goto error_fini_exec;
}
 
r = amdgpu_vm_bo_map(adev, bo_va, ctx_data->meta_data_gpu_addr, 0,
@@ -1205,33 +1203,35 @@ int amdgpu_mes_ctx_map_meta_data(struct amdgpu_device 
*adev,
 
if (r) {
DRM_ERROR("failed to do bo_map on meta data, err=%d\n", r);
-   goto error;
+   goto error_del_bo_va;
}
 
r = amdgpu_vm_bo_update(adev, bo_va, false);
if (r) {
DRM_ERROR("failed to do vm_bo_update on meta data\n");
-   goto error;
+   goto error_del_bo_va;
}
amdgpu_sync_fence(&sync, bo_va->last_pt_update);
 
r = amdgpu_vm_update_pdes(adev, vm, false);
if (r) {
DRM_ERROR("failed to update pdes on meta data\n");
-   goto error;
+   goto error_del_bo_va;
}
amdgpu_sync_fence(&sync, vm->last_update);
 
amdgpu_sync_wait(&sync, false);
-   ttm_eu_backoff_reservation(&ticket, &list);
+   drm_exec_fini(&exec);
 
amdgpu_sync_free(&sync);
ctx_data->meta_data_va = bo_va;
return 0;
 
-error:
+error_del_bo_va:
amdgpu_vm_bo_del(adev, bo_va);
-   ttm_eu_backoff_reservation(&ticket, &list);
+
+error_fini_exec:
+   drm_exec_fini(&exec);
amdgpu_sync_free(&sync);
return r;
 }
@@ -1242,34 +1242,30 @@ int amdgpu_mes_ctx_unmap_meta_data(struct amdgpu_device 
*adev,
struct amdgpu_bo_va *bo_va = ctx_data->meta_data_va;
struct amdgpu_bo *bo = ctx_data->meta_data_obj;
struct amdgpu_vm *vm = bo_va->base.vm;
-   struct amdgpu_bo_list_entry vm_pd;
-   struct list_head list, duplicates;
-   struct dma_fence *fence = NULL;
-   struct ttm_validate_buffer tv;
-   struct ww_acquire_ctx ticket;
-   long r = 0;
-
-   INIT_LIST_HEAD(&list);
-   INIT_LIST_HEAD(&duplicates);
-
-   tv.bo = &bo->tbo;
-   tv.num_shared = 2;
-   list_add(&tv.head, &list);
-
-   amdgpu_vm_get_pd_bo(vm, &list, &vm_pd);
-
-   r = ttm_eu_reserve_buffers(&ticket, &list, false, &duplicates);
-   if (r) {
-   dev_err(adev->dev, "leaking bo va because "
-   "we fail to reserve bo (%ld)\n", r);
-   return r;
+   struct dma_fence *fence;
+   struct drm_exec exec;
+   long r;
+
+   drm_exec_init(&exec, 0);
+   drm_exec_until_all_locked(&exec) {
+   r = drm_exec_lock_obj(&exec,
+ &ctx_data->meta_data_obj->tbo.base);
+   drm_exec_retry_on_contention(&exec);
+if (unlikely(r))
+   goto out_unlock;
+
+   r = amdgpu_vm_lock_pd(vm, &exec, 0);
+   drm_exec_re

[PATCH 6/6] drm/amdgpu: use the new drm_exec object for CS v2

2023-06-28 Thread Christian König
Use the new component here as well and remove the old handling.

v2: drop dupplicate handling

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu.h |   1 -
 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c |  71 ++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.h |   5 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 211 +---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.h  |   7 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c  |  22 --
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h  |   3 -
 7 files changed, 116 insertions(+), 204 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a84bd4a0c421..b49c34a5c04b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -53,7 +53,6 @@
 
 #include 
 #include 
-#include 
 
 #include 
 #include 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
index 252a876b0725..b6298e901cbd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_bo_list.c
@@ -28,6 +28,7 @@
  *Christian König 
  */
 
+#include 
 #include 
 
 #include "amdgpu.h"
@@ -50,13 +51,20 @@ static void amdgpu_bo_list_free(struct kref *ref)
   refcount);
struct amdgpu_bo_list_entry *e;
 
-   amdgpu_bo_list_for_each_entry(e, list) {
-   struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
+   amdgpu_bo_list_for_each_entry(e, list)
+   amdgpu_bo_unref(&e->bo);
+   call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
+}
 
-   amdgpu_bo_unref(&bo);
-   }
+static int amdgpu_bo_list_entry_cmp(const void *_a, const void *_b)
+{
+   const struct amdgpu_bo_list_entry *a = _a, *b = _b;
 
-   call_rcu(&list->rhead, amdgpu_bo_list_free_rcu);
+   if (a->priority > b->priority)
+   return 1;
+   if (a->priority < b->priority)
+   return -1;
+   return 0;
 }
 
 int amdgpu_bo_list_create(struct amdgpu_device *adev, struct drm_file *filp,
@@ -118,7 +126,7 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev, 
struct drm_file *filp,
 
entry->priority = min(info[i].bo_priority,
  AMDGPU_BO_LIST_MAX_PRIORITY);
-   entry->tv.bo = &bo->tbo;
+   entry->bo = bo;
 
if (bo->preferred_domains == AMDGPU_GEM_DOMAIN_GDS)
list->gds_obj = bo;
@@ -133,6 +141,8 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev, 
struct drm_file *filp,
 
list->first_userptr = first_userptr;
list->num_entries = num_entries;
+   sort(array, last_entry, sizeof(struct amdgpu_bo_list_entry),
+amdgpu_bo_list_entry_cmp, NULL);
 
trace_amdgpu_cs_bo_status(list->num_entries, total_size);
 
@@ -141,16 +151,10 @@ int amdgpu_bo_list_create(struct amdgpu_device *adev, 
struct drm_file *filp,
return 0;
 
 error_free:
-   for (i = 0; i < last_entry; ++i) {
-   struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
-
-   amdgpu_bo_unref(&bo);
-   }
-   for (i = first_userptr; i < num_entries; ++i) {
-   struct amdgpu_bo *bo = ttm_to_amdgpu_bo(array[i].tv.bo);
-
-   amdgpu_bo_unref(&bo);
-   }
+   for (i = 0; i < last_entry; ++i)
+   amdgpu_bo_unref(&array[i].bo);
+   for (i = first_userptr; i < num_entries; ++i)
+   amdgpu_bo_unref(&array[i].bo);
kvfree(list);
return r;
 
@@ -182,41 +186,6 @@ int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
return -ENOENT;
 }
 
-void amdgpu_bo_list_get_list(struct amdgpu_bo_list *list,
-struct list_head *validated)
-{
-   /* This is based on the bucket sort with O(n) time complexity.
-* An item with priority "i" is added to bucket[i]. The lists are then
-* concatenated in descending order.
-*/
-   struct list_head bucket[AMDGPU_BO_LIST_NUM_BUCKETS];
-   struct amdgpu_bo_list_entry *e;
-   unsigned i;
-
-   for (i = 0; i < AMDGPU_BO_LIST_NUM_BUCKETS; i++)
-   INIT_LIST_HEAD(&bucket[i]);
-
-   /* Since buffers which appear sooner in the relocation list are
-* likely to be used more often than buffers which appear later
-* in the list, the sort mustn't change the ordering of buffers
-* with the same priority, i.e. it must be stable.
-*/
-   amdgpu_bo_list_for_each_entry(e, list) {
-   struct amdgpu_bo *bo = ttm_to_amdgpu_bo(e->tv.bo);
-   unsigned priority = e->priority;
-
-   if (!bo->parent)
-   list_add_tail(&e->tv.head, &bucket[priority]);
-
-   e->user_pages = NULL;
-   e->range = NULL;
-   }
-
-   /* Connect the sorted buckets in the output list. */
-   for (i =

[PATCH 3/6] drm/amdkfd: switch over to using drm_exec v2

2023-06-28 Thread Christian König
Avoids quite a bit of logic and kmalloc overhead.

v2: fix multiple problems pointed out by Felix

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/Kconfig|   1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h|   5 +-
 .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c  | 299 +++---
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c|  18 ++
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h|   4 +
 drivers/gpu/drm/amd/amdkfd/kfd_svm.c  |  45 ++-
 6 files changed, 162 insertions(+), 210 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig 
b/drivers/gpu/drm/amd/amdgpu/Kconfig
index b91e79c721e2..22d88f8ef527 100644
--- a/drivers/gpu/drm/amd/amdgpu/Kconfig
+++ b/drivers/gpu/drm/amd/amdgpu/Kconfig
@@ -21,6 +21,7 @@ config DRM_AMDGPU
select INTERVAL_TREE
select DRM_BUDDY
select DRM_SUBALLOC_HELPER
+   select DRM_EXEC
# amdgpu depends on ACPI_VIDEO when ACPI is enabled, for select to work
# ACPI_VIDEO's dependencies must also be selected.
select INPUT if ACPI
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
index 2d0406bff84e..1e4cc1fe88fc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
@@ -25,6 +25,7 @@
 #ifndef AMDGPU_AMDKFD_H_INCLUDED
 #define AMDGPU_AMDKFD_H_INCLUDED
 
+#include 
 #include 
 #include 
 #include 
@@ -32,7 +33,6 @@
 #include 
 #include 
 #include 
-#include 
 #include "amdgpu_sync.h"
 #include "amdgpu_vm.h"
 #include "amdgpu_xcp.h"
@@ -71,8 +71,7 @@ struct kgd_mem {
struct hmm_range *range;
struct list_head attachments;
/* protected by amdkfd_process_info.lock */
-   struct ttm_validate_buffer validate_list;
-   struct ttm_validate_buffer resv_list;
+   struct list_head validate_list;
uint32_t domain;
unsigned int mapped_to_gpu_memory;
uint64_t va;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index f61527b800e6..27d331e9419d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -27,6 +27,8 @@
 #include 
 #include 
 
+#include 
+
 #include "amdgpu_object.h"
 #include "amdgpu_gem.h"
 #include "amdgpu_vm.h"
@@ -964,28 +966,20 @@ static void add_kgd_mem_to_kfd_bo_list(struct kgd_mem 
*mem,
struct amdkfd_process_info *process_info,
bool userptr)
 {
-   struct ttm_validate_buffer *entry = &mem->validate_list;
-   struct amdgpu_bo *bo = mem->bo;
-
-   INIT_LIST_HEAD(&entry->head);
-   entry->num_shared = 1;
-   entry->bo = &bo->tbo;
mutex_lock(&process_info->lock);
if (userptr)
-   list_add_tail(&entry->head, &process_info->userptr_valid_list);
+   list_add_tail(&mem->validate_list,
+ &process_info->userptr_valid_list);
else
-   list_add_tail(&entry->head, &process_info->kfd_bo_list);
+   list_add_tail(&mem->validate_list, &process_info->kfd_bo_list);
mutex_unlock(&process_info->lock);
 }
 
 static void remove_kgd_mem_from_kfd_bo_list(struct kgd_mem *mem,
struct amdkfd_process_info *process_info)
 {
-   struct ttm_validate_buffer *bo_list_entry;
-
-   bo_list_entry = &mem->validate_list;
mutex_lock(&process_info->lock);
-   list_del(&bo_list_entry->head);
+   list_del(&mem->validate_list);
mutex_unlock(&process_info->lock);
 }
 
@@ -1072,13 +1066,12 @@ static int init_user_pages(struct kgd_mem *mem, 
uint64_t user_addr,
  * object can track VM updates.
  */
 struct bo_vm_reservation_context {
-   struct amdgpu_bo_list_entry kfd_bo; /* BO list entry for the KFD BO */
-   unsigned int n_vms; /* Number of VMs reserved   */
-   struct amdgpu_bo_list_entry *vm_pd; /* Array of VM BO list entries  */
-   struct ww_acquire_ctx ticket;   /* Reservation ticket   */
-   struct list_head list, duplicates;  /* BO lists */
-   struct amdgpu_sync *sync;   /* Pointer to sync object   */
-   bool reserved;  /* Whether BOs are reserved */
+   /* DRM execution context for the reservation */
+   struct drm_exec exec;
+   /* Number of VMs reserved */
+   unsigned int n_vms;
+   /* Pointer to sync object */
+   struct amdgpu_sync *sync;
 };
 
 enum bo_vm_match {
@@ -1102,35 +1095,26 @@ static int reserve_bo_and_vm(struct kgd_mem *mem,
 
WARN_ON(!vm);
 
-   ctx->reserved = false;
ctx->n_vms = 1;
ctx->sync = &mem->sync;
-
-   INIT_LIST_HEAD(&ctx->list);
-   INIT_LIST_HEAD(&ctx->duplicates);
-
-   ctx->vm_pd = kcalloc(ctx->n_vms, sizeof(*ctx->vm_pd), GFP_KERNEL);
-   if (!ctx->vm_pd)
-   return -ENOMEM

[PATCH 4/6] drm/amdgpu: use drm_exec for GEM and CSA handling

2023-06-28 Thread Christian König
Start using the new component here as well.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 78 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 80 -
 2 files changed, 71 insertions(+), 87 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
index 23d054526e7c..720011019741 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c
@@ -22,6 +22,8 @@
  * * Author: monk@amd.com
  */
 
+#include 
+
 #include "amdgpu.h"
 
 uint64_t amdgpu_csa_vaddr(struct amdgpu_device *adev)
@@ -65,31 +67,25 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
  struct amdgpu_bo *bo, struct amdgpu_bo_va **bo_va,
  uint64_t csa_addr, uint32_t size)
 {
-   struct ww_acquire_ctx ticket;
-   struct list_head list;
-   struct amdgpu_bo_list_entry pd;
-   struct ttm_validate_buffer csa_tv;
+   struct drm_exec exec;
int r;
 
-   INIT_LIST_HEAD(&list);
-   INIT_LIST_HEAD(&csa_tv.head);
-   csa_tv.bo = &bo->tbo;
-   csa_tv.num_shared = 1;
-
-   list_add(&csa_tv.head, &list);
-   amdgpu_vm_get_pd_bo(vm, &list, &pd);
-
-   r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
-   if (r) {
-   DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
-   return r;
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_until_all_locked(&exec) {
+   r = amdgpu_vm_lock_pd(vm, &exec, 0);
+   if (likely(!r))
+   r = drm_exec_lock_obj(&exec, &bo->tbo.base);
+   drm_exec_retry_on_contention(&exec);
+   if (unlikely(r)) {
+   DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
+   goto error;
+   }
}
 
*bo_va = amdgpu_vm_bo_add(adev, vm, bo);
if (!*bo_va) {
-   ttm_eu_backoff_reservation(&ticket, &list);
-   DRM_ERROR("failed to create bo_va for static CSA\n");
-   return -ENOMEM;
+   r = -ENOMEM;
+   goto error;
}
 
r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,
@@ -99,48 +95,42 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, 
struct amdgpu_vm *vm,
if (r) {
DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);
amdgpu_vm_bo_del(adev, *bo_va);
-   ttm_eu_backoff_reservation(&ticket, &list);
-   return r;
+   goto error;
}
 
-   ttm_eu_backoff_reservation(&ticket, &list);
-   return 0;
+error:
+   drm_exec_fini(&exec);
+   return r;
 }
 
 int amdgpu_unmap_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm,
struct amdgpu_bo *bo, struct amdgpu_bo_va *bo_va,
uint64_t csa_addr)
 {
-   struct ww_acquire_ctx ticket;
-   struct list_head list;
-   struct amdgpu_bo_list_entry pd;
-   struct ttm_validate_buffer csa_tv;
+   struct drm_exec exec;
int r;
 
-   INIT_LIST_HEAD(&list);
-   INIT_LIST_HEAD(&csa_tv.head);
-   csa_tv.bo = &bo->tbo;
-   csa_tv.num_shared = 1;
-
-   list_add(&csa_tv.head, &list);
-   amdgpu_vm_get_pd_bo(vm, &list, &pd);
-
-   r = ttm_eu_reserve_buffers(&ticket, &list, true, NULL);
-   if (r) {
-   DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
-   return r;
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_until_all_locked(&exec) {
+   r = amdgpu_vm_lock_pd(vm, &exec, 0);
+   if (likely(!r))
+   r = drm_exec_lock_obj(&exec, &bo->tbo.base);
+   drm_exec_retry_on_contention(&exec);
+   if (unlikely(r)) {
+   DRM_ERROR("failed to reserve CSA,PD BOs: err=%d\n", r);
+   goto error;
+   }
}
 
r = amdgpu_vm_bo_unmap(adev, bo_va, csa_addr);
if (r) {
DRM_ERROR("failed to do bo_unmap on static CSA, err=%d\n", r);
-   ttm_eu_backoff_reservation(&ticket, &list);
-   return r;
+   goto error;
}
 
amdgpu_vm_bo_del(adev, bo_va);
 
-   ttm_eu_backoff_reservation(&ticket, &list);
-
-   return 0;
+error:
+   drm_exec_fini(&exec);
+   return r;
 }
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 74055cba3dc9..6811fc866494 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -33,6 +33,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -198,29 +199,24 @@ static void amdgpu_gem_object_close(struct drm_gem_object 
*obj,
struct amdgpu_fpriv *

[PATCH 2/6] drm: add drm_exec selftests v4

2023-06-28 Thread Christian König
Exercise at least all driver facing functions of this new component.

v2: add array test as well
v3: some kunit cleanups
v4: more tests and cleanups

Signed-off-by: Christian König 
---
 drivers/gpu/drm/Kconfig   |   1 +
 drivers/gpu/drm/tests/Makefile|   3 +-
 drivers/gpu/drm/tests/drm_exec_test.c | 159 ++
 3 files changed, 162 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/tests/drm_exec_test.c

diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index c2f3d234c89e..47e0bfe19757 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -80,6 +80,7 @@ config DRM_KUNIT_TEST
select DRM_BUDDY
select DRM_EXPORT_FOR_TESTS if m
select DRM_KUNIT_TEST_HELPERS
+   select DRM_EXEC
default KUNIT_ALL_TESTS
help
  This builds unit tests for DRM. This option is not useful for
diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile
index bca726a8f483..ba7baa622675 100644
--- a/drivers/gpu/drm/tests/Makefile
+++ b/drivers/gpu/drm/tests/Makefile
@@ -17,6 +17,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \
drm_modes_test.o \
drm_plane_helper_test.o \
drm_probe_helper_test.o \
-   drm_rect_test.o
+   drm_rect_test.o \
+   drm_exec_test.o
 
 CFLAGS_drm_mm_test.o := $(DISABLE_STRUCTLEAK_PLUGIN)
diff --git a/drivers/gpu/drm/tests/drm_exec_test.c 
b/drivers/gpu/drm/tests/drm_exec_test.c
new file mode 100644
index ..727ac267682e
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_exec_test.c
@@ -0,0 +1,159 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ */
+
+#define pr_fmt(fmt) "drm_exec: " fmt
+
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#include "../lib/drm_random.h"
+
+static struct drm_device dev;
+
+static void sanitycheck(struct kunit *test)
+{
+   struct drm_exec exec;
+
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_fini(&exec);
+   KUNIT_SUCCEED(test);
+}
+
+static void test_lock(struct kunit *test)
+{
+   struct drm_gem_object gobj = { };
+   struct drm_exec exec;
+   int ret;
+
+   drm_gem_private_object_init(&dev, &gobj, PAGE_SIZE);
+
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_until_all_locked(&exec) {
+   ret = drm_exec_lock_obj(&exec, &gobj);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+   }
+   drm_exec_fini(&exec);
+}
+
+static void test_lock_unlock(struct kunit *test)
+{
+   struct drm_gem_object gobj = { };
+   struct drm_exec exec;
+   int ret;
+
+   drm_gem_private_object_init(&dev, &gobj, PAGE_SIZE);
+
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_until_all_locked(&exec) {
+   ret = drm_exec_lock_obj(&exec, &gobj);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+
+   drm_exec_unlock_obj(&exec, &gobj);
+   ret = drm_exec_lock_obj(&exec, &gobj);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+   }
+   drm_exec_fini(&exec);
+}
+
+static void test_duplicates(struct kunit *test)
+{
+   struct drm_gem_object gobj = { };
+   struct drm_exec exec;
+   int ret;
+
+   drm_gem_private_object_init(&dev, &gobj, PAGE_SIZE);
+
+   drm_exec_init(&exec, DRM_EXEC_IGNORE_DUPLICATES);
+   drm_exec_until_all_locked(&exec) {
+   ret = drm_exec_lock_obj(&exec, &gobj);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+
+   ret = drm_exec_lock_obj(&exec, &gobj);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+   }
+   drm_exec_unlock_obj(&exec, &gobj);
+   drm_exec_fini(&exec);
+}
+
+
+
+static void test_prepare(struct kunit *test)
+{
+   struct drm_gem_object gobj = { };
+   struct drm_exec exec;
+   int ret;
+
+   drm_gem_private_object_init(&dev, &gobj, PAGE_SIZE);
+
+   drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+   drm_exec_until_all_locked(&exec) {
+   ret = drm_exec_prepare_obj(&exec, &gobj, 1);
+   drm_exec_retry_on_contention(&exec);
+   KUNIT_EXPECT_EQ(test, ret, 0);
+   if (ret)
+   break;
+   }
+   drm_exec_fini(&exec);
+}
+
+static void test_prepare_array(struct kunit *test)
+{
+   struct drm_gem_object gobj1 = { };
+   struct drm_gem_object gobj2 = { };
+ 

AMDGPU patches for the drm_exec context

2023-06-28 Thread Christian König
Hey Alex,

any objections to merge those patches through drm-misc-next? If not can you 
give me an rb for them?

Thanks,
Christian.




[PATCH 1/6] drm: execution context for GEM buffers v6

2023-06-28 Thread Christian König
This adds the infrastructure for an execution context for GEM buffers
which is similar to the existing TTMs execbuf util and intended to replace
it in the long term.

The basic functionality is that we abstracts the necessary loop to lock
many different GEM buffers with automated deadlock and duplicate handling.

v2: drop xarray and use dynamic resized array instead, the locking
overhead is unecessary and measurable.
v3: drop duplicate tracking, radeon is really the only one needing that.
v4: fixes issues pointed out by Danilo, some typos in comments and a
helper for lock arrays of GEM objects.
v5: some suggestions by Boris Brezillon, especially just use one retry
macro, drop loop in prepare_array, use flags instead of bool
v6: minor changes suggested by Thomas, Boris and Danilo

Signed-off-by: Christian König 
Reviewed-by: Boris Brezillon 
Reviewed-by: Danilo Krummrich 
Tested-by: Danilo Krummrich 
---
 Documentation/gpu/drm-mm.rst |  12 ++
 drivers/gpu/drm/Kconfig  |   6 +
 drivers/gpu/drm/Makefile |   2 +
 drivers/gpu/drm/drm_exec.c   | 333 +++
 include/drm/drm_exec.h   | 121 +
 5 files changed, 474 insertions(+)
 create mode 100644 drivers/gpu/drm/drm_exec.c
 create mode 100644 include/drm/drm_exec.h

diff --git a/Documentation/gpu/drm-mm.rst b/Documentation/gpu/drm-mm.rst
index a79fd3549ff8..a52e6f4117d6 100644
--- a/Documentation/gpu/drm-mm.rst
+++ b/Documentation/gpu/drm-mm.rst
@@ -493,6 +493,18 @@ DRM Sync Objects
 .. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
:export:
 
+DRM Execution context
+=
+
+.. kernel-doc:: drivers/gpu/drm/drm_exec.c
+   :doc: Overview
+
+.. kernel-doc:: include/drm/drm_exec.h
+   :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_exec.c
+   :export:
+
 GPU Scheduler
 =
 
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index afb3b2f5f425..c2f3d234c89e 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -194,6 +194,12 @@ config DRM_TTM
  GPU memory types. Will be enabled automatically if a device driver
  uses it.
 
+config DRM_EXEC
+   tristate
+   depends on DRM
+   help
+ Execution context for command submissions
+
 config DRM_BUDDY
tristate
depends on DRM
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 7a09a89b493b..414855e2a463 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -78,6 +78,8 @@ obj-$(CONFIG_DRM_PANEL_ORIENTATION_QUIRKS) += 
drm_panel_orientation_quirks.o
 #
 # Memory-management helpers
 #
+#
+obj-$(CONFIG_DRM_EXEC) += drm_exec.o
 
 obj-$(CONFIG_DRM_BUDDY) += drm_buddy.o
 
diff --git a/drivers/gpu/drm/drm_exec.c b/drivers/gpu/drm/drm_exec.c
new file mode 100644
index ..a240dd194b3b
--- /dev/null
+++ b/drivers/gpu/drm/drm_exec.c
@@ -0,0 +1,333 @@
+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
+
+#include 
+#include 
+#include 
+
+/**
+ * DOC: Overview
+ *
+ * This component mainly abstracts the retry loop necessary for locking
+ * multiple GEM objects while preparing hardware operations (e.g. command
+ * submissions, page table updates etc..).
+ *
+ * If a contention is detected while locking a GEM object the cleanup procedure
+ * unlocks all previously locked GEM objects and locks the contended one first
+ * before locking any further objects.
+ *
+ * After an object is locked fences slots can optionally be reserved on the
+ * dma_resv object inside the GEM object.
+ *
+ * A typical usage pattern should look like this::
+ *
+ * struct drm_gem_object *obj;
+ * struct drm_exec exec;
+ * unsigned long index;
+ * int ret;
+ *
+ * drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT);
+ * drm_exec_until_all_locked(&exec) {
+ * ret = drm_exec_prepare_obj(&exec, boA, 1);
+ * drm_exec_retry_on_contention(&exec);
+ * if (ret)
+ * goto error;
+ *
+ * ret = drm_exec_prepare_obj(&exec, boB, 1);
+ * drm_exec_retry_on_contention(&exec);
+ * if (ret)
+ * goto error;
+ * }
+ *
+ * drm_exec_for_each_locked_object(&exec, index, obj) {
+ * dma_resv_add_fence(obj->resv, fence, DMA_RESV_USAGE_READ);
+ * ...
+ * }
+ * drm_exec_fini(&exec);
+ *
+ * See struct dma_exec for more details.
+ */
+
+/* Dummy value used to initially enter the retry loop */
+#define DRM_EXEC_DUMMY (void*)~0
+
+/* Unlock all objects and drop references */
+static void drm_exec_unlock_all(struct drm_exec *exec)
+{
+   struct drm_gem_object *obj;
+   unsigned long index;
+
+   drm_exec_for_each_locked_object(exec, index, obj) {
+   dma_resv_unlock(obj->resv);
+   drm_gem_object_put(obj);
+   }
+
+   drm_gem_object_put(exec->prelocked);
+   exec->prelocked = NULL;
+}
+
+/**
+ * drm_exec_init - initialize a drm_exec object
+ * @exec: the drm_exec object