Re: [PATCH] drm/amdgpu: drop some kernel messages in VCN code
[AMD Official Use Only - AMD Internal Distribution Only]
The patch is Reviewed-by: Sonny Jiang
Thanks,
Sonny
From: Dong, Ruijing
Sent: Thursday, May 23, 2024 12:58 PM
To: Wu, David ; amd-gfx@lists.freedesktop.org
; Koenig, Christian
Cc: Deucher, Alexander ; Liu, Leo ;
Jiang, Sonny
Subject: RE: [PATCH] drm/amdgpu: drop some kernel messages in VCN code
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks for the response, and it looks good to me.
Ruijing
-Original Message-
From: Wu, David
Sent: Thursday, May 23, 2024 12:55 PM
To: Dong, Ruijing ; Wu, David ;
amd-gfx@lists.freedesktop.org; Koenig, Christian
Cc: Deucher, Alexander ; Liu, Leo ;
Jiang, Sonny
Subject: Re: [PATCH] drm/amdgpu: drop some kernel messages in VCN code
please see in line.
On 2024-05-23 12:02, Dong, Ruijing wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
> Please see my question inline below.
>
> Thanks,
> Ruijing
>
> -Original Message-
> From: Wu, David
> Sent: Thursday, May 23, 2024 11:05 AM
> To: amd-gfx@lists.freedesktop.org; Koenig, Christian
>
> Cc: Deucher, Alexander ; Liu, Leo
> ; Jiang, Sonny ; Dong, Ruijing
>
> Subject: [PATCH] drm/amdgpu: drop some kernel messages in VCN code
>
> We have messages when the VCN fails to initialize and there is no need to
> report on success.
> Also PSP loading FWs is the default for production.
>
> Signed-off-by: David (Ming Qiang) Wu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 1 -
> drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c | 3 ---
> drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c | 10 +-
> 3 files changed, 1 insertion(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index b89605b400c0..5e2b7c340724 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -1078,7 +1078,6 @@ void amdgpu_vcn_setup_ucode(struct amdgpu_device *adev)
> IP_VERSION(4, 0, 3))
> break;
> }
> - dev_info(adev->dev, "Will use PSP to load VCN firmware\n");
> }
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> index 64c856bfe0cb..68ef29bc70e2 100644
> --- a/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c
> @@ -145,8 +145,6 @@ static int jpeg_v5_0_0_hw_init(void *handle)
> if (r)
> return r;
>
> - DRM_DEV_INFO(adev->dev, "JPEG decode initialized successfully.\n");
> -
> return 0;
> }
>
> @@ -549,7 +547,6 @@ static const struct amdgpu_ring_funcs
> jpeg_v5_0_0_dec_ring_vm_funcs = { static void
> jpeg_v5_0_0_set_dec_ring_funcs(struct amdgpu_device *adev) {
> adev->jpeg.inst->ring_dec->funcs = _v5_0_0_dec_ring_vm_funcs;
> - DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
> }
>
> static const struct amdgpu_irq_src_funcs jpeg_v5_0_0_irq_funcs = {
> diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> index 36d4ca645c56..070b56610c7d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v5_0_0.c
> @@ -200,16 +200,10 @@ static int vcn_v5_0_0_hw_init(void *handle)
>
> r = amdgpu_ring_test_helper(ring);
> if (r)
> - goto done;
> + return r;
> }
> [Ruijing] Are we assuming the hw init process always be successful?
No - it could fail with errors and in this case the top level will report
error. Otherwise it will succeed(and no need to report successful message).
David
> return 0;
> -done:
> - if (!r)
> - DRM_INFO("VCN decode and encode initialized
> successfully(under %s).\n",
> - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG
> Mode":"SPG Mode");
> -
> - return r;
> }
>
> /**
> @@ -1122,8 +1116,6 @@ static void
> vcn_v5_0_0_set_unified_ring_funcs(struct amdgpu_device *adev)
>
> adev->vcn.inst[i].ring_enc[0].funcs =
> _v5_0_0_unified_ring_vm_funcs;
> adev->vcn.inst[i].ring_enc[0].me = i;
> -
> - DRM_INFO("VCN(%d) encode/decode are enabled in VM mode\n", i);
> }
> }
>
> --
> 2.34.1
>
Re: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5
[AMD Official Use Only - General] Ping. Sonny From: Jiang, Sonny Sent: Thursday, April 25, 2024 4:12 PM To: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5 By tests, I didn't find error on VCN1 to VCN4. Thanks, Sonny From: Jiang, Sonny Sent: Thursday, April 25, 2024 4:10 PM To: amd-gfx@lists.freedesktop.org Cc: Jiang, Sonny ; Jiang, Sonny Subject: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5 From: Sonny Jiang VCN5 session info package interface changed Signed-off-by: Sonny Jiang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index 677eb141554e..b89605b400c0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -885,7 +885,7 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand ib->ptr[ib->length_dw++] = handle; ib->ptr[ib->length_dw++] = upper_32_bits(addr); ib->ptr[ib->length_dw++] = addr; - ib->ptr[ib->length_dw++] = 0x000b; + ib->ptr[ib->length_dw++] = 0x; ib->ptr[ib->length_dw++] = 0x0014; ib->ptr[ib->length_dw++] = 0x0002; /* task info */ @@ -952,7 +952,7 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han ib->ptr[ib->length_dw++] = handle; ib->ptr[ib->length_dw++] = upper_32_bits(addr); ib->ptr[ib->length_dw++] = addr; - ib->ptr[ib->length_dw++] = 0x000b; + ib->ptr[ib->length_dw++] = 0x; ib->ptr[ib->length_dw++] = 0x0014; ib->ptr[ib->length_dw++] = 0x0002; -- 2.43.2
Re: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5
[AMD Official Use Only - General] By tests, I didn't find error on VCN1 to VCN4. Thanks, Sonny From: Jiang, Sonny Sent: Thursday, April 25, 2024 4:10 PM To: amd-gfx@lists.freedesktop.org Cc: Jiang, Sonny ; Jiang, Sonny Subject: [PATCH v3] drm/amdgpu: IB test encode test package change for VCN5 From: Sonny Jiang VCN5 session info package interface changed Signed-off-by: Sonny Jiang --- drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c index 677eb141554e..b89605b400c0 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c @@ -885,7 +885,7 @@ static int amdgpu_vcn_enc_get_create_msg(struct amdgpu_ring *ring, uint32_t hand ib->ptr[ib->length_dw++] = handle; ib->ptr[ib->length_dw++] = upper_32_bits(addr); ib->ptr[ib->length_dw++] = addr; - ib->ptr[ib->length_dw++] = 0x000b; + ib->ptr[ib->length_dw++] = 0x; ib->ptr[ib->length_dw++] = 0x0014; ib->ptr[ib->length_dw++] = 0x0002; /* task info */ @@ -952,7 +952,7 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct amdgpu_ring *ring, uint32_t han ib->ptr[ib->length_dw++] = handle; ib->ptr[ib->length_dw++] = upper_32_bits(addr); ib->ptr[ib->length_dw++] = addr; - ib->ptr[ib->length_dw++] = 0x000b; + ib->ptr[ib->length_dw++] = 0x; ib->ptr[ib->length_dw++] = 0x0014; ib->ptr[ib->length_dw++] = 0x0002; -- 2.43.2
Re: [PATCH 2/2] drm/amdgpu: IB test encode test package change for VCN5
[AMD Official Use Only - General]
These changes are for vcn_unified_ring_test_ib which only used on VCN4 and
VCN5. The only exception is ib_size_alignment of hw_ip_info.
The VCN5 adds address_patch_enabled in session_info. VCN4 doesn't have it, so
it should just ignore the extra 0.
typedef struct uve_session_info_s
{
unsigned intinterface_version;
///< The version of the firmware interface on which the host was built
unsigned intsw_context_address_hi;
///< High address of software context buffer
unsigned intsw_context_address_lo;
///< Low address of software context buffer
unsigned intaddress_patch_enabled;
///< address patching enabled in UMD
} uve_session_info_t;
By my tests, I didn't find error. I may need more tests on mi300 asic.
Thanks,
Sonny
From: Alex Deucher
Sent: Monday, April 15, 2024 5:32 PM
To: Jiang, Sonny
Cc: amd-gfx@lists.freedesktop.org ; Jiang, Sonny
Subject: Re: [PATCH 2/2] drm/amdgpu: IB test encode test package change for VCN5
On Mon, Apr 15, 2024 at 5:25 PM Sonny Jiang wrote:
>
> From: Sonny Jiang
>
> VCN5 session info package interface changed
>
> Signed-off-by: Sonny Jiang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> index 7d176046498f..e08aacacc43e 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c
> @@ -882,7 +882,7 @@ static int amdgpu_vcn_enc_get_create_msg(struct
> amdgpu_ring *ring, uint32_t hand
> ib->ptr[ib->length_dw++] = handle;
> ib->ptr[ib->length_dw++] = upper_32_bits(addr);
> ib->ptr[ib->length_dw++] = addr;
> - ib->ptr[ib->length_dw++] = 0x000b;
> + ib->ptr[ib->length_dw++] = 0x;
>
> ib->ptr[ib->length_dw++] = 0x0014;
> ib->ptr[ib->length_dw++] = 0x0002; /* task info */
> @@ -949,7 +949,7 @@ static int amdgpu_vcn_enc_get_destroy_msg(struct
> amdgpu_ring *ring, uint32_t han
> ib->ptr[ib->length_dw++] = handle;
> ib->ptr[ib->length_dw++] = upper_32_bits(addr);
> ib->ptr[ib->length_dw++] = addr;
> - ib->ptr[ib->length_dw++] = 0x000b;
> + ib->ptr[ib->length_dw++] = 0x;
These patches are touching common files, are these changes safe on pre-VCN5 IPs?
Alex
>
> ib->ptr[ib->length_dw++] = 0x0014;
> ib->ptr[ib->length_dw++] = 0x0002;
> --
> 2.43.2
>
Re: [PATCH 2/2] drm/amdgpu: load balance VCN3 decode as well v8
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Sonny Jiang
From: Christian König
Sent: Friday, March 5, 2021 7:51 AM
To: dri-de...@lists.freedesktop.org ;
amd-gfx@lists.freedesktop.org
Cc: Liu, Leo ; Jiang, Sonny
Subject: [PATCH 2/2] drm/amdgpu: load balance VCN3 decode as well v8
Add VCN3 IB parsing to figure out to which instance we can send the
stream for decode.
v2: remove VCN instance limit as well, fix amdgpu_cs_find_mapping,
check supported formats instead of unsupported.
v3: fix typo and error handling
v4: make sure the message BO is CPU accessible
v5: fix addr calculation once more
v6: only check message buffers
v7: fix constant and use defines
v8: fix create msg calculation
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 132 +-
1 file changed, 130 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index b33f513fd2ac..77932003b4c1 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -50,6 +50,9 @@
#define VCN_INSTANCES_SIENNA_CICHLID2
#define DEC_SW_RING_ENABLED FALSE
+#define RDECODE_MSG_CREATE 0x
+#define RDECODE_MESSAGE_CREATE 0x0001
+
static int amdgpu_ih_clientid_vcns[] = {
SOC15_IH_CLIENTID_VCN,
SOC15_IH_CLIENTID_VCN1
@@ -208,8 +211,6 @@ static int vcn_v3_0_sw_init(void *handle)
} else {
ring->doorbell_index =
(adev->doorbell_index.vcn.vcn_ring0_1 << 1) + 8 * i;
}
- if (adev->asic_type == CHIP_SIENNA_CICHLID && i != 0)
- ring->no_scheduler = true;
sprintf(ring->name, "vcn_dec_%d", i);
r = amdgpu_ring_init(adev, ring, 512, >vcn.inst[i].irq,
0,
AMDGPU_RING_PRIO_DEFAULT,
@@ -1825,6 +1826,132 @@ static const struct amdgpu_ring_funcs
vcn_v3_0_dec_sw_ring_vm_funcs = {
.emit_reg_write_reg_wait = amdgpu_ring_emit_reg_write_reg_wait_helper,
};
+static int vcn_v3_0_limit_sched(struct amdgpu_cs_parser *p)
+{
+ struct drm_gpu_scheduler **scheds;
+
+ /* The create msg must be in the first IB submitted */
+ if (atomic_read(>entity->fence_seq))
+ return -EINVAL;
+
+ scheds = p->adev->gpu_sched[AMDGPU_HW_IP_VCN_DEC]
+ [AMDGPU_RING_PRIO_DEFAULT].sched;
+ drm_sched_entity_modify_sched(p->entity, scheds, 1);
+ return 0;
+}
+
+static int vcn_v3_0_dec_msg(struct amdgpu_cs_parser *p, uint64_t addr)
+{
+ struct ttm_operation_ctx ctx = { false, false };
+ struct amdgpu_bo_va_mapping *map;
+ uint32_t *msg, num_buffers;
+ struct amdgpu_bo *bo;
+ uint64_t start, end;
+ unsigned int i;
+ void * ptr;
+ int r;
+
+ addr &= AMDGPU_GMC_HOLE_MASK;
+ r = amdgpu_cs_find_mapping(p, addr, , );
+ if (r) {
+ DRM_ERROR("Can't find BO for addr 0x%08Lx\n", addr);
+ return r;
+ }
+
+ start = map->start * AMDGPU_GPU_PAGE_SIZE;
+ end = (map->last + 1) * AMDGPU_GPU_PAGE_SIZE;
+ if (addr & 0x7) {
+ DRM_ERROR("VCN messages must be 8 byte aligned!\n");
+ return -EINVAL;
+ }
+
+ bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
+ amdgpu_bo_placement_from_domain(bo, bo->allowed_domains);
+ r = ttm_bo_validate(>tbo, >placement, );
+ if (r) {
+ DRM_ERROR("Failed validating the VCN message BO (%d)!\n", r);
+ return r;
+ }
+
+ r = amdgpu_bo_kmap(bo, );
+ if (r) {
+ DRM_ERROR("Failed mapping the VCN message (%d)!\n", r);
+ return r;
+ }
+
+ msg = ptr + addr - start;
+
+ /* Check length */
+ if (msg[1] > end - addr) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ if (msg[3] != RDECODE_MSG_CREATE)
+ goto out;
+
+ num_buffers = msg[2];
+ for (i = 0, msg = [6]; i < num_buffers; ++i, msg += 4) {
+ uint32_t offset, size, *create;
+
+ if (msg[0] != RDECODE_MESSAGE_CREATE)
+ continue;
+
+ offset = msg[1];
+ size = msg[2];
+
+ if (offset + size > end) {
+ r = -EINVAL;
+ goto out;
+ }
+
+ create = ptr + addr + offset - start;
+
+ /* H246, HEVC and VP9 can run on any instance */
+ if (create[0] == 0x7 || create[0] == 0x10 || create[0] == 0x11)
+
Re: [PATCH 1/2] drm/sched: select new rq even if there is only one v3
[AMD Official Use Only - Internal Distribution Only] Reviewed-by: Sonny Jiang From: Christian König Sent: Friday, March 5, 2021 7:51 AM To: dri-de...@lists.freedesktop.org ; amd-gfx@lists.freedesktop.org Cc: Liu, Leo ; Jiang, Sonny Subject: [PATCH 1/2] drm/sched: select new rq even if there is only one v3 This is necessary when changing priorities of an entity. v2: test the sched_list instead of num_sched. v3: set the sched_list to NULL when there is only one entry Signed-off-by: Christian König --- drivers/gpu/drm/scheduler/sched_entity.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/scheduler/sched_entity.c b/drivers/gpu/drm/scheduler/sched_entity.c index 92d965b629c6..f0790e9471d1 100644 --- a/drivers/gpu/drm/scheduler/sched_entity.c +++ b/drivers/gpu/drm/scheduler/sched_entity.c @@ -453,7 +453,7 @@ void drm_sched_entity_select_rq(struct drm_sched_entity *entity) struct drm_gpu_scheduler *sched; struct drm_sched_rq *rq; - if (spsc_queue_count(>job_queue) || entity->num_sched_list <= 1) + if (spsc_queue_count(>job_queue) || !entity->sched_list) return; fence = READ_ONCE(entity->last_scheduled); @@ -467,8 +467,10 @@ void drm_sched_entity_select_rq(struct drm_sched_entity *entity) drm_sched_rq_remove_entity(entity->rq, entity); entity->rq = rq; } - spin_unlock(>rq_lock); + + if (entity->num_sched_list == 1) + entity->sched_list = NULL; } /** -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH] drm/amdgpu/vcn3.0: add wptr/rptr reset/update for share memory
[AMD Official Use Only - Internal Distribution Only]
Ping.
From: Jiang, Sonny
Sent: Wednesday, February 10, 2021 8:31 PM
To: amd-gfx@lists.freedesktop.org
Cc: Jiang, Sonny
Subject: [PATCH] drm/amdgpu/vcn3.0: add wptr/rptr reset/update for share memory
Because of dpg, the rptr/wptr need to be saved on fw shared memory,
and restore them back in RBC_RB_RPTR/WPTR in kernel at power up.
Signed-off-by: Sonny Jiang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 12 +++-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 24 +++-
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index 13aa417f6be7..a19c0c35e2d8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -155,6 +155,7 @@
}
\
} while (0)
+#define AMDGPU_VCN_FW_SHARED_FLAG_0_RB (1 << 6)
#define AMDGPU_VCN_MULTI_QUEUE_FLAG (1 << 8)
#define AMDGPU_VCN_SW_RING_FLAG (1 << 9)
@@ -243,6 +244,12 @@ struct amdgpu_vcn {
int inst_idx, struct dpg_pause_state *new_state);
};
+struct amdgpu_fw_shared_rb_ptrs_struct {
+ /* to WA DPG R/W ptr issues.*/
+ uint32_t rptr;
+ uint32_t wptr;
+};
+
struct amdgpu_fw_shared_multi_queue {
uint8_t decode_queue_mode;
uint8_t encode_generalpurpose_queue_mode;
@@ -258,9 +265,12 @@ struct amdgpu_fw_shared_sw_ring {
struct amdgpu_fw_shared {
uint32_t present_flag_0;
- uint8_t pad[53];
+ uint8_t pad[44];
+ struct amdgpu_fw_shared_rb_ptrs_struct rb;
+ uint8_t power;
struct amdgpu_fw_shared_multi_queue multi_queue;
struct amdgpu_fw_shared_sw_ring sw_ring;
+ uint8_t padding[13];
} __attribute__((__packed__));
struct amdgpu_vcn_decode_buffer {
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
index def583916294..b61d1ba1aa9d 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
@@ -238,7 +238,8 @@ static int vcn_v3_0_sw_init(void *handle)
fw_shared = adev->vcn.inst[i].fw_shared_cpu_addr;
fw_shared->present_flag_0 |=
cpu_to_le32(AMDGPU_VCN_SW_RING_FLAG) |
-
cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG);
+
cpu_to_le32(AMDGPU_VCN_MULTI_QUEUE_FLAG) |
+
cpu_to_le32(AMDGPU_VCN_FW_SHARED_FLAG_0_RB);
fw_shared->sw_ring.is_enabled =
cpu_to_le32(DEC_SW_RING_ENABLED);
}
@@ -1074,7 +1075,13 @@ static int vcn_v3_0_start_dpg_mode(struct amdgpu_device
*adev, int inst_idx, boo
WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR,
lower_32_bits(ring->wptr));
+ /* Reset FW shared memory RBC WPTR/RPTR */
+ fw_shared->rb.rptr = 0;
+ fw_shared->rb.wptr = lower_32_bits(ring->wptr);
+
+ /*resetting done, fw can check RB ring */
fw_shared->multi_queue.decode_queue_mode &=
cpu_to_le32(~FW_QUEUE_RING_RESET);
+
/* Unstall DPG */
WREG32_P(SOC15_REG_OFFSET(VCN, inst_idx, mmUVD_POWER_STATUS),
0, ~UVD_POWER_STATUS__STALL_DPG_POWER_UP_MASK);
@@ -1239,9 +1246,11 @@ static int vcn_v3_0_start(struct amdgpu_device *adev)
/* Initialize the ring buffer's read and write pointers */
WREG32_SOC15(VCN, i, mmUVD_RBC_RB_RPTR, 0);
+ WREG32_SOC15(VCN, i, mmUVD_SCRATCH2, 0);
ring->wptr = RREG32_SOC15(VCN, i, mmUVD_RBC_RB_RPTR);
WREG32_SOC15(VCN, i, mmUVD_RBC_RB_WPTR,
lower_32_bits(ring->wptr));
+ fw_shared->rb.wptr = lower_32_bits(ring->wptr);
fw_shared->multi_queue.decode_queue_mode &=
cpu_to_le32(~FW_QUEUE_RING_RESET);
fw_shared->multi_queue.encode_generalpurpose_queue_mode |=
cpu_to_le32(FW_QUEUE_RING_RESET);
@@ -1662,6 +1671,10 @@ static int vcn_v3_0_pause_dpg_mode(struct amdgpu_device
*adev,
WREG32_SOC15(VCN, inst_idx, mmUVD_RB_WPTR2,
lower_32_bits(ring->wptr));
fw_shared->multi_queue.encode_lowlatency_queue_mode &=
cpu_to_le32(~FW_QUEUE_RING_RESET);
+ /* restore wptr/rptr with pointers saved in FW
shared memory*/
+ WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_RPTR,
fw_shared->rb.rptr);
+ WREG32_SOC15(VCN, inst_idx, mmUVD_RBC_RB_WPTR,
fw_shared->rb.wptr);
+
/* Unstall DPG */
WREG32_P(SOC15_REG_OF
Re: [PATCH v2] drm/amdgpu: fix SI UVD firmware validate resume fail
[AMD Official Use Only - Internal Distribution Only]
Ping.
From: Jiang, Sonny
Sent: Monday, November 9, 2020 2:41 PM
To: amd-gfx@lists.freedesktop.org
Cc: Jiang, Sonny
Subject: [PATCH v2] drm/amdgpu: fix SI UVD firmware validate resume fail
The SI UVD firmware validate key is stored at the end of firmware,
which is changed during resume while playing video. So get the key
at sw_init and store it for fw validate using.
Signed-off-by: Sonny Jiang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 1 +
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c | 20 +++-
2 files changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index 5eb63288d157..edbb8194ee81 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
@@ -67,6 +67,7 @@ struct amdgpu_uvd {
unsignedharvest_config;
/* store image width to adjust nb memory state */
unsigneddecode_image_width;
+ uint32_tkeyselect;
};
int amdgpu_uvd_sw_init(struct amdgpu_device *adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
index 7cf4b11a65c5..3a5dce634cda 100644
--- a/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
+++ b/drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
@@ -277,15 +277,8 @@ static void uvd_v3_1_mc_resume(struct amdgpu_device *adev)
*/
static int uvd_v3_1_fw_validate(struct amdgpu_device *adev)
{
- void *ptr;
- uint32_t ucode_len, i;
- uint32_t keysel;
-
- ptr = adev->uvd.inst[0].cpu_addr;
- ptr += 192 + 16;
- memcpy(_len, ptr, 4);
- ptr += ucode_len;
- memcpy(, ptr, 4);
+ int i;
+ uint32_t keysel = adev->uvd.keyselect;
WREG32(mmUVD_FW_START, keysel);
@@ -550,6 +543,8 @@ static int uvd_v3_1_sw_init(void *handle)
struct amdgpu_ring *ring;
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
+ void *ptr;
+ uint32_t ucode_len;
/* UVD TRAP */
r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 124,
>uvd.inst->irq);
@@ -560,6 +555,13 @@ static int uvd_v3_1_sw_init(void *handle)
if (r)
return r;
+ /* Retrieval firmware validate key */
+ ptr = adev->uvd.inst[0].cpu_addr;
+ ptr += 192 + 16;
+ memcpy(_len, ptr, 4);
+ ptr += ucode_len;
+ memcpy(>uvd.keyselect, ptr, 4);
+
ring = >uvd.inst->ring;
sprintf(ring->name, "uvd");
r = amdgpu_ring_init(adev, ring, 512, >uvd.inst->irq, 0,
--
2.25.1
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Re: amd-gfx Digest, Vol 40, Issue 37
Ping...
Review 2. [PATCH] drm: add drm device name (Jiang, Sonny), please.
Thanks,
Sonny
From: amd-gfx on behalf of
amd-gfx-requ...@lists.freedesktop.org
Sent: Tuesday, September 3, 2019 9:17 PM
To: amd-gfx@lists.freedesktop.org
Subject: amd-gfx Digest, Vol 40, Issue 37
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than "Re: Contents of amd-gfx digest..."
Today's Topics:
1. Re: [PATCH v2 06/27] drm/dp_mst: Combine redundant cases in
drm_dp_encode_sideband_req() (Dave Airlie)
2. [PATCH] drm: add drm device name (Jiang, Sonny)
3. Re: [PATCH v2 11/27] drm/dp_mst: Constify guid in
drm_dp_get_mst_branch_by_guid() (Dave Airlie)
4. Re: [PATCH v2 15/27] drm/dp_mst: Cleanup
drm_dp_send_link_address() a bit (Dave Airlie)
5. RE: [PATCH] drm/amd/powerplay: replace smu->table_count with
SMU_TABLE_COUNT in smu (Quan, Evan)
--
Message: 1
Date: Wed, 4 Sep 2019 07:35:59 +1000
From: Dave Airlie
To: Lyude Paul
Cc: dri-devel , nouveau
, amd-gfx mailing list
, Sean Paul , David
Airlie , Daniel Vetter ,
Imre Deak , Maarten Lankhorst
, LKML
, Maxime Ripard ,
Juston Li , Daniel Vetter ,
Harry Wentland , Ville Syrjälä
Subject: Re: [PATCH v2 06/27] drm/dp_mst: Combine redundant cases in
drm_dp_encode_sideband_req()
Message-ID:
Content-Type: text/plain; charset="UTF-8"
On Wed, 4 Sep 2019 at 06:48, Lyude Paul wrote:
>
> Noticed this while working on adding a drm_dp_decode_sideband_req().
> DP_POWER_DOWN_PHY/DP_POWER_UP_PHY both use the same struct, so we can
> just combine their cases.
both use the same struct as enum path resources?
Since otherwise the patch doesn't make sense.
With that fixed:
Reviewed-by: Dave Airlie
--
Message: 2
Date: Tue, 3 Sep 2019 21:41:10 +
From: "Jiang, Sonny"
To: "amd-gfx@lists.freedesktop.org"
Cc: "Jiang, Sonny"
Subject: [PATCH] drm: add drm device name
Message-ID: <20190903214040.2386-1-sonny.ji...@amd.com>
Content-Type: text/plain; charset="iso-8859-1"
Add DRM device name and use DRM_IOCTL_VERSION ioctl drmVersion::desc passing it
to user space
instead of unused DRM driver name descriptor.
Change-Id: I809f6d3e057111417efbe8fa7cab8f0113ba4b21
Signed-off-by: Sonny Jiang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
drivers/gpu/drm/drm_drv.c | 17 +
drivers/gpu/drm/drm_ioctl.c| 2 +-
include/drm/drm_device.h | 3 +++
include/drm/drm_drv.h | 1 +
5 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 67b09cb2a9e2..8f0971cea363 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2809,6 +2809,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* init the mode config */
drm_mode_config_init(adev->ddev);
+ drm_dev_set_name(adev->ddev, amdgpu_asic_name[adev->asic_type]);
+
r = amdgpu_device_ip_init(adev);
if (r) {
/* failed in exclusive mode due to timeout */
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 862621494a93..6c33879bb538 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -802,6 +802,7 @@ void drm_dev_fini(struct drm_device *dev)
mutex_destroy(>struct_mutex);
drm_legacy_destroy_members(dev);
kfree(dev->unique);
+ kfree(dev->name);
}
EXPORT_SYMBOL(drm_dev_fini);
@@ -1078,6 +1079,22 @@ int drm_dev_set_unique(struct drm_device *dev, const
char *name)
}
EXPORT_SYMBOL(drm_dev_set_unique);
+/**
+ * drm_dev_set_name - Set the name of a DRM device
+ * @dev: device of which to set the name
+ * @name: name to be set
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int drm_dev_set_name(struct drm_device *dev, const char *name)
+{
+ kfree(dev->name);
+ dev->name = kstrdup(name, GFP_KERNEL);
+
+ return dev->name ? 0 : -ENOMEM;
+}
+EXPORT_SYMBOL(drm_dev_set_name);
+
/*
* DRM Core
* The DRM core module initializes all global DRM objects and makes them
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 2263e3ddd822..61f
[PATCH] drm: add drm device name
Add DRM device name and use DRM_IOCTL_VERSION ioctl drmVersion::desc passing it
to user space
instead of unused DRM driver name descriptor.
Change-Id: I809f6d3e057111417efbe8fa7cab8f0113ba4b21
Signed-off-by: Sonny Jiang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
drivers/gpu/drm/drm_drv.c | 17 +
drivers/gpu/drm/drm_ioctl.c| 2 +-
include/drm/drm_device.h | 3 +++
include/drm/drm_drv.h | 1 +
5 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 67b09cb2a9e2..8f0971cea363 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2809,6 +2809,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* init the mode config */
drm_mode_config_init(adev->ddev);
+ drm_dev_set_name(adev->ddev, amdgpu_asic_name[adev->asic_type]);
+
r = amdgpu_device_ip_init(adev);
if (r) {
/* failed in exclusive mode due to timeout */
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 862621494a93..6c33879bb538 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -802,6 +802,7 @@ void drm_dev_fini(struct drm_device *dev)
mutex_destroy(>struct_mutex);
drm_legacy_destroy_members(dev);
kfree(dev->unique);
+ kfree(dev->name);
}
EXPORT_SYMBOL(drm_dev_fini);
@@ -1078,6 +1079,22 @@ int drm_dev_set_unique(struct drm_device *dev, const
char *name)
}
EXPORT_SYMBOL(drm_dev_set_unique);
+/**
+ * drm_dev_set_name - Set the name of a DRM device
+ * @dev: device of which to set the name
+ * @name: name to be set
+ *
+ * Return: 0 on success or a negative error code on failure.
+ */
+int drm_dev_set_name(struct drm_device *dev, const char *name)
+{
+ kfree(dev->name);
+ dev->name = kstrdup(name, GFP_KERNEL);
+
+ return dev->name ? 0 : -ENOMEM;
+}
+EXPORT_SYMBOL(drm_dev_set_name);
+
/*
* DRM Core
* The DRM core module initializes all global DRM objects and makes them
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index 2263e3ddd822..61f02965106b 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -506,7 +506,7 @@ int drm_version(struct drm_device *dev, void *data,
dev->driver->date);
if (!err)
err = drm_copy_field(version->desc, >desc_len,
- dev->driver->desc);
+ dev->name);
return err;
}
diff --git a/include/drm/drm_device.h b/include/drm/drm_device.h
index 7f9ef709b2b6..e29912c484e4 100644
--- a/include/drm/drm_device.h
+++ b/include/drm/drm_device.h
@@ -123,6 +123,9 @@ struct drm_device {
/** @unique: Unique name of the device */
char *unique;
+ /** @name: device name */
+ char *name;
+
/**
* @struct_mutex:
*
diff --git a/include/drm/drm_drv.h b/include/drm/drm_drv.h
index 68ca736c548d..f742e2bde467 100644
--- a/include/drm/drm_drv.h
+++ b/include/drm/drm_drv.h
@@ -798,6 +798,7 @@ static inline bool drm_drv_uses_atomic_modeset(struct
drm_device *dev)
int drm_dev_set_unique(struct drm_device *dev, const char *name);
+int drm_dev_set_name(struct drm_device *dev, const char *name);
#endif
--
2.17.1
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Re: [PATCH v3] drm/amdgpu: update documentation for amdgpu_drv.c
Change it to, Value 0 is invalidated, will be adjusted to 1. Negative values mean 'infinite timeout' (MAX_JIFFY_OFFSET). Thanks, Sonny From: Christian König Sent: Thursday, July 5, 2018 3:30:28 AM To: Jiang, Sonny; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH v3] drm/amdgpu: update documentation for amdgpu_drv.c Am 04.07.2018 um 20:20 schrieb Sonny Jiang: > [SNIP] > > +/** > + * DOC: lockup_timeout (int) > + * Set GPU scheduler timeout value in ms. It must be > 0. The default is > 1. > + */ > MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default > 1)"); > module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444); Actually the description here is incorrect, a value of 0 is handled as infinite timeout IIRC. Please fix while at it. Apart from that the patch is Acked-by: Christian König . Christian. ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
Hi Alex,
IP blocks indexes are not fixed. What's your idea to list them? By asic family?
enum amd_ip_block_type {
AMD_IP_BLOCK_TYPE_COMMON,
AMD_IP_BLOCK_TYPE_GMC,
AMD_IP_BLOCK_TYPE_IH,
AMD_IP_BLOCK_TYPE_SMC,
AMD_IP_BLOCK_TYPE_PSP,
AMD_IP_BLOCK_TYPE_DCE,
AMD_IP_BLOCK_TYPE_GFX,
AMD_IP_BLOCK_TYPE_SDMA,
AMD_IP_BLOCK_TYPE_UVD,
AMD_IP_BLOCK_TYPE_VCE,
AMD_IP_BLOCK_TYPE_ACP,
AMD_IP_BLOCK_TYPE_VCN
};
Thanks,
Sonny
From: Deucher, Alexander
Sent: Wednesday, July 4, 2018 2:49:17 AM
To: Qu, Jim; Zhang, Jerry; Jiang, Sonny; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
yeah, that's a good idea.
Alex
From: amd-gfx on behalf of Qu, Jim
Sent: Wednesday, July 4, 2018 1:14 AM
To: Zhang, Jerry; Jiang, Sonny; amd-gfx@lists.freedesktop.org
Subject: 答复: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
I always confuse any bits definiation about some feature mask. such as
ip_block_mask, pg_mask, cg_mask, pp_feature_mask. I think other people who is
not familiar with amdgpu driver may have the same problem.
So, is it possible to detail every bit mask of features?
Thanks
JimQu
发件人: amd-gfx 代表 Zhang, Jerry (Junwei)
发送时间: 2018年7月4日 12:57:01
收件人: Jiang, Sonny; amd-gfx@lists.freedesktop.org
主题: Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c
On 07/04/2018 04:06 AM, Sonny Jiang wrote:
> Signed-off-by: Sonny Jiang
Acked-by: Junwei Zhang
> ---
> Documentation/gpu/amdgpu.rst| 7 +
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 222
> +++-
> 2 files changed, 222 insertions(+), 7 deletions(-)
>
> diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst
> index 765c2a3..a740e49 100644
> --- a/Documentation/gpu/amdgpu.rst
> +++ b/Documentation/gpu/amdgpu.rst
> @@ -5,6 +5,13 @@
> The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics
> Core
> Next (GCN) architecture.
>
> +Module Parameters
> +=
> +
> +The amdgpu driver supports the following module parameters:
> +
> +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +
> Core Driver Infrastructure
> ==
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> index 963578c..caf81ce 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
> @@ -1,10 +1,3 @@
> -/**
> - * \file amdgpu_drv.c
> - * AMD Amdgpu driver
> - *
> - * \author Gareth Hughes
> - */
> -
> /*
>* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
>* All Rights Reserved.
> @@ -136,102 +129,235 @@ int amdgpu_gpu_recovery = -1; /* auto */
> int amdgpu_emu_mode = 0;
> uint amdgpu_smu_memory_pool_size = 0;
>
> +/**
> + * DOC: vramlimit (int)
> + * Restrict the total amount of VRAM in MiB for testing. The default is 0
> (Use full VRAM).
> + */
> MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
> module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
>
> +/**
> + * DOC: vis_vramlimit (int)
> + * Restrict the amount of CPU visible VRAM in MiB for testing. The default
> is 0 (Use full CPU visible VRAM).
> + */
> MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in
> megabytes");
> module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);
>
> +/**
> + * DOC: gartsize (uint)
> + * Restrict the size of GART in Mib (32, 64, etc.) for testing. The default
> is -1 (The size depends on asic).
> + */
> MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64,
> etc., -1=auto)");
> module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
>
> +/**
> + * DOC: gttsize (int)
> + * Restrict the size of GTT domain in MiB for testing. The default is -1
> (It's VRAM size if 3GB < VRAM < 3/4 RAM,
> + * otherwise 3/4 RAM size).
> + */
> MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 =
> auto)");
> module_param_named(gttsize, amdgpu_gtt_size, int, 0600);
>
> +/**
> + * DOC: moverate (int)
> + * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).
> + */
> MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64,
> etc., -1=auto, 0=1=disabled)");
> module_param_named(moverate, amdgpu_moverate, int, 0600);
>
> +/**
> + * DOC: benchmark (int)
> + * Run benchmarks. The default is 0 (Skip benchmarks).
&g
Re: [PATCH] drm/amdgpu: update documentation for amdgpu_drv.c
Hi Alex, What's your opinion about Michel's suggestion? Thanks, Sonny From: Michel Dänzer Sent: Thursday, June 28, 2018 4:39:57 AM To: Jiang, Sonny Cc: amd-gfx@lists.freedesktop.org Subject: Re: [PATCH] drm/amdgpu: update documentation for amdgpu_drv.c Hi Sonny, would it be possible to put the documentation of each parameter directly next to its definition / declaration? Otherwise, I'm afraid the documentation will quickly fall out of date WRT the code. > +/** > + * DOC: module_parameters Otherwise, this needs to be referenced in Documentation/gpu/amdgpu.rst, or the contents of this comment don't show up in the generated documentation. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Mesa and X developer ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
