from:"Sandeep"

Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

2020-10-28 Thread Sandeep

On Wed, 28 Oct 2020 at 14:03, Quan, Evan  wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> If it turns out "PCI CONFIG reset" is used, please try the new patch series I 
> just sent.
> https://lists.freedesktop.org/archives/amd-gfx/2020-October/055327.html
> https://lists.freedesktop.org/archives/amd-gfx/2020-October/055328.html
> https://lists.freedesktop.org/archives/amd-gfx/2020-October/055329.html
> https://lists.freedesktop.org/archives/amd-gfx/2020-October/055330.html
> https://lists.freedesktop.org/archives/amd-gfx/2020-October/055331.html
>
> BR
> Evan

I tested out this patchset, and can confirm that both suspend and
hibernate work as expected.

- Sandeep
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Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

2020-10-28 Thread Sandeep

On Wed, 28 Oct 2020 at 07:01, Quan, Evan  wrote:
>
> [AMD Official Use Only - Internal Distribution Only]
>
> Hi Sandeep,
>
> Did you run the tests on Hawaii?
> And can you help to confirm which method is used for gpu reset? "BACO reset" 
> or " PCI CONFIG reset" (you can grep these keywords in dmesg)?
>
> BR
> Evan

Yes, I ran the tests on Hawaii. The reset method isn't printed out in
dmesg. Is it only printed out during hibernate? When I run the kernel
with the above patch, the computer hangs when I attempt to hibernate,
and kernel logs don't get written to disk, so I'm unable to  figure
out which method it's using with your patches.

However, I did look at the reset method for earlier kernels, and I
believe it's using the PCI config reset method. I will try your other
patchset to see if it fixes the issue.

- Sandeep
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Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

2020-10-27 Thread Sandeep

On Tue, 27 Oct 2020 at 17:04, Sandeep  wrote:
>
>
>
> On Tue, 27 Oct, 2020, 17:01 Sandeep,  wrote:
>>
>>
>> On Tue, 27 Oct, 2020, 08:10 Evan Quan,  wrote:
>>>
>>> Which can be used for S4(hibernation) support.
>>>
>>> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34
>>> Signed-off-by: Evan Quan 
>>> ---
>>>  drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++-
>>>  drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ---
>>>  2 files changed, 7 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c 
>>> b/drivers/gpu/drm/amd/amdgpu/cik.c
>>> index 03ff8bd1fee8..5442df094102 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/cik.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
>>> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev)
>>>
>>> switch (adev->asic_type) {
>>> case CHIP_BONAIRE:
>>> -   case CHIP_HAWAII:
>>> /* disable baco reset until it works */
>>> /* smu7_asic_get_baco_capability(adev, &baco_reset); */
>>> baco_reset = false;
>>> break;
>>> +   case CHIP_HAWAII:
>>> +   baco_reset = cik_asic_supports_baco(adev);
>>> +   break;
>>> default:
>>> baco_reset = false;
>>> break;
>>> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c 
>>> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>>> index 3be40114e63d..45f608838f6e 100644
>>> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>>> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>>> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_BCLK_OFF_MASK,  
>>>  BACO_CNTL__BACO_BCLK_OFF__SHIFT, 0, 0x00 },
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_POWER_OFF_MASK, 
>>>  BACO_CNTL__BACO_POWER_OFF__SHIFT, 0, 0x00 },
>>> { CMD_DELAY_MS, 0, 0, 0, 20, 0 },
>>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 
>>> 0x, 0x20 },
>>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0, 
>>> 0x, 0x200 },
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK, 
>>> BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 },
>>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c },
>>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00 },
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, 
>>> BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0, 
>>> 0x01 },
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK, 
>>> BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 },
>>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 
>>> 5, 0x10 },
>>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK, 0, 
>>> 5, 0x100 },
>>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK, 
>>> BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 },
>>>     { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0, 
>>> 0x, 0x00 }
>>>  };
>>> @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
>>>  static const struct baco_cmd_entry clean_baco_tbl[] =
>>>  {
>>> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
>>> +   { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
>>> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 }
>>>  };
>>>
>>> --
>>> 2.29.0
>>
>>
>>
>> Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch 
>> seem related to any patches I've contributed.
>>
>> - Sandeep
>
>
> Ok, I just saw the other email. I'll try testing the patch and see if it 
> fixes the hibernation bug.
>
> - Sandeep

I tested and while suspend works correctly, hibernation is completely
broken. The system fails to resume from hibernation which is much
worse than before.

- Sandeep
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Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

2020-10-27 Thread Sandeep

On Tue, 27 Oct, 2020, 17:01 Sandeep,  wrote:

>
> On Tue, 27 Oct, 2020, 08:10 Evan Quan,  wrote:
>
>> Which can be used for S4(hibernation) support.
>>
>> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34
>> Signed-off-by: Evan Quan 
>> ---
>>  drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++-
>>  drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ---
>>  2 files changed, 7 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c
>> b/drivers/gpu/drm/amd/amdgpu/cik.c
>> index 03ff8bd1fee8..5442df094102 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/cik.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
>> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev)
>>
>> switch (adev->asic_type) {
>> case CHIP_BONAIRE:
>> -   case CHIP_HAWAII:
>> /* disable baco reset until it works */
>> /* smu7_asic_get_baco_capability(adev, &baco_reset); */
>> baco_reset = false;
>> break;
>> +   case CHIP_HAWAII:
>> +   baco_reset = cik_asic_supports_baco(adev);
>> +   break;
>> default:
>> baco_reset = false;
>> break;
>> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>> index 3be40114e63d..45f608838f6e 100644
>> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
>> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
>> { CMD_READMODIFYWRITE, mmBACO_CNTL,
>> BACO_CNTL__BACO_BCLK_OFF_MASK,   BACO_CNTL__BACO_BCLK_OFF__SHIFT,
>> 0, 0x00 },
>> { CMD_READMODIFYWRITE, mmBACO_CNTL,
>> BACO_CNTL__BACO_POWER_OFF_MASK,  BACO_CNTL__BACO_POWER_OFF__SHIFT,
>> 0, 0x00 },
>> { CMD_DELAY_MS, 0, 0, 0, 20, 0 },
>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0,
>> 0x, 0x20 },
>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0,
>> 0x, 0x200 },
>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK,
>> BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 },
>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c },
>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00
>> },
>> { CMD_READMODIFYWRITE, mmBACO_CNTL,
>> BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0,
>> 0x01 },
>> { CMD_READMODIFYWRITE, mmBACO_CNTL,
>> BACO_CNTL__BACO_RESET_EN_MASK, BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 },
>> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK,
>> 0, 5, 0x10 },
>> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK,
>> 0, 5, 0x100 },
>> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK,
>> BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 },
>> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0,
>> 0x, 0x00 }
>>  };
>> @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
>>  static const struct baco_cmd_entry clean_baco_tbl[] =
>>  {
>> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
>> +   { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
>> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 }
>>  };
>>
>> --
>> 2.29.0
>>
>
>
> Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch
> seem related to any patches I've contributed.
>
> - Sandeep
>

Ok, I just saw the other email. I'll try testing the patch and see if it
fixes the hibernation bug.

- Sandeep

>
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Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

2020-10-27 Thread Sandeep

On Tue, 27 Oct, 2020, 08:10 Evan Quan,  wrote:

> Which can be used for S4(hibernation) support.
>
> Change-Id: I6e4962c120a3baed14cea04ed1742ff11a273d34
> Signed-off-by: Evan Quan 
> ---
>  drivers/gpu/drm/amd/amdgpu/cik.c | 4 +++-
>  drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c | 7 ---
>  2 files changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik.c
> b/drivers/gpu/drm/amd/amdgpu/cik.c
> index 03ff8bd1fee8..5442df094102 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik.c
> @@ -1336,11 +1336,13 @@ cik_asic_reset_method(struct amdgpu_device *adev)
>
> switch (adev->asic_type) {
> case CHIP_BONAIRE:
> -   case CHIP_HAWAII:
> /* disable baco reset until it works */
> /* smu7_asic_get_baco_capability(adev, &baco_reset); */
> baco_reset = false;
> break;
> +   case CHIP_HAWAII:
> +   baco_reset = cik_asic_supports_baco(adev);
> +   break;
> default:
> baco_reset = false;
> break;
> diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
> b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
> index 3be40114e63d..45f608838f6e 100644
> --- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
> +++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ci_baco.c
> @@ -142,12 +142,12 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
> { CMD_READMODIFYWRITE, mmBACO_CNTL,
> BACO_CNTL__BACO_BCLK_OFF_MASK,   BACO_CNTL__BACO_BCLK_OFF__SHIFT,
> 0, 0x00 },
> { CMD_READMODIFYWRITE, mmBACO_CNTL,
> BACO_CNTL__BACO_POWER_OFF_MASK,  BACO_CNTL__BACO_POWER_OFF__SHIFT,
> 0, 0x00 },
> { CMD_DELAY_MS, 0, 0, 0, 20, 0 },
> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0,
> 0x, 0x20 },
> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_BF_MASK, 0,
> 0x, 0x200 },
> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_ISO_DIS_MASK,
> BACO_CNTL__BACO_ISO_DIS__SHIFT, 0, 0x01 },
> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c },
> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__PWRGOOD_MASK, 0, 5, 0x1c00
> },
> { CMD_READMODIFYWRITE, mmBACO_CNTL,
> BACO_CNTL__BACO_ANA_ISO_DIS_MASK, BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT, 0,
> 0x01 },
> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_RESET_EN_MASK,
> BACO_CNTL__BACO_RESET_EN__SHIFT, 0, 0x00 },
> -   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK,
> 0, 5, 0x10 },
> +   { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__RCU_BIF_CONFIG_DONE_MASK,
> 0, 5, 0x100 },
> { CMD_READMODIFYWRITE, mmBACO_CNTL, BACO_CNTL__BACO_EN_MASK,
> BACO_CNTL__BACO_EN__SHIFT, 0, 0x00 },
> { CMD_WAITFOR, mmBACO_CNTL, BACO_CNTL__BACO_MODE_MASK, 0,
> 0x, 0x00 }
>  };
> @@ -155,6 +155,7 @@ static const struct baco_cmd_entry exit_baco_tbl[] =
>  static const struct baco_cmd_entry clean_baco_tbl[] =
>  {
> { CMD_WRITE, mmBIOS_SCRATCH_6, 0, 0, 0, 0 },
> +   { CMD_WRITE, mmBIOS_SCRATCH_7, 0, 0, 0, 0 },
> { CMD_WRITE, mmCP_PFP_UCODE_ADDR, 0, 0, 0, 0 }
>  };
>
> --
> 2.29.0
>


Not sure why I'm cc'd on this, I'm not a maintainer, nor does this patch
seem related to any patches I've contributed.

- Sandeep

>
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Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

Re: [PATCH 1/2] drm/amd/pm: enable baco reset for Hawaii

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