RE: [PATCH] drm/amd/display: Correct MPC split policy for DCN301
[AMD Official Use Only] -Original Message- From: Liu, Zhan Sent: Wednesday, January 19, 2022 5:17 PM To: amd-gfx@lists.freedesktop.org Cc: Liu, Charlene ; Cornij, Nikola ; Gutierrez, Agustin ; Pierre-Loup Griffais ; Kotarac, Pavle Subject: [PATCH] drm/amd/display: Correct MPC split policy for DCN301 [AMD Official Use Only] [Why] DCN301 has seamless boot enabled. With MPC split enabled at the same time, system will hang. [How] Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine enabled on DCN301, pipe split is not necessary here. Signed-off-by: Zhan Liu Reviewed-by: Charlene Liu --- drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c index c1c6e602b06c..b4001233867c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = { .disable_clock_gate = true, .disable_pplib_clock_request = true, .disable_pplib_wm_range = true, - .pipe_split_policy = MPC_SPLIT_DYNAMIC, + .pipe_split_policy = MPC_SPLIT_AVOID, .force_single_disp_pipe_split = false, .disable_dcc = DCC_ENABLE, .vsr_support = true, -- 2.25.1
RE: [PATCH] drm/amd/display: Correct MPC split policy for DCN301
[Public] Apologize for sending out the patch with the wrong email sensitivity policy a few seconds ago. I've updated sensitivity policy to "Public". Thanks, Zhan > -Original Message- > From: amd-gfx On Behalf Of Liu, Zhan > Sent: 2022/January/19, Wednesday 5:17 PM > To: amd-gfx@lists.freedesktop.org > Cc: Liu, Charlene ; Kotarac, Pavle > ; Pierre-Loup Griffais ; > Gutierrez, Agustin ; Cornij, Nikola > > Subject: [PATCH] drm/amd/display: Correct MPC split policy for DCN301 > > [Why] > DCN301 has seamless boot enabled. With MPC split enabled at the same time, > system will hang. > > [How] > Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine > enabled on DCN301, pipe split is not necessary here. > > Signed-off-by: Zhan Liu > --- > drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > index c1c6e602b06c..b4001233867c 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv > = { > .disable_clock_gate = true, > .disable_pplib_clock_request = true, > .disable_pplib_wm_range = true, > - .pipe_split_policy = MPC_SPLIT_DYNAMIC, > + .pipe_split_policy = MPC_SPLIT_AVOID, > .force_single_disp_pipe_split = false, > .disable_dcc = DCC_ENABLE, > .vsr_support = true, > -- > 2.25.1
Re: [PATCH] drm/amd/display: Correct MPC split policy for DCN301
Acked-by: Alex Deucher On Wed, Jan 19, 2022 at 5:17 PM Liu, Zhan wrote: > > [AMD Official Use Only] > > [Why] > DCN301 has seamless boot enabled. With MPC split enabled > at the same time, system will hang. > > [How] > Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have > ODM combine enabled on DCN301, pipe split is not necessary here. > > Signed-off-by: Zhan Liu > --- > drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > index c1c6e602b06c..b4001233867c 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c > @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = > { > .disable_clock_gate = true, > .disable_pplib_clock_request = true, > .disable_pplib_wm_range = true, > - .pipe_split_policy = MPC_SPLIT_DYNAMIC, > + .pipe_split_policy = MPC_SPLIT_AVOID, > .force_single_disp_pipe_split = false, > .disable_dcc = DCC_ENABLE, > .vsr_support = true, > -- > 2.25.1
[PATCH] drm/amd/display: Correct MPC split policy for DCN301
[AMD Official Use Only] [Why] DCN301 has seamless boot enabled. With MPC split enabled at the same time, system will hang. [How] Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine enabled on DCN301, pipe split is not necessary here. Signed-off-by: Zhan Liu --- drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c index c1c6e602b06c..b4001233867c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c @@ -686,7 +686,7 @@ static const struct dc_debug_options debug_defaults_drv = { .disable_clock_gate = true, .disable_pplib_clock_request = true, .disable_pplib_wm_range = true, - .pipe_split_policy = MPC_SPLIT_DYNAMIC, + .pipe_split_policy = MPC_SPLIT_AVOID, .force_single_disp_pipe_split = false, .disable_dcc = DCC_ENABLE, .vsr_support = true, -- 2.25.1