RE: [PATCH] drm/amdgpu/sriov: Need to clear kiq position

2020-06-10 Thread Liu, Monk 
Acked-by: Monk.Liu

_
Monk Liu|GPU Virtualization Team |AMD


-Original Message-
From: amd-gfx  On Behalf Of Emily Deng
Sent: Thursday, June 11, 2020 2:02 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily 
Subject: [PATCH] drm/amdgpu/sriov: Need to clear kiq position

As will clear vf fw during unload driver, to avoid idle fail. Need to clear KIQ 
portion also.

Signed-off-by: Emily Deng 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index e9045dd..323285e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -6876,6 +6876,7 @@ static int gfx_v10_0_hw_fini(void *handle)  {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
+   uint32_t tmp;
 
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0); @@ -6890,6 +6891,11 
@@ static int gfx_v10_0_hw_fini(void *handle)
DRM_ERROR("KCQ disable failed\n");
if (amdgpu_sriov_vf(adev)) {
gfx_v10_0_cp_gfx_enable(adev, false);
+   /* Program KIQ position of RLC_CP_SCHEDULERS during destroy */
+   tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
+   tmp &= 0xff00;
+   WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
+
return 0;
}
gfx_v10_0_cp_enable(adev, false);
--
2.7.4

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[PATCH] drm/amdgpu/sriov: Need to clear kiq position

2020-06-10 Thread Emily Deng 
As will clear vf fw during unload driver, to avoid idle fail. Need
to clear KIQ portion also.

Signed-off-by: Emily Deng 
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index e9045dd..323285e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -6876,6 +6876,7 @@ static int gfx_v10_0_hw_fini(void *handle)
 {
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
int r;
+   uint32_t tmp;
 
amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
@@ -6890,6 +6891,11 @@ static int gfx_v10_0_hw_fini(void *handle)
DRM_ERROR("KCQ disable failed\n");
if (amdgpu_sriov_vf(adev)) {
gfx_v10_0_cp_gfx_enable(adev, false);
+   /* Program KIQ position of RLC_CP_SCHEDULERS during destroy */
+   tmp = RREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS);
+   tmp &= 0xff00;
+   WREG32_SOC15(GC, 0, mmRLC_CP_SCHEDULERS, tmp);
+
return 0;
}
gfx_v10_0_cp_enable(adev, false);
-- 
2.7.4

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