Re: [PATCH] drm/amdgpu: query vram type from atombios

[Alex Deucher]

On Thu, Mar 8, 2018 at 5:02 AM, Hawking Zhang  wrote:
> The vram type for dGPU is stored in umc_info while sys mem type
> for APU is stored in integratedsysteminfo
>
> Change-Id: Iec14a0cac407f3da37245786c8f1b688968f8726
> Signed-off-by: Hawking Zhang 

Reviewed-by: Alex Deucher 

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 
> +++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h |  1 +
>  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c|  4 +-
>  include/uapi/drm/amdgpu_drm.h|  1 +
>  4 files changed, 94 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> index ff8efd0..a0f48cb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
> @@ -114,6 +114,9 @@ union igp_info {
> struct atom_integrated_system_info_v1_11 v11;
>  };
>
> +union umc_info {
> +   struct atom_umc_info_v3_1 v31;
> +};
>  /*
>   * Return vram width from integrated system info table, if available,
>   * or 0 if not.
> @@ -143,6 +146,94 @@ int amdgpu_atomfirmware_get_vram_width(struct 
> amdgpu_device *adev)
> return 0;
>  }
>
> +static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev,
> +  int atom_mem_type)
> +{
> +   int vram_type;
> +
> +   if (adev->flags & AMD_IS_APU) {
> +   switch (atom_mem_type) {
> +   case Ddr2MemType:
> +   case LpDdr2MemType:
> +   vram_type = AMDGPU_VRAM_TYPE_DDR2;
> +   break;
> +   case Ddr3MemType:
> +   case LpDdr3MemType:
> +   vram_type = AMDGPU_VRAM_TYPE_DDR3;
> +   break;
> +   case Ddr4MemType:
> +   case LpDdr4MemType:
> +   vram_type = AMDGPU_VRAM_TYPE_DDR4;
> +   break;
> +   default:
> +   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
> +   break;
> +   }
> +   } else {
> +   switch (atom_mem_type) {
> +   case ATOM_DGPU_VRAM_TYPE_GDDR5:
> +   vram_type = AMDGPU_VRAM_TYPE_GDDR5;
> +   break;
> +   case ATOM_DGPU_VRAM_TYPE_HBM:
> +   vram_type = AMDGPU_VRAM_TYPE_HBM;
> +   break;
> +   default:
> +   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
> +   break;
> +   }
> +   }
> +
> +   return vram_type;
> +}
> +/*
> + * Return vram type from either integrated system info table
> + * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not
> + */
> +int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
> +{
> +   struct amdgpu_mode_info *mode_info = >mode_info;
> +   int index;
> +   u16 data_offset, size;
> +   union igp_info *igp_info;
> +   union umc_info *umc_info;
> +   u8 frev, crev;
> +   u8 mem_type;
> +
> +   if (adev->flags & AMD_IS_APU)
> +   index = 
> get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
> +   integratedsysteminfo);
> +   else
> +   index = 
> get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
> +   umc_info);
> +   if (amdgpu_atom_parse_data_header(mode_info->atom_context,
> + index, ,
> + , , _offset)) {
> +   if (adev->flags & AMD_IS_APU) {
> +   igp_info = (union igp_info *)
> +   (mode_info->atom_context->bios + data_offset);
> +   switch (crev) {
> +   case 11:
> +   mem_type = igp_info->v11.memorytype;
> +   return 
> convert_atom_mem_type_to_vram_type(adev, mem_type);
> +   default:
> +   return 0;
> +   }
> +   } else {
> +   umc_info = (union umc_info *)
> +   (mode_info->atom_context->bios + data_offset);
> +   switch (crev) {
> +   case 1:
> +   mem_type = umc_info->v31.vram_type;
> +   return 
> convert_atom_mem_type_to_vram_type(adev, mem_type);
> +   default:
> +   return 0;
> +   }
> +   }
> +   }
> +
> +   return 0;
> +}
> +
>  union firmware_info {
> struct atom_firmware_info_v3_1 v31;
>  

[PATCH] drm/amdgpu: query vram type from atombios

[Hawking Zhang]

The vram type for dGPU is stored in umc_info while sys mem type
for APU is stored in integratedsysteminfo

Change-Id: Iec14a0cac407f3da37245786c8f1b688968f8726
Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h |  1 +
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c|  4 +-
 include/uapi/drm/amdgpu_drm.h|  1 +
 4 files changed, 94 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index ff8efd0..a0f48cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -114,6 +114,9 @@ union igp_info {
struct atom_integrated_system_info_v1_11 v11;
 };
 
+union umc_info {
+   struct atom_umc_info_v3_1 v31;
+};
 /*
  * Return vram width from integrated system info table, if available,
  * or 0 if not.
@@ -143,6 +146,94 @@ int amdgpu_atomfirmware_get_vram_width(struct 
amdgpu_device *adev)
return 0;
 }
 
+static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev,
+  int atom_mem_type)
+{
+   int vram_type;
+
+   if (adev->flags & AMD_IS_APU) {
+   switch (atom_mem_type) {
+   case Ddr2MemType:
+   case LpDdr2MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR2;
+   break;
+   case Ddr3MemType:
+   case LpDdr3MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR3;
+   break;
+   case Ddr4MemType:
+   case LpDdr4MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR4;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   } else {
+   switch (atom_mem_type) {
+   case ATOM_DGPU_VRAM_TYPE_GDDR5:
+   vram_type = AMDGPU_VRAM_TYPE_GDDR5;
+   break;
+   case ATOM_DGPU_VRAM_TYPE_HBM:
+   vram_type = AMDGPU_VRAM_TYPE_HBM;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   }
+
+   return vram_type;
+}
+/*
+ * Return vram type from either integrated system info table
+ * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not
+ */
+int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
+{
+   struct amdgpu_mode_info *mode_info = >mode_info;
+   int index;
+   u16 data_offset, size;
+   union igp_info *igp_info;
+   union umc_info *umc_info;
+   u8 frev, crev;
+   u8 mem_type;
+
+   if (adev->flags & AMD_IS_APU)
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   integratedsysteminfo);
+   else
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   umc_info);
+   if (amdgpu_atom_parse_data_header(mode_info->atom_context,
+ index, ,
+ , , _offset)) {
+   if (adev->flags & AMD_IS_APU) {
+   igp_info = (union igp_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 11:
+   mem_type = igp_info->v11.memorytype;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   } else {
+   umc_info = (union umc_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 1:
+   mem_type = umc_info->v31.vram_type;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   }
+   }
+
+   return 0;
+}
+
 union firmware_info {
struct atom_firmware_info_v3_1 v31;
 };
@@ -151,10 +242,6 @@ union smu_info {
struct atom_smu_info_v3_1 v31;
 };
 
-union umc_info {
-   struct atom_umc_info_v3_1 v31;
-};
-
 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev)
 {
struct amdgpu_mode_info *mode_info = >mode_info;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h 

RE: [PATCH] drm/amdgpu: query vram type from atombios

[Zhang, Hawking]

Please ignore this patch since it doesn't sync up to the latest code base. I 
will re-send another review later

Regards,
Hawking

-Original Message-
From: Hawking Zhang <hawking.zh...@amd.com> 
Sent: 2018年3月8日 17:37
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking <hawking.zh...@amd.com>
Subject: [PATCH] drm/amdgpu: query vram type from atombios

The vram type info for dGPU is saved in umc_info while sys mem type info for 
APU is saved in integratedsysteminfo

Change-Id: I08b84c65e4e31c65e2e5a277a1acdf032ec04d2e
Signed-off-by: Hawking Zhang <hawking.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 +++- 
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h |  1 +
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c|  4 +-
 include/uapi/drm/amdgpu_drm.h|  1 +
 4 files changed, 94 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index ff8efd0..a0f48cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -114,6 +114,9 @@ union igp_info {
struct atom_integrated_system_info_v1_11 v11;  };
 
+union umc_info {
+   struct atom_umc_info_v3_1 v31;
+};
 /*
  * Return vram width from integrated system info table, if available,
  * or 0 if not.
@@ -143,6 +146,94 @@ int amdgpu_atomfirmware_get_vram_width(struct 
amdgpu_device *adev)
return 0;
 }
 
+static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev,
+  int atom_mem_type)
+{
+   int vram_type;
+
+   if (adev->flags & AMD_IS_APU) {
+   switch (atom_mem_type) {
+   case Ddr2MemType:
+   case LpDdr2MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR2;
+   break;
+   case Ddr3MemType:
+   case LpDdr3MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR3;
+   break;
+   case Ddr4MemType:
+   case LpDdr4MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR4;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   } else {
+   switch (atom_mem_type) {
+   case ATOM_DGPU_VRAM_TYPE_GDDR5:
+   vram_type = AMDGPU_VRAM_TYPE_GDDR5;
+   break;
+   case ATOM_DGPU_VRAM_TYPE_HBM:
+   vram_type = AMDGPU_VRAM_TYPE_HBM;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   }
+
+   return vram_type;
+}
+/*
+ * Return vram type from either integrated system info table
+ * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not  */ int 
+amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev) {
+   struct amdgpu_mode_info *mode_info = >mode_info;
+   int index;
+   u16 data_offset, size;
+   union igp_info *igp_info;
+   union umc_info *umc_info;
+   u8 frev, crev;
+   u8 mem_type;
+
+   if (adev->flags & AMD_IS_APU)
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   integratedsysteminfo);
+   else
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   umc_info);
+   if (amdgpu_atom_parse_data_header(mode_info->atom_context,
+ index, ,
+ , , _offset)) {
+   if (adev->flags & AMD_IS_APU) {
+   igp_info = (union igp_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 11:
+   mem_type = igp_info->v11.memorytype;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   } else {
+   umc_info = (union umc_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 1:
+   mem_type = umc_info->v31.vram_type;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   }
+   }
+
+   return 0;
+}
+
 union firmware_in

[PATCH] drm/amdgpu: query vram type from atombios

[Hawking Zhang]

The vram type info for dGPU is saved in umc_info while sys mem type info
for APU is saved in integratedsysteminfo

Change-Id: I08b84c65e4e31c65e2e5a277a1acdf032ec04d2e
Signed-off-by: Hawking Zhang 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 95 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h |  1 +
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c|  4 +-
 include/uapi/drm/amdgpu_drm.h|  1 +
 4 files changed, 94 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index ff8efd0..a0f48cb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -114,6 +114,9 @@ union igp_info {
struct atom_integrated_system_info_v1_11 v11;
 };
 
+union umc_info {
+   struct atom_umc_info_v3_1 v31;
+};
 /*
  * Return vram width from integrated system info table, if available,
  * or 0 if not.
@@ -143,6 +146,94 @@ int amdgpu_atomfirmware_get_vram_width(struct 
amdgpu_device *adev)
return 0;
 }
 
+static int convert_atom_mem_type_to_vram_type (struct amdgpu_device *adev,
+  int atom_mem_type)
+{
+   int vram_type;
+
+   if (adev->flags & AMD_IS_APU) {
+   switch (atom_mem_type) {
+   case Ddr2MemType:
+   case LpDdr2MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR2;
+   break;
+   case Ddr3MemType:
+   case LpDdr3MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR3;
+   break;
+   case Ddr4MemType:
+   case LpDdr4MemType:
+   vram_type = AMDGPU_VRAM_TYPE_DDR4;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   } else {
+   switch (atom_mem_type) {
+   case ATOM_DGPU_VRAM_TYPE_GDDR5:
+   vram_type = AMDGPU_VRAM_TYPE_GDDR5;
+   break;
+   case ATOM_DGPU_VRAM_TYPE_HBM:
+   vram_type = AMDGPU_VRAM_TYPE_HBM;
+   break;
+   default:
+   vram_type = AMDGPU_VRAM_TYPE_UNKNOWN;
+   break;
+   }
+   }
+
+   return vram_type;
+}
+/*
+ * Return vram type from either integrated system info table
+ * or umc info table, if available, or 0 (TYPE_UNKNOWN) if not
+ */
+int amdgpu_atomfirmware_get_vram_type(struct amdgpu_device *adev)
+{
+   struct amdgpu_mode_info *mode_info = >mode_info;
+   int index;
+   u16 data_offset, size;
+   union igp_info *igp_info;
+   union umc_info *umc_info;
+   u8 frev, crev;
+   u8 mem_type;
+
+   if (adev->flags & AMD_IS_APU)
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   integratedsysteminfo);
+   else
+   index = 
get_index_into_master_table(atom_master_list_of_data_tables_v2_1,
+   umc_info);
+   if (amdgpu_atom_parse_data_header(mode_info->atom_context,
+ index, ,
+ , , _offset)) {
+   if (adev->flags & AMD_IS_APU) {
+   igp_info = (union igp_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 11:
+   mem_type = igp_info->v11.memorytype;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   } else {
+   umc_info = (union umc_info *)
+   (mode_info->atom_context->bios + data_offset);
+   switch (crev) {
+   case 1:
+   mem_type = umc_info->v31.vram_type;
+   return convert_atom_mem_type_to_vram_type(adev, 
mem_type);
+   default:
+   return 0;
+   }
+   }
+   }
+
+   return 0;
+}
+
 union firmware_info {
struct atom_firmware_info_v3_1 v31;
 };
@@ -151,10 +242,6 @@ union smu_info {
struct atom_smu_info_v3_1 v31;
 };
 
-union umc_info {
-   struct atom_umc_info_v3_1 v31;
-};
-
 int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev)
 {
struct amdgpu_mode_info *mode_info = >mode_info;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h