RE: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
Hi Alex
So sorry for my missing of you patch because the outlook on website didn’t show
it.
Your patch seems cleaner and better. Can you help submit it ? Thanks in advance.
Reviewed-by: Yintian Tao
Can
From: Deucher, Alexander
Sent: Saturday, May 18, 2019 1:07 AM
To: Tao, Yintian ; Alex Deucher
Cc: amd-gfx@lists.freedesktop.org; Koenig, Christian
; Huang, Trigger
Subject: Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
Did you see the patch I attached?
Alex
From: Tao, Yintian
Sent: Friday, May 17, 2019 10:51 AM
To: Alex Deucher
Cc: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>;
Koenig, Christian; Deucher, Alexander; Huang, Trigger
Subject: 答复: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
Hi Alex
Many thanks for your review. I will merge these two patches into one and submit
again.
Best Regards
Yintian Tao
发件人: Alex Deucher mailto:alexdeuc...@gmail.com>>
发送时间: 2019年5月17日 22:34:30
收件人: Tao, Yintian
抄送: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>;
Koenig, Christian; Deucher, Alexander; Huang, Trigger
主题: Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
[CAUTION: External Email]
How about combining these two patches into one? This seems cleaner.
Alex
On Thu, May 16, 2019 at 10:39 PM Tao, Yintian
mailto:yintian@amd.com>> wrote:
>
> Ping...
>
> Hi Christian and Alex
>
>
> Can you help review this? Thanks in advance.
>
>
> Best Regards
> Yintian Tao
>
> -Original Message-
> From: Yintian Tao mailto:yt...@amd.com>>
> Sent: Thursday, May 16, 2019 8:03 PM
> To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org>
> Cc: Tao, Yintian mailto:yintian....@amd.com>>; Huang,
> Trigger mailto:trigger.hu...@amd.com>>
> Subject: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
>
> For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF
> related registers is not readable, seems hardcord is the only way to set the
> correct vram_width
>
> Signed-off-by: Trigger Huang
> mailto:trigger.hu...@amd.com>>
> Signed-off-by: Yintian Tao mailto:yt...@amd.com>>
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index c221570..a417763 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> adev->gmc.vram_width = numchan * chansize;
> }
>
> + /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
> +* and DF related registers is not readable, seems hardcord is the
> +* only way to set the correct vram_width */
> + if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) {
> + adev->gmc.vram_width = 2048;
> + }
> +
> /* size in MB on si */
> adev->gmc.mc_vram_size =
> adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
> --
> 2.7.4
>
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答复: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
Hi Alex
Many thanks for your review. I will merge these two patches into one and submit
again.
Best Regards
Yintian Tao
发件人: Alex Deucher
发送时间: 2019年5月17日 22:34:30
收件人: Tao, Yintian
抄送: amd-gfx@lists.freedesktop.org; Koenig, Christian; Deucher, Alexander;
Huang, Trigger
主题: Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
[CAUTION: External Email]
How about combining these two patches into one? This seems cleaner.
Alex
On Thu, May 16, 2019 at 10:39 PM Tao, Yintian wrote:
>
> Ping...
>
> Hi Christian and Alex
>
>
> Can you help review this? Thanks in advance.
>
>
> Best Regards
> Yintian Tao
>
> -Original Message-
> From: Yintian Tao
> Sent: Thursday, May 16, 2019 8:03 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Tao, Yintian ; Huang, Trigger
> Subject: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
>
> For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF
> related registers is not readable, seems hardcord is the only way to set the
> correct vram_width
>
> Signed-off-by: Trigger Huang
> Signed-off-by: Yintian Tao
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index c221570..a417763 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> adev->gmc.vram_width = numchan * chansize;
> }
>
> + /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
> +* and DF related registers is not readable, seems hardcord is the
> +* only way to set the correct vram_width */
> + if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) {
> + adev->gmc.vram_width = 2048;
> + }
> +
> /* size in MB on si */
> adev->gmc.mc_vram_size =
> adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
> --
> 2.7.4
>
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Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
How about combining these two patches into one? This seems cleaner.
Alex
On Thu, May 16, 2019 at 10:39 PM Tao, Yintian wrote:
>
> Ping...
>
> Hi Christian and Alex
>
>
> Can you help review this? Thanks in advance.
>
>
> Best Regards
> Yintian Tao
>
> -Original Message-
> From: Yintian Tao
> Sent: Thursday, May 16, 2019 8:03 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Tao, Yintian ; Huang, Trigger
> Subject: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
>
> For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF
> related registers is not readable, seems hardcord is the only way to set the
> correct vram_width
>
> Signed-off-by: Trigger Huang
> Signed-off-by: Yintian Tao
> ---
> drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> index c221570..a417763 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
> @@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
> adev->gmc.vram_width = numchan * chansize;
> }
>
> + /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
> +* and DF related registers is not readable, seems hardcord is the
> +* only way to set the correct vram_width */
> + if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) {
> + adev->gmc.vram_width = 2048;
> + }
> +
> /* size in MB on si */
> adev->gmc.mc_vram_size =
> adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
> --
> 2.7.4
>
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> amd-gfx@lists.freedesktop.org
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From 28cff589e564087d22e9be35ba8f90e0a30409e9 Mon Sep 17 00:00:00 2001
From: Alex Deucher
Date: Fri, 17 May 2019 09:31:43 -0500
Subject: [PATCH] drm/amdgpu/gmc9: set vram_width properly for SR-IOV
For SR-IOV, vram_width can't be read from ATOM as
RAVEN, and DF related registers is not readable, so hardcord
is the only way to set the correct vram_width.
Signed-off-by: Trigger Huang
Signed-off-by: Yintian Tao
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 59c580bd5a3b..9750b632e9aa 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -835,8 +835,16 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
int chansize, numchan;
int r;
- if (amdgpu_emu_mode != 1)
+ if (amdgpu_sriov_vf(adev)) {
+ /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
+ * and DF related registers is not readable, seems hardcord is the
+ * only way to set the correct vram_width
+ */
+ adev->gmc.vram_width = 2048;
+ } else if (amdgpu_emu_mode != 1) {
adev->gmc.vram_width = amdgpu_atomfirmware_get_vram_width(adev);
+ }
+
if (!adev->gmc.vram_width) {
/* hbm memory channel size */
if (adev->flags & AMD_IS_APU)
--
2.20.1
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RE: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
Ping...
Hi Christian and Alex
Can you help review this? Thanks in advance.
Best Regards
Yintian Tao
-Original Message-
From: Yintian Tao
Sent: Thursday, May 16, 2019 8:03 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tao, Yintian ; Huang, Trigger
Subject: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF related
registers is not readable, seems hardcord is the only way to set the correct
vram_width
Signed-off-by: Trigger Huang
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c221570..a417763 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
adev->gmc.vram_width = numchan * chansize;
}
+ /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
+* and DF related registers is not readable, seems hardcord is the
+* only way to set the correct vram_width */
+ if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) {
+ adev->gmc.vram_width = 2048;
+ }
+
/* size in MB on si */
adev->gmc.mc_vram_size =
adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
--
2.7.4
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[PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov
For Vega10 SR-IOV, vram_width can't be read from ATOM as
RAVEN, and DF related registers is not readable, seems hardcord
is the only way to set the correct vram_width
Signed-off-by: Trigger Huang
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c221570..a417763 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
adev->gmc.vram_width = numchan * chansize;
}
+ /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN,
+* and DF related registers is not readable, seems hardcord is the
+* only way to set the correct vram_width */
+ if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) {
+ adev->gmc.vram_width = 2048;
+ }
+
/* size in MB on si */
adev->gmc.mc_vram_size =
adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL;
--
2.7.4
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