Re: [PATCH 03/10] drm/amdgpu: fix amdgpu_gmc_gart_location a little bit

2018-08-29 Thread Christian König 

Am 27.08.2018 um 21:03 schrieb Alex Deucher:

On Mon, Aug 27, 2018 at 12:55 PM Christian König
 wrote:

Improve the VCE limitation handling.

Signed-off-by: Christian König 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 28 -
  1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 72dffa3fd194..8269197df8e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -120,24 +120,22 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, 
struct amdgpu_gmc *mc)

 mc->gart_size += adev->pm.smu_prv_buffer_size;

-   size_af = adev->gmc.mc_mask - mc->vram_end;
+   /* VCE doesn't like it when BOs cross a 4GB segment, so align
+* the GART base on a 4GB boundary as well.
+*/
 size_bf = mc->vram_start;
-   if (size_bf > size_af) {
-   if (mc->gart_size > size_bf) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_bf;
-   }
+   size_af = adev->gmc.mc_mask + 1 -
+   ALIGN(mc->vram_end + 1, 0x1ULL);

Is it worth limiting this to asics with VCE support?


Actually I think that a couple of blocks might have a problem with that. 
E.g. DCE/DCN seem to use a similar approach as VCE/VCN. Not 100% sure 
about UVD.


Only GFX/Compute/SDMA seems to have a true 48bit interface to the MC.

Regards,
Christian.


   Probably not a
big deal either way.
Reviewed-by: Alex Deucher 


+
+   if (mc->gart_size > max(size_bf, size_af)) {
+   dev_warn(adev->dev, "limiting GART\n");
+   mc->gart_size = max(size_bf, size_af);
+   }
+
+   if (size_bf > size_af)
 mc->gart_start = 0;
-   } else {
-   if (mc->gart_size > size_af) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_af;
-   }
-   /* VCE doesn't like it when BOs cross a 4GB segment, so align
-* the GART base on a 4GB boundary as well.
-*/
+   else
 mc->gart_start = ALIGN(mc->vram_end + 1, 0x1ULL);
-   }
 mc->gart_end = mc->gart_start + mc->gart_size - 1;
 dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
 mc->gart_size >> 20, mc->gart_start, mc->gart_end);
--
2.17.1

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Re: [PATCH 03/10] drm/amdgpu: fix amdgpu_gmc_gart_location a little bit

2018-08-27 Thread Zhang, Jerry (Junwei) 

On 08/28/2018 12:53 AM, Christian König wrote:

Improve the VCE limitation handling.

Signed-off-by: Christian König 

Reviewed-by: Junwei Zhang 


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 28 -
  1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 72dffa3fd194..8269197df8e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -120,24 +120,22 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, 
struct amdgpu_gmc *mc)

mc->gart_size += adev->pm.smu_prv_buffer_size;

-   size_af = adev->gmc.mc_mask - mc->vram_end;
+   /* VCE doesn't like it when BOs cross a 4GB segment, so align
+* the GART base on a 4GB boundary as well.
+*/
size_bf = mc->vram_start;
-   if (size_bf > size_af) {
-   if (mc->gart_size > size_bf) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_bf;
-   }
+   size_af = adev->gmc.mc_mask + 1 -
+   ALIGN(mc->vram_end + 1, 0x1ULL);
+
+   if (mc->gart_size > max(size_bf, size_af)) {
+   dev_warn(adev->dev, "limiting GART\n");
+   mc->gart_size = max(size_bf, size_af);
+   }
+
+   if (size_bf > size_af)
mc->gart_start = 0;
-   } else {
-   if (mc->gart_size > size_af) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_af;
-   }
-   /* VCE doesn't like it when BOs cross a 4GB segment, so align
-* the GART base on a 4GB boundary as well.
-*/
+   else
mc->gart_start = ALIGN(mc->vram_end + 1, 0x1ULL);
-   }
mc->gart_end = mc->gart_start + mc->gart_size - 1;
dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
mc->gart_size >> 20, mc->gart_start, mc->gart_end);


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Re: [PATCH 03/10] drm/amdgpu: fix amdgpu_gmc_gart_location a little bit

2018-08-27 Thread Alex Deucher 
On Mon, Aug 27, 2018 at 12:55 PM Christian König
 wrote:
>
> Improve the VCE limitation handling.
>
> Signed-off-by: Christian König 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 28 -
>  1 file changed, 13 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> index 72dffa3fd194..8269197df8e0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
> @@ -120,24 +120,22 @@ void amdgpu_gmc_gart_location(struct amdgpu_device 
> *adev, struct amdgpu_gmc *mc)
>
> mc->gart_size += adev->pm.smu_prv_buffer_size;
>
> -   size_af = adev->gmc.mc_mask - mc->vram_end;
> +   /* VCE doesn't like it when BOs cross a 4GB segment, so align
> +* the GART base on a 4GB boundary as well.
> +*/
> size_bf = mc->vram_start;
> -   if (size_bf > size_af) {
> -   if (mc->gart_size > size_bf) {
> -   dev_warn(adev->dev, "limiting GART\n");
> -   mc->gart_size = size_bf;
> -   }
> +   size_af = adev->gmc.mc_mask + 1 -
> +   ALIGN(mc->vram_end + 1, 0x1ULL);

Is it worth limiting this to asics with VCE support?  Probably not a
big deal either way.
Reviewed-by: Alex Deucher 

> +
> +   if (mc->gart_size > max(size_bf, size_af)) {
> +   dev_warn(adev->dev, "limiting GART\n");
> +   mc->gart_size = max(size_bf, size_af);
> +   }
> +
> +   if (size_bf > size_af)
> mc->gart_start = 0;
> -   } else {
> -   if (mc->gart_size > size_af) {
> -   dev_warn(adev->dev, "limiting GART\n");
> -   mc->gart_size = size_af;
> -   }
> -   /* VCE doesn't like it when BOs cross a 4GB segment, so align
> -* the GART base on a 4GB boundary as well.
> -*/
> +   else
> mc->gart_start = ALIGN(mc->vram_end + 1, 0x1ULL);
> -   }
> mc->gart_end = mc->gart_start + mc->gart_size - 1;
> dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
> mc->gart_size >> 20, mc->gart_start, mc->gart_end);
> --
> 2.17.1
>
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[PATCH 03/10] drm/amdgpu: fix amdgpu_gmc_gart_location a little bit

2018-08-27 Thread Christian König 
Improve the VCE limitation handling.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 28 -
 1 file changed, 13 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 72dffa3fd194..8269197df8e0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -120,24 +120,22 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev, 
struct amdgpu_gmc *mc)
 
mc->gart_size += adev->pm.smu_prv_buffer_size;
 
-   size_af = adev->gmc.mc_mask - mc->vram_end;
+   /* VCE doesn't like it when BOs cross a 4GB segment, so align
+* the GART base on a 4GB boundary as well.
+*/
size_bf = mc->vram_start;
-   if (size_bf > size_af) {
-   if (mc->gart_size > size_bf) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_bf;
-   }
+   size_af = adev->gmc.mc_mask + 1 -
+   ALIGN(mc->vram_end + 1, 0x1ULL);
+
+   if (mc->gart_size > max(size_bf, size_af)) {
+   dev_warn(adev->dev, "limiting GART\n");
+   mc->gart_size = max(size_bf, size_af);
+   }
+
+   if (size_bf > size_af)
mc->gart_start = 0;
-   } else {
-   if (mc->gart_size > size_af) {
-   dev_warn(adev->dev, "limiting GART\n");
-   mc->gart_size = size_af;
-   }
-   /* VCE doesn't like it when BOs cross a 4GB segment, so align
-* the GART base on a 4GB boundary as well.
-*/
+   else
mc->gart_start = ALIGN(mc->vram_end + 1, 0x1ULL);
-   }
mc->gart_end = mc->gart_start + mc->gart_size - 1;
dev_info(adev->dev, "GART: %lluM 0x%016llX - 0x%016llX\n",
mc->gart_size >> 20, mc->gart_start, mc->gart_end);
-- 
2.17.1

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