Re: [PATCH 1/4] drm/amdgpu/pp/smu7: use a local variable for toc indexing

2018-07-16 Thread Zhu, Rex 
Series is:

Reviewed-by: Rex Zhumailto:re...@amd.com>>



Best Regards

Rex


?? Outlook for Android<https://aka.ms/ghei36>


From: amd-gfx  on behalf of Alex Deucher 

Sent: Thursday, July 12, 2018 10:39:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander; sta...@vger.kernel.org
Subject: [PATCH 1/4] drm/amdgpu/pp/smu7: use a local variable for toc indexing

Rather than using the index variable stored in vram.  If
the device fails to come back online after a resume cycle,
reads from vram will return all 1s which will cause a
segfault. Based on a patch from Thomas Martitz .
This avoids the segfault, but we still need to sort out
why the GPU does not come back online after a resume.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105760
Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 23 +++---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index d644a9bb9078..9f407c48d4f0 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -381,6 +381,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
 uint32_t fw_to_load;
 int result = 0;
 struct SMU_DRAMData_TOC *toc;
+   uint32_t num_entries = 0;

 if (!hwmgr->reload_fw) {
 pr_info("skip reloading...\n");
@@ -422,41 +423,41 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
 }

 toc = (struct SMU_DRAMData_TOC *)smu_data->header;
-   toc->num_entries = 0;
 toc->structure_version = 1;

 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_RLC_G, 
>entry[toc->num_entries++]),
+   UCODE_ID_RLC_G, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_CE, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_CE, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_PFP, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_PFP, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_ME, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_ME, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT1, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT1, 
>entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT2, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT2, 
>entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA0, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA0, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA1, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA1, >entry[num_entries++]),
 "Failed to Get Firmware Entry.", return 
-EINVAL);
 if (!hwmgr->not_vf)
 PP_ASSERT_WITH_CODE(0 == 
smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_MEC_STORAGE, 
>entry[toc->num_e

Re: [PATCH 1/4] drm/amdgpu/pp/smu7: use a local variable for toc indexing

2018-07-13 Thread Christian König 

Am 12.07.2018 um 16:39 schrieb Alex Deucher:

Rather than using the index variable stored in vram.  If
the device fails to come back online after a resume cycle,
reads from vram will return all 1s which will cause a
segfault. Based on a patch from Thomas Martitz .
This avoids the segfault, but we still need to sort out
why the GPU does not come back online after a resume.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105760
Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org


Acked-by: Christian König  for the series.


---
  drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 23 +++---
  1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index d644a9bb9078..9f407c48d4f0 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -381,6 +381,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
uint32_t fw_to_load;
int result = 0;
struct SMU_DRAMData_TOC *toc;
+   uint32_t num_entries = 0;
  
  	if (!hwmgr->reload_fw) {

pr_info("skip reloading...\n");
@@ -422,41 +423,41 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
}
  
  	toc = (struct SMU_DRAMData_TOC *)smu_data->header;

-   toc->num_entries = 0;
toc->structure_version = 1;
  
  	PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,

-   UCODE_ID_RLC_G, 
>entry[toc->num_entries++]),
+   UCODE_ID_RLC_G, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_CE, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_CE, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_PFP, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_PFP, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_ME, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_ME, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT1, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT1, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT2, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT2, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA0, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA0, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA1, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA1, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
if (!hwmgr->not_vf)
PP_ASSERT_WITH_CODE(0 == 
smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_MEC_STORAGE, 
>entry[toc->num_entries++]),
+   UCODE_ID_MEC_STORAGE, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
  
+	toc->num_entries = num_entries;

smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_HI, 
upper_32_bits(smu_data->header_buffer.mc_addr));
smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_LO, 
lower_32_bits(smu_data->header_buffer.mc_addr));
  


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[PATCH 1/4] drm/amdgpu/pp/smu7: use a local variable for toc indexing

2018-07-12 Thread Alex Deucher 
Rather than using the index variable stored in vram.  If
the device fails to come back online after a resume cycle,
reads from vram will return all 1s which will cause a
segfault. Based on a patch from Thomas Martitz .
This avoids the segfault, but we still need to sort out
why the GPU does not come back online after a resume.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=105760
Signed-off-by: Alex Deucher 
Cc: sta...@vger.kernel.org
---
 drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 23 +++---
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c 
b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
index d644a9bb9078..9f407c48d4f0 100644
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c
@@ -381,6 +381,7 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
uint32_t fw_to_load;
int result = 0;
struct SMU_DRAMData_TOC *toc;
+   uint32_t num_entries = 0;
 
if (!hwmgr->reload_fw) {
pr_info("skip reloading...\n");
@@ -422,41 +423,41 @@ int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
}
 
toc = (struct SMU_DRAMData_TOC *)smu_data->header;
-   toc->num_entries = 0;
toc->structure_version = 1;
 
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_RLC_G, 
>entry[toc->num_entries++]),
+   UCODE_ID_RLC_G, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_CE, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_CE, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_PFP, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_PFP, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_ME, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_ME, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT1, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT1, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_CP_MEC_JT2, 
>entry[toc->num_entries++]),
+   UCODE_ID_CP_MEC_JT2, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA0, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA0, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_SDMA1, 
>entry[toc->num_entries++]),
+   UCODE_ID_SDMA1, >entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
if (!hwmgr->not_vf)
PP_ASSERT_WITH_CODE(0 == 
smu7_populate_single_firmware_entry(hwmgr,
-   UCODE_ID_MEC_STORAGE, 
>entry[toc->num_entries++]),
+   UCODE_ID_MEC_STORAGE, 
>entry[num_entries++]),
"Failed to Get Firmware Entry.", return 
-EINVAL);
 
+   toc->num_entries = num_entries;
smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_HI, 
upper_32_bits(smu_data->header_buffer.mc_addr));
smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_LO, 
lower_32_bits(smu_data->header_buffer.mc_addr));
 
-- 
2.13.6

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