RE: [PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov navi12
[AMD Official Use Only - Internal Distribution Only] Hi Monk, Could you help to review this patch? Best wishes Emily Deng >-Original Message- >From: Deng, Emily >Sent: Wednesday, March 31, 2021 5:01 PM >To: Deng, Emily ; amd-gfx@lists.freedesktop.org >Cc: Min, Frank >Subject: RE: [PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov >navi12 > >[AMD Official Use Only - Internal Distribution Only] > >Ping.. > >>-Original Message- >>From: Emily Deng >>Sent: Tuesday, March 30, 2021 12:42 PM >>To: amd-gfx@lists.freedesktop.org >>Cc: Deng, Emily ; Min, Frank >>Subject: [PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov >>navi12 >> >>Since vcn decoding ring is not required, so just disable it. >> >>Signed-off-by: Frank.Min >>Signed-off-by: Emily Deng >>--- >> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++- >> drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 - >> 2 files changed, 17 insertions(+), 16 deletions(-) >> >>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >>b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >>index 8844f650b17f..5d5c41c9d5aa 100644 >>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >>@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device >>*adev, if (adev->uvd.harvest_config & (1 << i)) continue; >> >>-if (adev->vcn.inst[i].ring_dec.sched.ready) >>+if (adev->vcn.inst[i].ring_dec.sched.ready || (adev->asic_type == >>+CHIP_NAVI12 && >>+amdgpu_sriov_vf(adev))) >> ++num_rings; >> } >> ib_start_alignment = 16; >>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >>b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >>index 116b9643d5ba..e4b61f3a45fb 100644 >>--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >>+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >>@@ -220,21 +220,20 @@ static int vcn_v2_0_hw_init(void *handle) { >>struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct >>amdgpu_ring *ring = &adev->vcn.inst->ring_dec; -int i, r; >>+int i, r = -1; >> >> adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, >> ring->doorbell_index, 0); >> >>-if (amdgpu_sriov_vf(adev)) >>+if (amdgpu_sriov_vf(adev)) { >> vcn_v2_0_start_sriov(adev); >>- >>-r = amdgpu_ring_test_helper(ring); >>-if (r) >>-goto done; >>- >>-//Disable vcn decode for sriov >>-if (amdgpu_sriov_vf(adev)) >>-ring->sched.ready = false; >>+if (adev->asic_type == CHIP_NAVI12) >>+ring->sched.ready = false; >>+} else { >>+r = amdgpu_ring_test_helper(ring); >>+if (r) >>+goto done; >>+} >> >> for (i = 0; i < adev->vcn.num_enc_rings; ++i) { ring = >>&adev->vcn.inst->ring_enc[i]; @@ -245,8 +244,11 @@ static int >>vcn_v2_0_hw_init(void *handle) >> >> done: >> if (!r) >>-DRM_INFO("VCN decode and encode initialized successfully(under >>%s).\n", -(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG >Mode":"SPG >>Mode"); >>+DRM_INFO("VCN %s encode initialized >>successfully(under %s).\n", >>+(adev->asic_type == CHIP_NAVI12 && >>+amdgpu_sriov_vf(adev))?"":"decode and", (adev->pg_flags & >>+AMD_PG_SUPPORT_VCN_DPG)?"DPG >>Mode":"SPG Mode"); >> >> return r; >> } >>@@ -1719,9 +1721,6 @@ int vcn_v2_0_dec_ring_test_ring(struct >>amdgpu_ring *ring) >> unsigned i; >> int r; >> >>-if (amdgpu_sriov_vf(adev)) >>-return 0; >>- >> WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); r = >>amdgpu_ring_alloc(ring, 4); if (r) >>-- >>2.25.1 > ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
RE: [PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov navi12
[AMD Official Use Only - Internal Distribution Only] Ping.. >-Original Message- >From: Emily Deng >Sent: Tuesday, March 30, 2021 12:42 PM >To: amd-gfx@lists.freedesktop.org >Cc: Deng, Emily ; Min, Frank >Subject: [PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov navi12 > >Since vcn decoding ring is not required, so just disable it. > >Signed-off-by: Frank.Min >Signed-off-by: Emily Deng >--- > drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++- > drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 - > 2 files changed, 17 insertions(+), 16 deletions(-) > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >index 8844f650b17f..5d5c41c9d5aa 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c >@@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device >*adev, > if (adev->uvd.harvest_config & (1 << i)) > continue; > >-if (adev->vcn.inst[i].ring_dec.sched.ready) >+if (adev->vcn.inst[i].ring_dec.sched.ready || >+(adev->asic_type == CHIP_NAVI12 && >+amdgpu_sriov_vf(adev))) > ++num_rings; > } > ib_start_alignment = 16; >diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >index 116b9643d5ba..e4b61f3a45fb 100644 >--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c >@@ -220,21 +220,20 @@ static int vcn_v2_0_hw_init(void *handle) { > struct amdgpu_device *adev = (struct amdgpu_device *)handle; > struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; >-int i, r; >+int i, r = -1; > > adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, > ring->doorbell_index, 0); > >-if (amdgpu_sriov_vf(adev)) >+if (amdgpu_sriov_vf(adev)) { > vcn_v2_0_start_sriov(adev); >- >-r = amdgpu_ring_test_helper(ring); >-if (r) >-goto done; >- >-//Disable vcn decode for sriov >-if (amdgpu_sriov_vf(adev)) >-ring->sched.ready = false; >+if (adev->asic_type == CHIP_NAVI12) >+ring->sched.ready = false; >+} else { >+r = amdgpu_ring_test_helper(ring); >+if (r) >+goto done; >+} > > for (i = 0; i < adev->vcn.num_enc_rings; ++i) { > ring = &adev->vcn.inst->ring_enc[i]; >@@ -245,8 +244,11 @@ static int vcn_v2_0_hw_init(void *handle) > > done: > if (!r) >-DRM_INFO("VCN decode and encode initialized >successfully(under %s).\n", >-(adev->pg_flags & >AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); >+DRM_INFO("VCN %s encode initialized >successfully(under %s).\n", >+(adev->asic_type == CHIP_NAVI12 && >+amdgpu_sriov_vf(adev))?"":"decode and", >+(adev->pg_flags & >+AMD_PG_SUPPORT_VCN_DPG)?"DPG >Mode":"SPG Mode"); > > return r; > } >@@ -1719,9 +1721,6 @@ int vcn_v2_0_dec_ring_test_ring(struct >amdgpu_ring *ring) > unsigned i; > int r; > >-if (amdgpu_sriov_vf(adev)) >-return 0; >- > WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); > r = amdgpu_ring_alloc(ring, 4); > if (r) >-- >2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov navi12
Since vcn decoding ring is not required, so just disable it. Signed-off-by: Frank.Min Signed-off-by: Emily Deng --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 - 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 8844f650b17f..5d5c41c9d5aa 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev, if (adev->uvd.harvest_config & (1 << i)) continue; - if (adev->vcn.inst[i].ring_dec.sched.ready) + if (adev->vcn.inst[i].ring_dec.sched.ready || + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))) ++num_rings; } ib_start_alignment = 16; diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c index 116b9643d5ba..e4b61f3a45fb 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c @@ -220,21 +220,20 @@ static int vcn_v2_0_hw_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; - int i, r; + int i, r = -1; adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, ring->doorbell_index, 0); - if (amdgpu_sriov_vf(adev)) + if (amdgpu_sriov_vf(adev)) { vcn_v2_0_start_sriov(adev); - - r = amdgpu_ring_test_helper(ring); - if (r) - goto done; - - //Disable vcn decode for sriov - if (amdgpu_sriov_vf(adev)) - ring->sched.ready = false; + if (adev->asic_type == CHIP_NAVI12) + ring->sched.ready = false; + } else { + r = amdgpu_ring_test_helper(ring); + if (r) + goto done; + } for (i = 0; i < adev->vcn.num_enc_rings; ++i) { ring = &adev->vcn.inst->ring_enc[i]; @@ -245,8 +244,11 @@ static int vcn_v2_0_hw_init(void *handle) done: if (!r) - DRM_INFO("VCN decode and encode initialized successfully(under %s).\n", - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); + DRM_INFO("VCN %s encode initialized successfully(under %s).\n", + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))?"":"decode and", + (adev->pg_flags & + AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); return r; } @@ -1719,9 +1721,6 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring) unsigned i; int r; - if (amdgpu_sriov_vf(adev)) - return 0; - WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); r = amdgpu_ring_alloc(ring, 4); if (r) -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx
[PATCH 1/6] drm/amdgpu: Disable vcn decode ring for sriov navi12
Since vcn decoding ring is not required, so just disable it. Signed-off-by: Frank.Min Signed-off-by: Emily Deng --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 +++- drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 29 - 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c index 8844f650b17f..5d5c41c9d5aa 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c @@ -427,7 +427,9 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev, if (adev->uvd.harvest_config & (1 << i)) continue; - if (adev->vcn.inst[i].ring_dec.sched.ready) + if (adev->vcn.inst[i].ring_dec.sched.ready || + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))) ++num_rings; } ib_start_alignment = 16; diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c index 116b9643d5ba..e4b61f3a45fb 100644 --- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c @@ -220,21 +220,20 @@ static int vcn_v2_0_hw_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_ring *ring = &adev->vcn.inst->ring_dec; - int i, r; + int i, r = -1; adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, ring->doorbell_index, 0); - if (amdgpu_sriov_vf(adev)) + if (amdgpu_sriov_vf(adev)) { vcn_v2_0_start_sriov(adev); - - r = amdgpu_ring_test_helper(ring); - if (r) - goto done; - - //Disable vcn decode for sriov - if (amdgpu_sriov_vf(adev)) - ring->sched.ready = false; + if (adev->asic_type == CHIP_NAVI12) + ring->sched.ready = false; + } else { + r = amdgpu_ring_test_helper(ring); + if (r) + goto done; + } for (i = 0; i < adev->vcn.num_enc_rings; ++i) { ring = &adev->vcn.inst->ring_enc[i]; @@ -245,8 +244,11 @@ static int vcn_v2_0_hw_init(void *handle) done: if (!r) - DRM_INFO("VCN decode and encode initialized successfully(under %s).\n", - (adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); + DRM_INFO("VCN %s encode initialized successfully(under %s).\n", + (adev->asic_type == CHIP_NAVI12 && + amdgpu_sriov_vf(adev))?"":"decode and", + (adev->pg_flags & + AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode"); return r; } @@ -1719,9 +1721,6 @@ int vcn_v2_0_dec_ring_test_ring(struct amdgpu_ring *ring) unsigned i; int r; - if (amdgpu_sriov_vf(adev)) - return 0; - WREG32(adev->vcn.inst[ring->me].external.scratch9, 0xCAFEDEAD); r = amdgpu_ring_alloc(ring, 4); if (r) -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx