Re: [PATCH 2/2] drm/amd/pm: correct the logics for retreiving SMU13 OD setting limits
Series is:
Acked-by: Alex Deucher
On Wed, Aug 2, 2023 at 9:36 PM Evan Quan wrote:
>
> To better meet the growing demainds for more OD features.
>
> Signed-off-by: Evan Quan
> ---
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 70 +--
> .../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 70 +--
> 2 files changed, 64 insertions(+), 76 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> index 2570e03e0fa7..f636a127983a 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
> @@ -97,6 +97,12 @@
> */
> #define SUPPORT_ECCTABLE_SMU_13_0_10_VERSION 0x00502200
>
> +#define PP_OD_FEATURE_GFXCLK_FMIN 0
> +#define PP_OD_FEATURE_GFXCLK_FMAX 1
> +#define PP_OD_FEATURE_UCLK_FMIN2
> +#define PP_OD_FEATURE_UCLK_FMAX3
> +#define PP_OD_FEATURE_GFX_VF_CURVE 4
> +
> static struct cmn2asic_msg_mapping
> smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT] = {
> MSG_MAP(TestMessage,PPSMC_MSG_TestMessage,
> 1),
> MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion,
> 1),
> @@ -1044,7 +1050,6 @@ static bool smu_v13_0_0_is_od_feature_supported(struct
> smu_context *smu,
>
> static void smu_v13_0_0_get_od_setting_limits(struct smu_context *smu,
> int od_feature_bit,
> - bool lower_boundary,
> int32_t *min,
> int32_t *max)
> {
> @@ -1056,29 +1061,28 @@ static void smu_v13_0_0_get_od_setting_limits(struct
> smu_context *smu,
> int32_t od_min_setting, od_max_setting;
>
> switch (od_feature_bit) {
> - case PP_OD_FEATURE_GFXCLK_BIT:
> - if (lower_boundary) {
> - od_min_setting = overdrive_lowerlimits->GfxclkFmin;
> - od_max_setting = overdrive_upperlimits->GfxclkFmin;
> - } else {
> - od_min_setting = overdrive_lowerlimits->GfxclkFmax;
> - od_max_setting = overdrive_upperlimits->GfxclkFmax;
> - }
> + case PP_OD_FEATURE_GFXCLK_FMIN:
> + od_min_setting = overdrive_lowerlimits->GfxclkFmin;
> + od_max_setting = overdrive_upperlimits->GfxclkFmin;
> break;
> - case PP_OD_FEATURE_UCLK_BIT:
> - if (lower_boundary) {
> - od_min_setting = overdrive_lowerlimits->UclkFmin;
> - od_max_setting = overdrive_upperlimits->UclkFmin;
> - } else {
> - od_min_setting = overdrive_lowerlimits->UclkFmax;
> - od_max_setting = overdrive_upperlimits->UclkFmax;
> - }
> + case PP_OD_FEATURE_GFXCLK_FMAX:
> + od_min_setting = overdrive_lowerlimits->GfxclkFmax;
> + od_max_setting = overdrive_upperlimits->GfxclkFmax;
> + break;
> + case PP_OD_FEATURE_UCLK_FMIN:
> + od_min_setting = overdrive_lowerlimits->UclkFmin;
> + od_max_setting = overdrive_upperlimits->UclkFmin;
> + break;
> + case PP_OD_FEATURE_UCLK_FMAX:
> + od_min_setting = overdrive_lowerlimits->UclkFmax;
> + od_max_setting = overdrive_upperlimits->UclkFmax;
> break;
> - case PP_OD_FEATURE_GFX_VF_CURVE_BIT:
> + case PP_OD_FEATURE_GFX_VF_CURVE:
> od_min_setting =
> overdrive_lowerlimits->VoltageOffsetPerZoneBoundary;
> od_max_setting =
> overdrive_upperlimits->VoltageOffsetPerZoneBoundary;
> break;
> default:
> + od_min_setting = od_max_setting = INT_MAX;
> break;
> }
>
> @@ -1305,13 +1309,11 @@ static int smu_v13_0_0_print_clk_levels(struct
> smu_context *smu,
>
> if (smu_v13_0_0_is_od_feature_supported(smu,
> PP_OD_FEATURE_GFXCLK_BIT)) {
> smu_v13_0_0_get_od_setting_limits(smu,
> -
> PP_OD_FEATURE_GFXCLK_BIT,
> - true,
> +
> PP_OD_FEATURE_GFXCLK_FMIN,
> &min_value,
> NULL);
> smu_v13_0_0_get_od_setting_limits(smu,
> -
> PP_OD_FEATURE_GFXCLK_BIT,
> - false,
> +
[PATCH 2/2] drm/amd/pm: correct the logics for retreiving SMU13 OD setting limits
To better meet the growing demainds for more OD features.
Signed-off-by: Evan Quan
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 70 +--
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 70 +--
2 files changed, 64 insertions(+), 76 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 2570e03e0fa7..f636a127983a 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -97,6 +97,12 @@
*/
#define SUPPORT_ECCTABLE_SMU_13_0_10_VERSION 0x00502200
+#define PP_OD_FEATURE_GFXCLK_FMIN 0
+#define PP_OD_FEATURE_GFXCLK_FMAX 1
+#define PP_OD_FEATURE_UCLK_FMIN2
+#define PP_OD_FEATURE_UCLK_FMAX3
+#define PP_OD_FEATURE_GFX_VF_CURVE 4
+
static struct cmn2asic_msg_mapping smu_v13_0_0_message_map[SMU_MSG_MAX_COUNT]
= {
MSG_MAP(TestMessage,PPSMC_MSG_TestMessage,
1),
MSG_MAP(GetSmuVersion, PPSMC_MSG_GetSmuVersion,
1),
@@ -1044,7 +1050,6 @@ static bool smu_v13_0_0_is_od_feature_supported(struct
smu_context *smu,
static void smu_v13_0_0_get_od_setting_limits(struct smu_context *smu,
int od_feature_bit,
- bool lower_boundary,
int32_t *min,
int32_t *max)
{
@@ -1056,29 +1061,28 @@ static void smu_v13_0_0_get_od_setting_limits(struct
smu_context *smu,
int32_t od_min_setting, od_max_setting;
switch (od_feature_bit) {
- case PP_OD_FEATURE_GFXCLK_BIT:
- if (lower_boundary) {
- od_min_setting = overdrive_lowerlimits->GfxclkFmin;
- od_max_setting = overdrive_upperlimits->GfxclkFmin;
- } else {
- od_min_setting = overdrive_lowerlimits->GfxclkFmax;
- od_max_setting = overdrive_upperlimits->GfxclkFmax;
- }
+ case PP_OD_FEATURE_GFXCLK_FMIN:
+ od_min_setting = overdrive_lowerlimits->GfxclkFmin;
+ od_max_setting = overdrive_upperlimits->GfxclkFmin;
break;
- case PP_OD_FEATURE_UCLK_BIT:
- if (lower_boundary) {
- od_min_setting = overdrive_lowerlimits->UclkFmin;
- od_max_setting = overdrive_upperlimits->UclkFmin;
- } else {
- od_min_setting = overdrive_lowerlimits->UclkFmax;
- od_max_setting = overdrive_upperlimits->UclkFmax;
- }
+ case PP_OD_FEATURE_GFXCLK_FMAX:
+ od_min_setting = overdrive_lowerlimits->GfxclkFmax;
+ od_max_setting = overdrive_upperlimits->GfxclkFmax;
+ break;
+ case PP_OD_FEATURE_UCLK_FMIN:
+ od_min_setting = overdrive_lowerlimits->UclkFmin;
+ od_max_setting = overdrive_upperlimits->UclkFmin;
+ break;
+ case PP_OD_FEATURE_UCLK_FMAX:
+ od_min_setting = overdrive_lowerlimits->UclkFmax;
+ od_max_setting = overdrive_upperlimits->UclkFmax;
break;
- case PP_OD_FEATURE_GFX_VF_CURVE_BIT:
+ case PP_OD_FEATURE_GFX_VF_CURVE:
od_min_setting =
overdrive_lowerlimits->VoltageOffsetPerZoneBoundary;
od_max_setting =
overdrive_upperlimits->VoltageOffsetPerZoneBoundary;
break;
default:
+ od_min_setting = od_max_setting = INT_MAX;
break;
}
@@ -1305,13 +1309,11 @@ static int smu_v13_0_0_print_clk_levels(struct
smu_context *smu,
if (smu_v13_0_0_is_od_feature_supported(smu,
PP_OD_FEATURE_GFXCLK_BIT)) {
smu_v13_0_0_get_od_setting_limits(smu,
-
PP_OD_FEATURE_GFXCLK_BIT,
- true,
+
PP_OD_FEATURE_GFXCLK_FMIN,
&min_value,
NULL);
smu_v13_0_0_get_od_setting_limits(smu,
-
PP_OD_FEATURE_GFXCLK_BIT,
- false,
+
PP_OD_FEATURE_GFXCLK_FMAX,
NULL,
&max_value);
size += sysfs_emit_at(buf, size, "SCLK: %7uMhz
%10uMhz\n",
@@ -1320,13 +1322,
