RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Official Use Only - Internal Distribution Only] Series is Reviewed-by: Emily.Deng >-Original Message- >From: amd-gfx On Behalf Of >Jingwen Chen >Sent: Wednesday, September 23, 2020 6:07 PM >To: amd-gfx@lists.freedesktop.org >Cc: Chen, JingWen >Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV > >smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate >sw_init for navi12. > >v2: skip above fw in SRIOV for vega10 and sienna_cichlid >v3: directly skip psp fw loading in SRIOV >Signed-off-by: Jingwen Chen >--- > drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 10 ++ > drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ > drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ > .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++ >- > drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ > 6 files changed, 29 insertions(+), 13 deletions(-) > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c >index 2c66e20b2ed9..18be544d8c1e 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c >@@ -161,10 +161,12 @@ static int psp_sw_init(void *handle) > struct psp_context *psp = >psp; > int ret; > >-ret = psp_init_microcode(psp); >-if (ret) { >-DRM_ERROR("Failed to load psp firmware!\n"); >-return ret; >+if (!amdgpu_sriov_vf(adev)) { >+ret = psp_init_microcode(psp); >+if (ret) { >+DRM_ERROR("Failed to load psp firmware!\n"); >+return ret; >+} > } > > ret = psp_memory_training_init(psp); >diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c >b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c >index 810635cbf4c1..86fb1eddf5a6 100644 >--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c >+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c >@@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct >amdgpu_device *adev) > struct amdgpu_firmware_info *info = NULL; > const struct common_firmware_header *header = NULL; > >+if (amdgpu_sriov_vf(adev)) >+return 0; >+ > DRM_DEBUG("\n"); > > switch (adev->asic_type) { >diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c >b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c >index 48c95a78a173..9c72b95b7463 100644 >--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c >+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c >@@ -203,6 +203,9 @@ static int sdma_v5_0_init_microcode(struct >amdgpu_device *adev) > const struct common_firmware_header *header = NULL; > const struct sdma_firmware_header_v1_0 *hdr; > >+if (amdgpu_sriov_vf(adev)) >+return 0; >+ > DRM_DEBUG("\n"); > > switch (adev->asic_type) { >diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c >b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c >index 34ccf376ee45..9f3952723c63 100644 >--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c >+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c >@@ -148,6 +148,9 @@ static int sdma_v5_2_init_microcode(struct >amdgpu_device *adev) > struct amdgpu_firmware_info *info = NULL; > const struct common_firmware_header *header = NULL; > >+if (amdgpu_sriov_vf(adev)) >+return 0; >+ > DRM_DEBUG("\n"); > > switch (adev->asic_type) { >diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c >b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c >index 1e222c5d91a4..daf122f24f23 100644 >--- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c >+++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c >@@ -209,11 +209,13 @@ static int vega10_smu_init(struct pp_hwmgr >*hwmgr) > int ret; > struct cgs_firmware_info info = {0}; > >-ret = cgs_get_firmware_info(hwmgr->device, >-CGS_UCODE_ID_SMU, >-); >-if (ret || !info.kptr) >-return -EINVAL; >+if (!amdgpu_sriov_vf((struct amdgpu_device *)hwmgr->adev)) { >+ret = cgs_get_firmware_info(hwmgr->device, >+CGS_UCODE_ID_SMU, >+); >+if (ret || !info.kptr) >+return -EINVAL; >+} > > priv = kzalloc(sizeof(struct vega10_smumgr), GFP_KERNEL); > >diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c >b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c >index 538e6f5e19eb..3010cb31324a 100644 >--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c >+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c >@@ -832,10 +832,13 @@ static int smu_sw_init(void *handle) > > smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; > smu->smu_dpm.requested_dpm_level = >AMD_DPM_FORCED_LEVEL_AUTO; >-ret = smu_init_microcode(smu); >-if (ret) { >-dev_err(adev->dev, "Failed to load smu firmware!\n");
[PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid v3: directly skip psp fw loading in SRIOV Signed-off-by: Jingwen Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 10 ++ drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 29 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..18be544d8c1e 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -161,10 +161,12 @@ static int psp_sw_init(void *handle) struct psp_context *psp = >psp; int ret; - ret = psp_init_microcode(psp); - if (ret) { - DRM_ERROR("Failed to load psp firmware!\n"); - return ret; + if (!amdgpu_sriov_vf(adev)) { + ret = psp_init_microcode(psp); + if (ret) { + DRM_ERROR("Failed to load psp firmware!\n"); + return ret; + } } ret = psp_memory_training_init(psp); diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..9c72b95b7463 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -203,6 +203,9 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) const struct common_firmware_header *header = NULL; const struct sdma_firmware_header_v1_0 *hdr; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 34ccf376ee45..9f3952723c63 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -148,6 +148,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c index 1e222c5d91a4..daf122f24f23 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c @@ -209,11 +209,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr) int ret; struct cgs_firmware_info info = {0}; - ret = cgs_get_firmware_info(hwmgr->device, - CGS_UCODE_ID_SMU, - ); - if (ret || !info.kptr) - return -EINVAL; + if (!amdgpu_sriov_vf((struct amdgpu_device *)hwmgr->adev)) { + ret = cgs_get_firmware_info(hwmgr->device, + CGS_UCODE_ID_SMU, + ); + if (ret || !info.kptr) + return -EINVAL; + } priv = kzalloc(sizeof(struct vega10_smumgr), GFP_KERNEL); diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 538e6f5e19eb..3010cb31324a 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -832,10 +832,13 @@ static int smu_sw_init(void *handle) smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; smu->smu_dpm.requested_dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; - ret = smu_init_microcode(smu); - if (ret) { - dev_err(adev->dev, "Failed to load smu firmware!\n"); - return ret; + + if (!amdgpu_sriov_vf(adev)) { + ret = smu_init_microcode(smu); + if (ret) { + dev_err(adev->dev, "Failed to load smu firmware!\n"); + return ret; + } }
RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Public Use] [AMD Public Use] Hi @Chen, JingWen<mailto:jingwen.ch...@amd.com>, CAP firmware will be only used for SRIOV. So please just add specific code path under SRIOV to initialize that firmware. Do not introduce SRIOV specific code for the most PSP firmware you are not used in guest. Regards, Hawking From: Chen, JingWen Sent: Tuesday, September 22, 2020 18:27 To: Deng, Emily ; Wang, Kevin(Yang) ; Zhang, Hawking ; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] [AMD Public Use] Hi Hawking, We may need other features in PSP in the future, e.g. load cap fw. So we can't skip the whole psp_init_microcode. Best Regards, JingWen Chen From: Deng, Emily mailto:emily.d...@amd.com>> Sent: Tuesday, September 22, 2020 6:22 PM To: Wang, Kevin(Yang) mailto:kevin1.w...@amd.com>>; Zhang, Hawking mailto:hawking.zh...@amd.com>>; Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] Hi Kevin and Hawking, I think both you are right. But currently we haven't good method to handle this. It seems need to re-arch the whole driver, not only refer to this patch. Only refer to this patch, I think it is OK. Best wishes Emily Deng From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Wang, Kevin(Yang) Sent: Tuesday, September 22, 2020 3:38 PM To: Zhang, Hawking mailto:hawking.zh...@amd.com>>; Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Subject: Re: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] [AMD Public Use] Embedding these SRIOV check into the underlying functions is in many places, which is not conducive to subsequent code optimization and maintenance. It took a long time to clean up the SMU code before, but now some new checks have been introduced into the SMU code. I think a new method should be adopted to solve this problem unless there's a special reason. Best Regards, Kevin From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> on behalf of Zhang, Hawking mailto:hawking.zh...@amd.com>> Sent: Tuesday, September 22, 2020 3:25 PM To: Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> mailto:amd-gfx@lists.freedesktop.org>> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] 1. Please do not add the amdgpu_sriov_vf check in every psp fw init_microcode function. psp_init_microcode is the entry point for all kinds of psp fw microcode initialization. 2. I'd like to get a whole picture on all the sequence you want to skip from guest side so that we can have more organized/reasonable approach to exclude those programing sequence for SRIOV, instead of having the amdgpu_sriov_vf patched case by case... Regards, Hawking -Original Message- From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Jingwen Chen Sent: Tuesday, September 22, 2020 15:09 To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen mailto:jingwen.ch...@amd.com>> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_hea
RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Public Use] [AMD Public Use] Hi Hawking, We may need other features in PSP in the future, e.g. load cap fw. So we can't skip the whole psp_init_microcode. Best Regards, JingWen Chen From: Deng, Emily Sent: Tuesday, September 22, 2020 6:22 PM To: Wang, Kevin(Yang) ; Zhang, Hawking ; Chen, JingWen ; amd-gfx@lists.freedesktop.org Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] Hi Kevin and Hawking, I think both you are right. But currently we haven't good method to handle this. It seems need to re-arch the whole driver, not only refer to this patch. Only refer to this patch, I think it is OK. Best wishes Emily Deng From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Wang, Kevin(Yang) Sent: Tuesday, September 22, 2020 3:38 PM To: Zhang, Hawking mailto:hawking.zh...@amd.com>>; Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Subject: Re: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] [AMD Public Use] Embedding these SRIOV check into the underlying functions is in many places, which is not conducive to subsequent code optimization and maintenance. It took a long time to clean up the SMU code before, but now some new checks have been introduced into the SMU code. I think a new method should be adopted to solve this problem unless there's a special reason. Best Regards, Kevin From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> on behalf of Zhang, Hawking mailto:hawking.zh...@amd.com>> Sent: Tuesday, September 22, 2020 3:25 PM To: Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> mailto:amd-gfx@lists.freedesktop.org>> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] 1. Please do not add the amdgpu_sriov_vf check in every psp fw init_microcode function. psp_init_microcode is the entry point for all kinds of psp fw microcode initialization. 2. I'd like to get a whole picture on all the sequence you want to skip from guest side so that we can have more organized/reasonable approach to exclude those programing sequence for SRIOV, instead of having the amdgpu_sriov_vf patched case by case... Regards, Hawking -Original Message- From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Jingwen Chen Sent: Tuesday, September 22, 2020 15:09 To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen mailto:jingwen.ch...@amd.com>> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_3 *sos_hdr_v1_3; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for sos microcode\n"); return -EINVAL; @@ -2558,6 +2564,9 @@ int psp_init_ta_microcode(struct psp_context *psp, int err = 0; int ta_index = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for ta microcode\n"); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 1006
RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Public Use] Hi Kevin and Hawking, I think both you are right. But currently we haven't good method to handle this. It seems need to re-arch the whole driver, not only refer to this patch. Only refer to this patch, I think it is OK. Best wishes Emily Deng From: amd-gfx On Behalf Of Wang, Kevin(Yang) Sent: Tuesday, September 22, 2020 3:38 PM To: Zhang, Hawking ; Chen, JingWen ; amd-gfx@lists.freedesktop.org Subject: Re: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] [AMD Public Use] Embedding these SRIOV check into the underlying functions is in many places, which is not conducive to subsequent code optimization and maintenance. It took a long time to clean up the SMU code before, but now some new checks have been introduced into the SMU code. I think a new method should be adopted to solve this problem unless there's a special reason. Best Regards, Kevin From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> on behalf of Zhang, Hawking mailto:hawking.zh...@amd.com>> Sent: Tuesday, September 22, 2020 3:25 PM To: Chen, JingWen mailto:jingwen.ch...@amd.com>>; amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> mailto:amd-gfx@lists.freedesktop.org>> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] 1. Please do not add the amdgpu_sriov_vf check in every psp fw init_microcode function. psp_init_microcode is the entry point for all kinds of psp fw microcode initialization. 2. I'd like to get a whole picture on all the sequence you want to skip from guest side so that we can have more organized/reasonable approach to exclude those programing sequence for SRIOV, instead of having the amdgpu_sriov_vf patched case by case... Regards, Hawking -Original Message- From: amd-gfx mailto:amd-gfx-boun...@lists.freedesktop.org>> On Behalf Of Jingwen Chen Sent: Tuesday, September 22, 2020 15:09 To: amd-gfx@lists.freedesktop.org<mailto:amd-gfx@lists.freedesktop.org> Cc: Chen, JingWen mailto:jingwen.ch...@amd.com>> Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen mailto:jingwen.ch...@amd.com>> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_3 *sos_hdr_v1_3; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for sos microcode\n"); return -EINVAL; @@ -2558,6 +2564,9 @@ int psp_init_ta_microcode(struct psp_context *psp, int err = 0; int ta_index = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for ta microcode\n"); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..9c72b95b7463 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5
Re: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Public Use] Embedding these SRIOV check into the underlying functions is in many places, which is not conducive to subsequent code optimization and maintenance. It took a long time to clean up the SMU code before, but now some new checks have been introduced into the SMU code. I think a new method should be adopted to solve this problem unless there's a special reason. Best Regards, Kevin From: amd-gfx on behalf of Zhang, Hawking Sent: Tuesday, September 22, 2020 3:25 PM To: Chen, JingWen ; amd-gfx@lists.freedesktop.org Cc: Chen, JingWen Subject: RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV [AMD Public Use] 1. Please do not add the amdgpu_sriov_vf check in every psp fw init_microcode function. psp_init_microcode is the entry point for all kinds of psp fw microcode initialization. 2. I'd like to get a whole picture on all the sequence you want to skip from guest side so that we can have more organized/reasonable approach to exclude those programing sequence for SRIOV, instead of having the amdgpu_sriov_vf patched case by case... Regards, Hawking -Original Message- From: amd-gfx On Behalf Of Jingwen Chen Sent: Tuesday, September 22, 2020 15:09 To: amd-gfx@lists.freedesktop.org Cc: Chen, JingWen Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_3 *sos_hdr_v1_3; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for sos microcode\n"); return -EINVAL; @@ -2558,6 +2564,9 @@ int psp_init_ta_microcode(struct psp_context *psp, int err = 0; int ta_index = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for ta microcode\n"); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..9c72b95b7463 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -203,6 +203,9 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) const struct common_firmware_header *header = NULL; const struct sdma_firmware_header_v1_0 *hdr; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 34ccf376ee45..9f3952723c63 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -148,6 +148,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_t
RE: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
[AMD Public Use] 1. Please do not add the amdgpu_sriov_vf check in every psp fw init_microcode function. psp_init_microcode is the entry point for all kinds of psp fw microcode initialization. 2. I'd like to get a whole picture on all the sequence you want to skip from guest side so that we can have more organized/reasonable approach to exclude those programing sequence for SRIOV, instead of having the amdgpu_sriov_vf patched case by case... Regards, Hawking -Original Message- From: amd-gfx On Behalf Of Jingwen Chen Sent: Tuesday, September 22, 2020 15:09 To: amd-gfx@lists.freedesktop.org Cc: Chen, JingWen Subject: [PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_3 *sos_hdr_v1_3; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for sos microcode\n"); return -EINVAL; @@ -2558,6 +2564,9 @@ int psp_init_ta_microcode(struct psp_context *psp, int err = 0; int ta_index = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for ta microcode\n"); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..9c72b95b7463 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -203,6 +203,9 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) const struct common_firmware_header *header = NULL; const struct sdma_firmware_header_v1_0 *hdr; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 34ccf376ee45..9f3952723c63 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -148,6 +148,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c index 1e222c5d91a4..daf122f24f23 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c @@ -209,11 +209,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr) int ret; struct cgs_firmware_info info = {0}; - ret = cgs_get_firmware_info(hwmgr->device, - CGS_UCODE_ID_SMU, - ); - if (ret || !info.kptr) - return -EINVAL; + if (!amdgpu_sriov_vf((struct
[PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
smc, sdma, sos, ta and asd fw is not used in SRIOV. Skip them to accelerate sw_init for navi12. v2: skip above fw in SRIOV for vega10 and sienna_cichlid Signed-off-by: Jingwen Chen --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 9 + drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 3 +++ .../gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c | 12 +++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c| 11 +++ 6 files changed, 32 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index 2c66e20b2ed9..9e2038de6ea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -2385,6 +2385,9 @@ int psp_init_asd_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_0 *asd_hdr; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for asd microcode\n"); return -EINVAL; @@ -2424,6 +2427,9 @@ int psp_init_sos_microcode(struct psp_context *psp, const struct psp_firmware_header_v1_3 *sos_hdr_v1_3; int err = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for sos microcode\n"); return -EINVAL; @@ -2558,6 +2564,9 @@ int psp_init_ta_microcode(struct psp_context *psp, int err = 0; int ta_index = 0; + if (amdgpu_sriov_vf(adev)) + return 0; + if (!chip_name) { dev_err(adev->dev, "invalid chip name for ta microcode\n"); return -EINVAL; diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c index 810635cbf4c1..86fb1eddf5a6 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c @@ -592,6 +592,9 @@ static int sdma_v4_0_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..9c72b95b7463 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -203,6 +203,9 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) const struct common_firmware_header *header = NULL; const struct sdma_firmware_header_v1_0 *hdr; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c index 34ccf376ee45..9f3952723c63 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c @@ -148,6 +148,9 @@ static int sdma_v5_2_init_microcode(struct amdgpu_device *adev) struct amdgpu_firmware_info *info = NULL; const struct common_firmware_header *header = NULL; + if (amdgpu_sriov_vf(adev)) + return 0; + DRM_DEBUG("\n"); switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c index 1e222c5d91a4..daf122f24f23 100644 --- a/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c +++ b/drivers/gpu/drm/amd/pm/powerplay/smumgr/vega10_smumgr.c @@ -209,11 +209,13 @@ static int vega10_smu_init(struct pp_hwmgr *hwmgr) int ret; struct cgs_firmware_info info = {0}; - ret = cgs_get_firmware_info(hwmgr->device, - CGS_UCODE_ID_SMU, - ); - if (ret || !info.kptr) - return -EINVAL; + if (!amdgpu_sriov_vf((struct amdgpu_device *)hwmgr->adev)) { + ret = cgs_get_firmware_info(hwmgr->device, + CGS_UCODE_ID_SMU, + ); + if (ret || !info.kptr) + return -EINVAL; + } priv = kzalloc(sizeof(struct vega10_smumgr), GFP_KERNEL); diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index 538e6f5e19eb..3010cb31324a 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -832,10 +832,13 @@ static int smu_sw_init(void *handle) smu->smu_dpm.dpm_level = AMD_DPM_FORCED_LEVEL_AUTO; smu->smu_dpm.requested_dpm_level =
[PATCH 2/2] drm/amd: Skip not used microcode loading in SRIOV
smc, sdma, sos and asd fw is not used in SRIOV. Skip them to accelerate sw_init. Signed-off-by: Jingwen Chen --- drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 16 +--- drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 3 +++ drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 +++ 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c index 6c5d9612abcb..11252f41ab12 100644 --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c @@ -109,15 +109,17 @@ static int psp_v11_0_init_microcode(struct psp_context *psp) BUG(); } - err = psp_init_sos_microcode(psp, chip_name); - if (err) - return err; - - if (adev->asic_type != CHIP_SIENNA_CICHLID && - adev->asic_type != CHIP_NAVY_FLOUNDER) { - err = psp_init_asd_microcode(psp, chip_name); + if (!amdgpu_sriov_vf(adev)) { + err = psp_init_sos_microcode(psp, chip_name); if (err) return err; + + if (adev->asic_type != CHIP_SIENNA_CICHLID && + adev->asic_type != CHIP_NAVY_FLOUNDER) { + err = psp_init_asd_microcode(psp, chip_name); + if (err) + return err; + } } switch (adev->asic_type) { diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 48c95a78a173..d2c26b5fa00c 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -219,6 +219,9 @@ static int sdma_v5_0_init_microcode(struct amdgpu_device *adev) BUG(); } + if(amdgpu_sriov_vf(adev)) + return 0; + for (i = 0; i < adev->sdma.num_instances; i++) { if (i == 0) snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_sdma.bin", chip_name); diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c index d8ca6d968813..85860e08c198 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c @@ -114,6 +114,9 @@ int smu_v11_0_init_microcode(struct smu_context *smu) return -EINVAL; } + if (amdgpu_sriov_vf(adev)) + return 0; + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_smc.bin", chip_name); err = request_firmware(>pm.fw, fw_name, adev->dev); -- 2.25.1 ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx