Re: [PATCH v3 1/1] drm/amdgpu: detach ring priority from gfx priority

2021-08-26 Thread Lazar, Lijo 

Reviewed-by: Lijo Lazar 

Thanks,
Lijo

On 8/26/2021 4:58 PM, Nirmoy Das wrote:

Currently AMDGPU_RING_PRIO_MAX is redefinition of a
max gfx hwip priority, this won't work well when we will
have a hwip with different set of priorities than gfx.
Also, HW ring priorities are different from ring priorities.

Create a global enum for ring priority levels which each
HWIP can use to define its own priority levels.

Signed-off-by: Nirmoy Das 
---
  drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c  | 2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h  | 7 +++
  drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 9 +++--
  3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index c88c5c6c54a2..0d1928260650 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -109,7 +109,7 @@ static int amdgpu_ctx_priority_permit(struct drm_file *filp,
return -EACCES;
  }

-static enum gfx_pipe_priority amdgpu_ctx_prio_to_compute_prio(int32_t prio)
+static enum amdgpu_gfx_pipe_priority amdgpu_ctx_prio_to_compute_prio(int32_t 
prio)
  {
switch (prio) {
case AMDGPU_CTX_PRIORITY_HIGH:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index d43fe2ed8116..f851196c83a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -42,10 +42,9 @@
  #define AMDGPU_MAX_GFX_QUEUES KGD_MAX_QUEUES
  #define AMDGPU_MAX_COMPUTE_QUEUES KGD_MAX_QUEUES

-enum gfx_pipe_priority {
-   AMDGPU_GFX_PIPE_PRIO_NORMAL = 1,
-   AMDGPU_GFX_PIPE_PRIO_HIGH,
-   AMDGPU_GFX_PIPE_PRIO_MAX
+enum amdgpu_gfx_pipe_priority {
+   AMDGPU_GFX_PIPE_PRIO_NORMAL = AMDGPU_RING_PRIO_1,
+   AMDGPU_GFX_PIPE_PRIO_HIGH = AMDGPU_RING_PRIO_2
  };

  /* Argument for PPSMC_MSG_GpuChangeState */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e713d31619fe..88d80eb3fea1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -36,8 +36,13 @@
  #define AMDGPU_MAX_VCE_RINGS  3
  #define AMDGPU_MAX_UVD_ENC_RINGS  2

-#define AMDGPU_RING_PRIO_DEFAULT   1
-#define AMDGPU_RING_PRIO_MAX   AMDGPU_GFX_PIPE_PRIO_MAX
+enum amdgpu_ring_priority_level {
+   AMDGPU_RING_PRIO_0,
+   AMDGPU_RING_PRIO_1,
+   AMDGPU_RING_PRIO_DEFAULT = 1,
+   AMDGPU_RING_PRIO_2,
+   AMDGPU_RING_PRIO_MAX
+};

  /* some special values for the owner field */
  #define AMDGPU_FENCE_OWNER_UNDEFINED  ((void *)0ul)
--
2.32.0

[PATCH v3 1/1] drm/amdgpu: detach ring priority from gfx priority

2021-08-26 Thread Nirmoy Das 
Currently AMDGPU_RING_PRIO_MAX is redefinition of a
max gfx hwip priority, this won't work well when we will
have a hwip with different set of priorities than gfx.
Also, HW ring priorities are different from ring priorities.

Create a global enum for ring priority levels which each
HWIP can use to define its own priority levels.

Signed-off-by: Nirmoy Das 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c  | 2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h  | 7 +++
 drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 9 +++--
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
index c88c5c6c54a2..0d1928260650 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c
@@ -109,7 +109,7 @@ static int amdgpu_ctx_priority_permit(struct drm_file *filp,
return -EACCES;
 }

-static enum gfx_pipe_priority amdgpu_ctx_prio_to_compute_prio(int32_t prio)
+static enum amdgpu_gfx_pipe_priority amdgpu_ctx_prio_to_compute_prio(int32_t 
prio)
 {
switch (prio) {
case AMDGPU_CTX_PRIORITY_HIGH:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index d43fe2ed8116..f851196c83a5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -42,10 +42,9 @@
 #define AMDGPU_MAX_GFX_QUEUES KGD_MAX_QUEUES
 #define AMDGPU_MAX_COMPUTE_QUEUES KGD_MAX_QUEUES

-enum gfx_pipe_priority {
-   AMDGPU_GFX_PIPE_PRIO_NORMAL = 1,
-   AMDGPU_GFX_PIPE_PRIO_HIGH,
-   AMDGPU_GFX_PIPE_PRIO_MAX
+enum amdgpu_gfx_pipe_priority {
+   AMDGPU_GFX_PIPE_PRIO_NORMAL = AMDGPU_RING_PRIO_1,
+   AMDGPU_GFX_PIPE_PRIO_HIGH = AMDGPU_RING_PRIO_2
 };

 /* Argument for PPSMC_MSG_GpuChangeState */
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
index e713d31619fe..88d80eb3fea1 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h
@@ -36,8 +36,13 @@
 #define AMDGPU_MAX_VCE_RINGS   3
 #define AMDGPU_MAX_UVD_ENC_RINGS   2

-#define AMDGPU_RING_PRIO_DEFAULT   1
-#define AMDGPU_RING_PRIO_MAX   AMDGPU_GFX_PIPE_PRIO_MAX
+enum amdgpu_ring_priority_level {
+   AMDGPU_RING_PRIO_0,
+   AMDGPU_RING_PRIO_1,
+   AMDGPU_RING_PRIO_DEFAULT = 1,
+   AMDGPU_RING_PRIO_2,
+   AMDGPU_RING_PRIO_MAX
+};

 /* some special values for the owner field */
 #define AMDGPU_FENCE_OWNER_UNDEFINED   ((void *)0ul)
--
2.32.0